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/Kernel-v11.1.0/examples/coverity/
DREADME.md15 [MISRA.md](../../MISRA.md) and [coverity_misra.config](coverity_misra.config)
56 --coding-standard-config ../examples/coverity/coverity_misra.config \
/Kernel-v11.1.0/
DREADME.md149 git config core.autocrlf true
160 git config blame.ignoreRevsFile .git-blame-ignore-revs
168 spelling check. The config file for which can be found at [cspell.config.yaml](cspell.config.yaml)
DCMakeLists.txt18 …onfig` target defines the path to FreeRTOSConfig.h and optionally other freertos based config files
26 " include) # The config file directory\n"
35 " include) # The config file directory\n"
DMISRA.md11 Additionally, [MISRA configuration file](examples/coverity/coverity_misra.config)
/Kernel-v11.1.0/portable/ThirdParty/XCC/Xtensa/
DMakefile13 XT_CORE = $(patsubst %-params,%,$(notdir $(shell xt-xcc --show-config=core)))
14 CONFIGDIR = $(shell xt-xcc --show-config=config)
Dxtensa_context.h35 * abstraction layer (HAL) to deal with config specifics. It may also be
50 #include <xtensa/config/tie.h>
52 #include <xtensa/config/system.h>
91 by user TIE or the use of the MAC16 option in the user's Xtensa config.
92 The frame size is minimized by omitting regs not applicable to user's config.
Dxtensa_config.h32 * included in FreeRTOSConfig.h to properly set up the config-dependent
49 #include <xtensa/config/core.h>
50 #include <xtensa/config/system.h> /* required for XSHAL_CLIB */
Dxtensa_timer.h35 * abstraction layer (HAL) to deal with config specifics. It may also be
54 #include <xtensa/config/system.h>
Dportmacro.h45 #include <xtensa/config/core.h>
46 #include <xtensa/config/system.h> /* required for XSHAL_CLIB */
Dxtensa_rtos.h54 #include <xtensa/config/core.h>
58 #include <xtensa/config/system.h>
Dxtensa_intr.c37 #include <xtensa/config/core.h>
Dxtensa_intr_asm.S36 #include <xtensa/config/core.h>
Dport.c31 #include <xtensa/config/core.h>
/Kernel-v11.1.0/.github/scripts/
Dkernel_checker.py34 # CONFIG
40 'cspell.config.yaml',
67 '.config'
/Kernel-v11.1.0/portable/ThirdParty/GCC/RP2040/include/
Dportmacro.h86 /* We have to use PICO_DIVIDER_DISABLE_INTERRUPTS as the source of truth rathern than our config,
131 /* Check validity of number of cores specified in config */
133 #error "Invalid number of cores specified in config!"
137 #error "Invalid tick core specified in config!"
/Kernel-v11.1.0/portable/ThirdParty/GCC/Xtensa_ESP32/include/
Dxtensa_config.h35 * included in FreeRTOSConfig.h to properly set up the config-dependent
53 #include <xtensa/config/core.h>
54 #include <xtensa/config/system.h> /* required for XSHAL_CLIB */
Dxtensa_timer.h38 * abstraction layer (HAL) to deal with config specifics. It may also be
58 #include <xtensa/config/system.h>
Dxtensa_rtos.h58 #include <xtensa/config/core.h>
62 #include <xtensa/config/system.h>
Dportmacro.h75 #include <xtensa/config/core.h>
76 #include <xtensa/config/system.h> /* required for XSHAL_CLIB */
/Kernel-v11.1.0/portable/ThirdParty/xClang/XCOREAI/
Dportmacro.h56 /* This may be set to zero in the config file if the rtos_time
73 /* Check validity of number of cores specified in config */
75 #error "Invalid number of cores specified in config!"
/Kernel-v11.1.0/.github/workflows/
Dauto-release.yml48 git config --global user.name ${{ github.actor }}
49 git config --global user.email ${{ github.actor }}@users.noreply.github.com
Dunit-tests.yml38 …lcov --config-file FreeRTOS/Test/CMock/lcovrc --summary FreeRTOS/Test/CMock/build/cmock_test.info …
/Kernel-v11.1.0/portable/ThirdParty/GCC/RP2040/
DCMakeLists.txt36 … We need to inject the following header file into ALL SDK files (which we do via the config header)
DREADME.md39 Some additional `config` options are defined [here](include/rp2040_config.h) which control some low…
/Kernel-v11.1.0/portable/ThirdParty/GCC/Xtensa_ESP32/
Dport.c63 #include <xtensa/config/core.h>
564 …ache_lock_bug() && "ESP32 Rev 3 + Dual Core + PSRAM requires INT WDT enabled in project config!" ); in esp_startup_start_app()

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