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/Kernel-v11.1.0/portable/ThirdParty/GCC/ARM_TFM/
DREADME.md4 services in Trusted Firmware M(TF-M) through Platform Security Architecture
5 (PSA) API based on the ARM Cortex-M23, Cortex-M33, Cortex-M55 and Cortex-M85
10 …ify. See [PSA Resource Page](https://www.arm.com/architecture/security-features/platform-security).
12 TF-M is an open source project. It provides a reference implementation of PSA
13 for Arm M-profile architecture. Please get the details from this [link](https://www.trustedfirmware…
19 in trusted-firmware-m (tag: TF-Mv2.0.0). The implementation is based on
26 * Step 2: build the nonsecure image. Please follow the **Build the Non-Secure Side** for details.
30 ### Get the TF-M source code
32 …git.trustedfirmware.org/TF-M/trusted-firmware-m.git/) to get the source code. This port is support…
34 ### Build TF-M
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Dos_wrapper_freertos.c2 * Copyright (c) 2019-2024, Arm Limited. All rights reserved.
4 * SPDX-License-Identifier: MIT
27 * \interface/include/os_wrapper/mutex.h by TF-M(tag: TF-Mv2.0.0).
57 /*-----------------------------------------------------------*/
82 /*-----------------------------------------------------------*/
104 /*-----------------------------------------------------------*/
112 /*-----------------------------------------------------------*/
/Kernel-v11.1.0/portable/ARMv8M/secure/
DReadMe.txt1 This directory tree contains the master copy of the FreeRTOS Armv8-M and
2 Armv8.1-M ports.
7 If your Armv8-M/Armv8.1-M application uses TrustZone then use the files from the
10 If your Armv8-M/Armv8.1-M application does not use TrustZone then use the files from
/Kernel-v11.1.0/portable/ARMv8M/
DReadMe.txt1 This directory tree contains the master copy of the FreeRTOS Armv8-M and
2 Armv8.1-M ports.
7 If your Armv8-M and Armv8.1-M application uses TrustZone then use the files from the
10 If your Armv8-M and Armv8.1-M application does not use TrustZone then use the files from
/Kernel-v11.1.0/portable/ARMv8M/non_secure/
DReadMe.txt1 This directory tree contains the master copy of the FreeRTOS Armv8-M and
2 Armv8.1-M ports.
7 If your Armv8-M/Armv8.1-M application uses TrustZone then use the files from the
10 If your Armv8-M/Armv8.1-M application does not use TrustZone then use the files from
/Kernel-v11.1.0/examples/template_configuration/
DFreeRTOSConfig.h5 * SPDX-License-Identifier: MIT
56 /* configSYSTICK_CLOCK_HZ is an optional parameter for ARM Cortex-M ports only.
58 * By default ARM Cortex-M ports generate the RTOS tick interrupt from the
59 * Cortex-M SysTick timer. Most Cortex-M MCUs run the SysTick timer at the same
60 * frequency as the MCU itself - when that is the case configSYSTICK_CLOCK_HZ is
80 /* Set configUSE_PREEMPTION to 1 to use pre-emptive scheduling. Set
81 * configUSE_PREEMPTION to 0 to use co-operative scheduling.
82 * See https://www.freertos.org/single-core-amp-smp-rtos-scheduling.html. */
89 * https://freertos.org/single-core-amp-smp-rtos-scheduling.html. */
93 * run using an algorithm optimised to the instruction set of the target hardware -
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/Kernel-v11.1.0/portable/
DCMakeLists.txt2 include( GCC/RISC-V/chip_extensions.cmake )
6 include( IAR/RISC-V/chip_extensions.cmake )
9 # FreeRTOS internal cmake file. Do not use it in user top-level project
16 # FreeRTOS internal cmake file. Do not use it in user top-level project
23 # 16-Bit DOS ports for BCC
32 # ARMv7-M port for Texas Instruments Code Composer Studio
37 # ARMv7E-M port for Texas Instruments Code Composer Studio
42 # ARMv7-R port for Texas Instruments Code Composer Studio
44 CCS/ARM_Cortex-R4/port.c
45 CCS/ARM_Cortex-R4/portASM.asm>
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/Kernel-v11.1.0/
DHistory.txt5 + Add ARMv7-R port with Memory Protection Unit (MPU) support.
6 + Add Memory Protection Unit (MPU) support to the Cortex-M0 port.
8 buffer when a task reads from a non-empty buffer:
9 - The task reading from a non-empty stream buffer returns immediately
11 - The task reading from a non-empty steam batching buffer blocks until the
37 + Add 64-bit support to the FreeRTOS Windows Simulator port. We thank @watsk
39 + Add support for 64-bit Microblaze processor to the MicroblazeV9 port. We
43 compilers. We thank @Forty-Bot for their contribution.
54 POSIX timers to address issues with signal handling in non-FreeRTOS
56 + Update ARM_TFM port to support TF-Mv2.0.0 release of trusted-firmware-m.
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DCMakeLists.txt9 # DEPRECATED: FREERTOS_CONFIG_FILE_DIRECTORY - but still supported if no freertos_config defined fo…
31 …message(WARNING " Using deprecated 'FREERTOS_CONFIG_FILE_DIRECTORY' - please update your project C…
44 …message(WARNING " FREERTOS_PORT is not set. Please specify it from top-level CMake file (example):…
47 " -DFREERTOS_PORT=GCC_ARM_CM4F\n"
50 " A_CUSTOM_PORT - Compiler: User Defined Target: User Defined\n"
51 " BCC_16BIT_DOS_FLSH186 - Compiler: BCC Target: 16 bit DOS Flsh186\n"
52 " BCC_16BIT_DOS_PC - Compiler: BCC Target: 16 bit DOS PC\n"
53 " CCS_ARM_CM3 - Compiler: CCS Target: ARM Cortex-M3\n"
54 … " CCS_ARM_CM4F - Compiler: CCS Target: ARM Cortex-M4 with FPU\n"
55 " CCS_ARM_CR4 - Compiler: CCS Target: ARM Cortex-R4\n"
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/Kernel-v11.1.0/portable/WizC/PIC18/
DInstall.bat8 echo Hello, I'm the installationscript for %PACKAGENAME%.
14 echo I'm checking your system for fedC
16 echo YES, I found a fedC-installation!
19 echo I could not find a fedC-installation.
25 echo I'm checking your system for wizC
27 echo YES, I found a wizC-installation!
30 echo I could not find a wizC-installation.
36 echo I could not find a FED C-compiler installation on your system.
38 echo Perhaps I got confused because you installed fedC or wizC in a non-default directory.
39 echo If this is the case, please change the path at the top of this install-script.
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/Kernel-v11.1.0/.github/workflows/
Dauto-release.yml1 name: Kernel-Auto-Release
15 description: "Version String for task.h on main branch (leave empty to leave as-is)."
20 release-packager:
22 runs-on: ubuntu-latest
25 - name: Tool Setup
26 uses: actions/setup-python@v2
33 - name: Checkout FreeRTOS Release Tools
40 - name: Checkout FreeRTOS Kernel
44 fetch-depth: 0
46 - name: Configure git identity
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Dformatting.yml8 bashPass: \033[32;1mPASSED -
9 bashInfo: \033[33;1mINFO -
10 bashFail: \033[31;1mFAILED -
11 bashEnd: \033[0m
19 runs-on: ubuntu-20.04
21 - name: Apply Formatting Fix
22 id: check-formatting
23 uses: FreeRTOS/CI-CD-Github-Actions/formatting-bot@main
25 exclude-dirs: portable
Dkernel-checks.yml1 name: Kernel-Checker
6 kernel-checker:
8 runs-on: ubuntu-20.04
11 - name: Tool Setup
12 uses: actions/setup-python@v3
17 - name: Checkout FreeRTOS Tools
21 sparse-checkout: '.github'
26 - name: Checkout Pull Request
32 - name: Collecting changed files
33 uses: lots0logs/gh-action-get-changed-files@2.2.2
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/Kernel-v11.1.0/.github/ISSUE_TEMPLATE/
Dfeature_request.md1 ---
8 ---
11 A clear and concise description of what the problem is. Ex. I'm always frustrated when [...]
/Kernel-v11.1.0/portable/ThirdParty/GCC/Xtensa_ESP32/include/
Dxt_asm_utils.h2 * SPDX-FileCopyrightText: 2017, Intel Corporation
4 * SPDX-License-Identifier: Apache-2.0
6 * SPDX-FileContributor: 2016-2022 Espressif Systems (Shanghai) CO LTD
11 …ttps://github.com/zephyrproject-rtos/zephyr/blob/dafd3485bf67880e667b6e9a758b0b64fb688d63/arch/xte…
21 * A0-A15) to their ABI-defined spill regions on the stack.
29 * and repeats until all but the A0-A3 registers of the original frame
33 * - Vastly smaller code size
35 * - More easily maintained if changes are needed to window over/underflow
38 * - Requires no scratch registers to do its work, so can be used safely in any
41 * - If the WOE bit is not enabled (for example, in code written for
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/Kernel-v11.1.0/portable/GCC/ARM_CM55_NTZ/non_secure/
Dportmacro.h5 * SPDX-License-Identifier: MIT
32 /* *INDENT-OFF* */
36 /* *INDENT-ON* */
38 /*------------------------------------------------------------------------------
45 *------------------------------------------------------------------------------
51 /*-----------------------------------------------------------*/
56 #define portARCH_NAME "Cortex-M55"
59 /*-----------------------------------------------------------*/
61 /* ARMv8-M common port configurations. */
63 /*-----------------------------------------------------------*/
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/Kernel-v11.1.0/portable/ARMv8M/non_secure/portable/GCC/ARM_CM55/
Dportmacro.h5 * SPDX-License-Identifier: MIT
32 /* *INDENT-OFF* */
36 /* *INDENT-ON* */
38 /*------------------------------------------------------------------------------
45 *------------------------------------------------------------------------------
51 /*-----------------------------------------------------------*/
56 #define portARCH_NAME "Cortex-M55"
59 /*-----------------------------------------------------------*/
61 /* ARMv8-M common port configurations. */
63 /*-----------------------------------------------------------*/
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/Kernel-v11.1.0/portable/ARMv8M/non_secure/portable/GCC/ARM_CM85/
Dportmacro.h5 * SPDX-License-Identifier: MIT
32 /* *INDENT-OFF* */
36 /* *INDENT-ON* */
38 /*------------------------------------------------------------------------------
45 *------------------------------------------------------------------------------
51 /*-----------------------------------------------------------*/
56 #define portARCH_NAME "Cortex-M85"
59 /*-----------------------------------------------------------*/
61 /* ARMv8-M common port configurations. */
63 /*-----------------------------------------------------------*/
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/Kernel-v11.1.0/portable/GCC/ARM_CM35P/non_secure/
Dportmacro.h5 * SPDX-License-Identifier: MIT
32 /* *INDENT-OFF* */
36 /* *INDENT-ON* */
38 /*------------------------------------------------------------------------------
45 *------------------------------------------------------------------------------
51 #define portARCH_NAME "Cortex-M35P"
54 /*-----------------------------------------------------------*/
56 /* ARMv8-M common port configurations. */
58 /*-----------------------------------------------------------*/
63 #error configENABLE_MVE must be left undefined, or defined to 0 for the Cortex-M35.
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/Kernel-v11.1.0/portable/GCC/ARM_CM85/non_secure/
Dportmacro.h5 * SPDX-License-Identifier: MIT
32 /* *INDENT-OFF* */
36 /* *INDENT-ON* */
38 /*------------------------------------------------------------------------------
45 *------------------------------------------------------------------------------
51 /*-----------------------------------------------------------*/
56 #define portARCH_NAME "Cortex-M85"
59 /*-----------------------------------------------------------*/
61 /* ARMv8-M common port configurations. */
63 /*-----------------------------------------------------------*/
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/Kernel-v11.1.0/portable/GCC/ARM_CM35P_NTZ/non_secure/
Dportmacro.h5 * SPDX-License-Identifier: MIT
32 /* *INDENT-OFF* */
36 /* *INDENT-ON* */
38 /*------------------------------------------------------------------------------
45 *------------------------------------------------------------------------------
51 #define portARCH_NAME "Cortex-M35P"
54 /*-----------------------------------------------------------*/
56 /* ARMv8-M common port configurations. */
58 /*-----------------------------------------------------------*/
63 #error configENABLE_MVE must be left undefined, or defined to 0 for the Cortex-M35.
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/Kernel-v11.1.0/portable/ARMv8M/non_secure/portable/GCC/ARM_CM33_NTZ/
Dportmacro.h5 * SPDX-License-Identifier: MIT
32 /* *INDENT-OFF* */
36 /* *INDENT-ON* */
38 /*------------------------------------------------------------------------------
45 *------------------------------------------------------------------------------
51 #define portARCH_NAME "Cortex-M33"
54 /*-----------------------------------------------------------*/
56 /* ARMv8-M common port configurations. */
58 /*-----------------------------------------------------------*/
63 #error configENABLE_MVE must be left undefined, or defined to 0 for the Cortex-M33.
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/Kernel-v11.1.0/portable/GCC/ARM_CM55/non_secure/
Dportmacro.h5 * SPDX-License-Identifier: MIT
32 /* *INDENT-OFF* */
36 /* *INDENT-ON* */
38 /*------------------------------------------------------------------------------
45 *------------------------------------------------------------------------------
51 /*-----------------------------------------------------------*/
56 #define portARCH_NAME "Cortex-M55"
59 /*-----------------------------------------------------------*/
61 /* ARMv8-M common port configurations. */
63 /*-----------------------------------------------------------*/
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/Kernel-v11.1.0/portable/ARMv8M/non_secure/portable/GCC/ARM_CM35P/
Dportmacro.h5 * SPDX-License-Identifier: MIT
32 /* *INDENT-OFF* */
36 /* *INDENT-ON* */
38 /*------------------------------------------------------------------------------
45 *------------------------------------------------------------------------------
51 #define portARCH_NAME "Cortex-M35P"
54 /*-----------------------------------------------------------*/
56 /* ARMv8-M common port configurations. */
58 /*-----------------------------------------------------------*/
63 #error configENABLE_MVE must be left undefined, or defined to 0 for the Cortex-M35.
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/Kernel-v11.1.0/portable/GCC/ARM_CM85_NTZ/non_secure/
Dportmacro.h5 * SPDX-License-Identifier: MIT
32 /* *INDENT-OFF* */
36 /* *INDENT-ON* */
38 /*------------------------------------------------------------------------------
45 *------------------------------------------------------------------------------
51 /*-----------------------------------------------------------*/
56 #define portARCH_NAME "Cortex-M85"
59 /*-----------------------------------------------------------*/
61 /* ARMv8-M common port configurations. */
63 /*-----------------------------------------------------------*/
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