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/Kernel-v11.1.0/.github/workflows/
Dkernel-demos.yml1 name: FreeRTOS-Kernel Demos
6 bashPass: \033[32;1mPASSED -
7 bashInfo: \033[33;1mINFO -
8 bashFail: \033[31;1mFAILED -
12 WIN32-MSVC:
14 runs-on: windows-latest
16 - name: Checkout the FreeRTOS/FreeRTOS Repository
22 fetch-depth: 1
25 - name: Checkout Pull Request
30 - name: Add msbuild to PATH
[all …]
Dci.yml10 runs-on: ubuntu-20.04
12 - uses: actions/checkout@v4.1.1
13 - name: Check Formatting of FreeRTOS-Kernel Files
14 uses: FreeRTOS/CI-CD-Github-Actions/formatting@main
16 exclude-dirs: portable
18 spell-check:
19 runs-on: ubuntu-latest
21 - name: Clone This Repo
23 - name: Run spellings check
24 uses: FreeRTOS/CI-CD-Github-Actions/spellings@main
[all …]
Dunit-tests.yml6 runs-on: ubuntu-20.04
8 - name: Checkout Parent Repository
14 fetch-depth: 1
17 - name: Checkout Pull Request
22 - name: Setup Python
23 uses: actions/setup-python@master
25 python-version: 3.8
27 - name: Install packages
29 sudo apt-get install lcov cflow ruby doxygen build-essential unifdef
30 - name: Run Unit Tests with ENABLE_SANITIZER=1
[all …]
Dauto-release.yml1 name: Kernel-Auto-Release
15 description: "Version String for task.h on main branch (leave empty to leave as-is)."
20 release-packager:
22 runs-on: ubuntu-latest
25 - name: Tool Setup
26 uses: actions/setup-python@v2
33 - name: Checkout FreeRTOS Release Tools
40 - name: Checkout FreeRTOS Kernel
44 fetch-depth: 0
46 - name: Configure git identity
[all …]
/Kernel-v11.1.0/portable/CodeWarrior/HCS12/
Dport.c5 * SPDX-License-Identifier: MIT
34 /*-----------------------------------------------------------
36 *----------------------------------------------------------*/
45 /* Interrupt service routines have to be in non-banked memory - as does the
64 critical section should not be left (i.e. interrupts should not be re-enabled)
65 until the nesting depth reaches 0. This variable simply tracks the nesting
66 depth. Each task maintains it's own critical nesting depth variable so
71 /*-----------------------------------------------------------*/
83 pxTopOfStack--; in pxPortInitialiseStack()
85 pxTopOfStack--; in pxPortInitialiseStack()
[all …]
/Kernel-v11.1.0/portable/GCC/HCS12/
Dport.c5 * SPDX-License-Identifier: MIT
38 /*-----------------------------------------------------------
40 *----------------------------------------------------------*/
49 /* NOTE: Interrupt service routines must be in non-banked memory - as does the
61 /* Function in non-banked memory which actually switches to first task. */
65 * critical section should not be left (i.e. interrupts should not be re-enabled)
66 * until the nesting depth reaches 0. This variable simply tracks the nesting
67 * depth. Each task maintains it's own critical nesting depth variable so
70 volatile UBaseType_t uxCriticalNesting = 0x80; /* un-initialized */
72 /*-----------------------------------------------------------*/
[all …]
/Kernel-v11.1.0/portable/IAR/ARM_CA9/
DportASM.h5 ; * SPDX-License-Identifier: MIT
41 PUSH {R0-R12, R14}
56 VPUSHNE {D0-D15}
57 VPUSHNE {D16-D31}
88 VPOPNE {D16-D31}
89 VPOPNE {D0-D15}
92 ; Restore the critical section nesting depth
97 ; Ensure the priority mask is correct for the critical nesting depth
106 POP {R0-R12, R14}
/Kernel-v11.1.0/portable/RVDS/ARM_CA9/
Dportmacro.inc5 ; * SPDX-License-Identifier: MIT
47 PUSH {R0-R12, R14}
62 VPUSHNE {D0-D15}
63 VPUSHNE {D16-D31}
95 VPOPNE {D16-D31}
96 VPOPNE {D0-D15}
99 ; Restore the critical section nesting depth
104 ; Ensure the priority mask is correct for the critical nesting depth
113 POP {R0-R12, R14}
/Kernel-v11.1.0/portable/MPLAB/PIC24_dsPIC/
Dport.c5 * SPDX-License-Identifier: MIT
35 /*-----------------------------------------------------------
37 *----------------------------------------------------------*/
63 /* Records the nesting depth of calls to portENTER_CRITICAL(). */
243 /* Finally the critical nesting depth. */ in pxPortInitialiseStack()
249 /*-----------------------------------------------------------*/
265 /*-----------------------------------------------------------*/
273 /*-----------------------------------------------------------*/
280 …uint32_t ulCompareMatch = ( ( configCPU_CLOCK_HZ / portTIMER_PRESCALE ) / configTICK_RATE_HZ ) - 1; in vApplicationSetupTickTimerInterrupt()
304 /*-----------------------------------------------------------*/
[all …]
/Kernel-v11.1.0/portable/GCC/ARM_CA9/
DportASM.S5 * SPDX-License-Identifier: MIT
63 PUSH {R0-R12, R14}
79 VPUSHNE {D0-D15}
80 VPUSHNE {D16-D31}
109 VPOPNE {D16-D31}
110 VPOPNE {D0-D15}
114 /* Restore the critical section nesting depth. */
119 /* Ensure the priority mask is correct for the critical nesting depth. */
130 POP {R0-R12, R14}
184 PUSH {r0-r4, r12}
[all …]
/Kernel-v11.1.0/portable/GCC/ARM_CR5/
DportASM.S5 * SPDX-License-Identifier: MIT
63 PUSH {R0-R12, R14}
80 VPUSHNE {D0-D15}
113 VPOPNE {D0-D15}
118 /* Restore the critical section nesting depth. */
123 /* Ensure the priority mask is correct for the critical nesting depth. */
134 POP {R0-R12, R14}
187 PUSH {r0-r4, r12}
205 alligned on an 8-byte boundary? */
211 PUSH {r0-r4, lr}
[all …]
/Kernel-v11.1.0/portable/IAR/STR91x/
DISR_Support.h5 * SPDX-License-Identifier: MIT
73 R0 - LR
111 The critical nesting depth is the first item on the stack.
133 R0 - R14
145 And return -correcting the offset in the LR to obtain the
/Kernel-v11.1.0/portable/CCS/ARM_Cortex-R4/
Dport.c5 * SPDX-License-Identifier: MIT
33 /*-----------------------------------------------------------*/
35 /* Count of the critical section nesting depth. */
38 /*-----------------------------------------------------------*/
64 /*-----------------------------------------------------------*/
69 /*-----------------------------------------------------------*/
75 /*-----------------------------------------------------------*/
90 pxTopOfStack--; in pxPortInitialiseStack()
97 /* First on the stack is the return address - which is the start of the as in pxPortInitialiseStack()
101 pxTopOfStack--; in pxPortInitialiseStack()
[all …]
/Kernel-v11.1.0/portable/IAR/ARM_CA5_No_GIC/
Dport.c5 * SPDX-License-Identifier: MIT
74 /*-----------------------------------------------------------*/
87 /*-----------------------------------------------------------*/
96 /* Saved as part of the task context. If ulPortTaskHasFPUContext is non-zero
103 /* Counts the interrupt nesting depth. A context switch is only performed if
104 * if the nesting depth is 0. */
108 /*-----------------------------------------------------------*/
122 * GDB does not try decoding a non-existent return address. */ in pxPortInitialiseStack()
124 pxTopOfStack--; in pxPortInitialiseStack()
126 pxTopOfStack--; in pxPortInitialiseStack()
[all …]
DportASM.h5 ; * SPDX-License-Identifier: MIT
41 PUSH {R0-R12, R14}
56 VPUSHNE {D0-D15}
58 VPUSHNE {D16-D31}
91 VPOPNE {D16-D31}
93 VPOPNE {D0-D15}
96 ; Restore the critical section nesting depth
103 POP {R0-R12, R14}
/Kernel-v11.1.0/portable/IAR/STR71x/
DISR_Support.h5 * ; * SPDX-License-Identifier: MIT
73 R0 - LR
111 The critical nesting depth is the first item on the stack.
133 R0 - R14
145 And return -correcting the offset in the LR to obtain the
/Kernel-v11.1.0/portable/IAR/STR75x/
DISR_Support.h5 * ; * SPDX-License-Identifier: MIT
73 R0 - LR
111 The critical nesting depth is the first item on the stack.
133 R0 - R14
145 And return -correcting the offset in the LR to obtain the
/Kernel-v11.1.0/portable/IAR/AtmelSAM9XE/
DISR_Support.h5 * ; * SPDX-License-Identifier: MIT
72 R0 - LR
110 The critical nesting depth is the first item on the stack.
132 R0 - R14
144 And return -correcting the offset in the LR to obtain the
/Kernel-v11.1.0/portable/IAR/LPC2000/
DISR_Support.h5 * ; * SPDX-License-Identifier: MIT
73 R0 - LR
111 The critical nesting depth is the first item on the stack.
133 R0 - R14
145 And return -correcting the offset in the LR to obtain the
/Kernel-v11.1.0/portable/IAR/AtmelSAM7S64/
DISR_Support.h5 * ; * SPDX-License-Identifier: MIT
73 R0 - LR
111 The critical nesting depth is the first item on the stack.
133 R0 - R14
145 And return -correcting the offset in the LR to obtain the
/Kernel-v11.1.0/portable/GCC/TriCore_1782/
Dport.c5 * SPDX-License-Identifier: MIT
46 …/* The stack pointer is accessible using portCSA_TO_ADDRESS( portCSA_TO_ADDRESS( pxCurrentTCB->pxT…
50 /*-----------------------------------------------------------*/
53 … ( 0x000008FFUL ) /* Supervisor Mode, MPU Register Set 0 and Call Depth Counting disabled.…
54 …TUS_WORD ( 0x000014FFUL ) /* IO Level 1, MPU Register Set 1 and Call Depth Counting disabled.…
55 …TATUS_WORD ( 0x000010FFUL ) /* IO Level 0, MPU Register Set 1 and Call Depth Counting disabled.…
71 /*-----------------------------------------------------------*/
89 /*-----------------------------------------------------------*/
97 /*-----------------------------------------------------------*/
111 * PCX for the task needs to point to Lower->Upper->NULL arrangement. in pxPortInitialiseStack()
[all …]
/Kernel-v11.1.0/portable/RVDS/ARM7_LPC21xx/
Dportmacro.inc5 ; * SPDX-License-Identifier: MIT
41 LDR R0, =ulCriticalNesting ; The critical nesting depth is the first item on...
48 LDMFD LR, {R0-R14}^ ; Restore all system mode registers for the task.
53 ; And return - correcting the offset in the LR to obtain ...
75 STMDB LR,{R0-LR}^ ; Push all the system mode registers onto the task stack.
/Kernel-v11.1.0/portable/GCC/ARM_CRx_No_GIC/
Dport.c5 * SPDX-License-Identifier: MIT
74 /* Let the user override the pre-loading of the initial LR with the address of
83 /*-----------------------------------------------------------*/
96 /*-----------------------------------------------------------*/
105 /* Saved as part of the task context. If ulPortTaskHasFPUContext is non-zero then
112 /* Counts the interrupt nesting depth. A context switch is only performed if
113 * if the nesting depth is 0. */
119 /*-----------------------------------------------------------*/
133 * GDB does not try decoding a non-existent return address. */ in pxPortInitialiseStack()
135 pxTopOfStack--; in pxPortInitialiseStack()
[all …]
/Kernel-v11.1.0/portable/IAR/ARM_CRx_No_GIC/
Dport.c5 * SPDX-License-Identifier: MIT
74 /* Let the user override the pre-loading of the initial LR with the address of
83 /*-----------------------------------------------------------*/
96 /*-----------------------------------------------------------*/
105 /* Saved as part of the task context. If ulPortTaskHasFPUContext is non-zero then
112 /* Counts the interrupt nesting depth. A context switch is only performed if
113 * if the nesting depth is 0. */
116 /*-----------------------------------------------------------*/
130 * GDB does not try decoding a non-existent return address. */ in pxPortInitialiseStack()
132 pxTopOfStack--; in pxPortInitialiseStack()
[all …]
/Kernel-v11.1.0/portable/GCC/ARM_AARCH64/
DportASM.S5 * SPDX-License-Identifier: MIT
55 STP X0, X1, [SP, #-0x10]!
56 STP X2, X3, [SP, #-0x10]!
57 STP X4, X5, [SP, #-0x10]!
58 STP X6, X7, [SP, #-0x10]!
59 STP X8, X9, [SP, #-0x10]!
60 STP X10, X11, [SP, #-0x10]!
61 STP X12, X13, [SP, #-0x10]!
62 STP X14, X15, [SP, #-0x10]!
63 STP X16, X17, [SP, #-0x10]!
[all …]

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