1NXP SoCs - Overview 2===================== 3.. section-numbering:: 4 :suffix: . 5 6The QorIQ family of ARM based SoCs that are supported on TF-A are: 7 81. LX2160A 9 10- SoC Overview: 11 12The LX2160A multicore processor, the highest-performance member of the 13Layerscape family, combines FinFET process technology's low power and 14sixteen Arm® Cortex®-A72 cores with datapath acceleration optimized for 15L2/3 packet processing, together with security offload, robust traffic 16management and quality of service. 17 18Details about LX2160A can be found at `lx2160a`_. 19 20- LX2160ARDB Board: 21 22The LX2160A reference design board provides a comprehensive platform 23that enables design and evaluation of the LX2160A or LX2162A processors. It 24comes preloaded with a board support package (BSP) based on a standard Linux 25kernel. 26 27Board details can be fetched from the link: `lx2160ardb`_. 28 292. LS1028A 30 31- SoC Overview: 32 33The Layerscape LS1028A applications processor for industrial and 34automotive includes a time-sensitive networking (TSN) -enabled Ethernet 35switch and Ethernet controllers to support converged IT and OT networks. 36Two powerful 64-bit Arm®v8 cores support real-time processing for 37industrial control and virtual machines for edge computing in the IoT. 38The integrated GPU and LCD controller enable Human-Machine Interface 39(HMI) systems with next-generation interfaces. 40 41Details about LS1028A can be found at `ls1028a`_. 42 43- LS1028ARDB Board: 44 45The LS1028A reference design board (RDB) is a computing, evaluation, 46and development platform that supports industrial IoT applications, human 47machine interface solutions, and industrial networking. 48 49Details about LS1028A RDB board can be found at `ls1028ardb`_. 50 513. LS1043A 52 53- SoC Overview: 54 55The Layerscape LS1043A processor is NXP's first quad-core, 64-bit Arm®-based 56processor for embedded networking. The LS1023A (two core version) and the 57LS1043A (four core version) deliver greater than 10 Gbps of performance 58in a flexible I/O package supporting fanless designs. This SoC is a 59purpose-built solution for small-form-factor networking and industrial 60applications with BOM optimizations for economic low layer PCB, lower cost 61power supply and single clock design. The new 0.9V versions of the LS1043A 62and LS1023A deliver addition power savings for applications such as Wireless 63LAN and to Power over Ethernet systems. 64 65Details about LS1043A can be found at `ls1043a`_. 66 67- LS1043ARDB Board: 68 69The LS1043A reference design board (RDB) is a computing, evaluation, and 70development platform that supports the Layerscape LS1043A architecture 71processor. The LS1043A-RDB can help shorten your time to market by providing 72the following features: 73 74Memory subsystem: 75 * 2GByte DDR4 SDRAM (32bit bus) 76 * 128 Mbyte NOR flash single-chip memory 77 * 512 Mbyte NAND flash 78 * 16 Mbyte high-speed SPI flash 79 * SD connector to interface with the SD memory card 80 81Ethernet: 82 * XFI 10G port 83 * QSGMII with 4x 1G ports 84 * Two RGMII ports 85 86PCIe: 87 * PCIe2 (Lanes C) to mini-PCIe slot 88 * PCIe3 (Lanes D) to PCIe slot 89 90USB 3.0: two super speed USB 3.0 type A ports 91 92UART: supports two UARTs up to 115200 bps for console 93 94Details about LS1043A RDB board can be found at `ls1043ardb`_. 95 964. LS1046A 97 98- SoC Overview: 99 100The LS1046A is a cost-effective, power-efficient, and highly integrated 101system-on-chip (SoC) design that extends the reach of the NXP value-performance 102line of QorIQ communications processors. Featuring power-efficient 64-bit 103Arm Cortex-A72 cores with ECC-protected L1 and L2 cache memories for high 104reliability, running up to 1.8 GHz. 105 106Details about LS1046A can be found at `ls1046a`_. 107 108- LS1046ARDB Board: 109 110The LS1046A reference design board (RDB) is a high-performance computing, 111evaluation, and development platform that supports the Layerscape LS1046A 112architecture processor. The LS1046ARDB board supports the Layerscape LS1046A 113processor and is optimized to support the DDR4 memory and a full complement 114of high-speed SerDes ports. 115 116Details about LS1046A RDB board can be found at `ls1046ardb`_. 117 118- LS1046AFRWY Board: 119 120The LS1046A Freeway board (FRWY) is a high-performance computing, evaluation, 121and development platform that supports the LS1046A architecture processor 122capable of support more than 32,000 CoreMark performance. The FRWY-LS1046A 123board supports the LS1046A processor, onboard DDR4 memory, multiple Gigabit 124Ethernet, USB3.0 and M2_Type_E interfaces for Wi-Fi, FRWY-LS1046A-AC includes 125the Wi-Fi card. 126 127Details about LS1046A FRWY board can be found at `ls1046afrwy`_. 128 1295. LS1088A 130 131- SoC Overview: 132 133The LS1088A family of multicore communications processors combines up to and eight 134Arm Cortex-A53 cores with the advanced, high-performance data path and network 135peripheral interfaces required for wireless access points, networking infrastructure, 136intelligent edge access, including virtual customer premise equipment (vCPE) and 137high-performance industrial applications. 138 139Details about LS1088A can be found at `ls1088a`_. 140 141- LS1088ARDB Board: 142 143The LS1088A reference design board provides a comprehensive platform that 144enables design and evaluation of the product (LS1088A processor). This RDB 145comes pre-loaded with a board support package (BSP) based on a standard 146Linux kernel. 147 148Details about LS1088A RDB board can be found at `ls1088ardb`_. 149 150Table of supported boot-modes by each platform & platform that needs FIP-DDR: 151----------------------------------------------------------------------------- 152 153+---------------------+---------------------------------------------------------------------+-----------------+ 154| | BOOT_MODE | | 155| PLAT +-------+--------+-------+-------+-------+-------------+--------------+ fip_ddr_needed | 156| | sd | qspi | nor | nand | emmc | flexspi_nor | flexspi_nand | | 157+=====================+=======+========+=======+=======+=======+=============+==============+=================+ 158| lx2160ardb | yes | | | | yes | yes | | yes | 159+---------------------+-------+--------+-------+-------+-------+-------------+--------------+-----------------+ 160| ls1028ardb | yes | | | | yes | yes | | no | 161+---------------------+-------+--------+-------+-------+-------+-------------+--------------+-----------------+ 162| ls1043ardb | yes | | yes | yes | | | | no | 163+---------------------+-------+--------+-------+-------+-------+-------------+--------------+-----------------+ 164| ls1046ardb | yes | yes | | | yes | | | no | 165+---------------------+-------+--------+-------+-------+-------+-------------+--------------+-----------------+ 166| ls1046afrwy | yes | yes | | | | | | no | 167+---------------------+-------+--------+-------+-------+-------+-------------+--------------+-----------------+ 168| ls1088ardb | yes | yes | | | | | | no | 169+---------------------+-------+--------+-------+-------+-------+-------------+--------------+-----------------+ 170 171 172Boot Sequence 173------------- 174:: 175 176+ Secure World | Normal World 177+ EL0 | 178+ | 179+ EL1 BL32(Tee OS) | kernel 180+ ^ | | ^ 181+ | | | | 182+ EL2 | | | BL33(u-boot) 183+ | | | ^ 184+ | v | / 185+ EL3 BootROM --> BL2 --> BL31 ---------------/ 186+ 187 188Boot Sequence with FIP-DDR 189-------------------------- 190:: 191 192+ Secure World | Normal World 193+ EL0 | 194+ | 195+ EL1 fip-ddr BL32(Tee OS) | kernel 196+ ^ | ^ | | ^ 197+ | | | | | | 198+ EL2 | | | | | BL33(u-boot) 199+ | | | | | ^ 200+ | v | v | / 201+ EL3 BootROM --> BL2 -----> BL31 ---------------/ 202+ 203 204DDR Memory Layout 205-------------------------- 206 207NXP Platforms divide DRAM into banks: 208 209- DRAM0 Bank: Maximum size of this bank is fixed to 2GB, DRAM0 size is defined in platform_def.h if it is less than 2GB. 210 211- DRAM1 ~ DRAMn Bank: Greater than 2GB belongs to DRAM1 and following banks, and size of DRAMn Bank varies for one platform to others. 212 213The following diagram is default DRAM0 memory layout in which secure memory is at top of DRAM0. 214 215:: 216 217 high +---------------------------------------------+ 218 | | 219 | Secure EL1 Payload Shared Memory (2 MB) | 220 | | 221 +---------------------------------------------+ 222 | | 223 | Secure Memory (64 MB) | 224 | | 225 +---------------------------------------------+ 226 | | 227 | Non Secure Memory | 228 | | 229 low +---------------------------------------------+ 230 231How to build 232============= 233 234Code Locations 235-------------- 236 237- OP-TEE: 238 `link <https://source.codeaurora.org/external/qoriq/qoriq-components/optee_os>`__ 239 240- U-Boot: 241 `link <https://source.codeaurora.org/external/qoriq/qoriq-components/u-boot>`__ 242 243- RCW: 244 `link <https://source.codeaurora.org/external/qoriq/qoriq-components/rcw>`__ 245 246- ddr-phy-binary: Required by platforms that need fip-ddr. 247 `link <https:://github.com/NXP/ddr-phy-binary>`__ 248 249- cst: Required for TBBR. 250 `link <https:://source.codeaurora.org/external/qoriq/qoriq-components/cst>`__ 251 252Build Procedure 253--------------- 254 255- Fetch all the above repositories into local host. 256 257- Prepare AARCH64 toolchain and set the environment variable "CROSS_COMPILE". 258 259 .. code:: shell 260 261 export CROSS_COMPILE=.../bin/aarch64-linux-gnu- 262 263- Build RCW. Refer README from the respective cloned folder for more details. 264 265- Build u-boot and OPTee firstly, and get binary images: u-boot.bin and tee.bin. 266 For u-boot you can use the <platform>_tfa_defconfig for build. 267 268- Copy/clone the repo "ddr-phy-binary" to the tfa directory for platform needing ddr-fip. 269 270- Below are the steps to build TF-A images for the supported platforms. 271 272Compilation steps without BL32 273~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 274 275BUILD BL2: 276 277-To compile 278 .. code:: shell 279 280 make PLAT=$PLAT \ 281 BOOT_MODE=<platform_supported_boot_mode> \ 282 RCW=$RCW_BIN \ 283 pbl 284 285BUILD FIP: 286 287 .. code:: shell 288 289 make PLAT=$PLAT \ 290 BOOT_MODE=<platform_supported_boot_mode> \ 291 RCW=$RCW_BIN \ 292 BL33=$UBOOT_SECURE_BIN \ 293 pbl \ 294 fip 295 296Compilation steps with BL32 297~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 298 299BUILD BL2: 300 301-To compile 302 .. code:: shell 303 304 make PLAT=$PLAT \ 305 BOOT_MODE=<platform_supported_boot_mode> \ 306 RCW=$RCW_BIN \ 307 BL32=$TEE_BIN SPD=opteed\ 308 pbl 309 310BUILD FIP: 311 312 .. code:: shell 313 314 make PLAT=$PLAT \ 315 BOOT_MODE=<platform_supported_boot_mode> \ 316 RCW=$RCW_BIN \ 317 BL32=$TEE_BIN SPD=opteed\ 318 BL33=$UBOOT_SECURE_BIN \ 319 pbl \ 320 fip 321 322 323BUILD fip-ddr (Mandatory for certain platforms, refer table above): 324~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 325 326-To compile additional fip-ddr for selected platforms(Refer above table if the platform needs fip-ddr). 327 .. code:: shell 328 329 make PLAT=<platform_name> fip-ddr 330 331 332Deploy ATF Images 333================= 334 335Note: The size in the standard uboot commands for copy to nor, qspi, nand or sd 336should be modified based on the binary size of the image to be copied. 337 338- Deploy ATF images on flexspi-Nor or QSPI flash Alt Bank from U-Boot prompt. 339 340 -- Commands to flash images for bl2_xxx.pbl and fip.bin 341 342 Notes: ls1028ardb has no flexspi-Nor Alt Bank, so use "sf probe 0:0" for current bank. 343 344 .. code:: shell 345 346 tftp 82000000 $path/bl2_xxx.pbl; 347 348 i2c mw 66 50 20;sf probe 0:1; sf erase 0 +$filesize; sf write 0x82000000 0x0 $filesize; 349 350 tftp 82000000 $path/fip.bin; 351 i2c mw 66 50 20;sf probe 0:1; sf erase 0x100000 +$filesize; sf write 0x82000000 0x100000 $filesize; 352 353 -- Next step is valid for platform where FIP-DDR is needed. 354 355 .. code:: shell 356 357 tftp 82000000 $path/ddr_fip.bin; 358 i2c mw 66 50 20;sf probe 0:1; sf erase 0x800000 +$filesize; sf write 0x82000000 0x800000 $filesize; 359 360 -- Then reset to alternate bank to boot up ATF. 361 362 Command for lx2160a, ls1088a and ls1028a platforms: 363 364 .. code:: shell 365 366 qixisreset altbank; 367 368 Command for ls1046a platforms: 369 370 .. code:: shell 371 372 cpld reset altbank; 373 374- Deploy ATF images on SD/eMMC from U-Boot prompt. 375 -- file_size_in_block_sizeof_512 = (Size_of_bytes_tftp / 512) 376 377 .. code:: shell 378 379 mmc dev <idx>; (idx = 1 for eMMC; idx = 0 for SD) 380 381 tftp 82000000 $path/bl2_<sd>_or_<emmc>.pbl; 382 mmc write 82000000 8 <file_size_in_block_sizeof_512>; 383 384 tftp 82000000 $path/fip.bin; 385 mmc write 82000000 0x800 <file_size_in_block_sizeof_512>; 386 387 -- Next step is valid for platform that needs FIP-DDR. 388 389 .. code:: shell 390 391 tftp 82000000 $path/ddr_fip.bin; 392 mmc write 82000000 0x4000 <file_size_in_block_sizeof_512>; 393 394 -- Then reset to sd/emmc to boot up ATF from sd/emmc as boot-source. 395 396 Command for lx2160A, ls1088a and ls1028a platforms: 397 398 .. code:: shell 399 400 qixisreset <sd or emmc>; 401 402 Command for ls1043a and ls1046a platform: 403 404 .. code:: shell 405 406 cpld reset <sd or emmc>; 407 408- Deploy ATF images on IFC nor flash from U-Boot prompt. 409 410 .. code:: shell 411 412 tftp 82000000 $path/bl2_nor.pbl; 413 protect off 64000000 +$filesize; erase 64000000 +$filesize; cp.b 82000000 64000000 $filesize; 414 415 tftp 82000000 $path/fip.bin; 416 protect off 64100000 +$filesize; erase 64100000 +$filesize; cp.b 82000000 64100000 $filesize; 417 418 -- Then reset to alternate bank to boot up ATF. 419 420 Command for ls1043a platform: 421 422 .. code:: shell 423 424 cpld reset altbank; 425 426- Deploy ATF images on IFC nand flash from U-Boot prompt. 427 428 .. code:: shell 429 430 tftp 82000000 $path/bl2_nand.pbl; 431 nand erase 0x0 $filesize; nand write 82000000 0x0 $filesize; 432 433 tftp 82000000 $path/fip.bin; 434 nand erase 0x100000 $filesize;nand write 82000000 0x100000 $filesize; 435 436 -- Then reset to nand flash to boot up ATF. 437 438 Command for ls1043a platform: 439 440 .. code:: shell 441 442 cpld reset nand; 443 444 445 446Trusted Board Boot: 447=================== 448 449For TBBR, the binary name changes: 450 451+-------------+--------------------------+---------+-------------------+ 452| Boot Type | BL2 | FIP | FIP-DDR | 453+=============+==========================+=========+===================+ 454| Normal Boot | bl2_<boot_mode>.pbl | fip.bin | ddr_fip.bin | 455+-------------+--------------------------+---------+-------------------+ 456| TBBR Boot | bl2_<boot_mode>_sec.pbl | fip.bin | ddr_fip_sec.bin | 457+-------------+--------------------------+---------+-------------------+ 458 459Refer `nxp-ls-tbbr.rst`_ for detailed user steps. 460 461 462.. _lx2160a: https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/layerscape-processors/layerscape-lx2160a-lx2120a-lx2080a-processors:LX2160A 463.. _lx2160ardb: https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/layerscape-communication-process/layerscape-lx2160a-multicore-communications-processor:LX2160A 464.. _ls1028a: https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/layerscape-processors/layerscape-1028a-applications-processor:LS1028A 465.. _ls1028ardb: https://www.nxp.com/design/qoriq-developer-resources/layerscape-ls1028a-reference-design-board:LS1028ARDB 466.. _ls1043a: https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/layerscape-processors/layerscape-1043a-and-1023a-processors:LS1043A 467.. _ls1043ardb: https://www.nxp.com/design/qoriq-developer-resources/layerscape-ls1043a-reference-design-board:LS1043A-RDB 468.. _ls1046a: https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/layerscape-processors/layerscape-1046a-and-1026a-processors:LS1046A 469.. _ls1046ardb: https://www.nxp.com/design/qoriq-developer-resources/layerscape-ls1046a-reference-design-board:LS1046A-RDB 470.. _ls1046afrwy: https://www.nxp.com/design/qoriq-developer-resources/ls1046a-freeway-board:FRWY-LS1046A 471.. _ls1088a: https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/layerscape-processors/layerscape-1088a-and-1048a-processor:LS1088A 472.. _ls1088ardb: https://www.nxp.com/design/qoriq-developer-resources/layerscape-ls1088a-reference-design-board:LS1088A-RDB 473.. _nxp-ls-tbbr.rst: ./nxp-ls-tbbr.rst 474
