1 /*! 2 * \file sx1276Regs-Fsk.h 3 * 4 * \brief SX1276 FSK modem registers and bits definitions 5 * 6 * \copyright Revised BSD License, see section \ref LICENSE. 7 * 8 * \code 9 * ______ _ 10 * / _____) _ | | 11 * ( (____ _____ ____ _| |_ _____ ____| |__ 12 * \____ \| ___ | (_ _) ___ |/ ___) _ \ 13 * _____) ) ____| | | || |_| ____( (___| | | | 14 * (______/|_____)_|_|_| \__)_____)\____)_| |_| 15 * (C)2013-2017 Semtech 16 * 17 * \endcode 18 * 19 * \author Miguel Luis ( Semtech ) 20 * 21 * \author Gregory Cristian ( Semtech ) 22 */ 23 #ifndef __SX1276_REGS_FSK_H__ 24 #define __SX1276_REGS_FSK_H__ 25 26 #ifdef __cplusplus 27 extern "C" 28 { 29 #endif 30 31 /*! 32 * ============================================================================ 33 * SX1276 Internal registers Address 34 * ============================================================================ 35 */ 36 #define REG_FIFO 0x00 37 // Common settings 38 #define REG_OPMODE 0x01 39 #define REG_BITRATEMSB 0x02 40 #define REG_BITRATELSB 0x03 41 #define REG_FDEVMSB 0x04 42 #define REG_FDEVLSB 0x05 43 #define REG_FRFMSB 0x06 44 #define REG_FRFMID 0x07 45 #define REG_FRFLSB 0x08 46 // Tx settings 47 #define REG_PACONFIG 0x09 48 #define REG_PARAMP 0x0A 49 #define REG_OCP 0x0B 50 // Rx settings 51 #define REG_LNA 0x0C 52 #define REG_RXCONFIG 0x0D 53 #define REG_RSSICONFIG 0x0E 54 #define REG_RSSICOLLISION 0x0F 55 #define REG_RSSITHRESH 0x10 56 #define REG_RSSIVALUE 0x11 57 #define REG_RXBW 0x12 58 #define REG_AFCBW 0x13 59 #define REG_OOKPEAK 0x14 60 #define REG_OOKFIX 0x15 61 #define REG_OOKAVG 0x16 62 #define REG_RES17 0x17 63 #define REG_RES18 0x18 64 #define REG_RES19 0x19 65 #define REG_AFCFEI 0x1A 66 #define REG_AFCMSB 0x1B 67 #define REG_AFCLSB 0x1C 68 #define REG_FEIMSB 0x1D 69 #define REG_FEILSB 0x1E 70 #define REG_PREAMBLEDETECT 0x1F 71 #define REG_RXTIMEOUT1 0x20 72 #define REG_RXTIMEOUT2 0x21 73 #define REG_RXTIMEOUT3 0x22 74 #define REG_RXDELAY 0x23 75 // Oscillator settings 76 #define REG_OSC 0x24 77 // Packet handler settings 78 #define REG_PREAMBLEMSB 0x25 79 #define REG_PREAMBLELSB 0x26 80 #define REG_SYNCCONFIG 0x27 81 #define REG_SYNCVALUE1 0x28 82 #define REG_SYNCVALUE2 0x29 83 #define REG_SYNCVALUE3 0x2A 84 #define REG_SYNCVALUE4 0x2B 85 #define REG_SYNCVALUE5 0x2C 86 #define REG_SYNCVALUE6 0x2D 87 #define REG_SYNCVALUE7 0x2E 88 #define REG_SYNCVALUE8 0x2F 89 #define REG_PACKETCONFIG1 0x30 90 #define REG_PACKETCONFIG2 0x31 91 #define REG_PAYLOADLENGTH 0x32 92 #define REG_NODEADRS 0x33 93 #define REG_BROADCASTADRS 0x34 94 #define REG_FIFOTHRESH 0x35 95 // SM settings 96 #define REG_SEQCONFIG1 0x36 97 #define REG_SEQCONFIG2 0x37 98 #define REG_TIMERRESOL 0x38 99 #define REG_TIMER1COEF 0x39 100 #define REG_TIMER2COEF 0x3A 101 // Service settings 102 #define REG_IMAGECAL 0x3B 103 #define REG_TEMP 0x3C 104 #define REG_LOWBAT 0x3D 105 // Status 106 #define REG_IRQFLAGS1 0x3E 107 #define REG_IRQFLAGS2 0x3F 108 // I/O settings 109 #define REG_DIOMAPPING1 0x40 110 #define REG_DIOMAPPING2 0x41 111 // Version 112 #define REG_VERSION 0x42 113 // Additional settings 114 #define REG_PLLHOP 0x44 115 #define REG_TCXO 0x4B 116 #define REG_PADAC 0x4D 117 #define REG_FORMERTEMP 0x5B 118 #define REG_BITRATEFRAC 0x5D 119 #define REG_AGCREF 0x61 120 #define REG_AGCTHRESH1 0x62 121 #define REG_AGCTHRESH2 0x63 122 #define REG_AGCTHRESH3 0x64 123 #define REG_PLL 0x70 124 125 /*! 126 * ============================================================================ 127 * SX1276 FSK bits control definition 128 * ============================================================================ 129 */ 130 131 /*! 132 * RegFifo 133 */ 134 135 /*! 136 * RegOpMode 137 */ 138 #define RF_OPMODE_LONGRANGEMODE_MASK 0x7F 139 #define RF_OPMODE_LONGRANGEMODE_OFF 0x00 140 #define RF_OPMODE_LONGRANGEMODE_ON 0x80 141 142 #define RF_OPMODE_MODULATIONTYPE_MASK 0x9F 143 #define RF_OPMODE_MODULATIONTYPE_FSK 0x00 // Default 144 #define RF_OPMODE_MODULATIONTYPE_OOK 0x20 145 146 #define RF_OPMODE_MODULATIONSHAPING_MASK 0xE7 147 #define RF_OPMODE_MODULATIONSHAPING_00 0x00 // Default 148 #define RF_OPMODE_MODULATIONSHAPING_01 0x08 149 #define RF_OPMODE_MODULATIONSHAPING_10 0x10 150 #define RF_OPMODE_MODULATIONSHAPING_11 0x18 151 152 #define RF_OPMODE_MASK 0xF8 153 #define RF_OPMODE_SLEEP 0x00 154 #define RF_OPMODE_STANDBY 0x01 // Default 155 #define RF_OPMODE_SYNTHESIZER_TX 0x02 156 #define RF_OPMODE_TRANSMITTER 0x03 157 #define RF_OPMODE_SYNTHESIZER_RX 0x04 158 #define RF_OPMODE_RECEIVER 0x05 159 160 /*! 161 * RegBitRate (bits/sec) 162 */ 163 #define RF_BITRATEMSB_1200_BPS 0x68 164 #define RF_BITRATELSB_1200_BPS 0x2B 165 #define RF_BITRATEMSB_2400_BPS 0x34 166 #define RF_BITRATELSB_2400_BPS 0x15 167 #define RF_BITRATEMSB_4800_BPS 0x1A // Default 168 #define RF_BITRATELSB_4800_BPS 0x0B // Default 169 #define RF_BITRATEMSB_9600_BPS 0x0D 170 #define RF_BITRATELSB_9600_BPS 0x05 171 #define RF_BITRATEMSB_15000_BPS 0x08 172 #define RF_BITRATELSB_15000_BPS 0x55 173 #define RF_BITRATEMSB_19200_BPS 0x06 174 #define RF_BITRATELSB_19200_BPS 0x83 175 #define RF_BITRATEMSB_38400_BPS 0x03 176 #define RF_BITRATELSB_38400_BPS 0x41 177 #define RF_BITRATEMSB_76800_BPS 0x01 178 #define RF_BITRATELSB_76800_BPS 0xA1 179 #define RF_BITRATEMSB_153600_BPS 0x00 180 #define RF_BITRATELSB_153600_BPS 0xD0 181 #define RF_BITRATEMSB_57600_BPS 0x02 182 #define RF_BITRATELSB_57600_BPS 0x2C 183 #define RF_BITRATEMSB_115200_BPS 0x01 184 #define RF_BITRATELSB_115200_BPS 0x16 185 #define RF_BITRATEMSB_12500_BPS 0x0A 186 #define RF_BITRATELSB_12500_BPS 0x00 187 #define RF_BITRATEMSB_25000_BPS 0x05 188 #define RF_BITRATELSB_25000_BPS 0x00 189 #define RF_BITRATEMSB_50000_BPS 0x02 190 #define RF_BITRATELSB_50000_BPS 0x80 191 #define RF_BITRATEMSB_100000_BPS 0x01 192 #define RF_BITRATELSB_100000_BPS 0x40 193 #define RF_BITRATEMSB_150000_BPS 0x00 194 #define RF_BITRATELSB_150000_BPS 0xD5 195 #define RF_BITRATEMSB_200000_BPS 0x00 196 #define RF_BITRATELSB_200000_BPS 0xA0 197 #define RF_BITRATEMSB_250000_BPS 0x00 198 #define RF_BITRATELSB_250000_BPS 0x80 199 #define RF_BITRATEMSB_32768_BPS 0x03 200 #define RF_BITRATELSB_32768_BPS 0xD1 201 202 /*! 203 * RegFdev (Hz) 204 */ 205 #define RF_FDEVMSB_2000_HZ 0x00 206 #define RF_FDEVLSB_2000_HZ 0x21 207 #define RF_FDEVMSB_5000_HZ 0x00 // Default 208 #define RF_FDEVLSB_5000_HZ 0x52 // Default 209 #define RF_FDEVMSB_10000_HZ 0x00 210 #define RF_FDEVLSB_10000_HZ 0xA4 211 #define RF_FDEVMSB_15000_HZ 0x00 212 #define RF_FDEVLSB_15000_HZ 0xF6 213 #define RF_FDEVMSB_20000_HZ 0x01 214 #define RF_FDEVLSB_20000_HZ 0x48 215 #define RF_FDEVMSB_25000_HZ 0x01 216 #define RF_FDEVLSB_25000_HZ 0x9A 217 #define RF_FDEVMSB_30000_HZ 0x01 218 #define RF_FDEVLSB_30000_HZ 0xEC 219 #define RF_FDEVMSB_35000_HZ 0x02 220 #define RF_FDEVLSB_35000_HZ 0x3D 221 #define RF_FDEVMSB_40000_HZ 0x02 222 #define RF_FDEVLSB_40000_HZ 0x8F 223 #define RF_FDEVMSB_45000_HZ 0x02 224 #define RF_FDEVLSB_45000_HZ 0xE1 225 #define RF_FDEVMSB_50000_HZ 0x03 226 #define RF_FDEVLSB_50000_HZ 0x33 227 #define RF_FDEVMSB_55000_HZ 0x03 228 #define RF_FDEVLSB_55000_HZ 0x85 229 #define RF_FDEVMSB_60000_HZ 0x03 230 #define RF_FDEVLSB_60000_HZ 0xD7 231 #define RF_FDEVMSB_65000_HZ 0x04 232 #define RF_FDEVLSB_65000_HZ 0x29 233 #define RF_FDEVMSB_70000_HZ 0x04 234 #define RF_FDEVLSB_70000_HZ 0x7B 235 #define RF_FDEVMSB_75000_HZ 0x04 236 #define RF_FDEVLSB_75000_HZ 0xCD 237 #define RF_FDEVMSB_80000_HZ 0x05 238 #define RF_FDEVLSB_80000_HZ 0x1F 239 #define RF_FDEVMSB_85000_HZ 0x05 240 #define RF_FDEVLSB_85000_HZ 0x71 241 #define RF_FDEVMSB_90000_HZ 0x05 242 #define RF_FDEVLSB_90000_HZ 0xC3 243 #define RF_FDEVMSB_95000_HZ 0x06 244 #define RF_FDEVLSB_95000_HZ 0x14 245 #define RF_FDEVMSB_100000_HZ 0x06 246 #define RF_FDEVLSB_100000_HZ 0x66 247 #define RF_FDEVMSB_110000_HZ 0x07 248 #define RF_FDEVLSB_110000_HZ 0x0A 249 #define RF_FDEVMSB_120000_HZ 0x07 250 #define RF_FDEVLSB_120000_HZ 0xAE 251 #define RF_FDEVMSB_130000_HZ 0x08 252 #define RF_FDEVLSB_130000_HZ 0x52 253 #define RF_FDEVMSB_140000_HZ 0x08 254 #define RF_FDEVLSB_140000_HZ 0xF6 255 #define RF_FDEVMSB_150000_HZ 0x09 256 #define RF_FDEVLSB_150000_HZ 0x9A 257 #define RF_FDEVMSB_160000_HZ 0x0A 258 #define RF_FDEVLSB_160000_HZ 0x3D 259 #define RF_FDEVMSB_170000_HZ 0x0A 260 #define RF_FDEVLSB_170000_HZ 0xE1 261 #define RF_FDEVMSB_180000_HZ 0x0B 262 #define RF_FDEVLSB_180000_HZ 0x85 263 #define RF_FDEVMSB_190000_HZ 0x0C 264 #define RF_FDEVLSB_190000_HZ 0x29 265 #define RF_FDEVMSB_200000_HZ 0x0C 266 #define RF_FDEVLSB_200000_HZ 0xCD 267 268 /*! 269 * RegFrf (MHz) 270 */ 271 #define RF_FRFMSB_863_MHZ 0xD7 272 #define RF_FRFMID_863_MHZ 0xC0 273 #define RF_FRFLSB_863_MHZ 0x00 274 #define RF_FRFMSB_864_MHZ 0xD8 275 #define RF_FRFMID_864_MHZ 0x00 276 #define RF_FRFLSB_864_MHZ 0x00 277 #define RF_FRFMSB_865_MHZ 0xD8 278 #define RF_FRFMID_865_MHZ 0x40 279 #define RF_FRFLSB_865_MHZ 0x00 280 #define RF_FRFMSB_866_MHZ 0xD8 281 #define RF_FRFMID_866_MHZ 0x80 282 #define RF_FRFLSB_866_MHZ 0x00 283 #define RF_FRFMSB_867_MHZ 0xD8 284 #define RF_FRFMID_867_MHZ 0xC0 285 #define RF_FRFLSB_867_MHZ 0x00 286 #define RF_FRFMSB_868_MHZ 0xD9 287 #define RF_FRFMID_868_MHZ 0x00 288 #define RF_FRFLSB_868_MHZ 0x00 289 #define RF_FRFMSB_869_MHZ 0xD9 290 #define RF_FRFMID_869_MHZ 0x40 291 #define RF_FRFLSB_869_MHZ 0x00 292 #define RF_FRFMSB_870_MHZ 0xD9 293 #define RF_FRFMID_870_MHZ 0x80 294 #define RF_FRFLSB_870_MHZ 0x00 295 296 #define RF_FRFMSB_902_MHZ 0xE1 297 #define RF_FRFMID_902_MHZ 0x80 298 #define RF_FRFLSB_902_MHZ 0x00 299 #define RF_FRFMSB_903_MHZ 0xE1 300 #define RF_FRFMID_903_MHZ 0xC0 301 #define RF_FRFLSB_903_MHZ 0x00 302 #define RF_FRFMSB_904_MHZ 0xE2 303 #define RF_FRFMID_904_MHZ 0x00 304 #define RF_FRFLSB_904_MHZ 0x00 305 #define RF_FRFMSB_905_MHZ 0xE2 306 #define RF_FRFMID_905_MHZ 0x40 307 #define RF_FRFLSB_905_MHZ 0x00 308 #define RF_FRFMSB_906_MHZ 0xE2 309 #define RF_FRFMID_906_MHZ 0x80 310 #define RF_FRFLSB_906_MHZ 0x00 311 #define RF_FRFMSB_907_MHZ 0xE2 312 #define RF_FRFMID_907_MHZ 0xC0 313 #define RF_FRFLSB_907_MHZ 0x00 314 #define RF_FRFMSB_908_MHZ 0xE3 315 #define RF_FRFMID_908_MHZ 0x00 316 #define RF_FRFLSB_908_MHZ 0x00 317 #define RF_FRFMSB_909_MHZ 0xE3 318 #define RF_FRFMID_909_MHZ 0x40 319 #define RF_FRFLSB_909_MHZ 0x00 320 #define RF_FRFMSB_910_MHZ 0xE3 321 #define RF_FRFMID_910_MHZ 0x80 322 #define RF_FRFLSB_910_MHZ 0x00 323 #define RF_FRFMSB_911_MHZ 0xE3 324 #define RF_FRFMID_911_MHZ 0xC0 325 #define RF_FRFLSB_911_MHZ 0x00 326 #define RF_FRFMSB_912_MHZ 0xE4 327 #define RF_FRFMID_912_MHZ 0x00 328 #define RF_FRFLSB_912_MHZ 0x00 329 #define RF_FRFMSB_913_MHZ 0xE4 330 #define RF_FRFMID_913_MHZ 0x40 331 #define RF_FRFLSB_913_MHZ 0x00 332 #define RF_FRFMSB_914_MHZ 0xE4 333 #define RF_FRFMID_914_MHZ 0x80 334 #define RF_FRFLSB_914_MHZ 0x00 335 #define RF_FRFMSB_915_MHZ 0xE4 // Default 336 #define RF_FRFMID_915_MHZ 0xC0 // Default 337 #define RF_FRFLSB_915_MHZ 0x00 // Default 338 #define RF_FRFMSB_916_MHZ 0xE5 339 #define RF_FRFMID_916_MHZ 0x00 340 #define RF_FRFLSB_916_MHZ 0x00 341 #define RF_FRFMSB_917_MHZ 0xE5 342 #define RF_FRFMID_917_MHZ 0x40 343 #define RF_FRFLSB_917_MHZ 0x00 344 #define RF_FRFMSB_918_MHZ 0xE5 345 #define RF_FRFMID_918_MHZ 0x80 346 #define RF_FRFLSB_918_MHZ 0x00 347 #define RF_FRFMSB_919_MHZ 0xE5 348 #define RF_FRFMID_919_MHZ 0xC0 349 #define RF_FRFLSB_919_MHZ 0x00 350 #define RF_FRFMSB_920_MHZ 0xE6 351 #define RF_FRFMID_920_MHZ 0x00 352 #define RF_FRFLSB_920_MHZ 0x00 353 #define RF_FRFMSB_921_MHZ 0xE6 354 #define RF_FRFMID_921_MHZ 0x40 355 #define RF_FRFLSB_921_MHZ 0x00 356 #define RF_FRFMSB_922_MHZ 0xE6 357 #define RF_FRFMID_922_MHZ 0x80 358 #define RF_FRFLSB_922_MHZ 0x00 359 #define RF_FRFMSB_923_MHZ 0xE6 360 #define RF_FRFMID_923_MHZ 0xC0 361 #define RF_FRFLSB_923_MHZ 0x00 362 #define RF_FRFMSB_924_MHZ 0xE7 363 #define RF_FRFMID_924_MHZ 0x00 364 #define RF_FRFLSB_924_MHZ 0x00 365 #define RF_FRFMSB_925_MHZ 0xE7 366 #define RF_FRFMID_925_MHZ 0x40 367 #define RF_FRFLSB_925_MHZ 0x00 368 #define RF_FRFMSB_926_MHZ 0xE7 369 #define RF_FRFMID_926_MHZ 0x80 370 #define RF_FRFLSB_926_MHZ 0x00 371 #define RF_FRFMSB_927_MHZ 0xE7 372 #define RF_FRFMID_927_MHZ 0xC0 373 #define RF_FRFLSB_927_MHZ 0x00 374 #define RF_FRFMSB_928_MHZ 0xE8 375 #define RF_FRFMID_928_MHZ 0x00 376 #define RF_FRFLSB_928_MHZ 0x00 377 378 /*! 379 * RegPaConfig 380 */ 381 #define RF_PACONFIG_PASELECT_MASK 0x7F 382 #define RF_PACONFIG_PASELECT_PABOOST 0x80 383 #define RF_PACONFIG_PASELECT_RFO 0x00 // Default 384 385 #define RF_PACONFIG_MAX_POWER_MASK 0x8F 386 387 #define RF_PACONFIG_OUTPUTPOWER_MASK 0xF0 388 389 /*! 390 * RegPaRamp 391 */ 392 #define RF_PARAMP_MODULATIONSHAPING_MASK 0x9F 393 #define RF_PARAMP_MODULATIONSHAPING_00 0x00 // Default 394 #define RF_PARAMP_MODULATIONSHAPING_01 0x20 395 #define RF_PARAMP_MODULATIONSHAPING_10 0x40 396 #define RF_PARAMP_MODULATIONSHAPING_11 0x60 397 398 #define RF_PARAMP_LOWPNTXPLL_MASK 0xEF 399 #define RF_PARAMP_LOWPNTXPLL_OFF 0x10 400 #define RF_PARAMP_LOWPNTXPLL_ON 0x00 // Default 401 402 #define RF_PARAMP_MASK 0xF0 403 #define RF_PARAMP_3400_US 0x00 404 #define RF_PARAMP_2000_US 0x01 405 #define RF_PARAMP_1000_US 0x02 406 #define RF_PARAMP_0500_US 0x03 407 #define RF_PARAMP_0250_US 0x04 408 #define RF_PARAMP_0125_US 0x05 409 #define RF_PARAMP_0100_US 0x06 410 #define RF_PARAMP_0062_US 0x07 411 #define RF_PARAMP_0050_US 0x08 412 #define RF_PARAMP_0040_US 0x09 // Default 413 #define RF_PARAMP_0031_US 0x0A 414 #define RF_PARAMP_0025_US 0x0B 415 #define RF_PARAMP_0020_US 0x0C 416 #define RF_PARAMP_0015_US 0x0D 417 #define RF_PARAMP_0012_US 0x0E 418 #define RF_PARAMP_0010_US 0x0F 419 420 /*! 421 * RegOcp 422 */ 423 #define RF_OCP_MASK 0xDF 424 #define RF_OCP_ON 0x20 // Default 425 #define RF_OCP_OFF 0x00 426 427 #define RF_OCP_TRIM_MASK 0xE0 428 #define RF_OCP_TRIM_045_MA 0x00 429 #define RF_OCP_TRIM_050_MA 0x01 430 #define RF_OCP_TRIM_055_MA 0x02 431 #define RF_OCP_TRIM_060_MA 0x03 432 #define RF_OCP_TRIM_065_MA 0x04 433 #define RF_OCP_TRIM_070_MA 0x05 434 #define RF_OCP_TRIM_075_MA 0x06 435 #define RF_OCP_TRIM_080_MA 0x07 436 #define RF_OCP_TRIM_085_MA 0x08 437 #define RF_OCP_TRIM_090_MA 0x09 438 #define RF_OCP_TRIM_095_MA 0x0A 439 #define RF_OCP_TRIM_100_MA 0x0B // Default 440 #define RF_OCP_TRIM_105_MA 0x0C 441 #define RF_OCP_TRIM_110_MA 0x0D 442 #define RF_OCP_TRIM_115_MA 0x0E 443 #define RF_OCP_TRIM_120_MA 0x0F 444 #define RF_OCP_TRIM_130_MA 0x10 445 #define RF_OCP_TRIM_140_MA 0x11 446 #define RF_OCP_TRIM_150_MA 0x12 447 #define RF_OCP_TRIM_160_MA 0x13 448 #define RF_OCP_TRIM_170_MA 0x14 449 #define RF_OCP_TRIM_180_MA 0x15 450 #define RF_OCP_TRIM_190_MA 0x16 451 #define RF_OCP_TRIM_200_MA 0x17 452 #define RF_OCP_TRIM_210_MA 0x18 453 #define RF_OCP_TRIM_220_MA 0x19 454 #define RF_OCP_TRIM_230_MA 0x1A 455 #define RF_OCP_TRIM_240_MA 0x1B 456 457 /*! 458 * RegLna 459 */ 460 #define RF_LNA_GAIN_MASK 0x1F 461 #define RF_LNA_GAIN_G1 0x20 // Default 462 #define RF_LNA_GAIN_G2 0x40 463 #define RF_LNA_GAIN_G3 0x60 464 #define RF_LNA_GAIN_G4 0x80 465 #define RF_LNA_GAIN_G5 0xA0 466 #define RF_LNA_GAIN_G6 0xC0 467 468 #define RF_LNA_BOOST_MASK 0xFC 469 #define RF_LNA_BOOST_OFF 0x00 // Default 470 #define RF_LNA_BOOST_ON 0x03 471 472 /*! 473 * RegRxConfig 474 */ 475 #define RF_RXCONFIG_RESTARTRXONCOLLISION_MASK 0x7F 476 #define RF_RXCONFIG_RESTARTRXONCOLLISION_ON 0x80 477 #define RF_RXCONFIG_RESTARTRXONCOLLISION_OFF 0x00 // Default 478 479 #define RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK 0x40 // Write only 480 481 #define RF_RXCONFIG_RESTARTRXWITHPLLLOCK 0x20 // Write only 482 483 #define RF_RXCONFIG_AFCAUTO_MASK 0xEF 484 #define RF_RXCONFIG_AFCAUTO_ON 0x10 485 #define RF_RXCONFIG_AFCAUTO_OFF 0x00 // Default 486 487 #define RF_RXCONFIG_AGCAUTO_MASK 0xF7 488 #define RF_RXCONFIG_AGCAUTO_ON 0x08 // Default 489 #define RF_RXCONFIG_AGCAUTO_OFF 0x00 490 491 #define RF_RXCONFIG_RXTRIGER_MASK 0xF8 492 #define RF_RXCONFIG_RXTRIGER_OFF 0x00 493 #define RF_RXCONFIG_RXTRIGER_RSSI 0x01 494 #define RF_RXCONFIG_RXTRIGER_PREAMBLEDETECT 0x06 // Default 495 #define RF_RXCONFIG_RXTRIGER_RSSI_PREAMBLEDETECT 0x07 496 497 /*! 498 * RegRssiConfig 499 */ 500 #define RF_RSSICONFIG_OFFSET_MASK 0x07 501 #define RF_RSSICONFIG_OFFSET_P_00_DB 0x00 // Default 502 #define RF_RSSICONFIG_OFFSET_P_01_DB 0x08 503 #define RF_RSSICONFIG_OFFSET_P_02_DB 0x10 504 #define RF_RSSICONFIG_OFFSET_P_03_DB 0x18 505 #define RF_RSSICONFIG_OFFSET_P_04_DB 0x20 506 #define RF_RSSICONFIG_OFFSET_P_05_DB 0x28 507 #define RF_RSSICONFIG_OFFSET_P_06_DB 0x30 508 #define RF_RSSICONFIG_OFFSET_P_07_DB 0x38 509 #define RF_RSSICONFIG_OFFSET_P_08_DB 0x40 510 #define RF_RSSICONFIG_OFFSET_P_09_DB 0x48 511 #define RF_RSSICONFIG_OFFSET_P_10_DB 0x50 512 #define RF_RSSICONFIG_OFFSET_P_11_DB 0x58 513 #define RF_RSSICONFIG_OFFSET_P_12_DB 0x60 514 #define RF_RSSICONFIG_OFFSET_P_13_DB 0x68 515 #define RF_RSSICONFIG_OFFSET_P_14_DB 0x70 516 #define RF_RSSICONFIG_OFFSET_P_15_DB 0x78 517 #define RF_RSSICONFIG_OFFSET_M_16_DB 0x80 518 #define RF_RSSICONFIG_OFFSET_M_15_DB 0x88 519 #define RF_RSSICONFIG_OFFSET_M_14_DB 0x90 520 #define RF_RSSICONFIG_OFFSET_M_13_DB 0x98 521 #define RF_RSSICONFIG_OFFSET_M_12_DB 0xA0 522 #define RF_RSSICONFIG_OFFSET_M_11_DB 0xA8 523 #define RF_RSSICONFIG_OFFSET_M_10_DB 0xB0 524 #define RF_RSSICONFIG_OFFSET_M_09_DB 0xB8 525 #define RF_RSSICONFIG_OFFSET_M_08_DB 0xC0 526 #define RF_RSSICONFIG_OFFSET_M_07_DB 0xC8 527 #define RF_RSSICONFIG_OFFSET_M_06_DB 0xD0 528 #define RF_RSSICONFIG_OFFSET_M_05_DB 0xD8 529 #define RF_RSSICONFIG_OFFSET_M_04_DB 0xE0 530 #define RF_RSSICONFIG_OFFSET_M_03_DB 0xE8 531 #define RF_RSSICONFIG_OFFSET_M_02_DB 0xF0 532 #define RF_RSSICONFIG_OFFSET_M_01_DB 0xF8 533 534 #define RF_RSSICONFIG_SMOOTHING_MASK 0xF8 535 #define RF_RSSICONFIG_SMOOTHING_2 0x00 536 #define RF_RSSICONFIG_SMOOTHING_4 0x01 537 #define RF_RSSICONFIG_SMOOTHING_8 0x02 // Default 538 #define RF_RSSICONFIG_SMOOTHING_16 0x03 539 #define RF_RSSICONFIG_SMOOTHING_32 0x04 540 #define RF_RSSICONFIG_SMOOTHING_64 0x05 541 #define RF_RSSICONFIG_SMOOTHING_128 0x06 542 #define RF_RSSICONFIG_SMOOTHING_256 0x07 543 544 /*! 545 * RegRssiCollision 546 */ 547 #define RF_RSSICOLISION_THRESHOLD 0x0A // Default 548 549 /*! 550 * RegRssiThresh 551 */ 552 #define RF_RSSITHRESH_THRESHOLD 0xFF // Default 553 554 /*! 555 * RegRssiValue (Read Only) 556 */ 557 558 /*! 559 * RegRxBw 560 */ 561 #define RF_RXBW_MANT_MASK 0xE7 562 #define RF_RXBW_MANT_16 0x00 563 #define RF_RXBW_MANT_20 0x08 564 #define RF_RXBW_MANT_24 0x10 // Default 565 566 #define RF_RXBW_EXP_MASK 0xF8 567 #define RF_RXBW_EXP_0 0x00 568 #define RF_RXBW_EXP_1 0x01 569 #define RF_RXBW_EXP_2 0x02 570 #define RF_RXBW_EXP_3 0x03 571 #define RF_RXBW_EXP_4 0x04 572 #define RF_RXBW_EXP_5 0x05 // Default 573 #define RF_RXBW_EXP_6 0x06 574 #define RF_RXBW_EXP_7 0x07 575 576 /*! 577 * RegAfcBw 578 */ 579 #define RF_AFCBW_MANTAFC_MASK 0xE7 580 #define RF_AFCBW_MANTAFC_16 0x00 581 #define RF_AFCBW_MANTAFC_20 0x08 // Default 582 #define RF_AFCBW_MANTAFC_24 0x10 583 584 #define RF_AFCBW_EXPAFC_MASK 0xF8 585 #define RF_AFCBW_EXPAFC_0 0x00 586 #define RF_AFCBW_EXPAFC_1 0x01 587 #define RF_AFCBW_EXPAFC_2 0x02 588 #define RF_AFCBW_EXPAFC_3 0x03 // Default 589 #define RF_AFCBW_EXPAFC_4 0x04 590 #define RF_AFCBW_EXPAFC_5 0x05 591 #define RF_AFCBW_EXPAFC_6 0x06 592 #define RF_AFCBW_EXPAFC_7 0x07 593 594 /*! 595 * RegOokPeak 596 */ 597 #define RF_OOKPEAK_BITSYNC_MASK 0xDF // Default 598 #define RF_OOKPEAK_BITSYNC_ON 0x20 // Default 599 #define RF_OOKPEAK_BITSYNC_OFF 0x00 600 601 #define RF_OOKPEAK_OOKTHRESHTYPE_MASK 0xE7 602 #define RF_OOKPEAK_OOKTHRESHTYPE_FIXED 0x00 603 #define RF_OOKPEAK_OOKTHRESHTYPE_PEAK 0x08 // Default 604 #define RF_OOKPEAK_OOKTHRESHTYPE_AVERAGE 0x10 605 606 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_MASK 0xF8 607 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_0_5_DB 0x00 // Default 608 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_1_0_DB 0x01 609 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_1_5_DB 0x02 610 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_2_0_DB 0x03 611 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_3_0_DB 0x04 612 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_4_0_DB 0x05 613 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_5_0_DB 0x06 614 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_6_0_DB 0x07 615 616 /*! 617 * RegOokFix 618 */ 619 #define RF_OOKFIX_OOKFIXEDTHRESHOLD 0x0C // Default 620 621 /*! 622 * RegOokAvg 623 */ 624 #define RF_OOKAVG_OOKPEAKTHRESHDEC_MASK 0x1F 625 #define RF_OOKAVG_OOKPEAKTHRESHDEC_000 0x00 // Default 626 #define RF_OOKAVG_OOKPEAKTHRESHDEC_001 0x20 627 #define RF_OOKAVG_OOKPEAKTHRESHDEC_010 0x40 628 #define RF_OOKAVG_OOKPEAKTHRESHDEC_011 0x60 629 #define RF_OOKAVG_OOKPEAKTHRESHDEC_100 0x80 630 #define RF_OOKAVG_OOKPEAKTHRESHDEC_101 0xA0 631 #define RF_OOKAVG_OOKPEAKTHRESHDEC_110 0xC0 632 #define RF_OOKAVG_OOKPEAKTHRESHDEC_111 0xE0 633 634 #define RF_OOKAVG_AVERAGEOFFSET_MASK 0xF3 635 #define RF_OOKAVG_AVERAGEOFFSET_0_DB 0x00 // Default 636 #define RF_OOKAVG_AVERAGEOFFSET_2_DB 0x04 637 #define RF_OOKAVG_AVERAGEOFFSET_4_DB 0x08 638 #define RF_OOKAVG_AVERAGEOFFSET_6_DB 0x0C 639 640 #define RF_OOKAVG_OOKAVERAGETHRESHFILT_MASK 0xFC 641 #define RF_OOKAVG_OOKAVERAGETHRESHFILT_00 0x00 642 #define RF_OOKAVG_OOKAVERAGETHRESHFILT_01 0x01 643 #define RF_OOKAVG_OOKAVERAGETHRESHFILT_10 0x02 // Default 644 #define RF_OOKAVG_OOKAVERAGETHRESHFILT_11 0x03 645 646 /*! 647 * RegAfcFei 648 */ 649 #define RF_AFCFEI_AGCSTART 0x10 650 651 #define RF_AFCFEI_AFCCLEAR 0x02 652 653 #define RF_AFCFEI_AFCAUTOCLEAR_MASK 0xFE 654 #define RF_AFCFEI_AFCAUTOCLEAR_ON 0x01 655 #define RF_AFCFEI_AFCAUTOCLEAR_OFF 0x00 // Default 656 657 /*! 658 * RegAfcMsb (Read Only) 659 */ 660 661 /*! 662 * RegAfcLsb (Read Only) 663 */ 664 665 /*! 666 * RegFeiMsb (Read Only) 667 */ 668 669 /*! 670 * RegFeiLsb (Read Only) 671 */ 672 673 /*! 674 * RegPreambleDetect 675 */ 676 #define RF_PREAMBLEDETECT_DETECTOR_MASK 0x7F 677 #define RF_PREAMBLEDETECT_DETECTOR_ON 0x80 // Default 678 #define RF_PREAMBLEDETECT_DETECTOR_OFF 0x00 679 680 #define RF_PREAMBLEDETECT_DETECTORSIZE_MASK 0x9F 681 #define RF_PREAMBLEDETECT_DETECTORSIZE_1 0x00 682 #define RF_PREAMBLEDETECT_DETECTORSIZE_2 0x20 // Default 683 #define RF_PREAMBLEDETECT_DETECTORSIZE_3 0x40 684 #define RF_PREAMBLEDETECT_DETECTORSIZE_4 0x60 685 686 #define RF_PREAMBLEDETECT_DETECTORTOL_MASK 0xE0 687 #define RF_PREAMBLEDETECT_DETECTORTOL_0 0x00 688 #define RF_PREAMBLEDETECT_DETECTORTOL_1 0x01 689 #define RF_PREAMBLEDETECT_DETECTORTOL_2 0x02 690 #define RF_PREAMBLEDETECT_DETECTORTOL_3 0x03 691 #define RF_PREAMBLEDETECT_DETECTORTOL_4 0x04 692 #define RF_PREAMBLEDETECT_DETECTORTOL_5 0x05 693 #define RF_PREAMBLEDETECT_DETECTORTOL_6 0x06 694 #define RF_PREAMBLEDETECT_DETECTORTOL_7 0x07 695 #define RF_PREAMBLEDETECT_DETECTORTOL_8 0x08 696 #define RF_PREAMBLEDETECT_DETECTORTOL_9 0x09 697 #define RF_PREAMBLEDETECT_DETECTORTOL_10 0x0A // Default 698 #define RF_PREAMBLEDETECT_DETECTORTOL_11 0x0B 699 #define RF_PREAMBLEDETECT_DETECTORTOL_12 0x0C 700 #define RF_PREAMBLEDETECT_DETECTORTOL_13 0x0D 701 #define RF_PREAMBLEDETECT_DETECTORTOL_14 0x0E 702 #define RF_PREAMBLEDETECT_DETECTORTOL_15 0x0F 703 #define RF_PREAMBLEDETECT_DETECTORTOL_16 0x10 704 #define RF_PREAMBLEDETECT_DETECTORTOL_17 0x11 705 #define RF_PREAMBLEDETECT_DETECTORTOL_18 0x12 706 #define RF_PREAMBLEDETECT_DETECTORTOL_19 0x13 707 #define RF_PREAMBLEDETECT_DETECTORTOL_20 0x14 708 #define RF_PREAMBLEDETECT_DETECTORTOL_21 0x15 709 #define RF_PREAMBLEDETECT_DETECTORTOL_22 0x16 710 #define RF_PREAMBLEDETECT_DETECTORTOL_23 0x17 711 #define RF_PREAMBLEDETECT_DETECTORTOL_24 0x18 712 #define RF_PREAMBLEDETECT_DETECTORTOL_25 0x19 713 #define RF_PREAMBLEDETECT_DETECTORTOL_26 0x1A 714 #define RF_PREAMBLEDETECT_DETECTORTOL_27 0x1B 715 #define RF_PREAMBLEDETECT_DETECTORTOL_28 0x1C 716 #define RF_PREAMBLEDETECT_DETECTORTOL_29 0x1D 717 #define RF_PREAMBLEDETECT_DETECTORTOL_30 0x1E 718 #define RF_PREAMBLEDETECT_DETECTORTOL_31 0x1F 719 720 /*! 721 * RegRxTimeout1 722 */ 723 #define RF_RXTIMEOUT1_TIMEOUTRXRSSI 0x00 // Default 724 725 /*! 726 * RegRxTimeout2 727 */ 728 #define RF_RXTIMEOUT2_TIMEOUTRXPREAMBLE 0x00 // Default 729 730 /*! 731 * RegRxTimeout3 732 */ 733 #define RF_RXTIMEOUT3_TIMEOUTSIGNALSYNC 0x00 // Default 734 735 /*! 736 * RegRxDelay 737 */ 738 #define RF_RXDELAY_INTERPACKETRXDELAY 0x00 // Default 739 740 /*! 741 * RegOsc 742 */ 743 #define RF_OSC_RCCALSTART 0x08 744 745 #define RF_OSC_CLKOUT_MASK 0xF8 746 #define RF_OSC_CLKOUT_32_MHZ 0x00 747 #define RF_OSC_CLKOUT_16_MHZ 0x01 748 #define RF_OSC_CLKOUT_8_MHZ 0x02 749 #define RF_OSC_CLKOUT_4_MHZ 0x03 750 #define RF_OSC_CLKOUT_2_MHZ 0x04 751 #define RF_OSC_CLKOUT_1_MHZ 0x05 // Default 752 #define RF_OSC_CLKOUT_RC 0x06 753 #define RF_OSC_CLKOUT_OFF 0x07 754 755 /*! 756 * RegPreambleMsb/RegPreambleLsb 757 */ 758 #define RF_PREAMBLEMSB_SIZE 0x00 // Default 759 #define RF_PREAMBLELSB_SIZE 0x03 // Default 760 761 /*! 762 * RegSyncConfig 763 */ 764 #define RF_SYNCCONFIG_AUTORESTARTRXMODE_MASK 0x3F 765 #define RF_SYNCCONFIG_AUTORESTARTRXMODE_WAITPLL_ON 0x80 // Default 766 #define RF_SYNCCONFIG_AUTORESTARTRXMODE_WAITPLL_OFF 0x40 767 #define RF_SYNCCONFIG_AUTORESTARTRXMODE_OFF 0x00 768 769 770 #define RF_SYNCCONFIG_PREAMBLEPOLARITY_MASK 0xDF 771 #define RF_SYNCCONFIG_PREAMBLEPOLARITY_55 0x20 772 #define RF_SYNCCONFIG_PREAMBLEPOLARITY_AA 0x00 // Default 773 774 #define RF_SYNCCONFIG_SYNC_MASK 0xEF 775 #define RF_SYNCCONFIG_SYNC_ON 0x10 // Default 776 #define RF_SYNCCONFIG_SYNC_OFF 0x00 777 778 779 #define RF_SYNCCONFIG_SYNCSIZE_MASK 0xF8 780 #define RF_SYNCCONFIG_SYNCSIZE_1 0x00 781 #define RF_SYNCCONFIG_SYNCSIZE_2 0x01 782 #define RF_SYNCCONFIG_SYNCSIZE_3 0x02 783 #define RF_SYNCCONFIG_SYNCSIZE_4 0x03 // Default 784 #define RF_SYNCCONFIG_SYNCSIZE_5 0x04 785 #define RF_SYNCCONFIG_SYNCSIZE_6 0x05 786 #define RF_SYNCCONFIG_SYNCSIZE_7 0x06 787 #define RF_SYNCCONFIG_SYNCSIZE_8 0x07 788 789 /*! 790 * RegSyncValue1-8 791 */ 792 #define RF_SYNCVALUE1_SYNCVALUE 0x01 // Default 793 #define RF_SYNCVALUE2_SYNCVALUE 0x01 // Default 794 #define RF_SYNCVALUE3_SYNCVALUE 0x01 // Default 795 #define RF_SYNCVALUE4_SYNCVALUE 0x01 // Default 796 #define RF_SYNCVALUE5_SYNCVALUE 0x01 // Default 797 #define RF_SYNCVALUE6_SYNCVALUE 0x01 // Default 798 #define RF_SYNCVALUE7_SYNCVALUE 0x01 // Default 799 #define RF_SYNCVALUE8_SYNCVALUE 0x01 // Default 800 801 /*! 802 * RegPacketConfig1 803 */ 804 #define RF_PACKETCONFIG1_PACKETFORMAT_MASK 0x7F 805 #define RF_PACKETCONFIG1_PACKETFORMAT_FIXED 0x00 806 #define RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE 0x80 // Default 807 808 #define RF_PACKETCONFIG1_DCFREE_MASK 0x9F 809 #define RF_PACKETCONFIG1_DCFREE_OFF 0x00 // Default 810 #define RF_PACKETCONFIG1_DCFREE_MANCHESTER 0x20 811 #define RF_PACKETCONFIG1_DCFREE_WHITENING 0x40 812 813 #define RF_PACKETCONFIG1_CRC_MASK 0xEF 814 #define RF_PACKETCONFIG1_CRC_ON 0x10 // Default 815 #define RF_PACKETCONFIG1_CRC_OFF 0x00 816 817 #define RF_PACKETCONFIG1_CRCAUTOCLEAR_MASK 0xF7 818 #define RF_PACKETCONFIG1_CRCAUTOCLEAR_ON 0x00 // Default 819 #define RF_PACKETCONFIG1_CRCAUTOCLEAR_OFF 0x08 820 821 #define RF_PACKETCONFIG1_ADDRSFILTERING_MASK 0xF9 822 #define RF_PACKETCONFIG1_ADDRSFILTERING_OFF 0x00 // Default 823 #define RF_PACKETCONFIG1_ADDRSFILTERING_NODE 0x02 824 #define RF_PACKETCONFIG1_ADDRSFILTERING_NODEBROADCAST 0x04 825 826 #define RF_PACKETCONFIG1_CRCWHITENINGTYPE_MASK 0xFE 827 #define RF_PACKETCONFIG1_CRCWHITENINGTYPE_CCITT 0x00 // Default 828 #define RF_PACKETCONFIG1_CRCWHITENINGTYPE_IBM 0x01 829 830 /*! 831 * RegPacketConfig2 832 */ 833 834 #define RF_PACKETCONFIG2_WMBUS_CRC_ENABLE_MASK 0x7F 835 #define RF_PACKETCONFIG2_WMBUS_CRC_ENABLE 0x80 836 #define RF_PACKETCONFIG2_WMBUS_CRC_DISABLE 0x00 // Default 837 838 #define RF_PACKETCONFIG2_DATAMODE_MASK 0xBF 839 #define RF_PACKETCONFIG2_DATAMODE_CONTINUOUS 0x00 840 #define RF_PACKETCONFIG2_DATAMODE_PACKET 0x40 // Default 841 842 #define RF_PACKETCONFIG2_IOHOME_MASK 0xDF 843 #define RF_PACKETCONFIG2_IOHOME_ON 0x20 844 #define RF_PACKETCONFIG2_IOHOME_OFF 0x00 // Default 845 846 #define RF_PACKETCONFIG2_BEACON_MASK 0xF7 847 #define RF_PACKETCONFIG2_BEACON_ON 0x08 848 #define RF_PACKETCONFIG2_BEACON_OFF 0x00 // Default 849 850 #define RF_PACKETCONFIG2_PAYLOADLENGTH_MSB_MASK 0xF8 851 852 /*! 853 * RegPayloadLength 854 */ 855 #define RF_PAYLOADLENGTH_LENGTH 0x40 // Default 856 857 /*! 858 * RegNodeAdrs 859 */ 860 #define RF_NODEADDRESS_ADDRESS 0x00 861 862 /*! 863 * RegBroadcastAdrs 864 */ 865 #define RF_BROADCASTADDRESS_ADDRESS 0x00 866 867 /*! 868 * RegFifoThresh 869 */ 870 #define RF_FIFOTHRESH_TXSTARTCONDITION_MASK 0x7F 871 #define RF_FIFOTHRESH_TXSTARTCONDITION_FIFOTHRESH 0x00 // Default 872 #define RF_FIFOTHRESH_TXSTARTCONDITION_FIFONOTEMPTY 0x80 873 874 #define RF_FIFOTHRESH_FIFOTHRESHOLD_MASK 0xC0 875 #define RF_FIFOTHRESH_FIFOTHRESHOLD_THRESHOLD 0x0F // Default 876 877 /*! 878 * RegSeqConfig1 879 */ 880 #define RF_SEQCONFIG1_SEQUENCER_START 0x80 881 882 #define RF_SEQCONFIG1_SEQUENCER_STOP 0x40 883 884 #define RF_SEQCONFIG1_IDLEMODE_MASK 0xDF 885 #define RF_SEQCONFIG1_IDLEMODE_SLEEP 0x20 886 #define RF_SEQCONFIG1_IDLEMODE_STANDBY 0x00 // Default 887 888 #define RF_SEQCONFIG1_FROMSTART_MASK 0xE7 889 #define RF_SEQCONFIG1_FROMSTART_TOLPS 0x00 // Default 890 #define RF_SEQCONFIG1_FROMSTART_TORX 0x08 891 #define RF_SEQCONFIG1_FROMSTART_TOTX 0x10 892 #define RF_SEQCONFIG1_FROMSTART_TOTX_ONFIFOLEVEL 0x18 893 894 #define RF_SEQCONFIG1_LPS_MASK 0xFB 895 #define RF_SEQCONFIG1_LPS_SEQUENCER_OFF 0x00 // Default 896 #define RF_SEQCONFIG1_LPS_IDLE 0x04 897 898 #define RF_SEQCONFIG1_FROMIDLE_MASK 0xFD 899 #define RF_SEQCONFIG1_FROMIDLE_TOTX 0x00 // Default 900 #define RF_SEQCONFIG1_FROMIDLE_TORX 0x02 901 902 #define RF_SEQCONFIG1_FROMTX_MASK 0xFE 903 #define RF_SEQCONFIG1_FROMTX_TOLPS 0x00 // Default 904 #define RF_SEQCONFIG1_FROMTX_TORX 0x01 905 906 /*! 907 * RegSeqConfig2 908 */ 909 #define RF_SEQCONFIG2_FROMRX_MASK 0x1F 910 #define RF_SEQCONFIG2_FROMRX_TOUNUSED_000 0x00 // Default 911 #define RF_SEQCONFIG2_FROMRX_TORXPKT_ONPLDRDY 0x20 912 #define RF_SEQCONFIG2_FROMRX_TOLPS_ONPLDRDY 0x40 913 #define RF_SEQCONFIG2_FROMRX_TORXPKT_ONCRCOK 0x60 914 #define RF_SEQCONFIG2_FROMRX_TOSEQUENCEROFF_ONRSSI 0x80 915 #define RF_SEQCONFIG2_FROMRX_TOSEQUENCEROFF_ONSYNC 0xA0 916 #define RF_SEQCONFIG2_FROMRX_TOSEQUENCEROFF_ONPREAMBLE 0xC0 917 #define RF_SEQCONFIG2_FROMRX_TOUNUSED_111 0xE0 918 919 #define RF_SEQCONFIG2_FROMRXTIMEOUT_MASK 0xE7 920 #define RF_SEQCONFIG2_FROMRXTIMEOUT_TORXRESTART 0x00 // Default 921 #define RF_SEQCONFIG2_FROMRXTIMEOUT_TOTX 0x08 922 #define RF_SEQCONFIG2_FROMRXTIMEOUT_TOLPS 0x10 923 #define RF_SEQCONFIG2_FROMRXTIMEOUT_TOSEQUENCEROFF 0x18 924 925 #define RF_SEQCONFIG2_FROMRXPKT_MASK 0xF8 926 #define RF_SEQCONFIG2_FROMRXPKT_TOSEQUENCEROFF 0x00 // Default 927 #define RF_SEQCONFIG2_FROMRXPKT_TOTX_ONFIFOEMPTY 0x01 928 #define RF_SEQCONFIG2_FROMRXPKT_TOLPS 0x02 929 #define RF_SEQCONFIG2_FROMRXPKT_TOSYNTHESIZERRX 0x03 930 #define RF_SEQCONFIG2_FROMRXPKT_TORX 0x04 931 932 /*! 933 * RegTimerResol 934 */ 935 #define RF_TIMERRESOL_TIMER1RESOL_MASK 0xF3 936 #define RF_TIMERRESOL_TIMER1RESOL_OFF 0x00 // Default 937 #define RF_TIMERRESOL_TIMER1RESOL_000064_US 0x04 938 #define RF_TIMERRESOL_TIMER1RESOL_004100_US 0x08 939 #define RF_TIMERRESOL_TIMER1RESOL_262000_US 0x0C 940 941 #define RF_TIMERRESOL_TIMER2RESOL_MASK 0xFC 942 #define RF_TIMERRESOL_TIMER2RESOL_OFF 0x00 // Default 943 #define RF_TIMERRESOL_TIMER2RESOL_000064_US 0x01 944 #define RF_TIMERRESOL_TIMER2RESOL_004100_US 0x02 945 #define RF_TIMERRESOL_TIMER2RESOL_262000_US 0x03 946 947 /*! 948 * RegTimer1Coef 949 */ 950 #define RF_TIMER1COEF_TIMER1COEFFICIENT 0xF5 // Default 951 952 /*! 953 * RegTimer2Coef 954 */ 955 #define RF_TIMER2COEF_TIMER2COEFFICIENT 0x20 // Default 956 957 /*! 958 * RegImageCal 959 */ 960 #define RF_IMAGECAL_AUTOIMAGECAL_MASK 0x7F 961 #define RF_IMAGECAL_AUTOIMAGECAL_ON 0x80 962 #define RF_IMAGECAL_AUTOIMAGECAL_OFF 0x00 // Default 963 964 #define RF_IMAGECAL_IMAGECAL_MASK 0xBF 965 #define RF_IMAGECAL_IMAGECAL_START 0x40 966 967 #define RF_IMAGECAL_IMAGECAL_RUNNING 0x20 968 #define RF_IMAGECAL_IMAGECAL_DONE 0x00 // Default 969 970 #define RF_IMAGECAL_TEMPCHANGE_HIGHER 0x08 971 #define RF_IMAGECAL_TEMPCHANGE_LOWER 0x00 972 973 #define RF_IMAGECAL_TEMPTHRESHOLD_MASK 0xF9 974 #define RF_IMAGECAL_TEMPTHRESHOLD_05 0x00 975 #define RF_IMAGECAL_TEMPTHRESHOLD_10 0x02 // Default 976 #define RF_IMAGECAL_TEMPTHRESHOLD_15 0x04 977 #define RF_IMAGECAL_TEMPTHRESHOLD_20 0x06 978 979 #define RF_IMAGECAL_TEMPMONITOR_MASK 0xFE 980 #define RF_IMAGECAL_TEMPMONITOR_ON 0x00 // Default 981 #define RF_IMAGECAL_TEMPMONITOR_OFF 0x01 982 983 /*! 984 * RegTemp (Read Only) 985 */ 986 987 /*! 988 * RegLowBat 989 */ 990 #define RF_LOWBAT_MASK 0xF7 991 #define RF_LOWBAT_ON 0x08 992 #define RF_LOWBAT_OFF 0x00 // Default 993 994 #define RF_LOWBAT_TRIM_MASK 0xF8 995 #define RF_LOWBAT_TRIM_1695 0x00 996 #define RF_LOWBAT_TRIM_1764 0x01 997 #define RF_LOWBAT_TRIM_1835 0x02 // Default 998 #define RF_LOWBAT_TRIM_1905 0x03 999 #define RF_LOWBAT_TRIM_1976 0x04 1000 #define RF_LOWBAT_TRIM_2045 0x05 1001 #define RF_LOWBAT_TRIM_2116 0x06 1002 #define RF_LOWBAT_TRIM_2185 0x07 1003 1004 /*! 1005 * RegIrqFlags1 1006 */ 1007 #define RF_IRQFLAGS1_MODEREADY 0x80 1008 1009 #define RF_IRQFLAGS1_RXREADY 0x40 1010 1011 #define RF_IRQFLAGS1_TXREADY 0x20 1012 1013 #define RF_IRQFLAGS1_PLLLOCK 0x10 1014 1015 #define RF_IRQFLAGS1_RSSI 0x08 1016 1017 #define RF_IRQFLAGS1_TIMEOUT 0x04 1018 1019 #define RF_IRQFLAGS1_PREAMBLEDETECT 0x02 1020 1021 #define RF_IRQFLAGS1_SYNCADDRESSMATCH 0x01 1022 1023 /*! 1024 * RegIrqFlags2 1025 */ 1026 #define RF_IRQFLAGS2_FIFOFULL 0x80 1027 1028 #define RF_IRQFLAGS2_FIFOEMPTY 0x40 1029 1030 #define RF_IRQFLAGS2_FIFOLEVEL 0x20 1031 1032 #define RF_IRQFLAGS2_FIFOOVERRUN 0x10 1033 1034 #define RF_IRQFLAGS2_PACKETSENT 0x08 1035 1036 #define RF_IRQFLAGS2_PAYLOADREADY 0x04 1037 1038 #define RF_IRQFLAGS2_CRCOK 0x02 1039 1040 #define RF_IRQFLAGS2_LOWBAT 0x01 1041 1042 /*! 1043 * RegDioMapping1 1044 */ 1045 #define RF_DIOMAPPING1_DIO0_MASK 0x3F 1046 #define RF_DIOMAPPING1_DIO0_00 0x00 // Default 1047 #define RF_DIOMAPPING1_DIO0_01 0x40 1048 #define RF_DIOMAPPING1_DIO0_10 0x80 1049 #define RF_DIOMAPPING1_DIO0_11 0xC0 1050 1051 #define RF_DIOMAPPING1_DIO1_MASK 0xCF 1052 #define RF_DIOMAPPING1_DIO1_00 0x00 // Default 1053 #define RF_DIOMAPPING1_DIO1_01 0x10 1054 #define RF_DIOMAPPING1_DIO1_10 0x20 1055 #define RF_DIOMAPPING1_DIO1_11 0x30 1056 1057 #define RF_DIOMAPPING1_DIO2_MASK 0xF3 1058 #define RF_DIOMAPPING1_DIO2_00 0x00 // Default 1059 #define RF_DIOMAPPING1_DIO2_01 0x04 1060 #define RF_DIOMAPPING1_DIO2_10 0x08 1061 #define RF_DIOMAPPING1_DIO2_11 0x0C 1062 1063 #define RF_DIOMAPPING1_DIO3_MASK 0xFC 1064 #define RF_DIOMAPPING1_DIO3_00 0x00 // Default 1065 #define RF_DIOMAPPING1_DIO3_01 0x01 1066 #define RF_DIOMAPPING1_DIO3_10 0x02 1067 #define RF_DIOMAPPING1_DIO3_11 0x03 1068 1069 /*! 1070 * RegDioMapping2 1071 */ 1072 #define RF_DIOMAPPING2_DIO4_MASK 0x3F 1073 #define RF_DIOMAPPING2_DIO4_00 0x00 // Default 1074 #define RF_DIOMAPPING2_DIO4_01 0x40 1075 #define RF_DIOMAPPING2_DIO4_10 0x80 1076 #define RF_DIOMAPPING2_DIO4_11 0xC0 1077 1078 #define RF_DIOMAPPING2_DIO5_MASK 0xCF 1079 #define RF_DIOMAPPING2_DIO5_00 0x00 // Default 1080 #define RF_DIOMAPPING2_DIO5_01 0x10 1081 #define RF_DIOMAPPING2_DIO5_10 0x20 1082 #define RF_DIOMAPPING2_DIO5_11 0x30 1083 1084 #define RF_DIOMAPPING2_MAP_MASK 0xFE 1085 #define RF_DIOMAPPING2_MAP_PREAMBLEDETECT 0x01 1086 #define RF_DIOMAPPING2_MAP_RSSI 0x00 // Default 1087 1088 /*! 1089 * RegVersion (Read Only) 1090 */ 1091 1092 /*! 1093 * RegPllHop 1094 */ 1095 #define RF_PLLHOP_FASTHOP_MASK 0x7F 1096 #define RF_PLLHOP_FASTHOP_ON 0x80 1097 #define RF_PLLHOP_FASTHOP_OFF 0x00 // Default 1098 1099 /*! 1100 * RegTcxo 1101 */ 1102 #define RF_TCXO_TCXOINPUT_MASK 0xEF 1103 #define RF_TCXO_TCXOINPUT_ON 0x10 1104 #define RF_TCXO_TCXOINPUT_OFF 0x00 // Default 1105 1106 /*! 1107 * RegPaDac 1108 */ 1109 #define RF_PADAC_20DBM_MASK 0xF8 1110 #define RF_PADAC_20DBM_ON 0x07 1111 #define RF_PADAC_20DBM_OFF 0x04 // Default 1112 1113 /*! 1114 * RegFormerTemp 1115 */ 1116 1117 /*! 1118 * RegBitrateFrac 1119 */ 1120 #define RF_BITRATEFRAC_MASK 0xF0 1121 1122 /*! 1123 * RegAgcRef 1124 */ 1125 1126 /*! 1127 * RegAgcThresh1 1128 */ 1129 1130 /*! 1131 * RegAgcThresh2 1132 */ 1133 1134 /*! 1135 * RegAgcThresh3 1136 */ 1137 1138 /*! 1139 * RegPll 1140 */ 1141 #define RF_PLL_BANDWIDTH_MASK 0x3F 1142 #define RF_PLL_BANDWIDTH_75 0x00 1143 #define RF_PLL_BANDWIDTH_150 0x40 1144 #define RF_PLL_BANDWIDTH_225 0x80 1145 #define RF_PLL_BANDWIDTH_300 0xC0 // Default 1146 1147 #ifdef __cplusplus 1148 } 1149 #endif 1150 1151 #endif // __SX1276_REGS_FSK_H__ 1152
