1 /** 2 ****************************************************************************** 3 * @file stm32f4xx_hal_nor.h 4 * @author MCD Application Team 5 * @brief Header file of NOR HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2016 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32F4xx_HAL_NOR_H 21 #define STM32F4xx_HAL_NOR_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 #if defined(FMC_Bank1) || defined(FSMC_Bank1) 28 29 /* Includes ------------------------------------------------------------------*/ 30 #if defined(FSMC_Bank1) 31 #include "stm32f4xx_ll_fsmc.h" 32 #else 33 #include "stm32f4xx_ll_fmc.h" 34 #endif /* FMC_Bank1 */ 35 36 /** @addtogroup STM32F4xx_HAL_Driver 37 * @{ 38 */ 39 40 /** @addtogroup NOR 41 * @{ 42 */ 43 44 /* Exported typedef ----------------------------------------------------------*/ 45 /** @defgroup NOR_Exported_Types NOR Exported Types 46 * @{ 47 */ 48 49 /** 50 * @brief HAL SRAM State structures definition 51 */ 52 typedef enum 53 { 54 HAL_NOR_STATE_RESET = 0x00U, /*!< NOR not yet initialized or disabled */ 55 HAL_NOR_STATE_READY = 0x01U, /*!< NOR initialized and ready for use */ 56 HAL_NOR_STATE_BUSY = 0x02U, /*!< NOR internal processing is ongoing */ 57 HAL_NOR_STATE_ERROR = 0x03U, /*!< NOR error state */ 58 HAL_NOR_STATE_PROTECTED = 0x04U /*!< NOR NORSRAM device write protected */ 59 } HAL_NOR_StateTypeDef; 60 61 /** 62 * @brief FMC NOR Status typedef 63 */ 64 typedef enum 65 { 66 HAL_NOR_STATUS_SUCCESS = 0U, 67 HAL_NOR_STATUS_ONGOING, 68 HAL_NOR_STATUS_ERROR, 69 HAL_NOR_STATUS_TIMEOUT 70 } HAL_NOR_StatusTypeDef; 71 72 /** 73 * @brief FMC NOR ID typedef 74 */ 75 typedef struct 76 { 77 uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */ 78 79 uint16_t Device_Code1; 80 81 uint16_t Device_Code2; 82 83 uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory. 84 These codes can be accessed by performing read operations with specific 85 control signals and addresses set.They can also be accessed by issuing 86 an Auto Select command */ 87 } NOR_IDTypeDef; 88 89 /** 90 * @brief FMC NOR CFI typedef 91 */ 92 typedef struct 93 { 94 /*!< Defines the information stored in the memory's Common flash interface 95 which contains a description of various electrical and timing parameters, 96 density information and functions supported by the memory */ 97 98 uint16_t CFI_1; 99 100 uint16_t CFI_2; 101 102 uint16_t CFI_3; 103 104 uint16_t CFI_4; 105 } NOR_CFITypeDef; 106 107 /** 108 * @brief NOR handle Structure definition 109 */ 110 #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1) 111 typedef struct __NOR_HandleTypeDef 112 #else 113 typedef struct 114 #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */ 115 116 { 117 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */ 118 119 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */ 120 121 FMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */ 122 123 HAL_LockTypeDef Lock; /*!< NOR locking object */ 124 125 __IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */ 126 127 uint32_t CommandSet; /*!< NOR algorithm command set and control */ 128 129 #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1) 130 void (* MspInitCallback)(struct __NOR_HandleTypeDef *hnor); /*!< NOR Msp Init callback */ 131 void (* MspDeInitCallback)(struct __NOR_HandleTypeDef *hnor); /*!< NOR Msp DeInit callback */ 132 #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */ 133 } NOR_HandleTypeDef; 134 135 #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1) 136 /** 137 * @brief HAL NOR Callback ID enumeration definition 138 */ 139 typedef enum 140 { 141 HAL_NOR_MSP_INIT_CB_ID = 0x00U, /*!< NOR MspInit Callback ID */ 142 HAL_NOR_MSP_DEINIT_CB_ID = 0x01U /*!< NOR MspDeInit Callback ID */ 143 } HAL_NOR_CallbackIDTypeDef; 144 145 /** 146 * @brief HAL NOR Callback pointer definition 147 */ 148 typedef void (*pNOR_CallbackTypeDef)(NOR_HandleTypeDef *hnor); 149 #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */ 150 /** 151 * @} 152 */ 153 154 /* Exported constants --------------------------------------------------------*/ 155 /* Exported macro ------------------------------------------------------------*/ 156 /** @defgroup NOR_Exported_Macros NOR Exported Macros 157 * @{ 158 */ 159 /** @brief Reset NOR handle state 160 * @param __HANDLE__ specifies the NOR handle. 161 * @retval None 162 */ 163 #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1) 164 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) do { \ 165 (__HANDLE__)->State = HAL_NOR_STATE_RESET; \ 166 (__HANDLE__)->MspInitCallback = NULL; \ 167 (__HANDLE__)->MspDeInitCallback = NULL; \ 168 } while(0) 169 #else 170 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET) 171 #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */ 172 /** 173 * @} 174 */ 175 176 /* Exported functions --------------------------------------------------------*/ 177 /** @addtogroup NOR_Exported_Functions NOR Exported Functions 178 * @{ 179 */ 180 181 /** @addtogroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions 182 * @{ 183 */ 184 185 /* Initialization/de-initialization functions ********************************/ 186 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, 187 FMC_NORSRAM_TimingTypeDef *ExtTiming); 188 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor); 189 void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor); 190 void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor); 191 void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout); 192 /** 193 * @} 194 */ 195 196 /** @addtogroup NOR_Exported_Functions_Group2 Input and Output functions 197 * @{ 198 */ 199 200 /* I/O operation functions ***************************************************/ 201 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID); 202 HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor); 203 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData); 204 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData); 205 206 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, 207 uint32_t uwBufferSize); 208 HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, 209 uint32_t uwBufferSize); 210 211 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address); 212 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address); 213 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI); 214 215 #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1) 216 /* NOR callback registering/unregistering */ 217 HAL_StatusTypeDef HAL_NOR_RegisterCallback(NOR_HandleTypeDef *hnor, HAL_NOR_CallbackIDTypeDef CallbackId, 218 pNOR_CallbackTypeDef pCallback); 219 HAL_StatusTypeDef HAL_NOR_UnRegisterCallback(NOR_HandleTypeDef *hnor, HAL_NOR_CallbackIDTypeDef CallbackId); 220 #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */ 221 /** 222 * @} 223 */ 224 225 /** @addtogroup NOR_Exported_Functions_Group3 NOR Control functions 226 * @{ 227 */ 228 229 /* NOR Control functions *****************************************************/ 230 HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor); 231 HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor); 232 /** 233 * @} 234 */ 235 236 /** @addtogroup NOR_Exported_Functions_Group4 NOR State functions 237 * @{ 238 */ 239 240 /* NOR State functions ********************************************************/ 241 HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor); 242 HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout); 243 /** 244 * @} 245 */ 246 247 /** 248 * @} 249 */ 250 251 /* Private types -------------------------------------------------------------*/ 252 /* Private variables ---------------------------------------------------------*/ 253 /* Private constants ---------------------------------------------------------*/ 254 /** @defgroup NOR_Private_Constants NOR Private Constants 255 * @{ 256 */ 257 /* NOR device IDs addresses */ 258 #define MC_ADDRESS ((uint16_t)0x0000) 259 #define DEVICE_CODE1_ADDR ((uint16_t)0x0001) 260 #define DEVICE_CODE2_ADDR ((uint16_t)0x000E) 261 #define DEVICE_CODE3_ADDR ((uint16_t)0x000F) 262 263 /* NOR CFI IDs addresses */ 264 #define CFI1_ADDRESS ((uint16_t)0x0061) 265 #define CFI2_ADDRESS ((uint16_t)0x0062) 266 #define CFI3_ADDRESS ((uint16_t)0x0063) 267 #define CFI4_ADDRESS ((uint16_t)0x0064) 268 269 /* NOR operation wait timeout */ 270 #define NOR_TMEOUT ((uint16_t)0xFFFF) 271 272 /* NOR memory data width */ 273 #define NOR_MEMORY_8B ((uint8_t)0x00) 274 #define NOR_MEMORY_16B ((uint8_t)0x01) 275 276 /* NOR memory device read/write start address */ 277 #define NOR_MEMORY_ADRESS1 (0x60000000U) 278 #define NOR_MEMORY_ADRESS2 (0x64000000U) 279 #define NOR_MEMORY_ADRESS3 (0x68000000U) 280 #define NOR_MEMORY_ADRESS4 (0x6C000000U) 281 /** 282 * @} 283 */ 284 285 /* Private macros ------------------------------------------------------------*/ 286 /** @defgroup NOR_Private_Macros NOR Private Macros 287 * @{ 288 */ 289 /** 290 * @brief NOR memory address shifting. 291 * @param __NOR_ADDRESS NOR base address 292 * @param __NOR_MEMORY_WIDTH_ NOR memory width 293 * @param __ADDRESS__ NOR memory address 294 * @retval NOR shifted address value 295 */ 296 #define NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__) \ 297 ((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_16B)? \ 298 ((uint32_t)((__NOR_ADDRESS) + (2U * (__ADDRESS__)))): \ 299 ((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__))))) 300 301 /** 302 * @brief NOR memory write data to specified address. 303 * @param __ADDRESS__ NOR memory address 304 * @param __DATA__ Data to write 305 * @retval None 306 */ 307 #define NOR_WRITE(__ADDRESS__, __DATA__) do{ \ 308 (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__)); \ 309 __DSB(); \ 310 } while(0) 311 312 /** 313 * @} 314 */ 315 316 /** 317 * @} 318 */ 319 320 /** 321 * @} 322 */ 323 324 #endif /* FMC_Bank1 || FSMC_Bank1 */ 325 326 #ifdef __cplusplus 327 } 328 #endif 329 330 #endif /* STM32F4xx_HAL_NOR_H */ 331
