1 /***************************************************************************//**
2 * @file
3 * @brief Reset Management Unit (RMU) peripheral API
4 *******************************************************************************
5 * # License
6 * <b>Copyright 2018 Silicon Laboratories Inc. www.silabs.com</b>
7 *******************************************************************************
8 *
9 * SPDX-License-Identifier: Zlib
10 *
11 * The licensor of this software is Silicon Laboratories Inc.
12 *
13 * This software is provided 'as-is', without any express or implied
14 * warranty. In no event will the authors be held liable for any damages
15 * arising from the use of this software.
16 *
17 * Permission is granted to anyone to use this software for any purpose,
18 * including commercial applications, and to alter it and redistribute it
19 * freely, subject to the following restrictions:
20 *
21 * 1. The origin of this software must not be misrepresented; you must not
22 * claim that you wrote the original software. If you use this software
23 * in a product, an acknowledgment in the product documentation would be
24 * appreciated but is not required.
25 * 2. Altered source versions must be plainly marked as such, and must not be
26 * misrepresented as being the original software.
27 * 3. This notice may not be removed or altered from any source distribution.
28 *
29 ******************************************************************************/
30
31 #ifndef EM_RMU_H
32 #define EM_RMU_H
33
34 #include "em_device.h"
35 #if (defined(RMU_COUNT) && (RMU_COUNT > 0)) || (_EMU_RSTCTRL_MASK)
36 #include "sl_assert.h"
37
38 #include <stdbool.h>
39
40 #ifdef __cplusplus
41 extern "C" {
42 #endif
43
44 /***************************************************************************//**
45 * @addtogroup rmu
46 * @{
47 ******************************************************************************/
48
49 /*******************************************************************************
50 ******************************** ENUMS ************************************
51 ******************************************************************************/
52
53 /** RMU reset modes. */
54 typedef enum {
55 #if defined(_RMU_CTRL_PINRMODE_MASK)
56 rmuResetModeDisabled = _RMU_CTRL_PINRMODE_DISABLED, /**< Reset mode disabled. */
57 rmuResetModeLimited = _RMU_CTRL_PINRMODE_LIMITED, /**< Reset mode limited. */
58 rmuResetModeExtended = _RMU_CTRL_PINRMODE_EXTENDED, /**< Reset mode extended. */
59 rmuResetModeFull = _RMU_CTRL_PINRMODE_FULL, /**< Reset mode full. */
60 #elif defined(_EMU_RSTCTRL_MASK)
61 rmuResetModeDisabled = 0, /**< Reset mode disabled. */
62 rmuResetModeEnabled = 1, /**< Reset mode enabled. */
63 #else
64 rmuResetModeClear = 0, /**< Reset mode clear. */
65 rmuResetModeSet = 1, /**< Reset mode set. */
66 #endif
67 } RMU_ResetMode_TypeDef;
68
69 /** RMU controlled peripheral reset control and reset source control. */
70 typedef enum {
71 #if defined(RMU_CTRL_BURSTEN)
72 rmuResetBU = _RMU_CTRL_BURSTEN_MASK, /**< Reset control over Backup Power domain select. */
73 #endif
74 #if defined(RMU_CTRL_LOCKUPRDIS)
75 rmuResetLockUp = _RMU_CTRL_LOCKUPRDIS_MASK, /**< Cortex lockup reset select. */
76 #elif defined(_RMU_CTRL_LOCKUPRMODE_MASK)
77 rmuResetLockUp = _RMU_CTRL_LOCKUPRMODE_MASK, /**< Cortex lockup reset select. */
78 #endif
79 #if defined(_RMU_CTRL_WDOGRMODE_MASK)
80 rmuResetWdog = _RMU_CTRL_WDOGRMODE_MASK, /**< WDOG reset select. */
81 #endif
82 #if defined(_RMU_CTRL_LOCKUPRMODE_MASK)
83 rmuResetCoreLockup = _RMU_CTRL_LOCKUPRMODE_MASK, /**< Cortex lockup reset select. */
84 #endif
85 #if defined(_RMU_CTRL_SYSRMODE_MASK)
86 rmuResetSys = _RMU_CTRL_SYSRMODE_MASK, /**< SYSRESET select. */
87 #endif
88 #if defined(_RMU_CTRL_PINRMODE_MASK)
89 rmuResetPin = _RMU_CTRL_PINRMODE_MASK, /**< Pin reset select. */
90 #endif
91
92 #if defined(_EMU_RSTCTRL_WDOG0RMODE_MASK)
93 rmuResetWdog0 = _EMU_RSTCTRL_WDOG0RMODE_MASK, /**< WDOG0 reset select */
94 #endif
95 #if defined(_EMU_RSTCTRL_WDOG1RMODE_MASK)
96 rmuResetWdog1 = _EMU_RSTCTRL_WDOG1RMODE_MASK, /**< WDOG1 reset select */
97 #endif
98 #if defined(_EMU_RSTCTRL_SYSRMODE_MASK)
99 rmuResetSys = _EMU_RSTCTRL_SYSRMODE_MASK, /**< SYSRESET select */
100 #endif
101 #if defined(_EMU_RSTCTRL_LOCKUPRMODE_MASK)
102 rmuResetCoreLockup = _EMU_RSTCTRL_LOCKUPRMODE_MASK, /**< Cortex lockup reset select */
103 #endif
104 #if defined(_EMU_RSTCTRL_AVDDBODRMODE_MASK)
105 rmuResetAVDD = _EMU_RSTCTRL_AVDDBODRMODE_MASK, /**< AVDD monitoring select */
106 #endif
107 #if defined(_EMU_RSTCTRL_IOVDD0BODRMODE_MASK)
108 rmuResetIOVDD0 = _EMU_RSTCTRL_IOVDD0BODRMODE_MASK, /**< IOVDD0 monitoring select */
109 #endif
110 #if defined(_EMU_RSTCTRL_IOVDD1BODRMODE_MASK)
111 rmuResetIOVDD1 = _EMU_RSTCTRL_IOVDD1BODRMODE_MASK, /**< IOVDD1 monitoring select */
112 #endif
113 #if defined(_EMU_RSTCTRL_IOVDD2BODRMODE_MASK)
114 rmuResetIOVDD2 = _EMU_RSTCTRL_IOVDD2BODRMODE_MASK, /**< IOVDD2 monitoring select */
115 #endif
116 #if defined(_EMU_RSTCTRL_DECBODRMODE_MASK)
117 rmuResetDecouple = _EMU_RSTCTRL_DECBODRMODE_MASK, /**< Decouple monitoring select */
118 #endif
119 #if defined(_EMU_RSTCTRL_SESYSRMODE_MASK)
120 rmuResetSESys = _EMU_RSTCTRL_SESYSRMODE_MASK, /**< M0+ (SE) system reset select */
121 #endif
122 #if defined(_EMU_RSTCTRL_SELOCKUPRMODE_MASK)
123 rmuResetSELockup = _EMU_RSTCTRL_SELOCKUPRMODE_MASK, /**< M0+ (SE) lockup select */
124 #endif
125 #if defined(_EMU_RSTCTRL_DCIRMODE_MASK)
126 rmuResetDCI = _EMU_RSTCTRL_DCIRMODE_MASK, /**< DCI reset select */
127 #endif
128 } RMU_Reset_TypeDef;
129
130 /*******************************************************************************
131 ***************************** PROTOTYPES **********************************
132 ******************************************************************************/
133
134 /** RMU_LockupResetDisable kept for backwards compatibility. */
135 #define RMU_LockupResetDisable(A) RMU_ResetControl(rmuResetLockUp, A)
136
137 void RMU_ResetControl(RMU_Reset_TypeDef reset, RMU_ResetMode_TypeDef mode);
138 void RMU_ResetCauseClear(void);
139 uint32_t RMU_ResetCauseGet(void);
140
141 #if defined(_RMU_CTRL_RESETSTATE_MASK)
142 /***************************************************************************//**
143 * @brief
144 * Set user reset state. Reset only by a Power-on-reset and a pin reset.
145 *
146 * @param[in] userState User state to set
147 ******************************************************************************/
RMU_UserResetStateSet(uint32_t userState)148 __STATIC_INLINE void RMU_UserResetStateSet(uint32_t userState)
149 {
150 EFM_ASSERT(!(userState
151 & ~(_RMU_CTRL_RESETSTATE_MASK >> _RMU_CTRL_RESETSTATE_SHIFT)));
152 RMU->CTRL = (RMU->CTRL & ~_RMU_CTRL_RESETSTATE_MASK)
153 | (userState << _RMU_CTRL_RESETSTATE_SHIFT);
154 }
155
156 /***************************************************************************//**
157 * @brief
158 * Get user reset state. Reset only by a Power-on-reset and a pin reset.
159 *
160 * @return
161 * Reset surviving user state.
162 ******************************************************************************/
RMU_UserResetStateGet(void)163 __STATIC_INLINE uint32_t RMU_UserResetStateGet(void)
164 {
165 uint32_t userState = (RMU->CTRL & _RMU_CTRL_RESETSTATE_MASK)
166 >> _RMU_CTRL_RESETSTATE_SHIFT;
167 return userState;
168 }
169 #endif
170
171 /** @} (end addtogroup rmu) */
172
173 #ifdef __cplusplus
174 }
175 #endif
176
177 #endif /* defined(RMU_COUNT) && (RMU_COUNT > 0) */
178 #endif /* EM_RMU_H */
179
