1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2020 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8 #ifndef FSL_WDOG32_H_
9 #define FSL_WDOG32_H_
10
11 #include "fsl_common.h"
12
13 /*!
14 * @addtogroup wdog32
15 * @{
16 */
17
18 /*******************************************************************************
19 * Definitions
20 *******************************************************************************/
21 /*! @name Unlock sequence */
22 /*! @{ */
23 #define WDOG_FIRST_WORD_OF_UNLOCK (WDOG_UPDATE_KEY & 0xFFFFU) /*!< First word of unlock sequence */
24 #define WDOG_SECOND_WORD_OF_UNLOCK ((WDOG_UPDATE_KEY >> 16U) & 0xFFFFU) /*!< Second word of unlock sequence */
25 /*! @} */
26
27 /*! @name Refresh sequence */
28 /*! @{ */
29 #define WDOG_FIRST_WORD_OF_REFRESH (WDOG_REFRESH_KEY & 0xFFFFU) /*!< First word of refresh sequence */
30 #define WDOG_SECOND_WORD_OF_REFRESH ((WDOG_REFRESH_KEY >> 16U) & 0xFFFFU) /*!< Second word of refresh sequence */
31 /*! @} */
32 /*! @name Driver version */
33 /*! @{ */
34 /*! @brief WDOG32 driver version. */
35 #define FSL_WDOG32_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
36 /*! @} */
37
38 /*! @brief Describes WDOG32 clock source. */
39 typedef enum _wdog32_clock_source
40 {
41 kWDOG32_ClockSource0 = 0U, /*!< Clock source 0 */
42 kWDOG32_ClockSource1 = 1U, /*!< Clock source 1 */
43 kWDOG32_ClockSource2 = 2U, /*!< Clock source 2 */
44 kWDOG32_ClockSource3 = 3U, /*!< Clock source 3 */
45 } wdog32_clock_source_t;
46
47 /*! @brief Describes the selection of the clock prescaler. */
48 typedef enum _wdog32_clock_prescaler
49 {
50 kWDOG32_ClockPrescalerDivide1 = 0x0U, /*!< Divided by 1 */
51 kWDOG32_ClockPrescalerDivide256 = 0x1U, /*!< Divided by 256 */
52 } wdog32_clock_prescaler_t;
53
54 /*! @brief Defines WDOG32 work mode. */
55 typedef struct _wdog32_work_mode
56 {
57 bool enableWait; /*!< Enables or disables WDOG32 in wait mode */
58 bool enableStop; /*!< Enables or disables WDOG32 in stop mode */
59 bool enableDebug; /*!< Enables or disables WDOG32 in debug mode */
60 } wdog32_work_mode_t;
61
62 /*! @brief Describes WDOG32 test mode. */
63 typedef enum _wdog32_test_mode
64 {
65 kWDOG32_TestModeDisabled = 0U, /*!< Test Mode disabled */
66 kWDOG32_UserModeEnabled = 1U, /*!< User Mode enabled */
67 kWDOG32_LowByteTest = 2U, /*!< Test Mode enabled, only low byte is used */
68 kWDOG32_HighByteTest = 3U, /*!< Test Mode enabled, only high byte is used */
69 } wdog32_test_mode_t;
70
71 /*! @brief Describes WDOG32 configuration structure. */
72 typedef struct _wdog32_config
73 {
74 bool enableWdog32; /*!< Enables or disables WDOG32 */
75 wdog32_clock_source_t clockSource; /*!< Clock source select */
76 wdog32_clock_prescaler_t prescaler; /*!< Clock prescaler value */
77 wdog32_work_mode_t workMode; /*!< Configures WDOG32 work mode in debug stop and wait mode */
78 wdog32_test_mode_t testMode; /*!< Configures WDOG32 test mode */
79 bool enableUpdate; /*!< Update write-once register enable */
80 bool enableInterrupt; /*!< Enables or disables WDOG32 interrupt */
81 bool enableWindowMode; /*!< Enables or disables WDOG32 window mode */
82 uint16_t windowValue; /*!< Window value */
83 uint16_t timeoutValue; /*!< Timeout value */
84 } wdog32_config_t;
85
86 /*!
87 * @brief WDOG32 interrupt configuration structure.
88 *
89 * This structure contains the settings for all of the WDOG32 interrupt configurations.
90 */
91 enum _wdog32_interrupt_enable_t
92 {
93 kWDOG32_InterruptEnable = WDOG_CS_INT_MASK, /*!< Interrupt is generated before forcing a reset */
94 };
95
96 /*!
97 * @brief WDOG32 status flags.
98 *
99 * This structure contains the WDOG32 status flags for use in the WDOG32 functions.
100 */
101 enum _wdog32_status_flags_t
102 {
103 kWDOG32_RunningFlag = WDOG_CS_EN_MASK, /*!< Running flag, set when WDOG32 is enabled */
104 kWDOG32_InterruptFlag = WDOG_CS_FLG_MASK, /*!< Interrupt flag, set when interrupt occurs */
105 };
106
107 /*******************************************************************************
108 * API
109 *******************************************************************************/
110
111 #if defined(__cplusplus)
112 extern "C" {
113 #endif /* __cplusplus */
114
115 /*!
116 * @name WDOG32 Initialization and De-initialization
117 * @{
118 */
119
120 /*!
121 * @brief Initializes the WDOG32 configuration structure.
122 *
123 * This function initializes the WDOG32 configuration structure to default values. The default
124 * values are:
125 * @code
126 * wdog32Config->enableWdog32 = true;
127 * wdog32Config->clockSource = kWDOG32_ClockSource1;
128 * wdog32Config->prescaler = kWDOG32_ClockPrescalerDivide1;
129 * wdog32Config->workMode.enableWait = true;
130 * wdog32Config->workMode.enableStop = false;
131 * wdog32Config->workMode.enableDebug = false;
132 * wdog32Config->testMode = kWDOG32_TestModeDisabled;
133 * wdog32Config->enableUpdate = true;
134 * wdog32Config->enableInterrupt = false;
135 * wdog32Config->enableWindowMode = false;
136 * wdog32Config->windowValue = 0U;
137 * wdog32Config->timeoutValue = 0xFFFFU;
138 * @endcode
139 *
140 * @param config Pointer to the WDOG32 configuration structure.
141 * @see wdog32_config_t
142 */
143 void WDOG32_GetDefaultConfig(wdog32_config_t *config);
144
145 /*!
146 * @brief Initializes the WDOG32 module.
147 *
148 * This function initializes the WDOG32.
149 * To reconfigure the WDOG32 without forcing a reset first, enableUpdate must be set to true
150 * in the configuration.
151 *
152 * Example:
153 * @code
154 * wdog32_config_t config;
155 * WDOG32_GetDefaultConfig(&config);
156 * config.timeoutValue = 0x7ffU;
157 * config.enableUpdate = true;
158 * WDOG32_Init(wdog_base,&config);
159 * @endcode
160 *
161 * @note If there is errata ERR010536 (FSL_FEATURE_WDOG_HAS_ERRATA_010536 defined as 1),
162 * then after calling this function, user need delay at least 4 LPO clock cycles before
163 * accessing other WDOG32 registers.
164 *
165 * @param base WDOG32 peripheral base address.
166 * @param config The configuration of the WDOG32.
167 */
168 #if defined(DOXYGEN_OUTPUT) && DOXYGEN_OUTPUT
169 void WDOG32_Init(WDOG_Type *base, const wdog32_config_t *config);
170 #else
171 AT_QUICKACCESS_SECTION_CODE(void WDOG32_Init(WDOG_Type *base, const wdog32_config_t *config));
172 #endif
173
174 /*!
175 * @brief De-initializes the WDOG32 module.
176 *
177 * This function shuts down the WDOG32.
178 * Ensure that the WDOG_CS.UPDATE is 1, which means that the register update is enabled.
179 *
180 * @param base WDOG32 peripheral base address.
181 */
182 void WDOG32_Deinit(WDOG_Type *base);
183
184 /*! @} */
185
186 /*!
187 * @name WDOG32 functional Operation
188 * @{
189 */
190
191 /*!
192 * @brief Unlocks the WDOG32 register written.
193 *
194 * This function unlocks the WDOG32 register written.
195 *
196 * Before starting the unlock sequence and following the configuration, disable the global interrupts.
197 * Otherwise, an interrupt could effectively invalidate the unlock sequence and the WCT may expire.
198 * After the configuration finishes, re-enable the global interrupts.
199 *
200 * @param base WDOG32 peripheral base address
201 */
202 #if defined(DOXYGEN_OUTPUT) && DOXYGEN_OUTPUT
203 void WDOG32_Unlock(WDOG_Type *base);
204 #else
205 AT_QUICKACCESS_SECTION_CODE(void WDOG32_Unlock(WDOG_Type *base));
206 #endif
207
208 /*!
209 * @brief Enables the WDOG32 module.
210 *
211 * This function writes a value into the WDOG_CS register to enable the WDOG32.
212 * The WDOG_CS register is a write-once register. Please check the enableUpdate is set to true for calling
213 * @ref WDOG32_Init to do wdog initialize.
214 * Before call the re-configuration APIs, ensure that the WCT window is still open and
215 * this register has not been written in this WCT while the function is called.
216 *
217 * @param base WDOG32 peripheral base address.
218 */
219 #if defined(DOXYGEN_OUTPUT) && DOXYGEN_OUTPUT
220 void WDOG32_Enable(WDOG_Type *base);
221 #else
222 AT_QUICKACCESS_SECTION_CODE(void WDOG32_Enable(WDOG_Type *base));
223 #endif
224
225 /*!
226 * @brief Disables the WDOG32 module.
227 *
228 * This function writes a value into the WDOG_CS register to disable the WDOG32.
229 * The WDOG_CS register is a write-once register. Please check the enableUpdate is set to true for calling
230 * @ref WDOG32_Init to do wdog initialize.
231 * Before call the re-configuration APIs, ensure that the WCT window is still open and
232 * this register has not been written in this WCT while the function is called.
233 *
234 * @param base WDOG32 peripheral base address
235 */
236 #if defined(DOXYGEN_OUTPUT) && DOXYGEN_OUTPUT
237 void WDOG32_Disable(WDOG_Type *base);
238 #else
239 AT_QUICKACCESS_SECTION_CODE(void WDOG32_Disable(WDOG_Type *base));
240 #endif
241
242 /*!
243 * @brief Enables the WDOG32 interrupt.
244 *
245 * This function writes a value into the WDOG_CS register to enable the WDOG32 interrupt.
246 * The WDOG_CS register is a write-once register. Please check the enableUpdate is set to true for calling
247 * @ref WDOG32_Init to do wdog initialize.
248 * Before call the re-configuration APIs, ensure that the WCT window is still open and
249 * this register has not been written in this WCT while the function is called.
250 *
251 * @param base WDOG32 peripheral base address.
252 * @param mask The interrupts to enable.
253 * The parameter can be a combination of the following source if defined:
254 * @arg kWDOG32_InterruptEnable
255 */
256 #if defined(DOXYGEN_OUTPUT) && DOXYGEN_OUTPUT
257 void WDOG32_EnableInterrupts(WDOG_Type *base, uint32_t mask);
258 #else
259 AT_QUICKACCESS_SECTION_CODE(void WDOG32_EnableInterrupts(WDOG_Type *base, uint32_t mask));
260 #endif
261
262 /*!
263 * @brief Disables the WDOG32 interrupt.
264 *
265 * This function writes a value into the WDOG_CS register to disable the WDOG32 interrupt.
266 * The WDOG_CS register is a write-once register. Please check the enableUpdate is set to true for calling
267 * @ref WDOG32_Init to do wdog initialize.
268 * Before call the re-configuration APIs, ensure that the WCT window is still open and
269 * this register has not been written in this WCT while the function is called.
270 *
271 * @param base WDOG32 peripheral base address.
272 * @param mask The interrupts to disabled.
273 * The parameter can be a combination of the following source if defined:
274 * @arg kWDOG32_InterruptEnable
275 */
276 #if defined(DOXYGEN_OUTPUT) && DOXYGEN_OUTPUT
277 void WDOG32_DisableInterrupts(WDOG_Type *base, uint32_t mask);
278 #else
279 AT_QUICKACCESS_SECTION_CODE(void WDOG32_DisableInterrupts(WDOG_Type *base, uint32_t mask));
280 #endif
281
282 /*!
283 * @brief Gets the WDOG32 all status flags.
284 *
285 * This function gets all status flags.
286 *
287 * Example to get the running flag:
288 * @code
289 * uint32_t status;
290 * status = WDOG32_GetStatusFlags(wdog_base) & kWDOG32_RunningFlag;
291 * @endcode
292 * @param base WDOG32 peripheral base address
293 * @return State of the status flag: asserted (true) or not-asserted (false). @see _wdog32_status_flags_t
294 * - true: related status flag has been set.
295 * - false: related status flag is not set.
296 */
WDOG32_GetStatusFlags(WDOG_Type * base)297 static inline uint32_t WDOG32_GetStatusFlags(WDOG_Type *base)
298 {
299 return (base->CS & (WDOG_CS_EN_MASK | WDOG_CS_FLG_MASK));
300 }
301
302 /*!
303 * @brief Clears the WDOG32 flag.
304 *
305 * This function clears the WDOG32 status flag.
306 *
307 * Example to clear an interrupt flag:
308 * @code
309 * WDOG32_ClearStatusFlags(wdog_base,kWDOG32_InterruptFlag);
310 * @endcode
311 * @param base WDOG32 peripheral base address.
312 * @param mask The status flags to clear.
313 * The parameter can be any combination of the following values:
314 * @arg kWDOG32_InterruptFlag
315 */
316
317 #if defined(DOXYGEN_OUTPUT) && DOXYGEN_OUTPUT
318 void WDOG32_ClearStatusFlags(WDOG_Type *base, uint32_t mask);
319 #else
320 AT_QUICKACCESS_SECTION_CODE(void WDOG32_ClearStatusFlags(WDOG_Type *base, uint32_t mask));
321 #endif
322
323 /*!
324 * @brief Sets the WDOG32 timeout value.
325 *
326 * This function writes a timeout value into the WDOG_TOVAL register.
327 * The WDOG_TOVAL register is a write-once register. To ensure the reconfiguration fits the timing of WCT, unlock
328 * function will be called inline.
329 *
330 * @param base WDOG32 peripheral base address
331 * @param timeoutCount WDOG32 timeout value, count of WDOG32 clock ticks.
332 */
333 #if defined(DOXYGEN_OUTPUT) && DOXYGEN_OUTPUT
334 void WDOG32_SetTimeoutValue(WDOG_Type *base, uint16_t timeoutCount);
335 #else
336 AT_QUICKACCESS_SECTION_CODE(void WDOG32_SetTimeoutValue(WDOG_Type *base, uint16_t timeoutCount));
337 #endif
338
339 /*!
340 * @brief Sets the WDOG32 window value.
341 *
342 * This function writes a window value into the WDOG_WIN register.
343 * The WDOG_WIN register is a write-once register. Please check the enableUpdate is set to true for calling
344 * @ref WDOG32_Init to do wdog initialize.
345 * Before call the re-configuration APIs, ensure that the WCT window is still open and
346 * this register has not been written in this WCT while the function is called.
347 *
348 * @param base WDOG32 peripheral base address.
349 * @param windowValue WDOG32 window value.
350 */
351 #if defined(DOXYGEN_OUTPUT) && DOXYGEN_OUTPUT
352 void WDOG32_SetWindowValue(WDOG_Type *base, uint16_t windowValue);
353 #else
354 AT_QUICKACCESS_SECTION_CODE(void WDOG32_SetWindowValue(WDOG_Type *base, uint16_t windowValue));
355 #endif
356
357 /*!
358 * @brief Refreshes the WDOG32 timer.
359 *
360 * This function feeds the WDOG32.
361 * This function should be called before the Watchdog timer is in timeout. Otherwise, a reset is asserted.
362 *
363 * @param base WDOG32 peripheral base address
364 */
WDOG32_Refresh(WDOG_Type * base)365 static inline void WDOG32_Refresh(WDOG_Type *base)
366 {
367 uint32_t primaskValue = 0U;
368
369 /* Disable the global interrupt to protect refresh sequence */
370 primaskValue = DisableGlobalIRQ();
371 if (0U != ((base->CS) & WDOG_CS_CMD32EN_MASK))
372 {
373 base->CNT = WDOG_REFRESH_KEY;
374 }
375 else
376 {
377 base->CNT = WDOG_FIRST_WORD_OF_REFRESH;
378 base->CNT = WDOG_SECOND_WORD_OF_REFRESH;
379 }
380 EnableGlobalIRQ(primaskValue);
381 }
382
383 /*!
384 * @brief Gets the WDOG32 counter value.
385 *
386 * This function gets the WDOG32 counter value.
387 *
388 * @param base WDOG32 peripheral base address.
389 * @return Current WDOG32 counter value.
390 */
WDOG32_GetCounterValue(WDOG_Type * base)391 static inline uint16_t WDOG32_GetCounterValue(WDOG_Type *base)
392 {
393 return (uint16_t)base->CNT;
394 }
395
396 /*! @} */
397
398 #if defined(__cplusplus)
399 }
400 #endif /* __cplusplus */
401
402 /*! @}*/
403
404 #endif /* FSL_WDOG32_H_ */
405
