1 /*
2  * Copyright 2022, 2024 NXP
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 #ifndef FSL_LPUART_H_
8 #define FSL_LPUART_H_
9 
10 #include "fsl_common.h"
11 #include "fsl_lpflexcomm.h"
12 
13 /*!
14  * @addtogroup lpuart_driver
15  * @{
16  */
17 
18 /*******************************************************************************
19  * Definitions
20  ******************************************************************************/
21 
22 /*! @name Driver version */
23 /*! @{ */
24 /*! @brief LPUART driver version. */
25 #define FSL_LPUART_DRIVER_VERSION (MAKE_VERSION(2, 3, 2))
26 /*! @} */
27 
28 /*! @brief Retry times for waiting flag. */
29 #ifndef UART_RETRY_TIMES
30 #define UART_RETRY_TIMES 0U /* Defining to zero means to keep waiting for the flag until it is assert/deassert. */
31 #endif
32 
33 /*! @brief Error codes for the LPUART driver. */
34 enum
35 {
36     kStatus_LPUART_TxBusy                  = MAKE_STATUS(kStatusGroup_LPUART, 0), /*!< TX busy */
37     kStatus_LPUART_RxBusy                  = MAKE_STATUS(kStatusGroup_LPUART, 1), /*!< RX busy */
38     kStatus_LPUART_TxIdle                  = MAKE_STATUS(kStatusGroup_LPUART, 2), /*!< LPUART transmitter is idle. */
39     kStatus_LPUART_RxIdle                  = MAKE_STATUS(kStatusGroup_LPUART, 3), /*!< LPUART receiver is idle. */
40     kStatus_LPUART_TxWatermarkTooLarge     = MAKE_STATUS(kStatusGroup_LPUART, 4), /*!< TX FIFO watermark too large  */
41     kStatus_LPUART_RxWatermarkTooLarge     = MAKE_STATUS(kStatusGroup_LPUART, 5), /*!< RX FIFO watermark too large  */
42     kStatus_LPUART_FlagCannotClearManually = MAKE_STATUS(kStatusGroup_LPUART, 6), /*!< Some flag can't manually clear */
43     kStatus_LPUART_Error                   = MAKE_STATUS(kStatusGroup_LPUART, 7), /*!< Error happens on LPUART. */
44     kStatus_LPUART_RxRingBufferOverrun =
45         MAKE_STATUS(kStatusGroup_LPUART, 8), /*!< LPUART RX software ring buffer overrun. */
46     kStatus_LPUART_RxHardwareOverrun = MAKE_STATUS(kStatusGroup_LPUART, 9),  /*!< LPUART RX receiver overrun. */
47     kStatus_LPUART_NoiseError        = MAKE_STATUS(kStatusGroup_LPUART, 10), /*!< LPUART noise error. */
48     kStatus_LPUART_FramingError      = MAKE_STATUS(kStatusGroup_LPUART, 11), /*!< LPUART framing error. */
49     kStatus_LPUART_ParityError       = MAKE_STATUS(kStatusGroup_LPUART, 12), /*!< LPUART parity error. */
50     kStatus_LPUART_BaudrateNotSupport =
51         MAKE_STATUS(kStatusGroup_LPUART, 13), /*!< Baudrate is not support in current clock source */
52     kStatus_LPUART_IdleLineDetected = MAKE_STATUS(kStatusGroup_LPUART, 14), /*!< IDLE flag. */
53     kStatus_LPUART_Timeout          = MAKE_STATUS(kStatusGroup_LPUART, 15), /*!< LPUART times out. */
54 };
55 
56 /*! @brief LPUART parity mode. */
57 typedef enum _lpuart_parity_mode
58 {
59     kLPUART_ParityDisabled = 0x0U, /*!< Parity disabled */
60     kLPUART_ParityEven     = 0x2U, /*!< Parity enabled, type even, bit setting: PE|PT = 10 */
61     kLPUART_ParityOdd      = 0x3U, /*!< Parity enabled, type odd,  bit setting: PE|PT = 11 */
62 } lpuart_parity_mode_t;
63 
64 /*! @brief LPUART data bits count. */
65 typedef enum _lpuart_data_bits
66 {
67     kLPUART_EightDataBits = 0x0U, /*!< Eight data bit */
68 #if defined(FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT) && FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT
69     kLPUART_SevenDataBits = 0x1U, /*!< Seven data bit */
70 #endif
71 } lpuart_data_bits_t;
72 
73 /*! @brief LPUART stop bit count. */
74 typedef enum _lpuart_stop_bit_count
75 {
76     kLPUART_OneStopBit = 0U, /*!< One stop bit */
77     kLPUART_TwoStopBit = 1U, /*!< Two stop bits */
78 } lpuart_stop_bit_count_t;
79 
80 #if defined(FSL_FEATURE_LPUART_HAS_MODEM_SUPPORT) && FSL_FEATURE_LPUART_HAS_MODEM_SUPPORT
81 /*! @brief LPUART transmit CTS source. */
82 typedef enum _lpuart_transmit_cts_source
83 {
84     kLPUART_CtsSourcePin         = 0U, /*!< CTS resource is the LPUART_CTS pin. */
85     kLPUART_CtsSourceMatchResult = 1U, /*!< CTS resource is the match result. */
86 } lpuart_transmit_cts_source_t;
87 
88 /*! @brief LPUART transmit CTS configure. */
89 typedef enum _lpuart_transmit_cts_config
90 {
91     kLPUART_CtsSampleAtStart = 0U, /*!< CTS input is sampled at the start of each character. */
92     kLPUART_CtsSampleAtIdle  = 1U, /*!< CTS input is sampled when the transmitter is idle */
93 } lpuart_transmit_cts_config_t;
94 #endif
95 
96 /*! @brief LPUART idle flag type defines when the receiver starts counting. */
97 typedef enum _lpuart_idle_type_select
98 {
99     kLPUART_IdleTypeStartBit = 0U, /*!< Start counting after a valid start bit. */
100     kLPUART_IdleTypeStopBit  = 1U, /*!< Start counting after a stop bit. */
101 } lpuart_idle_type_select_t;
102 
103 /*! @brief LPUART idle detected configuration.
104  *  This structure defines the number of idle characters that must be received before
105  *  the IDLE flag is set.
106  */
107 typedef enum _lpuart_idle_config
108 {
109     kLPUART_IdleCharacter1   = 0U, /*!< the number of idle characters. */
110     kLPUART_IdleCharacter2   = 1U, /*!< the number of idle characters. */
111     kLPUART_IdleCharacter4   = 2U, /*!< the number of idle characters. */
112     kLPUART_IdleCharacter8   = 3U, /*!< the number of idle characters. */
113     kLPUART_IdleCharacter16  = 4U, /*!< the number of idle characters. */
114     kLPUART_IdleCharacter32  = 5U, /*!< the number of idle characters. */
115     kLPUART_IdleCharacter64  = 6U, /*!< the number of idle characters. */
116     kLPUART_IdleCharacter128 = 7U, /*!< the number of idle characters. */
117 } lpuart_idle_config_t;
118 
119 /*!
120  * @brief LPUART interrupt configuration structure, default settings all disabled.
121  *
122  * This structure contains the settings for all LPUART interrupt configurations.
123  */
124 enum _lpuart_interrupt_enable
125 {
126 #if defined(FSL_FEATURE_LPUART_HAS_MCR) && FSL_FEATURE_LPUART_HAS_MCR
127     kLPUART_CtsStateChangeInterruptEnable = LPUART_MCR_CTS_MASK,            /*!< Change of state on CTS_B pin. bit 0 */
128     kLPUART_DsrStateChangeInterruptEnable = LPUART_MCR_DSR_MASK,            /*!< Change of state on DSR_B pin. bit 1 */
129     kLPUART_RinStateChangeInterruptEnable = LPUART_MCR_RIN_MASK,            /*!< Change of state on RIN_B pin. bit 2 */
130     kLPUART_DcdStateChangeInterruptEnable = LPUART_MCR_DCD_MASK,            /*!< Change of state on DCD_B pin. bit 3 */
131 #endif
132     kLPUART_RxActiveEdgeInterruptEnable = (LPUART_BAUD_RXEDGIE_MASK >> 8U), /*!< Receive Active Edge. bit 6 */
133 #if defined(FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT
134     kLPUART_LinBreakInterruptEnable = (LPUART_BAUD_LBKDIE_MASK >> 8U),      /*!< LIN break detect. bit 7 */
135 #endif
136 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
137     kLPUART_RxFifoUnderflowInterruptEnable = (LPUART_FIFO_RXUFE_MASK), /*!< Receive FIFO Underflow. bit 8 */
138     kLPUART_TxFifoOverflowInterruptEnable  = (LPUART_FIFO_TXOFE_MASK), /*!< Transmit FIFO Overflow. bit 9 */
139 #endif
140     kLPUART_RxCounter0TimeoutInterruptEnable = 1UL << 10,              /*!< Receiver counter0 timeout. bit 10 */
141     kLPUART_RxCounter1TimeoutInterruptEnable = 1UL << 11,              /*!< Receiver counter1 timeout. bit 11 */
142     kLPUART_TxCounter0TimeoutInterruptEnable = 1UL << 12,              /*!< Transmitter counter0 timeout. bit 12 */
143     kLPUART_TxCounter1TimeoutInterruptEnable = 1UL << 13,              /*!< Transmitter counter1 timeout. bit 13 */
144 #if defined(FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING) && FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING
145     kLPUART_DataMatch2InterruptEnable =
146         (LPUART_CTRL_MA2IE_MASK), /*!< The next character to be read from LPUART_DATA matches MA2. bit 14 */
147     kLPUART_DataMatch1InterruptEnable =
148         (LPUART_CTRL_MA1IE_MASK), /*!< The next character to be read from LPUART_DATA matches MA1. bit 15 */
149 #endif
150     kLPUART_IdleLineInterruptEnable             = (LPUART_CTRL_ILIE_MASK), /*!< Idle line. bit 20 */
151     kLPUART_RxDataRegFullInterruptEnable        = (LPUART_CTRL_RIE_MASK),  /*!< Receiver data register full. bit 21 */
152     kLPUART_TransmissionCompleteInterruptEnable = (LPUART_CTRL_TCIE_MASK), /*!< Transmission complete. bit 22 */
153     kLPUART_TxDataRegEmptyInterruptEnable       = (LPUART_CTRL_TIE_MASK),  /*!< Transmit data register empty. bit 23 */
154     kLPUART_ParityErrorInterruptEnable          = (LPUART_CTRL_PEIE_MASK), /*!< Parity error flag. bit 24 */
155     kLPUART_FramingErrorInterruptEnable         = (LPUART_CTRL_FEIE_MASK), /*!< Framing error flag. bit 25 */
156     kLPUART_NoiseErrorInterruptEnable           = (LPUART_CTRL_NEIE_MASK), /*!< Noise error flag. bit 26 */
157     kLPUART_RxOverrunInterruptEnable            = (LPUART_CTRL_ORIE_MASK), /*!< Receiver Overrun. bit 27 */
158     kLPUART_AllInterruptEnable =
159 #if defined(FSL_FEATURE_LPUART_HAS_MCR) && FSL_FEATURE_LPUART_HAS_MCR
160         kLPUART_CtsStateChangeInterruptEnable | kLPUART_DsrStateChangeInterruptEnable |
161         kLPUART_RinStateChangeInterruptEnable | kLPUART_DcdStateChangeInterruptEnable |
162 #endif
163         kLPUART_RxActiveEdgeInterruptEnable | kLPUART_IdleLineInterruptEnable | kLPUART_RxDataRegFullInterruptEnable |
164         kLPUART_TransmissionCompleteInterruptEnable | kLPUART_TxDataRegEmptyInterruptEnable |
165         kLPUART_ParityErrorInterruptEnable | kLPUART_FramingErrorInterruptEnable | kLPUART_NoiseErrorInterruptEnable |
166         kLPUART_RxOverrunInterruptEnable
167 #if defined(FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT
168         | kLPUART_LinBreakInterruptEnable
169 #endif
170 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
171         | kLPUART_RxFifoUnderflowInterruptEnable | kLPUART_TxFifoOverflowInterruptEnable
172 #endif
173 #if defined(FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING) && FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING
174         | kLPUART_DataMatch2InterruptEnable | kLPUART_DataMatch1InterruptEnable
175 #endif
176     ,
177 };
178 
179 /*!
180  * @brief LPUART status flags.
181  *
182  * This provides constants for the LPUART status flags for use in the LPUART functions.
183  */
184 enum _lpuart_flags
185 {
186 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
187     kLPUART_RxFifoUnderflowFlag =
188         (LPUART_FIFO_RXUF_MASK >> 16),   /*!< RXUF bit, sets if receive buffer underflow occurred. bit 0 */
189     kLPUART_TxFifoOverflowFlag =
190         (LPUART_FIFO_TXOF_MASK >> 16),   /*!< TXOF bit, sets if transmit buffer overflow occurred. bit 1 */
191     kLPUART_RxFifoEmptyFlag =
192         (LPUART_FIFO_RXEMPT_MASK >> 16), /*!< RXEMPT bit, sets if receive buffer is empty. bit 6 */
193     kLPUART_TxFifoEmptyFlag =
194         (LPUART_FIFO_TXEMPT_MASK >> 16), /*!< TXEMPT bit, sets if transmit buffer is empty. bit 7 */
195 #endif
196 
197 #if defined(FSL_FEATURE_LPUART_HAS_MCR) && FSL_FEATURE_LPUART_HAS_MCR
198     kLPUART_CtsStateChangeFlag = LPUART_MCR_CTS_MASK << 2U, /*!< Change of state on CTS_B pin. bit 2 */
199     kLPUART_DsrStateChangeFlag = LPUART_MCR_DSR_MASK << 2U, /*!< Change of state on DSR_B pin. bit 3 */
200     kLPUART_RinStateChangeFlag = LPUART_MCR_RIN_MASK << 2U, /*!< Change of state on RIN_B pin. bit 4 */
201     kLPUART_DcdStateChangeFlag = LPUART_MCR_DCD_MASK << 2U, /*!< Change of state on DCD_B pin. bit 5 */
202 #endif
203     kLPUART_RxCounter0TimeoutFlag = 1UL << 10,              /*!< Receiver counter0 timeout. bit 10 */
204     kLPUART_RxCounter1TimeoutFlag = 1UL << 11,              /*!< Receiver counter1 timeout. bit 11 */
205     kLPUART_TxCounter0TimeoutFlag = 1UL << 12,              /*!< Transmitter counter0 timeout. bit 12 */
206     kLPUART_TxCounter1TimeoutFlag = 1UL << 13,              /*!< Transmitter counter1 timeout. bit 13 */
207 #if defined(FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING) && FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING
208     kLPUART_DataMatch2Flag =
209         LPUART_STAT_MA2F_MASK, /*!< The next character to be read from LPUART_DATA matches MA2. bit 14 */
210     kLPUART_DataMatch1Flag =
211         LPUART_STAT_MA1F_MASK, /*!< The next character to be read from LPUART_DATA matches MA1. bit 15 */
212 #endif
213     kLPUART_ParityErrorFlag = (LPUART_STAT_PF_MASK), /*!< If parity enabled, sets upon parity error detection. bit 16 */
214     kLPUART_FramingErrorFlag =
215         (LPUART_STAT_FE_MASK), /*!< Frame error flag, sets if logic 0 was detected where stop bit expected. bit 17 */
216     kLPUART_NoiseErrorFlag = (LPUART_STAT_NF_MASK), /*!< Receive takes 3 samples of each received bit.  If any
217                                                        of these samples differ, noise flag sets. bit 18 */
218     kLPUART_RxOverrunFlag = (LPUART_STAT_OR_MASK),  /*!< Receive Overrun, sets when new data is received before
219                                                        data is  read from receive register. bit 19 */
220     kLPUART_IdleLineFlag = (LPUART_STAT_IDLE_MASK), /*!< Idle line detect flag, sets when idle line detected. bit 20 */
221     kLPUART_RxDataRegFullFlag = (LPUART_STAT_RDRF_MASK), /*!< Receive data register full flag, sets when the
222                                                             receive data buffer is full. bit 21 */
223     kLPUART_TransmissionCompleteFlag =
224         (LPUART_STAT_TC_MASK),   /*!< Transmission complete flag, sets when transmission activity complete. bit 22 */
225     kLPUART_TxDataRegEmptyFlag =
226         (LPUART_STAT_TDRE_MASK), /*!< Transmit data register empty flag, sets when transmit buffer is empty. bit 23 */
227     kLPUART_RxActiveFlag =
228         (LPUART_STAT_RAF_MASK),  /*!< Receiver Active Flag (RAF), sets at beginning of valid start. bit 24 */
229     kLPUART_RxActiveEdgeFlag = (LPUART_STAT_RXEDGIF_MASK), /*!< Receive pin active edge interrupt flag, sets
230                                                               when active edge detected. bit 30 */
231 #if defined(FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT
232     kLPUART_LinBreakFlag = (LPUART_STAT_LBKDIF_MASK),      /*!< LIN break detect interrupt flag, sets when LIN break
233                                                               char detected and LIN circuit enabled. bit 31 */
234 #endif
235 
236     kLPUART_AllClearFlags =
237 #if defined(FSL_FEATURE_LPUART_HAS_MCR) && FSL_FEATURE_LPUART_HAS_MCR
238         kLPUART_CtsStateChangeFlag | kLPUART_DsrStateChangeFlag | kLPUART_RinStateChangeFlag |
239         kLPUART_DcdStateChangeFlag |
240 #endif
241         kLPUART_ParityErrorFlag | kLPUART_FramingErrorFlag | kLPUART_NoiseErrorFlag | kLPUART_RxOverrunFlag |
242         kLPUART_IdleLineFlag | kLPUART_RxActiveEdgeFlag
243 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
244         | kLPUART_TxFifoOverflowFlag | kLPUART_RxFifoUnderflowFlag
245 #endif
246 #if defined(FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING) && FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING
247         | kLPUART_DataMatch2Flag | kLPUART_DataMatch1Flag
248 #endif
249 #if defined(FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT
250         | kLPUART_LinBreakFlag
251 #endif
252     ,
253 
254     kLPUART_AllFlags =
255 #if defined(FSL_FEATURE_LPUART_HAS_MCR) && FSL_FEATURE_LPUART_HAS_MCR
256         kLPUART_CtsStateChangeFlag | kLPUART_DsrStateChangeFlag | kLPUART_RinStateChangeFlag |
257         kLPUART_DcdStateChangeFlag |
258 #endif
259         kLPUART_ParityErrorFlag | kLPUART_FramingErrorFlag | kLPUART_NoiseErrorFlag | kLPUART_RxOverrunFlag |
260         kLPUART_IdleLineFlag | kLPUART_RxDataRegFullFlag | kLPUART_TransmissionCompleteFlag |
261         kLPUART_TxDataRegEmptyFlag | kLPUART_RxActiveFlag | kLPUART_RxActiveEdgeFlag
262 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
263         | kLPUART_TxFifoOverflowFlag | kLPUART_RxFifoUnderflowFlag | kLPUART_TxFifoEmptyFlag | kLPUART_RxFifoEmptyFlag
264 #endif
265 #if defined(FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING) && FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING
266         | kLPUART_DataMatch2Flag | kLPUART_DataMatch1Flag
267 #endif
268 #if defined(FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT
269         | kLPUART_LinBreakFlag
270 #endif
271     ,
272 };
273 
274 /*! @brief LPUART timeout condition.
275  * This structure defines the conditions when the counter timeout occur.
276  */
277 typedef enum _lpuart_timeout_condition
278 {
279     kLPUART_TimeoutAfterCharacters =
280         0U, /*!< Timeout occurs when the number of characters specified by timeoutValue are received. */
281     kLPUART_TimeoutAfterIdle = 1U, /*!< Timeout occurs when rx/tx remains idle for timeoutValue of bit clocks after idle
282                                       condition is detected. */
283     kLPUART_TimeoutAfterNext = 2U, /*!< Timeout occurs when rx/tx remains idle for timeoutValue of bit clocks after next
284                                       character is received/transmitted. */
285     kLPUART_TimeoutAfterIdleBeforeExtended = 3U, /*!< Timeout occurs when tx/rx is idle for larger than timeoutValue of
286                                                     bit clocks and smaller than tx/rx extended timeout value. */
287 } lpuart_timeout_condition_t;
288 
289 /*! @brief LPUART timeout counter configuration structure. */
290 typedef struct _lpuart_timeout_counter_config
291 {
292     bool enableCounter;                          /*!< Eneble the timeout counter. */
293     lpuart_timeout_condition_t timeoutCondition; /*!< Timeout condition. */
294     uint16_t timeoutValue;                       /*!< Timeout value. */
295 } lpuart_timeout_counter_config_t;
296 
297 /*! @brief LPUART timeout configuration structure. */
298 typedef struct _lpuart_timeout_config
299 {
300     uint16_t rxExtendedTimeoutValue;            /*!< The number of bits since the last stop bit that is required for an
301                   idle condition to be detected. Enable this will disable rxIdleType and rxIdleConfig. Set to 0 to disable. */
302     uint16_t txExtendedTimeoutValue;            /*!< The transmitter idle time in number of bits (baud rate) whenever an
303                   idle character is queued through the transmit FIFO. */
304     lpuart_timeout_counter_config_t rxCounter0; /*!< Rx counter 0 configuration. */
305     lpuart_timeout_counter_config_t rxCounter1; /*!< Rx counter 1 configuration. */
306     lpuart_timeout_counter_config_t txCounter0; /*!< Tx counter 0 configuration. */
307     lpuart_timeout_counter_config_t txCounter1; /*!< Tx counter 1 configuration. */
308 } lpuart_timeout_config_t;
309 
310 /*! @brief LPUART configuration structure. */
311 typedef struct _lpuart_config
312 {
313     uint32_t baudRate_Bps;                /*!< LPUART baud rate  */
314     lpuart_parity_mode_t parityMode;      /*!< Parity mode, disabled (default), even, odd */
315     lpuart_data_bits_t dataBitsCount;     /*!< Data bits count, eight (default), seven */
316     bool isMsb;                           /*!< Data bits order, LSB (default), MSB */
317 #if defined(FSL_FEATURE_LPUART_HAS_STOP_BIT_CONFIG_SUPPORT) && FSL_FEATURE_LPUART_HAS_STOP_BIT_CONFIG_SUPPORT
318     lpuart_stop_bit_count_t stopBitCount; /*!< Number of stop bits, 1 stop bit (default) or 2 stop bits  */
319 #endif
320 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
321     uint8_t txFifoWatermark; /*!< TX FIFO watermark */
322     uint8_t rxFifoWatermark; /*!< RX FIFO watermark */
323 #endif
324 #if defined(FSL_FEATURE_LPUART_HAS_MODEM_SUPPORT) && FSL_FEATURE_LPUART_HAS_MODEM_SUPPORT
325     bool enableRxRTS;                         /*!< RX RTS enable */
326     bool enableTxCTS;                         /*!< TX CTS enable */
327     lpuart_transmit_cts_source_t txCtsSource; /*!< TX CTS source */
328     lpuart_transmit_cts_config_t txCtsConfig; /*!< TX CTS configure */
329 #endif
330     lpuart_idle_type_select_t rxIdleType;     /*!< RX IDLE type. */
331     lpuart_idle_config_t rxIdleConfig;        /*!< RX IDLE configuration. */
332     lpuart_timeout_config_t timeoutConfig;    /*!< Timeout configuration. */
333     bool enableSingleWire; /*!< Use TXD pin as the source for the receiver. When enabled the TXD pin should be
334                               configured as open drain. */
335     uint8_t rtsDelay;      /*!< Delay the negation of RTS by the configured number of bit clocks. */
336     bool enableTx;         /*!< Enable TX */
337     bool enableRx;         /*!< Enable RX */
338 } lpuart_config_t;
339 
340 /*! @brief LPUART transfer structure. */
341 typedef struct _lpuart_transfer
342 {
343     /*
344      * Use separate TX and RX data pointer, because TX data is const data.
345      * The member data is kept for backward compatibility.
346      */
347     union
348     {
349         uint8_t *data;            /*!< The buffer of data to be transfer.*/
350         uint8_t *rxData;          /*!< The buffer to receive data. */
351         uint16_t *rxData16;       /*!< The buffer to receive data. */
352         const uint8_t *txData;    /*!< The buffer of data to be sent. */
353         const uint16_t *txData16; /*!< The buffer of data to be sent. */
354     };
355     size_t dataSize;              /*!< The byte count to be transfer. */
356 } lpuart_transfer_t;
357 
358 /* Forward declaration of the handle typedef. */
359 typedef struct _lpuart_handle lpuart_handle_t;
360 
361 /*! @brief LPUART transfer callback function. */
362 typedef void (*lpuart_transfer_callback_t)(LPUART_Type *base, lpuart_handle_t *handle, status_t status, void *userData);
363 
364 /*! @brief LPUART handle structure. */
365 struct _lpuart_handle
366 {
367     union
368     {
369         const uint8_t *volatile txData;    /*!< Address of remaining data to send. */
370         const uint16_t *volatile txData16; /*!< Address of remaining data to send. */
371     };
372     volatile size_t txDataSize;            /*!< Size of the remaining data to send. */
373     size_t txDataSizeAll;                  /*!< Size of the data to send out. */
374     union
375     {
376         uint8_t *volatile rxData;    /*!< Address of remaining data to receive. */
377         uint16_t *volatile rxData16; /*!< Address of remaining data to receive. */
378     };
379     volatile size_t rxDataSize;      /*!< Size of the remaining data to receive. */
380     size_t rxDataSizeAll;            /*!< Size of the data to receive. */
381 
382     union
383     {
384         uint8_t *rxRingBuffer;           /*!< Start address of the receiver ring buffer. */
385         uint16_t *rxRingBuffer16;        /*!< Start address of the receiver ring buffer. */
386     };
387     size_t rxRingBufferSize;             /*!< Size of the ring buffer. */
388     volatile uint16_t rxRingBufferHead;  /*!< Index for the driver to store received data into ring buffer. */
389     volatile uint16_t rxRingBufferTail;  /*!< Index for the user to get data from the ring buffer. */
390 
391     lpuart_transfer_callback_t callback; /*!< Callback function. */
392     void *userData;                      /*!< LPUART callback function parameter.*/
393 
394     volatile uint8_t txState;            /*!< TX transfer state. */
395     volatile uint8_t rxState;            /*!< RX transfer state. */
396 
397 #if defined(FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT) && FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT
398     bool isSevenDataBits; /*!< Seven data bits flag. */
399 #endif
400     bool is16bitData;     /*!< 16bit data bits flag, only used for 9bit or 10bit data */
401 };
402 
403 /* Typedef for interrupt handler. */
404 typedef void (*lpuart_irq_handler_t)(uint32_t instance, void *handle);
405 
406 /*******************************************************************************
407  * Variables
408  ******************************************************************************/
409 /* Array of LPUART IRQ number. */
410 extern const IRQn_Type s_lpuartIRQ[];
411 
412 /*******************************************************************************
413  * API
414  ******************************************************************************/
415 
416 #if defined(__cplusplus)
417 extern "C" {
418 #endif /* _cplusplus */
419 
420 #if defined(FSL_FEATURE_LPUART_HAS_GLOBAL) && FSL_FEATURE_LPUART_HAS_GLOBAL
421 
422 /*!
423  * @name Software Reset
424  * @{
425  */
426 
427 /*!
428  * @brief Resets the LPUART using software.
429  *
430  * This function resets all internal logic and registers except the Global Register.
431  * Remains set until cleared by software.
432  *
433  * @param base LPUART peripheral base address.
434  */
LPUART_SoftwareReset(LPUART_Type * base)435 static inline void LPUART_SoftwareReset(LPUART_Type *base)
436 {
437     base->GLOBAL |= LPUART_GLOBAL_RST_MASK;
438     base->GLOBAL &= ~LPUART_GLOBAL_RST_MASK;
439 }
440 /*! @} */
441 #endif /*FSL_FEATURE_LPUART_HAS_GLOBAL*/
442 
443 /*!
444  * @name Initialization and deinitialization
445  * @{
446  */
447 
448 /*!
449  * @brief Initializes an LPUART instance with the user configuration structure and the peripheral clock.
450  *
451  * This function configures the LPUART module with user-defined settings. Call the LPUART_GetDefaultConfig() function
452  * to configure the configuration structure and get the default configuration.
453  * The example below shows how to use this API to configure the LPUART.
454  * @code
455  *  lpuart_config_t lpuartConfig;
456  *  lpuartConfig.baudRate_Bps = 115200U;
457  *  lpuartConfig.parityMode = kLPUART_ParityDisabled;
458  *  lpuartConfig.dataBitsCount = kLPUART_EightDataBits;
459  *  lpuartConfig.isMsb = false;
460  *  lpuartConfig.stopBitCount = kLPUART_OneStopBit;
461  *  lpuartConfig.txFifoWatermark = 0;
462  *  lpuartConfig.rxFifoWatermark = 1;
463  *  LPUART_Init(LPUART1, &lpuartConfig, 20000000U);
464  * @endcode
465  *
466  * @param base LPUART peripheral base address.
467  * @param config Pointer to a user-defined configuration structure.
468  * @param srcClock_Hz LPUART clock source frequency in HZ.
469  * @retval kStatus_LPUART_BaudrateNotSupport Baudrate is not support in current clock source.
470  * @retval kStatus_Success LPUART initialize succeed
471  */
472 status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t srcClock_Hz);
473 
474 /*!
475  * @brief Deinitializes a LPUART instance.
476  *
477  * This function waits for transmit to complete, disables TX and RX, and disables the LPUART clock.
478  *
479  * @param base LPUART peripheral base address.
480  */
481 void LPUART_Deinit(LPUART_Type *base);
482 
483 /*!
484  * @brief Gets the default configuration structure.
485  *
486  * This function initializes the LPUART configuration structure to a default value. The default
487  * values are:
488  *   lpuartConfig->baudRate_Bps = 115200U;
489  *   lpuartConfig->parityMode = kLPUART_ParityDisabled;
490  *   lpuartConfig->dataBitsCount = kLPUART_EightDataBits;
491  *   lpuartConfig->isMsb = false;
492  *   lpuartConfig->stopBitCount = kLPUART_OneStopBit;
493  *   lpuartConfig->txFifoWatermark = 0;
494  *   lpuartConfig->rxFifoWatermark = 1;
495  *   lpuartConfig->rxIdleType = kLPUART_IdleTypeStartBit;
496  *   lpuartConfig->rxIdleConfig = kLPUART_IdleCharacter1;
497  *   lpuartConfig->enableTx = false;
498  *   lpuartConfig->enableRx = false;
499  *
500  * @param config Pointer to a configuration structure.
501  */
502 void LPUART_GetDefaultConfig(lpuart_config_t *config);
503 /*! @} */
504 
505 /*!
506  * @name Module configuration
507  * @{
508  */
509 /*!
510  * @brief Sets the LPUART instance baudrate.
511  *
512  * This function configures the LPUART module baudrate. This function is used to update
513  * the LPUART module baudrate after the LPUART module is initialized by the LPUART_Init.
514  * @code
515  *  LPUART_SetBaudRate(LPUART1, 115200U, 20000000U);
516  * @endcode
517  *
518  * @param base LPUART peripheral base address.
519  * @param baudRate_Bps LPUART baudrate to be set.
520  * @param srcClock_Hz LPUART clock source frequency in HZ.
521  * @retval kStatus_LPUART_BaudrateNotSupport Baudrate is not supported in the current clock source.
522  * @retval kStatus_Success Set baudrate succeeded.
523  */
524 status_t LPUART_SetBaudRate(LPUART_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz);
525 
526 /*!
527  * @brief Enable 9-bit data mode for LPUART.
528  *
529  * This function set the 9-bit mode for LPUART module. The 9th bit is not used for parity thus can be modified by user.
530  *
531  * @param base LPUART peripheral base address.
532  * @param enable true to enable, flase to disable.
533  */
534 void LPUART_Enable9bitMode(LPUART_Type *base, bool enable);
535 
536 /*!
537  * @brief Set the LPUART address.
538  *
539  * This function configures the address for LPUART module that works as slave in 9-bit data mode. One or two address
540  * fields can be configured. When the address field's match enable bit is set, the frame it receices with MSB being
541  * 1 is considered as an address frame, otherwise it is considered as data frame. Once the address frame matches one
542  * of slave's own addresses, this slave is addressed. This address frame and its following data frames are stored in
543  * the receive buffer, otherwise the frames will be discarded. To un-address a slave, just send an address frame with
544  * unmatched address.
545  *
546  * @note Any LPUART instance joined in the multi-slave system can work as slave. The position of the address mark is the
547  * same as the parity bit when parity is enabled for 8 bit and 9 bit data formats.
548  *
549  * @param base LPUART peripheral base address.
550  * @param address1 LPUART slave address1.
551  * @param address2 LPUART slave address2.
552  */
LPUART_SetMatchAddress(LPUART_Type * base,uint16_t address1,uint16_t address2)553 static inline void LPUART_SetMatchAddress(LPUART_Type *base, uint16_t address1, uint16_t address2)
554 {
555     /* Configure match address. */
556     uint32_t address = ((uint32_t)address2 << 16U) | (uint32_t)address1 | 0x1000100UL;
557     base->MATCH      = address;
558 }
559 
560 /*!
561  * @brief Enable the LPUART match address feature.
562  *
563  * @param base LPUART peripheral base address.
564  * @param match1 true to enable match address1, false to disable.
565  * @param match2 true to enable match address2, false to disable.
566  */
LPUART_EnableMatchAddress(LPUART_Type * base,bool match1,bool match2)567 static inline void LPUART_EnableMatchAddress(LPUART_Type *base, bool match1, bool match2)
568 {
569     /* Configure match address1 enable bit. */
570     if (match1)
571     {
572         base->BAUD |= (uint32_t)LPUART_BAUD_MAEN1_MASK;
573     }
574     else
575     {
576         base->BAUD &= ~(uint32_t)LPUART_BAUD_MAEN1_MASK;
577     }
578     /* Configure match address2 enable bit. */
579     if (match2)
580     {
581         base->BAUD |= (uint32_t)LPUART_BAUD_MAEN2_MASK;
582     }
583     else
584     {
585         base->BAUD &= ~(uint32_t)LPUART_BAUD_MAEN2_MASK;
586     }
587 }
588 
589 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
590 /*!
591  * @brief Sets the rx FIFO watermark.
592  *
593  * @param base LPUART peripheral base address.
594  * @param water Rx FIFO watermark.
595  */
LPUART_SetRxFifoWatermark(LPUART_Type * base,uint8_t water)596 static inline void LPUART_SetRxFifoWatermark(LPUART_Type *base, uint8_t water)
597 {
598     assert((uint8_t)FSL_FEATURE_LPUART_FIFO_SIZEn(base) > water);
599     base->WATER = (base->WATER & ~LPUART_WATER_RXWATER_MASK) | LPUART_WATER_RXWATER(water);
600 }
601 
602 /*!
603  * @brief Sets the tx FIFO watermark.
604  *
605  * @param base LPUART peripheral base address.
606  * @param water Tx FIFO watermark.
607  */
LPUART_SetTxFifoWatermark(LPUART_Type * base,uint8_t water)608 static inline void LPUART_SetTxFifoWatermark(LPUART_Type *base, uint8_t water)
609 {
610     assert((uint8_t)FSL_FEATURE_LPUART_FIFO_SIZEn(base) > water);
611     base->WATER = (base->WATER & ~LPUART_WATER_TXWATER_MASK) | LPUART_WATER_TXWATER(water);
612 }
613 #endif
614 
615 /*!
616  * @brief Sets the LPUART using 16bit transmit, only for 9bit or 10bit mode.
617  *
618  * This function Enable 16bit Data transmit in lpuart_handle_t.
619  *
620  * @param handle LPUART handle pointer.
621  * @param enable true to enable, false to disable.
622  */
LPUART_TransferEnable16Bit(lpuart_handle_t * handle,bool enable)623 static inline void LPUART_TransferEnable16Bit(lpuart_handle_t *handle, bool enable)
624 {
625     handle->is16bitData = enable;
626 }
627 /*! @} */
628 
629 /*!
630  * @name Status
631  * @{
632  */
633 
634 /*!
635  * @brief Gets LPUART status flags.
636  *
637  * This function gets all LPUART status flags. The flags are returned as the logical
638  * OR value of the enumerators @ref _lpuart_flags. To check for a specific status,
639  * compare the return value with enumerators in the @ref _lpuart_flags.
640  * For example, to check whether the TX is empty:
641  * @code
642  *     if (kLPUART_TxDataRegEmptyFlag & LPUART_GetStatusFlags(LPUART1))
643  *     {
644  *         ...
645  *     }
646  * @endcode
647  *
648  * @param base LPUART peripheral base address.
649  * @return LPUART status flags which are ORed by the enumerators in the _lpuart_flags.
650  */
651 uint32_t LPUART_GetStatusFlags(LPUART_Type *base);
652 
653 /*!
654  * @brief Clears status flags with a provided mask.
655  *
656  * This function clears LPUART status flags with a provided mask. Automatically cleared flags
657  * can't be cleared by this function.
658  * Flags that can only cleared or set by hardware are:
659  *    kLPUART_TxDataRegEmptyFlag, kLPUART_TransmissionCompleteFlag, kLPUART_RxDataRegFullFlag,
660  *    kLPUART_RxActiveFlag, kLPUART_NoiseErrorInRxDataRegFlag, kLPUART_ParityErrorInRxDataRegFlag,
661  *    kLPUART_TxFifoEmptyFlag,kLPUART_RxFifoEmptyFlag
662  * Note: This API should be called when the Tx/Rx is idle, otherwise it takes no effects.
663  *
664  * @param base LPUART peripheral base address.
665  * @param mask the status flags to be cleared. The user can use the enumerators in the
666  *  _lpuart_status_flag_t to do the OR operation and get the mask.
667  * @return 0 succeed, others failed.
668  * @retval kStatus_LPUART_FlagCannotClearManually The flag can't be cleared by this function but
669  *         it is cleared automatically by hardware.
670  * @retval kStatus_Success Status in the mask are cleared.
671  */
672 status_t LPUART_ClearStatusFlags(LPUART_Type *base, uint32_t mask);
673 /*! @} */
674 
675 /*!
676  * @name Interrupts
677  * @{
678  */
679 
680 /*!
681  * @brief Enables LPUART interrupts according to a provided mask.
682  *
683  * This function enables the LPUART interrupts according to a provided mask. The mask
684  * is a logical OR of enumeration members. See the @ref _lpuart_interrupt_enable.
685  * This examples shows how to enable TX empty interrupt and RX full interrupt:
686  * @code
687  *     LPUART_EnableInterrupts(LPUART1,kLPUART_TxDataRegEmptyInterruptEnable | kLPUART_RxDataRegFullInterruptEnable);
688  * @endcode
689  *
690  * @param base LPUART peripheral base address.
691  * @param mask The interrupts to enable. Logical OR of the enumeration _uart_interrupt_enable.
692  */
693 void LPUART_EnableInterrupts(LPUART_Type *base, uint32_t mask);
694 
695 /*!
696  * @brief Disables  LPUART interrupts according to a provided mask.
697  *
698  * This function disables the LPUART interrupts according to a provided mask. The mask
699  * is a logical OR of enumeration members. See @ref _lpuart_interrupt_enable.
700  * This example shows how to disable the TX empty interrupt and RX full interrupt:
701  * @code
702  *     LPUART_DisableInterrupts(LPUART1,kLPUART_TxDataRegEmptyInterruptEnable | kLPUART_RxDataRegFullInterruptEnable);
703  * @endcode
704  *
705  * @param base LPUART peripheral base address.
706  * @param mask The interrupts to disable. Logical OR of @ref _lpuart_interrupt_enable.
707  */
708 void LPUART_DisableInterrupts(LPUART_Type *base, uint32_t mask);
709 
710 /*!
711  * @brief Gets enabled LPUART interrupts.
712  *
713  * This function gets the enabled LPUART interrupts. The enabled interrupts are returned
714  * as the logical OR value of the enumerators @ref _lpuart_interrupt_enable. To check
715  * a specific interrupt enable status, compare the return value with enumerators
716  * in @ref _lpuart_interrupt_enable.
717  * For example, to check whether the TX empty interrupt is enabled:
718  * @code
719  *     uint32_t enabledInterrupts = LPUART_GetEnabledInterrupts(LPUART1);
720  *
721  *     if (kLPUART_TxDataRegEmptyInterruptEnable & enabledInterrupts)
722  *     {
723  *         ...
724  *     }
725  * @endcode
726  *
727  * @param base LPUART peripheral base address.
728  * @return LPUART interrupt flags which are logical OR of the enumerators in @ref _lpuart_interrupt_enable.
729  */
730 uint32_t LPUART_GetEnabledInterrupts(LPUART_Type *base);
731 /*! @} */
732 
733 #if defined(FSL_FEATURE_LPUART_HAS_DMA_ENABLE) && FSL_FEATURE_LPUART_HAS_DMA_ENABLE
734 /*!
735  * @name DMA Configuration
736  * @{
737  */
738 /*!
739  * @brief Gets the LPUART data register address.
740  *
741  * This function returns the LPUART data register address, which is mainly used by the DMA/eDMA.
742  *
743  * @param base LPUART peripheral base address.
744  * @return LPUART data register addresses which are used both by the transmitter and receiver.
745  */
LPUART_GetDataRegisterAddress(LPUART_Type * base)746 static inline uint32_t LPUART_GetDataRegisterAddress(LPUART_Type *base)
747 {
748     return (uint32_t) & (base->DATA);
749 }
750 
751 /*!
752  * @brief Enables or disables the LPUART transmitter DMA request.
753  *
754  * This function enables or disables the transmit data register empty flag, STAT[TDRE], to generate DMA requests.
755  *
756  * @param base LPUART peripheral base address.
757  * @param enable True to enable, false to disable.
758  */
LPUART_EnableTxDMA(LPUART_Type * base,bool enable)759 static inline void LPUART_EnableTxDMA(LPUART_Type *base, bool enable)
760 {
761     if (enable)
762     {
763         base->BAUD |= LPUART_BAUD_TDMAE_MASK;
764     }
765     else
766     {
767         base->BAUD &= ~LPUART_BAUD_TDMAE_MASK;
768     }
769 }
770 
771 /*!
772  * @brief Enables or disables the LPUART receiver DMA.
773  *
774  * This function enables or disables the receiver data register full flag, STAT[RDRF], to generate DMA requests.
775  *
776  * @param base LPUART peripheral base address.
777  * @param enable True to enable, false to disable.
778  */
LPUART_EnableRxDMA(LPUART_Type * base,bool enable)779 static inline void LPUART_EnableRxDMA(LPUART_Type *base, bool enable)
780 {
781     if (enable)
782     {
783         base->BAUD |= LPUART_BAUD_RDMAE_MASK;
784     }
785     else
786     {
787         base->BAUD &= ~LPUART_BAUD_RDMAE_MASK;
788     }
789 }
790 /*! @} */
791 #endif /* FSL_FEATURE_LPUART_HAS_DMA_ENABLE */
792 
793 /*!
794  * @name Bus Operations
795  * @{
796  */
797 
798 /*!
799  * @brief Get the LPUART instance from peripheral base address.
800  *
801  * @param base LPUART peripheral base address.
802  * @return LPUART instance.
803  */
804 uint32_t LPUART_GetInstance(LPUART_Type *base);
805 
806 /*!
807  * @brief Enables or disables the LPUART transmitter.
808  *
809  * This function enables or disables the LPUART transmitter.
810  *
811  * @param base LPUART peripheral base address.
812  * @param enable True to enable, false to disable.
813  */
LPUART_EnableTx(LPUART_Type * base,bool enable)814 static inline void LPUART_EnableTx(LPUART_Type *base, bool enable)
815 {
816     if (enable)
817     {
818         base->CTRL |= LPUART_CTRL_TE_MASK;
819     }
820     else
821     {
822         base->CTRL &= ~LPUART_CTRL_TE_MASK;
823     }
824 }
825 
826 /*!
827  * @brief Enables or disables the LPUART receiver.
828  *
829  * This function enables or disables the LPUART receiver.
830  *
831  * @param base LPUART peripheral base address.
832  * @param enable True to enable, false to disable.
833  */
LPUART_EnableRx(LPUART_Type * base,bool enable)834 static inline void LPUART_EnableRx(LPUART_Type *base, bool enable)
835 {
836     if (enable)
837     {
838         base->CTRL |= LPUART_CTRL_RE_MASK;
839     }
840     else
841     {
842         base->CTRL &= ~LPUART_CTRL_RE_MASK;
843     }
844 }
845 
846 /*!
847  * @brief Writes to the transmitter register.
848  *
849  * This function writes data to the transmitter register directly. The upper layer must
850  * ensure that the TX register is empty or that the TX FIFO has room before calling this function.
851  *
852  * @param base LPUART peripheral base address.
853  * @param data Data write to the TX register.
854  */
LPUART_WriteByte(LPUART_Type * base,uint8_t data)855 static inline void LPUART_WriteByte(LPUART_Type *base, uint8_t data)
856 {
857     base->DATA = data;
858 }
859 
860 /*!
861  * @brief Reads the receiver register.
862  *
863  * This function reads data from the receiver register directly. The upper layer must
864  * ensure that the receiver register is full or that the RX FIFO has data before calling this function.
865  *
866  * @param base LPUART peripheral base address.
867  * @return Data read from data register.
868  */
LPUART_ReadByte(LPUART_Type * base)869 static inline uint8_t LPUART_ReadByte(LPUART_Type *base)
870 {
871 #if defined(FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT) && FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT
872     uint32_t ctrl = base->CTRL;
873     uint8_t result;
874     bool isSevenDataBits = (((ctrl & LPUART_CTRL_M7_MASK) != 0U) ||
875                             (((ctrl & LPUART_CTRL_M7_MASK) == 0U) && ((ctrl & LPUART_CTRL_M_MASK) == 0U) &&
876                              ((ctrl & LPUART_CTRL_PE_MASK) != 0U)));
877 
878     if (isSevenDataBits)
879     {
880         result = (uint8_t)(base->DATA & 0x7FU);
881     }
882     else
883     {
884         result = (uint8_t)base->DATA;
885     }
886 
887     return result;
888 #else
889     return (uint8_t)(base->DATA);
890 #endif
891 }
892 
893 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
894 /*!
895  * @brief Gets the rx FIFO data count.
896  *
897  * @param base LPUART peripheral base address.
898  * @return rx FIFO data count.
899  */
LPUART_GetRxFifoCount(LPUART_Type * base)900 static inline uint8_t LPUART_GetRxFifoCount(LPUART_Type *base)
901 {
902     return (uint8_t)((base->WATER & LPUART_WATER_RXCOUNT_MASK) >> LPUART_WATER_RXCOUNT_SHIFT);
903 }
904 
905 /*!
906  * @brief Gets the tx FIFO data count.
907  *
908  * @param base LPUART peripheral base address.
909  * @return tx FIFO data count.
910  */
LPUART_GetTxFifoCount(LPUART_Type * base)911 static inline uint8_t LPUART_GetTxFifoCount(LPUART_Type *base)
912 {
913     return (uint8_t)((base->WATER & LPUART_WATER_TXCOUNT_MASK) >> LPUART_WATER_TXCOUNT_SHIFT);
914 }
915 #endif
916 
917 /*!
918  * @brief Transmit an address frame in 9-bit data mode.
919  *
920  * @param base LPUART peripheral base address.
921  * @param address LPUART slave address.
922  */
923 void LPUART_SendAddress(LPUART_Type *base, uint8_t address);
924 
925 /*!
926  * @brief Writes to the transmitter register using a blocking method.
927  *
928  * This function polls the transmitter register, first waits for the register to be empty or TX FIFO to have room,
929  * and writes data to the transmitter buffer, then waits for the dat to be sent out to the bus.
930  *
931  * @param base LPUART peripheral base address.
932  * @param data Start address of the data to write.
933  * @param length Size of the data to write.
934  * @retval kStatus_LPUART_Timeout Transmission timed out and was aborted.
935  * @retval kStatus_Success Successfully wrote all data.
936  */
937 status_t LPUART_WriteBlocking(LPUART_Type *base, const uint8_t *data, size_t length);
938 
939 /*!
940  * @brief Writes to the transmitter register using a blocking method in 9bit or 10bit mode.
941  *
942  * @note This function only support 9bit or 10bit transfer.
943  *       Please make sure only 10bit of data is valid and other bits are 0.
944  *
945  * @param base LPUART peripheral base address.
946  * @param data Start address of the data to write.
947  * @param length Size of the data to write.
948  * @retval kStatus_LPUART_Timeout Transmission timed out and was aborted.
949  * @retval kStatus_Success Successfully wrote all data.
950  */
951 status_t LPUART_WriteBlocking16bit(LPUART_Type *base, const uint16_t *data, size_t length);
952 
953 /*!
954  * @brief Reads the receiver data register using a blocking method.
955  *
956  * This function polls the receiver register, waits for the receiver register full or receiver FIFO
957  * has data, and reads data from the TX register.
958  *
959  * @param base LPUART peripheral base address.
960  * @param data Start address of the buffer to store the received data.
961  * @param length Size of the buffer.
962  * @retval kStatus_LPUART_RxHardwareOverrun Receiver overrun happened while receiving data.
963  * @retval kStatus_LPUART_NoiseError Noise error happened while receiving data.
964  * @retval kStatus_LPUART_FramingError Framing error happened while receiving data.
965  * @retval kStatus_LPUART_ParityError Parity error happened while receiving data.
966  * @retval kStatus_LPUART_Timeout Transmission timed out and was aborted.
967  * @retval kStatus_Success Successfully received all data.
968  */
969 status_t LPUART_ReadBlocking(LPUART_Type *base, uint8_t *data, size_t length);
970 
971 /*!
972  * @brief Reads the receiver data register in 9bit or 10bit mode.
973  *
974  * @note This function only support 9bit or 10bit transfer.
975  *
976  * @param base LPUART peripheral base address.
977  * @param data Start address of the buffer to store the received data by 16bit, only 10bit is valid.
978  * @param length Size of the buffer.
979  * @retval kStatus_LPUART_RxHardwareOverrun Receiver overrun happened while receiving data.
980  * @retval kStatus_LPUART_NoiseError Noise error happened while receiving data.
981  * @retval kStatus_LPUART_FramingError Framing error happened while receiving data.
982  * @retval kStatus_LPUART_ParityError Parity error happened while receiving data.
983  * @retval kStatus_LPUART_Timeout Transmission timed out and was aborted.
984  * @retval kStatus_Success Successfully received all data.
985  */
986 status_t LPUART_ReadBlocking16bit(LPUART_Type *base, uint16_t *data, size_t length);
987 
988 /*! @} */
989 
990 /*!
991  * @name Transactional
992  * @{
993  */
994 
995 /*!
996  * @brief Initializes the LPUART handle.
997  *
998  * This function initializes the LPUART handle, which can be used for other LPUART
999  * transactional APIs. Usually, for a specified LPUART instance,
1000  * call this API once to get the initialized handle.
1001  *
1002  * The LPUART driver supports the "background" receiving, which means that user can set up
1003  * an RX ring buffer optionally. Data received is stored into the ring buffer even when the
1004  * user doesn't call the LPUART_TransferReceiveNonBlocking() API. If there is already data received
1005  * in the ring buffer, the user can get the received data from the ring buffer directly.
1006  * The ring buffer is disabled if passing NULL as @p ringBuffer.
1007  *
1008  * @param base LPUART peripheral base address.
1009  * @param handle LPUART handle pointer.
1010  * @param callback Callback function.
1011  * @param userData User data.
1012  */
1013 void LPUART_TransferCreateHandle(LPUART_Type *base,
1014                                  lpuart_handle_t *handle,
1015                                  lpuart_transfer_callback_t callback,
1016                                  void *userData);
1017 /*!
1018  * @brief Transmits a buffer of data using the interrupt method.
1019  *
1020  * This function send data using an interrupt method. This is a non-blocking function, which
1021  * returns directly without waiting for all data written to the transmitter register. When
1022  * all data is written to the TX register in the ISR, the LPUART driver calls the callback
1023  * function and passes the @ref kStatus_LPUART_TxIdle as status parameter.
1024  *
1025  * @note The kStatus_LPUART_TxIdle is passed to the upper layer when all data are written
1026  * to the TX register. However, there is no check to ensure that all the data sent out. Before disabling the TX,
1027  * check the kLPUART_TransmissionCompleteFlag to ensure that the transmit is finished.
1028  *
1029  * @param base LPUART peripheral base address.
1030  * @param handle LPUART handle pointer.
1031  * @param xfer LPUART transfer structure, see #lpuart_transfer_t.
1032  * @retval kStatus_Success Successfully start the data transmission.
1033  * @retval kStatus_LPUART_TxBusy Previous transmission still not finished, data not all written to the TX register.
1034  * @retval kStatus_InvalidArgument Invalid argument.
1035  */
1036 status_t LPUART_TransferSendNonBlocking(LPUART_Type *base, lpuart_handle_t *handle, lpuart_transfer_t *xfer);
1037 
1038 /*!
1039  * @brief Sets up the RX ring buffer.
1040  *
1041  * This function sets up the RX ring buffer to a specific UART handle.
1042  *
1043  * When the RX ring buffer is used, data received is stored into the ring buffer even when
1044  * the user doesn't call the UART_TransferReceiveNonBlocking() API. If there is already data received
1045  * in the ring buffer, the user can get the received data from the ring buffer directly.
1046  *
1047  * @note When using RX ring buffer, one byte is reserved for internal use. In other
1048  * words, if @p ringBufferSize is 32, then only 31 bytes are used for saving data.
1049  *
1050  * @param base LPUART peripheral base address.
1051  * @param handle LPUART handle pointer.
1052  * @param ringBuffer Start address of ring buffer for background receiving. Pass NULL to disable the ring buffer.
1053  * @param ringBufferSize size of the ring buffer.
1054  */
1055 void LPUART_TransferStartRingBuffer(LPUART_Type *base,
1056                                     lpuart_handle_t *handle,
1057                                     uint8_t *ringBuffer,
1058                                     size_t ringBufferSize);
1059 
1060 /*!
1061  * @brief Aborts the background transfer and uninstalls the ring buffer.
1062  *
1063  * This function aborts the background transfer and uninstalls the ring buffer.
1064  *
1065  * @param base LPUART peripheral base address.
1066  * @param handle LPUART handle pointer.
1067  */
1068 void LPUART_TransferStopRingBuffer(LPUART_Type *base, lpuart_handle_t *handle);
1069 
1070 /*!
1071  * @brief Get the length of received data in RX ring buffer.
1072  *
1073  * @param base LPUART peripheral base address.
1074  * @param handle LPUART handle pointer.
1075  * @return Length of received data in RX ring buffer.
1076  */
1077 size_t LPUART_TransferGetRxRingBufferLength(LPUART_Type *base, lpuart_handle_t *handle);
1078 
1079 /*!
1080  * @brief Aborts the interrupt-driven data transmit.
1081  *
1082  * This function aborts the interrupt driven data sending. The user can get the remainBtyes to find out
1083  * how many bytes are not sent out.
1084  *
1085  * @param base LPUART peripheral base address.
1086  * @param handle LPUART handle pointer.
1087  */
1088 void LPUART_TransferAbortSend(LPUART_Type *base, lpuart_handle_t *handle);
1089 
1090 /*!
1091  * @brief Gets the number of bytes that have been sent out to bus.
1092  *
1093  * This function gets the number of bytes that have been sent out to bus by an interrupt method.
1094  *
1095  * @param base LPUART peripheral base address.
1096  * @param handle LPUART handle pointer.
1097  * @param count Send bytes count.
1098  * @retval kStatus_NoTransferInProgress No send in progress.
1099  * @retval kStatus_InvalidArgument Parameter is invalid.
1100  * @retval kStatus_Success Get successfully through the parameter \p count;
1101  */
1102 status_t LPUART_TransferGetSendCount(LPUART_Type *base, lpuart_handle_t *handle, uint32_t *count);
1103 
1104 /*!
1105  * @brief Receives a buffer of data using the interrupt method.
1106  *
1107  * This function receives data using an interrupt method. This is a non-blocking function
1108  * which returns without waiting to ensure that all data are received.
1109  * If the RX ring buffer is used and not empty, the data in the ring buffer is copied and
1110  * the parameter @p receivedBytes shows how many bytes are copied from the ring buffer.
1111  * After copying, if the data in the ring buffer is not enough for read, the receive
1112  * request is saved by the LPUART driver. When the new data arrives, the receive request
1113  * is serviced first. When all data is received, the LPUART driver notifies the upper layer
1114  * through a callback function and passes a status parameter kStatus_UART_RxIdle.
1115  * For example, the upper layer needs 10 bytes but there are only 5 bytes in ring buffer.
1116  * The 5 bytes are copied to xfer->data, which returns with the
1117  * parameter @p receivedBytes set to 5. For the remaining 5 bytes, the newly arrived data is
1118  * saved from xfer->data[5]. When 5 bytes are received, the LPUART driver notifies the upper layer.
1119  * If the RX ring buffer is not enabled, this function enables the RX and RX interrupt
1120  * to receive data to xfer->data. When all data is received, the upper layer is notified.
1121  *
1122  * @param base LPUART peripheral base address.
1123  * @param handle LPUART handle pointer.
1124  * @param xfer LPUART transfer structure, see uart_transfer_t.
1125  * @param receivedBytes Bytes received from the ring buffer directly.
1126  * @retval kStatus_Success Successfully queue the transfer into the transmit queue.
1127  * @retval kStatus_LPUART_RxBusy Previous receive request is not finished.
1128  * @retval kStatus_InvalidArgument Invalid argument.
1129  */
1130 status_t LPUART_TransferReceiveNonBlocking(LPUART_Type *base,
1131                                            lpuart_handle_t *handle,
1132                                            lpuart_transfer_t *xfer,
1133                                            size_t *receivedBytes);
1134 
1135 /*!
1136  * @brief Aborts the interrupt-driven data receiving.
1137  *
1138  * This function aborts the interrupt-driven data receiving. The user can get the remainBytes to find out
1139  * how many bytes not received yet.
1140  *
1141  * @param base LPUART peripheral base address.
1142  * @param handle LPUART handle pointer.
1143  */
1144 void LPUART_TransferAbortReceive(LPUART_Type *base, lpuart_handle_t *handle);
1145 
1146 /*!
1147  * @brief Gets the number of bytes that have been received.
1148  *
1149  * This function gets the number of bytes that have been received.
1150  *
1151  * @param base LPUART peripheral base address.
1152  * @param handle LPUART handle pointer.
1153  * @param count Receive bytes count.
1154  * @retval kStatus_NoTransferInProgress No receive in progress.
1155  * @retval kStatus_InvalidArgument Parameter is invalid.
1156  * @retval kStatus_Success Get successfully through the parameter \p count;
1157  */
1158 status_t LPUART_TransferGetReceiveCount(LPUART_Type *base, lpuart_handle_t *handle, uint32_t *count);
1159 
1160 /*!
1161  * @brief LPUART IRQ handle function.
1162  *
1163  * This function handles the LPUART transmit and receive IRQ request.
1164  *
1165  * @param instance LPUART instance.
1166  * @param irqHandle LPUART handle pointer.
1167  */
1168 void LPUART_TransferHandleIRQ(uint32_t instance, void *irqHandle);
1169 
1170 /*!
1171  * @brief LPUART Error IRQ handle function.
1172  *
1173  * This function handles the LPUART error IRQ request.
1174  *
1175  * @param base LPUART peripheral base address.
1176  * @param irqHandle LPUART handle pointer.
1177  */
1178 void LPUART_TransferHandleErrorIRQ(LPUART_Type *base, void *irqHandle);
1179 
1180 /*! @} */
1181 
1182 #if defined(__cplusplus)
1183 }
1184 #endif
1185 
1186 /*! @}*/
1187 
1188 #endif /* FSL_LPUART_H_ */
1189