1 /*
2 * Copyright 2017-2020 NXP
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #ifndef FSL_DAC_H__
8 #define FSL_DAC_H__
9
10 #include "fsl_common.h"
11
12 /*!
13 * @addtogroup lpc_dac
14 * @{
15 */
16
17 /*! @file */
18
19 /*******************************************************************************
20 * Definitions
21 ******************************************************************************/
22
23 /*! @name Driver version */
24 /*! @{ */
25 /*! @brief DAC driver version 2.0.2. */
26 #define LPC_DAC_DRIVER_VERSION (MAKE_VERSION(2, 0, 2))
27 /*! @} */
28
29 /*!
30 * @brief The DAC settling time.
31 */
32 typedef enum _dac_settling_time
33 {
34 kDAC_SettlingTimeIs1us = 0U, /*!< The settling time of the DAC is 1us max, and the maximum
35 current is 700 mA. This allows a maximum update rate of 1 MHz. */
36 kDAC_SettlingTimeIs25us = 1U, /*!< The settling time of the DAC is 2.5us and the maximum current
37 is 350uA. This allows a maximum update rate of 400 kHz. */
38 } dac_settling_time_t;
39
40 /*!
41 * @brief The configuration of DAC.
42 */
43 typedef struct _dac_config
44 {
45 dac_settling_time_t settlingTime; /*!< The settling times are valid for a capacitance load on the DAC_OUT pin not
46 exceeding 100 pF. A load impedance value greater than that value will cause
47 settling time longer than the specified time. One or more graphs of load
48 impedance vs. settling time will be included in the final data sheet. */
49 } dac_config_t;
50
51 #if defined(__cplusplus)
52 extern "C" {
53 #endif
54
55 /*******************************************************************************
56 * API
57 ******************************************************************************/
58 /*!
59 * @brief Initialize the DAC module.
60 *
61 * @param base DAC peripheral base address.
62 * @param config The pointer to configuration structure. Please refer to "dac_config_t" structure.
63 */
64 void DAC_Init(DAC_Type *base, const dac_config_t *config);
65
66 /*!
67 * @brief De-Initialize the DAC module.
68 *
69 * @param base DAC peripheral base address.
70 */
71 void DAC_Deinit(DAC_Type *base);
72
73 /*!
74 * @brief Initializes the DAC user configuration structure.
75 *
76 * This function initializes the user configuration structure to a default value. The default values are as follows.
77 * @code
78 * config->settlingTime = kDAC_SettlingTimeIs1us;
79 * @endcode
80 * @param config Pointer to the configuration structure. See "dac_config_t".
81 */
82 void DAC_GetDefaultConfig(dac_config_t *config);
83
84 /*!
85 * @brief Enable/Diable double-buffering feature. Notice: Disabling the double-buffering feature will disable counter
86 * opreation.
87 * If double-buffering feature is disabled, any writes to the CR address will go directly to the CR register.
88 * If double-buffering feature is enabled, any write to the CR register will only load the pre-buffer,
89 * which shares its register address with the CR register. The CR itself will be loaded from the pre-buffer
90 * whenever the counter reaches zero and the DMA request is set.
91 *
92 * @param base DAC peripheral base address.
93 * @param enable Enable or disable the feature.
94 */
95 void DAC_EnableDoubleBuffering(DAC_Type *base, bool enable);
96
97 /*!
98 * @brief Write DAC output value into CR register or pre-buffer. The DAC output voltage is VALUE*((VREFP)/1024).
99 *
100 * @param base DAC peripheral base address.
101 * @param value Setting the value for items in the buffer. 10-bits are available.
102 */
103 void DAC_SetBufferValue(DAC_Type *base, uint32_t value);
104
105 /*!
106 * @brief Write DAC counter value into CNTVAL register.
107 * When the counter is enabled bit, the 16-bit counter will begin counting down, at the rate selected by PCLK,
108 * from the value programmed into the DACCNTVAL register. The counter is decremented Each time the counter
109 * reaches zero, the counter will be reloaded by the value of DACCNTVAL and the DMA request bit INT_DMA_REQ will be set
110 * in hardware.
111 *
112 * @param base DAC peripheral basic address.
113 * @param value Setting the value for items in the counter. 16-bits are available.
114 */
115 void DAC_SetCounterValue(DAC_Type *base, uint32_t value);
116
117 #if defined(FSL_FEATURE_DAC_HAS_CTRL_DMA_ENA) && FSL_FEATURE_DAC_HAS_CTRL_DMA_ENA
118 /*!
119 * @brief Enable/Disable the DMA access.
120 *
121 * @param base DAC peripheral base address.
122 * @param enable Enable or disable the feature.
123 */
DAC_EnableDMA(DAC_Type * base,bool enable)124 static inline void DAC_EnableDMA(DAC_Type *base, bool enable)
125 {
126 if (enable)
127 {
128 base->CTRL |= DAC_CTRL_DMA_ENA_MASK;
129 }
130 else
131 {
132 base->CTRL &= ~DAC_CTRL_DMA_ENA_MASK;
133 }
134 }
135 #endif /* FSL_FEATURE_DAC_HAS_CTRL_DMA_ENA */
136
137 /*!
138 * @brief Enable/Disable the counter operation.
139 *
140 * @param base DAC peripheral base address.
141 * @param enable Enable or disable the feature.
142 */
DAC_EnableCounter(DAC_Type * base,bool enable)143 static inline void DAC_EnableCounter(DAC_Type *base, bool enable)
144 {
145 if (enable)
146 {
147 base->CTRL |= DAC_CTRL_CNT_ENA_MASK;
148 }
149 else
150 {
151 base->CTRL &= ~DAC_CTRL_CNT_ENA_MASK;
152 }
153 }
154
155 /*!
156 * @brief Get the status flag of DMA or interrupt request.
157 *
158 * @param base DAC peripheral base address.
159 * @return If return 'true', it means DMA request or interrupt occurs.
160 * If return 'false', it means DMA request or interrupt doesn't occur.
161 */
DAC_GetDMAInterruptRequestFlag(DAC_Type * base)162 static inline bool DAC_GetDMAInterruptRequestFlag(DAC_Type *base)
163 {
164 #if defined(FSL_FEATURE_DAC_HAS_CTRL_DMA_ENA) && FSL_FEATURE_DAC_HAS_CTRL_DMA_ENA
165 if (0U != (DAC_CTRL_INT_DMA_REQ_MASK & base->CTRL))
166 #else
167 if (0U != (DAC_CTRL_INT_CPU_REQ_MASK & base->CTRL))
168 #endif /* FSL_FEATURE_DAC_HAS_CTRL_DMA_ENA */
169 {
170 return true;
171 }
172 else
173 {
174 return false;
175 }
176 }
177
178 #if defined(__cplusplus)
179 }
180 #endif
181
182 /*! @} */
183
184 #endif /* FSL_DAC_H__ */
185
