1 /*
2  * Copyright (c) 2016, Freescale Semiconductor, Inc.
3  * Copyright 2017-2021,2023 NXP
4  * All rights reserved.
5  *
6  * SPDX-License-Identifier: BSD-3-Clause
7  */
8 
9 #include "fsl_iee.h"
10 
11 /*******************************************************************************
12  * Definitions
13  ******************************************************************************/
14 
15 /* Component ID definition, used by tools. */
16 #ifndef FSL_COMPONENT_ID
17 #define FSL_COMPONENT_ID "platform.drivers.iee"
18 #endif
19 
20 /*******************************************************************************
21  * Prototypes
22  ******************************************************************************/
23 
24 /*******************************************************************************
25  * Code
26  ******************************************************************************/
27 /*!
28  * brief Resets IEE module to factory default values.
29  *
30  * This function performs hardware reset of IEE module. Attributes and keys of all regions are cleared.
31  *
32  * param base IEER peripheral address.
33  */
IEE_Init(IEE_Type * base)34 void IEE_Init(IEE_Type *base)
35 {
36 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
37     /* Enable IEE clock. */
38     CLOCK_EnableClock(kCLOCK_Iee);
39 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
40 
41 #if !(defined(FSL_FEATURE_IEE_ELE_PROVISIONED_KEY) && (FSL_FEATURE_IEE_ELE_PROVISIONED_KEY > 0u))
42     /* Reset IEE module and wait the reset operation done. */
43     base->GCFG |= IEE_GCFG_RST_MASK;
44 #endif /* !FSL_FEATURE_IEE_ELE_PROVISIONED_KEY */
45 }
46 
47 /*!
48  * brief Loads default values to the IEE configuration structure.
49  *
50  * Loads default values to the IEE region configuration structure. The default values are as follows.
51  * code
52  *   config->bypass = kIEE_AesUseMdField;
53  *   config->mode = kIEE_ModeNone;
54  *   config->keySize = kIEE_AesCTR128XTS256;
55  *   config->pageOffset = 0U;
56  * endcode
57  *
58  * param config Configuration for the selected IEE region.
59  */
IEE_GetDefaultConfig(iee_config_t * config)60 void IEE_GetDefaultConfig(iee_config_t *config)
61 {
62     /* Initializes the configure structure to zero. */
63     (void)memset(config, 0, sizeof(*config));
64 
65     config->bypass     = kIEE_AesUseMdField;
66     config->mode       = kIEE_ModeNone;
67     config->keySize    = kIEE_AesCTR128XTS256;
68     config->pageOffset = 0U;
69 }
70 
71 /*!
72  * brief Sets the IEE module according to the configuration structure.
73  *
74  * This function configures IEE region according to configuration structure.
75  *
76  * Note: if key is provisioned by ELE, the attributes are set by ELE
77  *
78  * param base IEE peripheral address.
79  * param region Selection of the IEE region to be configured.
80  * param config Configuration for the selected IEE region.
81  */
IEE_SetRegionConfig(IEE_Type * base,iee_region_t region,iee_config_t * config)82 void IEE_SetRegionConfig(IEE_Type *base, iee_region_t region, iee_config_t *config)
83 {
84 #if !(defined(FSL_FEATURE_IEE_ELE_PROVISIONED_KEY) && (FSL_FEATURE_IEE_ELE_PROVISIONED_KEY > 0u))
85     base->REGX[region].REGATTR =
86         IEE_REGATTR_BYP(config->bypass) | IEE_REGATTR_MD(config->mode) | IEE_REGATTR_KS(config->keySize);
87 #if (defined(FSL_IEE_USE_PAGE_OFFSET) && (FSL_IEE_USE_PAGE_OFFSET > 0U))
88     base->REGX[region].REGPO = IEE_REGPO_PGOFF(config->pageOffset);
89 #endif /* FSL_IEE_USE_PAGE_OFFSET */
90 #endif /* !FSL_FEATURE_IEE_ELE_PROVISIONED_KEY */
91 }
92 
93 /*!
94  * brief Sets the IEE module key.
95  *
96  * This function sets specified AES key for the given region.
97  *
98  * param base IEE peripheral address.
99  * param region Selection of the IEE region to be configured.
100  * param keyNum Selection of AES KEY1 or KEY2.
101  * param key AES key.
102  * param keySize Size of AES key.
103  */
IEE_SetRegionKey(IEE_Type * base,iee_region_t region,iee_aes_key_num_t keyNum,const uint8_t * key,size_t keySize)104 status_t IEE_SetRegionKey(
105     IEE_Type *base, iee_region_t region, iee_aes_key_num_t keyNum, const uint8_t *key, size_t keySize)
106 {
107 #if !(defined(FSL_FEATURE_IEE_ELE_PROVISIONED_KEY) && (FSL_FEATURE_IEE_ELE_PROVISIONED_KEY > 0u))
108     register const uint32_t *from32  = (const uint32_t *)(uintptr_t)key;
109     register volatile uint32_t *to32 = NULL;
110 
111     if (keyNum == kIEE_AesKey1)
112     {
113         to32 = &base->REGX[region].REGKEY1[0];
114     }
115 
116     else if (keyNum == kIEE_AesKey2)
117     {
118         to32 = &base->REGX[region].REGKEY2[0];
119     }
120     else
121     {
122         return kStatus_InvalidArgument;
123     }
124 
125     while (keySize >= sizeof(uint32_t))
126     {
127         *to32 = *from32;
128         keySize -= sizeof(uint32_t);
129         from32++;
130         to32++;
131     }
132 
133     return kStatus_Success;
134 #else
135     return kStatus_Fail;
136 #endif /* !defined(FSL_FEATURE_IEE_ELE_PROVISIONED_KEY) */
137 }
138 
139 /*!
140  * brief Lock the IEE region configuration.
141  *
142  * IEE region Key, Offset and Attribute registers are locked.
143  * Only system reset can clear the Lock bit.
144  *
145  * param base IEE peripheral address.
146  * param region Selection of the IEE region to be locked.
147  */
IEE_LockRegionConfig(IEE_Type * base,iee_region_t region)148 void IEE_LockRegionConfig(IEE_Type *base, iee_region_t region)
149 {
150     base->GCFG |= (uint32_t)(0x1UL << (uint32_t)region);
151 }
152