1 /*
2 * Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
3 * Copyright 2016-2017, 2020 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #ifndef FSL_CRC_H_
10 #define FSL_CRC_H_
11
12 #include "fsl_common.h"
13
14 /*!
15 * @addtogroup crc
16 * @{
17 */
18
19 /*******************************************************************************
20 * Definitions
21 ******************************************************************************/
22
23 /*! @name Driver version */
24 /*! @{ */
25 /*! @brief CRC driver version. Version 2.0.4.
26 *
27 * Current version: 2.0.4
28 *
29 * Change log:
30 *
31 * - Version 2.0.4
32 * - Release peripheral from reset if necessary in init function.
33 *
34 * - Version 2.0.3
35 * - Fix MISRA issues
36 *
37 * - Version 2.0.2
38 * - Fix MISRA issues
39 *
40 * - Version 2.0.1
41 * - move DATA and DATALL macro definition from header file to source file
42 */
43 #define FSL_CRC_DRIVER_VERSION (MAKE_VERSION(2, 0, 4))
44 /*! @} */
45
46 #ifndef CRC_DRIVER_CUSTOM_DEFAULTS
47 /*! @brief Default configuration structure filled by CRC_GetDefaultConfig(). Use CRC16-CCIT-FALSE as defeault. */
48 #define CRC_DRIVER_USE_CRC16_CCIT_FALSE_AS_DEFAULT 1
49 #endif
50
51 /*! @brief CRC bit width */
52 typedef enum _crc_bits
53 {
54 kCrcBits16 = 0U, /*!< Generate 16-bit CRC code */
55 kCrcBits32 = 1U /*!< Generate 32-bit CRC code */
56 } crc_bits_t;
57
58 /*! @brief CRC result type */
59 typedef enum _crc_result
60 {
61 kCrcFinalChecksum = 0U, /*!< CRC data register read value is the final checksum.
62 Reflect out and final xor protocol features are applied. */
63 kCrcIntermediateChecksum = 1U /*!< CRC data register read value is intermediate checksum (raw value).
64 Reflect out and final xor protocol feature are not applied.
65 Intermediate checksum can be used as a seed for CRC_Init()
66 to continue adding data to this checksum. */
67 } crc_result_t;
68
69 /*!
70 * @brief CRC protocol configuration.
71 *
72 * This structure holds the configuration for the CRC protocol.
73 *
74 */
75 typedef struct _crc_config
76 {
77 uint32_t polynomial; /*!< CRC Polynomial, MSBit first.
78 Example polynomial: 0x1021 = 1_0000_0010_0001 = x^12+x^5+1 */
79 uint32_t seed; /*!< Starting checksum value */
80 bool reflectIn; /*!< Reflect bits on input. */
81 bool reflectOut; /*!< Reflect bits on output. */
82 bool complementChecksum; /*!< True if the result shall be complement of the actual checksum. */
83 crc_bits_t crcBits; /*!< Selects 16- or 32- bit CRC protocol. */
84 crc_result_t crcResult; /*!< Selects final or intermediate checksum return from CRC_Get16bitResult() or
85 CRC_Get32bitResult() */
86 } crc_config_t;
87
88 /*******************************************************************************
89 * API
90 ******************************************************************************/
91 #if defined(__cplusplus)
92 extern "C" {
93 #endif
94
95 /*!
96 * @brief Enables and configures the CRC peripheral module.
97 *
98 * This function enables the clock gate in the SIM module for the CRC peripheral.
99 * It also configures the CRC module and starts a checksum computation by writing the seed.
100 *
101 * @param base CRC peripheral address.
102 * @param config CRC module configuration structure.
103 */
104 void CRC_Init(CRC_Type *base, const crc_config_t *config);
105
106 /*!
107 * @brief Disables the CRC peripheral module.
108 *
109 * This function disables the clock gate in the SIM module for the CRC peripheral.
110 *
111 * @param base CRC peripheral address.
112 */
CRC_Deinit(CRC_Type * base)113 static inline void CRC_Deinit(CRC_Type *base)
114 {
115 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
116 /* gate clock */
117 CLOCK_DisableClock(kCLOCK_Crc0);
118 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
119 }
120
121 /*!
122 * @brief Loads default values to the CRC protocol configuration structure.
123 *
124 * Loads default values to the CRC protocol configuration structure. The default values are as follows.
125 * @code
126 * config->polynomial = 0x1021;
127 * config->seed = 0xFFFF;
128 * config->reflectIn = false;
129 * config->reflectOut = false;
130 * config->complementChecksum = false;
131 * config->crcBits = kCrcBits16;
132 * config->crcResult = kCrcFinalChecksum;
133 * @endcode
134 *
135 * @param config CRC protocol configuration structure.
136 */
137 void CRC_GetDefaultConfig(crc_config_t *config);
138
139 /*!
140 * @brief Writes data to the CRC module.
141 *
142 * Writes input data buffer bytes to the CRC data register.
143 * The configured type of transpose is applied.
144 *
145 * @param base CRC peripheral address.
146 * @param data Input data stream, MSByte in data[0].
147 * @param dataSize Size in bytes of the input data buffer.
148 */
149 void CRC_WriteData(CRC_Type *base, const uint8_t *data, size_t dataSize);
150
151 /*!
152 * @brief Reads the 32-bit checksum from the CRC module.
153 *
154 * Reads the CRC data register (either an intermediate or the final checksum).
155 * The configured type of transpose and complement is applied.
156 *
157 * @param base CRC peripheral address.
158 * @return An intermediate or the final 32-bit checksum, after configured transpose and complement operations.
159 */
160 uint32_t CRC_Get32bitResult(CRC_Type *base);
161
162 /*!
163 * @brief Reads a 16-bit checksum from the CRC module.
164 *
165 * Reads the CRC data register (either an intermediate or the final checksum).
166 * The configured type of transpose and complement is applied.
167 *
168 * @param base CRC peripheral address.
169 * @return An intermediate or the final 16-bit checksum, after configured transpose and complement operations.
170 */
171 uint16_t CRC_Get16bitResult(CRC_Type *base);
172
173 #if defined(__cplusplus)
174 }
175 #endif
176
177 /*!
178 *@}
179 */
180
181 #endif /* FSL_CRC_H_ */
182
