1 /* 2 ** ################################################################### 3 ** Processors: MKE04Z8VFK4 4 ** MKE04Z8VTG4 5 ** MKE04Z8VWJ4 6 ** 7 ** Compilers: Freescale C/C++ for Embedded ARM 8 ** GNU C Compiler 9 ** IAR ANSI C/C++ Compiler for ARM 10 ** Keil ARM C/C++ Compiler 11 ** MCUXpresso Compiler 12 ** 13 ** Reference manual: MKE04P24M48SF0RM Rev 4 14 ** Version: rev. 1.0, 2017-05-19 15 ** Build: b201123 16 ** 17 ** Abstract: 18 ** Provides a system configuration function and a global variable that 19 ** contains the system frequency. It configures the device and initializes 20 ** the oscillator (PLL) that is part of the microcontroller device. 21 ** 22 ** Copyright 2016 Freescale Semiconductor, Inc. 23 ** Copyright 2016-2020 NXP 24 ** All rights reserved. 25 ** 26 ** SPDX-License-Identifier: BSD-3-Clause 27 ** 28 ** http: www.nxp.com 29 ** mail: support@nxp.com 30 ** 31 ** Revisions: 32 ** - rev. 1.0 (2017-05-19) 33 ** Initial version. 34 ** 35 ** ################################################################### 36 */ 37 38 /*! 39 * @file MKE04Z4 40 * @version 1.0 41 * @date 2017-05-19 42 * @brief Device specific configuration file for MKE04Z4 (implementation file) 43 * 44 * Provides a system configuration function and a global variable that contains 45 * the system frequency. It configures the device and initializes the oscillator 46 * (PLL) that is part of the microcontroller device. 47 */ 48 49 #include <stdint.h> 50 #include "fsl_device_registers.h" 51 52 53 54 /* ---------------------------------------------------------------------------- 55 -- Core clock 56 ---------------------------------------------------------------------------- */ 57 58 uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK; 59 60 /* ---------------------------------------------------------------------------- 61 -- SystemInit() 62 ---------------------------------------------------------------------------- */ 63 SystemInit(void)64void SystemInit (void) { 65 66 #if (DISABLE_WDOG) 67 WDOG->CNT = WDOG_UPDATE_KEY1; 68 WDOG->CNT = WDOG_UPDATE_KEY2; 69 WDOG->TOVAL = 0xFFFFU; 70 WDOG->CS1 = (uint8_t) ((WDOG->CS1) & ~WDOG_CS1_EN_MASK) | WDOG_CS1_UPDATE_MASK; 71 WDOG->CS2 |= 0U; 72 #endif /* (DISABLE_WDOG) */ 73 74 SystemInitHook(); 75 } 76 77 /* ---------------------------------------------------------------------------- 78 -- SystemCoreClockUpdate() 79 ---------------------------------------------------------------------------- */ 80 SystemCoreClockUpdate(void)81void SystemCoreClockUpdate (void) { 82 83 uint32_t ICSOUTClock; /* Variable to store output clock frequency of the ICS module */ 84 uint16_t Divider; 85 uint16_t Temp; 86 87 Divider = (uint16_t)(0x01U) << (((uint16_t)ICS->C2 & ICS_C2_BDIV_MASK) >> ICS_C2_BDIV_SHIFT); 88 89 switch ((ICS->C1 & ICS_C1_CLKS_MASK) >> ICS_C1_CLKS_SHIFT) { 90 case 0x0: 91 /* FLL */ 92 if((ICS->C1 & ICS_C1_IREFS_MASK) != 0x0U) 93 { 94 ICSOUTClock = CPU_INT_IRC_CLK_HZ * 1280UL; 95 } 96 else 97 { 98 /* Reference Divider */ 99 Temp = ((uint16_t)ICS->C1 & ICS_C1_RDIV_MASK) >> ICS_C1_RDIV_SHIFT; 100 Temp = (Temp + 1U) * (((OSC->CR & OSC_CR_RANGE_MASK) != 0x0U) ? 32U : 1U); 101 102 ICSOUTClock = CPU_XTAL_CLK_HZ / Temp * 1280UL; 103 } 104 break; 105 106 case 0x1: 107 /* Internal IRC */ 108 ICSOUTClock = CPU_INT_IRC_CLK_HZ; 109 break; 110 111 case 0x2: 112 /* External OSC */ 113 ICSOUTClock = CPU_XTAL_CLK_HZ; 114 break; 115 116 default: 117 ICSOUTClock = 0U; 118 break; 119 } 120 SystemCoreClock = (ICSOUTClock / Divider); 121 122 } 123 124 /* ---------------------------------------------------------------------------- 125 -- SystemInitHook() 126 ---------------------------------------------------------------------------- */ 127 SystemInitHook(void)128__attribute__ ((weak)) void SystemInitHook (void) { 129 /* Void implementation of the weak function. */ 130 } 131