1/*
2** ###################################################################
3**     Processor:           MIMXRT1173CVM8A_cm7
4**     Compiler:            GNU C Compiler
5**     Reference manual:    IMXRT1170RM, Rev 1, 02/2021
6**     Version:             rev. 1.1, 2022-04-02
7**     Build:               b221022
8**
9**     Abstract:
10**         Linker file for the GNU C Compiler
11**
12**     Copyright 2016 Freescale Semiconductor, Inc.
13**     Copyright 2016-2022 NXP
14**     All rights reserved.
15**
16**     SPDX-License-Identifier: BSD-3-Clause
17**
18**     http:                 www.nxp.com
19**     mail:                 support@nxp.com
20**
21** ###################################################################
22*/
23
24/* Entry Point */
25ENTRY(Reset_Handler)
26
27HEAP_SIZE  = DEFINED(__heap_size__)  ? __heap_size__  : 0x0400;
28STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
29RPMSG_SHMEM_SIZE = DEFINED(__use_shmem__) ? 0x2000 : 0;
30VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x00000400 : 0;
31TEXT_SIZE = DEFINED(__use_flash64MB__) ? 0x03FBDC00 : 0x00FBDC00;
32CORE1IMAGE_START = DEFINED(__use_flash64MB__) ? 0x33FC0000 : 0x30FC0000;
33
34/* Specify the memory areas */
35MEMORY
36{
37  m_flash_config        (RX)  : ORIGIN = 0x30000400, LENGTH = 0x00000C00
38  m_ivt                 (RX)  : ORIGIN = 0x30001000, LENGTH = 0x00001000
39  m_interrupts          (RX)  : ORIGIN = 0x30002000, LENGTH = 0x00000400
40  m_text                (RX)  : ORIGIN = 0x30002400, LENGTH = TEXT_SIZE
41  m_qacode              (RX)  : ORIGIN = 0x00000000, LENGTH = 0x00040000
42  m_data                (RW)  : ORIGIN = 0x20000000, LENGTH = 0x00040000
43  m_data2               (RW)  : ORIGIN = 0x202C0000 + RPMSG_SHMEM_SIZE, LENGTH = 0x00080000 - RPMSG_SHMEM_SIZE
44  rpmsg_sh_mem          (RW)  : ORIGIN = 0x202C0000, LENGTH = RPMSG_SHMEM_SIZE
45  m_core1_image         (RX)  : ORIGIN = CORE1IMAGE_START, LENGTH = 0x00040000
46}
47
48/* Define output sections */
49SECTIONS
50{
51  __NCACHE_REGION_START = ORIGIN(rpmsg_sh_mem);
52  __NCACHE_REGION_SIZE  = LENGTH(rpmsg_sh_mem);
53
54  .flash_config :
55  {
56    . = ALIGN(4);
57    __FLASH_BASE = .;
58    KEEP(* (.boot_hdr.conf))     /* flash config section */
59    . = ALIGN(4);
60  } > m_flash_config
61
62  ivt_begin = ORIGIN(m_flash_config) + LENGTH(m_flash_config);
63
64  .ivt : AT(ivt_begin)
65  {
66    . = ALIGN(4);
67    KEEP(* (.boot_hdr.ivt))           /* ivt section */
68    KEEP(* (.boot_hdr.boot_data))     /* boot section */
69    KEEP(* (.boot_hdr.dcd_data))      /* dcd section */
70    . = ALIGN(4);
71  } > m_ivt
72
73  /* section for storing the secondary core image */
74  .core1_code :
75  {
76     . = ALIGN(4) ;
77    KEEP (*(.core1_code))
78     *(.core1_code*)
79     . = ALIGN(4) ;
80  } > m_core1_image
81
82  /* NOINIT section for rpmsg_sh_mem */
83  .noinit_rpmsg_sh_mem (NOLOAD) : ALIGN(4)
84  {
85     __RPMSG_SH_MEM_START__ = .;
86     *(.noinit.$rpmsg_sh_mem*)
87     . = ALIGN(4) ;
88     __RPMSG_SH_MEM_END__ = .;
89  } > rpmsg_sh_mem
90
91  /* The startup code goes first into internal RAM */
92  .interrupts :
93  {
94    __VECTOR_TABLE = .;
95    __Vectors = .;
96    . = ALIGN(4);
97    KEEP(*(.isr_vector))     /* Startup code */
98    . = ALIGN(4);
99  } > m_interrupts
100
101  /* The program code and other data goes into internal RAM */
102  .text :
103  {
104    . = ALIGN(4);
105    *(.text)                 /* .text sections (code) */
106    *(.text*)                /* .text* sections (code) */
107    *(.rodata)               /* .rodata sections (constants, strings, etc.) */
108    *(.rodata*)              /* .rodata* sections (constants, strings, etc.) */
109    *(.glue_7)               /* glue arm to thumb code */
110    *(.glue_7t)              /* glue thumb to arm code */
111    *(.eh_frame)
112    KEEP (*(.init))
113    KEEP (*(.fini))
114    . = ALIGN(4);
115  } > m_text
116
117  .ARM.extab :
118  {
119    *(.ARM.extab* .gnu.linkonce.armextab.*)
120  } > m_text
121
122  .ARM :
123  {
124    __exidx_start = .;
125    *(.ARM.exidx*)
126    __exidx_end = .;
127  } > m_text
128
129 .ctors :
130  {
131    __CTOR_LIST__ = .;
132    /* gcc uses crtbegin.o to find the start of
133       the constructors, so we make sure it is
134       first.  Because this is a wildcard, it
135       doesn't matter if the user does not
136       actually link against crtbegin.o; the
137       linker won't look for a file to match a
138       wildcard.  The wildcard also means that it
139       doesn't matter which directory crtbegin.o
140       is in.  */
141    KEEP (*crtbegin.o(.ctors))
142    KEEP (*crtbegin?.o(.ctors))
143    /* We don't want to include the .ctor section from
144       from the crtend.o file until after the sorted ctors.
145       The .ctor section from the crtend file contains the
146       end of ctors marker and it must be last */
147    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
148    KEEP (*(SORT(.ctors.*)))
149    KEEP (*(.ctors))
150    __CTOR_END__ = .;
151  } > m_text
152
153  .dtors :
154  {
155    __DTOR_LIST__ = .;
156    KEEP (*crtbegin.o(.dtors))
157    KEEP (*crtbegin?.o(.dtors))
158    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
159    KEEP (*(SORT(.dtors.*)))
160    KEEP (*(.dtors))
161    __DTOR_END__ = .;
162  } > m_text
163
164  .preinit_array :
165  {
166    PROVIDE_HIDDEN (__preinit_array_start = .);
167    KEEP (*(.preinit_array*))
168    PROVIDE_HIDDEN (__preinit_array_end = .);
169  } > m_text
170
171  .init_array :
172  {
173    PROVIDE_HIDDEN (__init_array_start = .);
174    KEEP (*(SORT(.init_array.*)))
175    KEEP (*(.init_array*))
176    PROVIDE_HIDDEN (__init_array_end = .);
177  } > m_text
178
179  .fini_array :
180  {
181    PROVIDE_HIDDEN (__fini_array_start = .);
182    KEEP (*(SORT(.fini_array.*)))
183    KEEP (*(.fini_array*))
184    PROVIDE_HIDDEN (__fini_array_end = .);
185  } > m_text
186
187  __etext = .;    /* define a global symbol at end of code */
188  __DATA_ROM = .; /* Symbol is used by startup for data initialization */
189
190  .interrupts_ram :
191  {
192    . = ALIGN(4);
193    __VECTOR_RAM__ = .;
194    __interrupts_ram_start__ = .; /* Create a global symbol at data start */
195    *(.m_interrupts_ram)     /* This is a user defined section */
196    . += VECTOR_RAM_SIZE;
197    . = ALIGN(4);
198    __interrupts_ram_end__ = .; /* Define a global symbol at data end */
199  } > m_data
200
201  __VECTOR_RAM = DEFINED(__ram_vector_table__) ? __VECTOR_RAM__ : ORIGIN(m_interrupts);
202  __RAM_VECTOR_TABLE_SIZE_BYTES = DEFINED(__ram_vector_table__) ? (__interrupts_ram_end__ - __interrupts_ram_start__) : 0x0;
203
204  .data : AT(__DATA_ROM)
205  {
206    . = ALIGN(4);
207    __DATA_RAM = .;
208    __data_start__ = .;      /* create a global symbol at data start */
209    *(m_usb_dma_init_data)
210    *(.data)                 /* .data sections */
211    *(.data*)                /* .data* sections */
212    *(DataQuickAccess)       /* quick access data section */
213    KEEP(*(.jcr*))
214    . = ALIGN(4);
215    __data_end__ = .;        /* define a global symbol at data end */
216  } > m_data
217
218  __ram_function_flash_start = __DATA_ROM + (__data_end__ - __data_start__); /* Symbol is used by startup for TCM data initialization */
219
220  .ram_function : AT(__ram_function_flash_start)
221  {
222    . = ALIGN(32);
223    __ram_function_start__ = .;
224    *(CodeQuickAccess)
225    . = ALIGN(128);
226    __ram_function_end__ = .;
227  } > m_qacode
228
229  __NDATA_ROM = __ram_function_flash_start + (__ram_function_end__ - __ram_function_start__);
230  .ncache.init : AT(__NDATA_ROM)
231  {
232    __noncachedata_start__ = .;   /* create a global symbol at ncache data start */
233    *(NonCacheable.init)
234    . = ALIGN(4);
235    __noncachedata_init_end__ = .;   /* create a global symbol at initialized ncache data end */
236  } > m_data
237  . = __noncachedata_init_end__;
238  .ncache :
239  {
240    *(NonCacheable)
241    . = ALIGN(4);
242    __noncachedata_end__ = .;     /* define a global symbol at ncache data end */
243  } > m_data
244
245  __DATA_END = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__);
246  text_end = ORIGIN(m_text) + LENGTH(m_text);
247  ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
248
249  /* Uninitialized data section */
250  .bss :
251  {
252    /* This is used by the startup in order to initialize the .bss section */
253    . = ALIGN(4);
254    __START_BSS = .;
255    __bss_start__ = .;
256    *(m_usb_dma_noninit_data)
257    *(.bss)
258    *(.bss*)
259    *(COMMON)
260    . = ALIGN(4);
261    __bss_end__ = .;
262    __END_BSS = .;
263  } > m_data
264
265  .heap :
266  {
267    . = ALIGN(8);
268    __end__ = .;
269    PROVIDE(end = .);
270    __HeapBase = .;
271    . += HEAP_SIZE;
272    __HeapLimit = .;
273    __heap_limit = .; /* Add for _sbrk */
274  } > m_data
275
276  .stack :
277  {
278    . = ALIGN(8);
279    . += STACK_SIZE;
280  } > m_data
281
282  /* Initializes stack on the end of block */
283  __StackTop   = ORIGIN(m_data) + LENGTH(m_data);
284  __StackLimit = __StackTop - STACK_SIZE;
285  PROVIDE(__stack = __StackTop);
286
287  .ARM.attributes 0 : { *(.ARM.attributes) }
288
289  ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap")
290}
291