1 /*
2 * Copyright 2018 - 2019, 2023 NXP
3 * All rights reserved.
4 *
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8 #include "fsl_device_registers.h"
9 #include "fsl_gpio.h"
10 #if !(defined(FSL_FEATURE_PORT_HAS_NO_INTERRUPT) && FSL_FEATURE_PORT_HAS_NO_INTERRUPT) && \
11 defined(FSL_FEATURE_SOC_PORT_COUNT)
12 #include "fsl_port.h"
13 #endif
14 #include "fsl_adapter_gpio.h"
15
16 /* Component ID definition, used by tools. */
17 #ifndef FSL_COMPONENT_ID
18 #define FSL_COMPONENT_ID "component.gpio_adapter"
19 #endif
20
21 /*******************************************************************************
22 * Definitions
23 ******************************************************************************/
24
25 #if defined(__GNUC__)
26 #define HAL_GPIO_CLZ(x) __builtin_clz(x)
27 #elif defined(__ICCARM__)
28 #define HAL_GPIO_CLZ(x) __CLZ(x)
29 #elif defined(__CC_ARM) || defined(__ARMCC_VERSION)
30 #define HAL_GPIO_CLZ(x) __builtin_clz(x)
31 #else
32 #error The tool-chain is not supported.
33 #endif
34 #define HAL_GPIO_BSR(x) (31U - (uint8_t)HAL_GPIO_CLZ(x))
35
36 /*! @brief The pin config struct of gpio adapter. */
37
38 typedef struct _hal_gpio_pin
39 {
40 uint16_t port : 3U;
41 uint16_t reserved : 1U;
42 uint16_t pin : 5U;
43 uint16_t direction : 1U;
44 uint16_t trigger : 3U;
45 uint16_t reserved2 : 3U;
46 } hal_gpio_pin_t;
47
48 typedef struct _hal_gpio_state
49 {
50 struct _hal_gpio_state *next;
51 hal_gpio_callback_t callback;
52 void *callbackParam;
53 hal_gpio_direction_t direction;
54 uint8_t level;
55 uint8_t port;
56 uint8_t pin : 5U;
57 uint8_t trigger : 3U;
58 } hal_gpio_state_t;
59
60 /*******************************************************************************
61 * Prototypes
62 ******************************************************************************/
63
64 /*******************************************************************************
65 * Variables
66 ******************************************************************************/
67
68 static GPIO_Type *const s_GpioPort[] = GPIO_BASE_PTRS;
69 static hal_gpio_state_t *s_GpioHead;
70
71 /*******************************************************************************
72 * Code
73 ******************************************************************************/
74
HAL_GpioInterruptHandle(uint8_t port)75 static void HAL_GpioInterruptHandle(uint8_t port)
76 {
77 hal_gpio_state_t *head = s_GpioHead;
78 uint32_t pinInterruptSetFlag;
79 uint8_t pin;
80
81 while (NULL != head)
82 {
83 if (head->port == port)
84 {
85 break;
86 }
87 head = head->next;
88 }
89
90 if (NULL == head)
91 {
92 return;
93 }
94
95 head = s_GpioHead;
96
97 #if !(defined(FSL_FEATURE_PORT_HAS_NO_INTERRUPT) && FSL_FEATURE_PORT_HAS_NO_INTERRUPT) && \
98 defined(FSL_FEATURE_SOC_PORT_COUNT)
99 pinInterruptSetFlag = GPIO_PortGetInterruptFlags(s_GpioPort[port]);
100 /* Clear external interrupt flag. */
101 GPIO_PortClearInterruptFlags(s_GpioPort[port], pinInterruptSetFlag);
102 #else
103 pinInterruptSetFlag = GPIO_GpioGetInterruptFlags(s_GpioPort[port]);
104 /* Clear external interrupt flag. */
105 GPIO_GpioClearInterruptFlags(s_GpioPort[port], pinInterruptSetFlag);
106 #endif
107 if (0U != pinInterruptSetFlag)
108 {
109 pin = HAL_GPIO_BSR(pinInterruptSetFlag);
110 while (NULL != head)
111 {
112 if ((pin == head->pin) && (port == head->port))
113 {
114 if (NULL != head->callback)
115 {
116 head->callback(head->callbackParam);
117 }
118 pinInterruptSetFlag &= ~(0x01UL << pin);
119 if (0U == pinInterruptSetFlag)
120 {
121 break;
122 }
123 pin = HAL_GPIO_BSR(pinInterruptSetFlag);
124 }
125 head = head->next;
126 }
127 }
128 }
129
130 #if (defined(HAL_GPIO_CONFLICT_CHECK_ENABLE) && (HAL_GPIO_CONFLICT_CHECK_ENABLE > 0U))
HAL_GpioConflictSearch(hal_gpio_state_t * head,uint8_t port,uint8_t pin)131 static hal_gpio_status_t HAL_GpioConflictSearch(hal_gpio_state_t *head, uint8_t port, uint8_t pin)
132 {
133 while (NULL != head)
134 {
135 if ((head->port == port) && (head->pin == pin))
136 {
137 return kStatus_HAL_GpioPinConflict;
138 }
139 head = head->next;
140 }
141 return kStatus_HAL_GpioSuccess;
142 }
143 #endif /* HAL_GPIO_CONFLICT_CHECK_ENABLE */
144
HAL_GpioAddItem(hal_gpio_state_t ** head,hal_gpio_state_t * node)145 static hal_gpio_status_t HAL_GpioAddItem(hal_gpio_state_t **head, hal_gpio_state_t *node)
146 {
147 hal_gpio_state_t *p = *head;
148 hal_gpio_state_t *q = *head;
149 uint32_t regPrimask;
150
151 regPrimask = DisableGlobalIRQ();
152
153 if (NULL == p)
154 {
155 *head = node;
156 }
157 else
158 {
159 while (NULL != p)
160 {
161 if (p == node)
162 {
163 EnableGlobalIRQ(regPrimask);
164 return kStatus_HAL_GpioPinConflict;
165 }
166 q = p;
167 p = p->next;
168 }
169
170 q->next = node;
171 }
172 node->next = NULL;
173 EnableGlobalIRQ(regPrimask);
174 return kStatus_HAL_GpioSuccess;
175 }
176
HAL_GpioRemoveItem(hal_gpio_state_t ** head,hal_gpio_state_t * node)177 static hal_gpio_status_t HAL_GpioRemoveItem(hal_gpio_state_t **head, hal_gpio_state_t *node)
178 {
179 hal_gpio_state_t *p = *head;
180 hal_gpio_state_t *q = NULL;
181 uint32_t regPrimask;
182
183 regPrimask = DisableGlobalIRQ();
184 while (p != NULL)
185 {
186 if (p == node)
187 {
188 if (NULL == q)
189 {
190 *head = p->next;
191 }
192 else
193 {
194 q->next = p->next;
195 }
196 break;
197 }
198 else
199 {
200 q = p;
201 p = p->next;
202 }
203 }
204 EnableGlobalIRQ(regPrimask);
205 return kStatus_HAL_GpioSuccess;
206 }
207
208 #if !(defined(FSL_FEATURE_PORT_HAS_NO_INTERRUPT) && FSL_FEATURE_PORT_HAS_NO_INTERRUPT) && \
209 (defined(FSL_FEATURE_SOC_PORT_COUNT))
210
211 #if (FSL_FEATURE_SOC_GPIO_COUNT > 0U)
212 void PORTA_IRQHandler(void);
PORTA_IRQHandler(void)213 void PORTA_IRQHandler(void)
214 {
215 HAL_GpioInterruptHandle(0);
216 SDK_ISR_EXIT_BARRIER;
217 }
218 #endif
219
220 #if (FSL_FEATURE_SOC_GPIO_COUNT > 1U)
221 void PORTB_IRQHandler(void);
PORTB_IRQHandler(void)222 void PORTB_IRQHandler(void)
223 {
224 HAL_GpioInterruptHandle(1);
225 SDK_ISR_EXIT_BARRIER;
226 }
227 #endif
228
229 #if (FSL_FEATURE_SOC_GPIO_COUNT > 2U)
230 void PORTC_IRQHandler(void);
PORTC_IRQHandler(void)231 void PORTC_IRQHandler(void)
232 {
233 HAL_GpioInterruptHandle(2);
234 SDK_ISR_EXIT_BARRIER;
235 }
236 #endif
237
238 #if (FSL_FEATURE_SOC_GPIO_COUNT > 2U)
239 void PORTB_PORTC_IRQHandler(void);
PORTB_PORTC_IRQHandler(void)240 void PORTB_PORTC_IRQHandler(void)
241 {
242 HAL_GpioInterruptHandle(1);
243 HAL_GpioInterruptHandle(2);
244 SDK_ISR_EXIT_BARRIER;
245 }
246 #endif
247
248 #if (FSL_FEATURE_SOC_GPIO_COUNT > 4U)
249 void PORTB_PORTC_PORTD_PORTE_IRQHandler(void);
PORTB_PORTC_PORTD_PORTE_IRQHandler(void)250 void PORTB_PORTC_PORTD_PORTE_IRQHandler(void)
251 {
252 HAL_GpioInterruptHandle(1);
253 HAL_GpioInterruptHandle(2);
254 HAL_GpioInterruptHandle(3);
255 HAL_GpioInterruptHandle(4);
256 SDK_ISR_EXIT_BARRIER;
257 }
258 #endif
259
260 #if (FSL_FEATURE_SOC_GPIO_COUNT > 3U)
261 void PORTC_PORTD_IRQHandler(void);
PORTC_PORTD_IRQHandler(void)262 void PORTC_PORTD_IRQHandler(void)
263 {
264 HAL_GpioInterruptHandle(2);
265 HAL_GpioInterruptHandle(3);
266 SDK_ISR_EXIT_BARRIER;
267 }
268 #endif
269
270 #if (FSL_FEATURE_SOC_GPIO_COUNT > 3U)
271 void PORTD_IRQHandler(void);
PORTD_IRQHandler(void)272 void PORTD_IRQHandler(void)
273 {
274 HAL_GpioInterruptHandle(3);
275 SDK_ISR_EXIT_BARRIER;
276 }
277 #endif
278
279 #if (FSL_FEATURE_SOC_GPIO_COUNT > 4U)
280 void PORTE_IRQHandler(void);
PORTE_IRQHandler(void)281 void PORTE_IRQHandler(void)
282 {
283 HAL_GpioInterruptHandle(4);
284 SDK_ISR_EXIT_BARRIER;
285 }
286 #endif
287
288 #if (FSL_FEATURE_SOC_GPIO_COUNT > 5U)
289 void PORTF_IRQHandler(void);
PORTF_IRQHandler(void)290 void PORTF_IRQHandler(void)
291 {
292 HAL_GpioInterruptHandle(5);
293 SDK_ISR_EXIT_BARRIER;
294 }
295 #endif
296
297 #else
298
299 #if (FSL_FEATURE_SOC_GPIO_COUNT > 0U)
300 void GPIOA_INT0_IRQHandler(void);
GPIOA_INT0_IRQHandler(void)301 void GPIOA_INT0_IRQHandler(void)
302 {
303 HAL_GpioInterruptHandle(0);
304 SDK_ISR_EXIT_BARRIER;
305 }
306
307 void GPIOA_INT1_IRQHandler(void);
GPIOA_INT1_IRQHandler(void)308 void GPIOA_INT1_IRQHandler(void)
309 {
310 GPIOA_INT0_IRQHandler();
311 }
312 #endif
313
314 #if (FSL_FEATURE_SOC_GPIO_COUNT > 1U)
315 void GPIOB_INT0_IRQHandler(void);
GPIOB_INT0_IRQHandler(void)316 void GPIOB_INT0_IRQHandler(void)
317 {
318 HAL_GpioInterruptHandle(1);
319 SDK_ISR_EXIT_BARRIER;
320 }
321 void GPIOB_INT1_IRQHandler(void);
GPIOB_INT1_IRQHandler(void)322 void GPIOB_INT1_IRQHandler(void)
323 {
324 GPIOB_INT0_IRQHandler();
325 }
326 #endif
327
328 #if (FSL_FEATURE_SOC_GPIO_COUNT > 2U)
329 void GPIOC_INT0_IRQHandler(void);
GPIOC_INT0_IRQHandler(void)330 void GPIOC_INT0_IRQHandler(void)
331 {
332 HAL_GpioInterruptHandle(2);
333 SDK_ISR_EXIT_BARRIER;
334 }
335 void GPIOC_INT1_IRQHandler(void);
GPIOC_INT1_IRQHandler(void)336 void GPIOC_INT1_IRQHandler(void)
337 {
338 GPIOC_INT0_IRQHandler();
339 }
340 #endif
341
342 #if (FSL_FEATURE_SOC_GPIO_COUNT > 3U)
343 void GPIOD_INT0_IRQHandler(void);
GPIOD_INT0_IRQHandler(void)344 void GPIOD_INT0_IRQHandler(void)
345 {
346 HAL_GpioInterruptHandle(3);
347 SDK_ISR_EXIT_BARRIER;
348 }
349 void GPIOD_INT1_IRQHandler(void);
GPIOD_INT1_IRQHandler(void)350 void GPIOD_INT1_IRQHandler(void)
351 {
352 GPIOD_INT0_IRQHandler();
353 }
354 #endif
355
356 #if (FSL_FEATURE_SOC_GPIO_COUNT > 0U)
357 void GPIO00_DriverIRQHandler(void);
GPIO00_DriverIRQHandler(void)358 void GPIO00_DriverIRQHandler(void)
359 {
360 HAL_GpioInterruptHandle(0);
361 SDK_ISR_EXIT_BARRIER;
362 }
363
364 void GPIO01_DriverIRQHandler(void);
GPIO01_DriverIRQHandler(void)365 void GPIO01_DriverIRQHandler(void)
366 {
367 GPIO00_DriverIRQHandler();
368 }
369 #endif
370
371 #if (FSL_FEATURE_SOC_GPIO_COUNT > 1U)
372 void GPIO10_DriverIRQHandler(void);
GPIO10_DriverIRQHandler(void)373 void GPIO10_DriverIRQHandler(void)
374 {
375 HAL_GpioInterruptHandle(1);
376 SDK_ISR_EXIT_BARRIER;
377 }
378 void GPIO11_DriverIRQHandler(void);
GPIO11_DriverIRQHandler(void)379 void GPIO11_DriverIRQHandler(void)
380 {
381 GPIO10_DriverIRQHandler();
382 }
383 #endif
384
385 #if (FSL_FEATURE_SOC_GPIO_COUNT > 2U)
386 void GPIO20_DriverIRQHandler(void);
GPIO20_DriverIRQHandler(void)387 void GPIO20_DriverIRQHandler(void)
388 {
389 HAL_GpioInterruptHandle(2);
390 SDK_ISR_EXIT_BARRIER;
391 }
392 void GPIO21_DriverIRQHandler(void);
GPIO21_DriverIRQHandler(void)393 void GPIO21_DriverIRQHandler(void)
394 {
395 GPIO20_DriverIRQHandler();
396 }
397 #endif
398
399 #if (FSL_FEATURE_SOC_GPIO_COUNT > 3U)
400 void GPIO30_DriverIRQHandler(void);
GPIO30_DriverIRQHandler(void)401 void GPIO30_DriverIRQHandler(void)
402 {
403 HAL_GpioInterruptHandle(3);
404 SDK_ISR_EXIT_BARRIER;
405 }
406 void GPIO31_DriverIRQHandler(void);
GPIO31_DriverIRQHandler(void)407 void GPIO31_DriverIRQHandler(void)
408 {
409 GPIO30_DriverIRQHandler();
410 }
411 #endif
412
413 #if (FSL_FEATURE_SOC_GPIO_COUNT > 4U)
414 void GPIO40_DriverIRQHandler(void);
GPIO40_DriverIRQHandler(void)415 void GPIO40_DriverIRQHandler(void)
416 {
417 HAL_GpioInterruptHandle(4);
418 SDK_ISR_EXIT_BARRIER;
419 }
420 void GPIO41_DriverIRQHandler(void);
GPIO41_DriverIRQHandler(void)421 void GPIO41_DriverIRQHandler(void)
422 {
423 GPIO40_DriverIRQHandler();
424 }
425 #endif
426
427 #if (FSL_FEATURE_SOC_GPIO_COUNT > 5U)
428 void GPIO50_DriverIRQHandler(void);
GPIO50_DriverIRQHandler(void)429 void GPIO50_DriverIRQHandler(void)
430 {
431 HAL_GpioInterruptHandle(5);
432 SDK_ISR_EXIT_BARRIER;
433 }
434 void GPIO51_DriverIRQHandler(void);
GPIO51_DriverIRQHandler(void)435 void GPIO51_DriverIRQHandler(void)
436 {
437 GPIO50_DriverIRQHandler();
438 }
439 #endif
440
441 #if (FSL_FEATURE_SOC_GPIO_COUNT > 6U)
442 void GPIO60_DriverIRQHandler(void);
GPIO60_DriverIRQHandler(void)443 void GPIO60_DriverIRQHandler(void)
444 {
445 HAL_GpioInterruptHandle(6);
446 SDK_ISR_EXIT_BARRIER;
447 }
448 void GPIO61_DriverIRQHandler(void);
GPIO61_DriverIRQHandler(void)449 void GPIO61_DriverIRQHandler(void)
450 {
451 GPIO60_DriverIRQHandler();
452 }
453 #endif
454
455 #if (FSL_FEATURE_SOC_GPIO_COUNT > 7U)
456 void GPIO70_DriverIRQHandler(void);
GPIO70_DriverIRQHandler(void)457 void GPIO70_DriverIRQHandler(void)
458 {
459 HAL_GpioInterruptHandle(7);
460 SDK_ISR_EXIT_BARRIER;
461 }
462 void GPIO71_DriverIRQHandler(void);
GPIO71_DriverIRQHandler(void)463 void GPIO71_DriverIRQHandler(void)
464 {
465 GPIO70_DriverIRQHandler();
466 }
467 #endif
468
469 #if (FSL_FEATURE_SOC_GPIO_COUNT > 8U)
470 void GPIO80_DriverIRQHandler(void);
GPIO80_DriverIRQHandler(void)471 void GPIO80_DriverIRQHandler(void)
472 {
473 HAL_GpioInterruptHandle(8);
474 SDK_ISR_EXIT_BARRIER;
475 }
476 void GPIO81_DriverIRQHandler(void);
GPIO81_DriverIRQHandler(void)477 void GPIO81_DriverIRQHandler(void)
478 {
479 GPIO80_DriverIRQHandler();
480 }
481 #endif
482
483 #if (FSL_FEATURE_SOC_GPIO_COUNT > 9U)
484 void GPIO90_DriverIRQHandler(void);
GPIO90_DriverIRQHandler(void)485 void GPIO90_DriverIRQHandler(void)
486 {
487 HAL_GpioInterruptHandle(9);
488 SDK_ISR_EXIT_BARRIER;
489 }
490 void GPIO91_DriverIRQHandler(void);
GPIO91_DriverIRQHandler(void)491 void GPIO91_DriverIRQHandler(void)
492 {
493 GPIO90_DriverIRQHandler();
494 }
495 #endif
496
497 #if (FSL_FEATURE_SOC_GPIO_COUNT > 10U)
498 void GPIO100_DriverIRQHandler(void);
GPIO100_DriverIRQHandler(void)499 void GPIO100_DriverIRQHandler(void)
500 {
501 HAL_GpioInterruptHandle(10);
502 SDK_ISR_EXIT_BARRIER;
503 }
504 void GPIO101_DriverIRQHandler(void);
GPIO101_DriverIRQHandler(void)505 void GPIO101_DriverIRQHandler(void)
506 {
507 GPIO100_DriverIRQHandler();
508 }
509 #endif
510
511 #if (FSL_FEATURE_SOC_GPIO_COUNT > 0U)
512 void GPIO0_IRQHandler(void);
GPIO0_IRQHandler(void)513 void GPIO0_IRQHandler(void)
514 {
515 HAL_GpioInterruptHandle(0);
516 SDK_ISR_EXIT_BARRIER;
517 }
518 #endif
519
520 #if (FSL_FEATURE_SOC_GPIO_COUNT > 1U)
521 void GPIO1_IRQHandler(void);
GPIO1_IRQHandler(void)522 void GPIO1_IRQHandler(void)
523 {
524 HAL_GpioInterruptHandle(1);
525 SDK_ISR_EXIT_BARRIER;
526 }
527 #endif
528
529 #if (FSL_FEATURE_SOC_GPIO_COUNT > 2U)
530 void GPIO2_IRQHandler(void);
GPIO2_IRQHandler(void)531 void GPIO2_IRQHandler(void)
532 {
533 HAL_GpioInterruptHandle(2);
534 SDK_ISR_EXIT_BARRIER;
535 }
536 #endif
537
538 #if (FSL_FEATURE_SOC_GPIO_COUNT > 3U)
539 void GPIO3_IRQHandler(void);
GPIO3_IRQHandler(void)540 void GPIO3_IRQHandler(void)
541 {
542 HAL_GpioInterruptHandle(3);
543 SDK_ISR_EXIT_BARRIER;
544 }
545 #endif
546
547 #endif
548
HAL_GpioPreInit(void)549 void HAL_GpioPreInit(void)
550 {
551 s_GpioHead = NULL;
552 }
553
HAL_GpioInit(hal_gpio_handle_t gpioHandle,hal_gpio_pin_config_t * pinConfig)554 hal_gpio_status_t HAL_GpioInit(hal_gpio_handle_t gpioHandle, hal_gpio_pin_config_t *pinConfig)
555 {
556 hal_gpio_state_t *gpioState;
557 hal_gpio_status_t status;
558
559 assert(gpioHandle);
560 assert(pinConfig);
561 assert(HAL_GPIO_HANDLE_SIZE >= sizeof(hal_gpio_state_t));
562
563 gpioState = (hal_gpio_state_t *)gpioHandle;
564
565 #if (defined(HAL_GPIO_CONFLICT_CHECK_ENABLE) && (HAL_GPIO_CONFLICT_CHECK_ENABLE > 0U))
566 if ((NULL != s_GpioHead) &&
567 (kStatus_HAL_GpioSuccess != HAL_GpioConflictSearch(s_GpioHead, pinConfig->port, pinConfig->pin)))
568 {
569 return kStatus_HAL_GpioPinConflict;
570 }
571 #endif /* HAL_GPIO_CONFLICT_CHECK_ENABLE */
572
573 status = HAL_GpioAddItem(&s_GpioHead, gpioState);
574 if (kStatus_HAL_GpioSuccess != status)
575 {
576 return status;
577 }
578
579 (void)memcpy((void *)&gpioState->direction, (void *)pinConfig, sizeof(hal_gpio_pin_config_t));
580
581 GPIO_PinInit(s_GpioPort[pinConfig->port], pinConfig->pin, (const gpio_pin_config_t *)(void *)&pinConfig->direction);
582 return kStatus_HAL_GpioSuccess;
583 }
584
HAL_GpioDeinit(hal_gpio_handle_t gpioHandle)585 hal_gpio_status_t HAL_GpioDeinit(hal_gpio_handle_t gpioHandle)
586 {
587 hal_gpio_state_t *gpioState;
588
589 assert(gpioHandle);
590
591 gpioState = (hal_gpio_state_t *)gpioHandle;
592 if (kHAL_GpioDirectionIn == gpioState->direction)
593 {
594 (void)HAL_GpioSetTriggerMode(gpioHandle, kHAL_GpioInterruptDisable);
595 }
596 (void)HAL_GpioRemoveItem(&s_GpioHead, gpioState);
597 return kStatus_HAL_GpioSuccess;
598 }
599
HAL_GpioGetInput(hal_gpio_handle_t gpioHandle,uint8_t * pinState)600 hal_gpio_status_t HAL_GpioGetInput(hal_gpio_handle_t gpioHandle, uint8_t *pinState)
601 {
602 hal_gpio_state_t *gpioState;
603
604 assert(gpioHandle);
605 assert(pinState);
606
607 gpioState = (hal_gpio_state_t *)gpioHandle;
608
609 *pinState = (GPIO_PinRead(s_GpioPort[gpioState->port], gpioState->pin) != 0U) ? 1U : 0U;
610 return kStatus_HAL_GpioSuccess;
611 }
612
HAL_GpioSetOutput(hal_gpio_handle_t gpioHandle,uint8_t pinState)613 hal_gpio_status_t HAL_GpioSetOutput(hal_gpio_handle_t gpioHandle, uint8_t pinState)
614 {
615 hal_gpio_state_t *gpioState;
616
617 assert(gpioHandle);
618
619 gpioState = (hal_gpio_state_t *)gpioHandle;
620
621 GPIO_PinWrite(s_GpioPort[gpioState->port], gpioState->pin, (pinState != 0U) ? 1U : 0U);
622 return kStatus_HAL_GpioSuccess;
623 }
624
HAL_GpioInstallCallback(hal_gpio_handle_t gpioHandle,hal_gpio_callback_t callback,void * callbackParam)625 hal_gpio_status_t HAL_GpioInstallCallback(hal_gpio_handle_t gpioHandle,
626 hal_gpio_callback_t callback,
627 void *callbackParam)
628 {
629 hal_gpio_state_t *gpioState;
630
631 assert(gpioHandle);
632
633 gpioState = (hal_gpio_state_t *)gpioHandle;
634
635 gpioState->callbackParam = callbackParam;
636 gpioState->callback = callback;
637
638 return kStatus_HAL_GpioSuccess;
639 }
640
HAL_GpioGetTriggerMode(hal_gpio_handle_t gpioHandle,hal_gpio_interrupt_trigger_t * gpioTrigger)641 hal_gpio_status_t HAL_GpioGetTriggerMode(hal_gpio_handle_t gpioHandle, hal_gpio_interrupt_trigger_t *gpioTrigger)
642 {
643 hal_gpio_state_t *gpioState;
644
645 assert(gpioHandle);
646
647 gpioState = (hal_gpio_state_t *)gpioHandle;
648
649 if (kHAL_GpioDirectionOut == gpioState->direction)
650 {
651 return kStatus_HAL_GpioError;
652 }
653
654 *gpioTrigger = (hal_gpio_interrupt_trigger_t)gpioState->trigger;
655 return kStatus_HAL_GpioSuccess;
656 }
657
HAL_GpioSetTriggerMode(hal_gpio_handle_t gpioHandle,hal_gpio_interrupt_trigger_t gpioTrigger)658 hal_gpio_status_t HAL_GpioSetTriggerMode(hal_gpio_handle_t gpioHandle, hal_gpio_interrupt_trigger_t gpioTrigger)
659 {
660 hal_gpio_state_t *gpioState;
661 #if !(defined(FSL_FEATURE_PORT_HAS_NO_INTERRUPT) && FSL_FEATURE_PORT_HAS_NO_INTERRUPT) && \
662 defined(FSL_FEATURE_SOC_PORT_COUNT)
663 PORT_Type *portList[] = PORT_BASE_PTRS;
664 static const IRQn_Type irqNo[] = PORT_IRQS;
665 port_interrupt_t pinInt;
666 #else
667 gpio_interrupt_config_t pinInt;
668 static const IRQn_Type irqNo[] = GPIO_IRQS;
669 #endif
670
671 assert(gpioHandle);
672
673 gpioState = (hal_gpio_state_t *)gpioHandle;
674 assert(kHAL_GpioDirectionOut != gpioState->direction);
675
676 switch (gpioTrigger)
677 {
678 case kHAL_GpioInterruptLogicZero:
679 #if !(defined(FSL_FEATURE_PORT_HAS_NO_INTERRUPT) && FSL_FEATURE_PORT_HAS_NO_INTERRUPT) && \
680 defined(FSL_FEATURE_SOC_PORT_COUNT)
681 pinInt = kPORT_InterruptLogicZero;
682 #else
683 pinInt = kGPIO_InterruptLogicZero;
684 #endif
685 break;
686 case kHAL_GpioInterruptLogicOne:
687 #if !(defined(FSL_FEATURE_PORT_HAS_NO_INTERRUPT) && FSL_FEATURE_PORT_HAS_NO_INTERRUPT) && \
688 defined(FSL_FEATURE_SOC_PORT_COUNT)
689 pinInt = kPORT_InterruptLogicOne;
690 #else
691 pinInt = kGPIO_InterruptLogicOne;
692 #endif
693 break;
694 case kHAL_GpioInterruptRisingEdge:
695 #if !(defined(FSL_FEATURE_PORT_HAS_NO_INTERRUPT) && FSL_FEATURE_PORT_HAS_NO_INTERRUPT) && \
696 defined(FSL_FEATURE_SOC_PORT_COUNT)
697 pinInt = kPORT_InterruptRisingEdge;
698 #else
699 pinInt = kGPIO_InterruptRisingEdge;
700 #endif
701 break;
702 case kHAL_GpioInterruptFallingEdge:
703 #if !(defined(FSL_FEATURE_PORT_HAS_NO_INTERRUPT) && FSL_FEATURE_PORT_HAS_NO_INTERRUPT) && \
704 defined(FSL_FEATURE_SOC_PORT_COUNT)
705 pinInt = kPORT_InterruptFallingEdge;
706 #else
707 pinInt = kGPIO_InterruptFallingEdge;
708 #endif
709 break;
710 case kHAL_GpioInterruptEitherEdge:
711 #if !(defined(FSL_FEATURE_PORT_HAS_NO_INTERRUPT) && FSL_FEATURE_PORT_HAS_NO_INTERRUPT) && \
712 defined(FSL_FEATURE_SOC_PORT_COUNT)
713 pinInt = kPORT_InterruptEitherEdge;
714 #else
715 pinInt = kGPIO_InterruptEitherEdge;
716 #endif
717 break;
718 default:
719 #if !(defined(FSL_FEATURE_PORT_HAS_NO_INTERRUPT) && FSL_FEATURE_PORT_HAS_NO_INTERRUPT) && \
720 defined(FSL_FEATURE_SOC_PORT_COUNT)
721 pinInt = kPORT_InterruptOrDMADisabled;
722 #else
723 pinInt = kGPIO_InterruptStatusFlagDisabled;
724 #endif
725 break;
726 }
727
728 gpioState->trigger = (uint8_t)gpioTrigger;
729
730 /* initialize port interrupt */
731 #if !(defined(FSL_FEATURE_PORT_HAS_NO_INTERRUPT) && FSL_FEATURE_PORT_HAS_NO_INTERRUPT) && \
732 defined(FSL_FEATURE_SOC_PORT_COUNT)
733 PORT_SetPinInterruptConfig(portList[gpioState->port], gpioState->pin, pinInt);
734 #else
735 GPIO_SetPinInterruptConfig(s_GpioPort[gpioState->port], gpioState->pin, pinInt);
736 #endif
737 NVIC_SetPriority(irqNo[gpioState->port], HAL_GPIO_ISR_PRIORITY);
738 NVIC_EnableIRQ(irqNo[gpioState->port]);
739
740 return kStatus_HAL_GpioSuccess;
741 }
742
HAL_GpioWakeUpSetting(hal_gpio_handle_t gpioHandle,uint8_t enable)743 hal_gpio_status_t HAL_GpioWakeUpSetting(hal_gpio_handle_t gpioHandle, uint8_t enable)
744 {
745 hal_gpio_state_t *gpioState;
746
747 assert(gpioHandle);
748
749 gpioState = (hal_gpio_state_t *)gpioHandle;
750
751 if (kHAL_GpioDirectionOut == gpioState->direction)
752 {
753 return kStatus_HAL_GpioError;
754 }
755 /* The wakeup feature of GPIO cannot be disabled. */
756 if (0U == enable)
757 {
758 return kStatus_HAL_GpioError;
759 }
760 return kStatus_HAL_GpioSuccess;
761 }
762
HAL_GpioEnterLowpower(hal_gpio_handle_t gpioHandle)763 hal_gpio_status_t HAL_GpioEnterLowpower(hal_gpio_handle_t gpioHandle)
764 {
765 assert(gpioHandle);
766
767 return kStatus_HAL_GpioSuccess;
768 }
769
HAL_GpioExitLowpower(hal_gpio_handle_t gpioHandle)770 hal_gpio_status_t HAL_GpioExitLowpower(hal_gpio_handle_t gpioHandle)
771 {
772 hal_gpio_state_t *gpioState;
773 gpio_pin_config_t gpioPinconfig = {
774 kGPIO_DigitalInput,
775 0,
776 };
777
778 assert(gpioHandle);
779
780 gpioState = (hal_gpio_state_t *)gpioHandle;
781 gpioPinconfig.pinDirection = kGPIO_DigitalInput;
782 if (kHAL_GpioDirectionOut == gpioState->direction)
783 {
784 gpioPinconfig.pinDirection = kGPIO_DigitalOutput;
785 }
786
787 GPIO_PinInit(s_GpioPort[gpioState->port], gpioState->pin, &gpioPinconfig);
788 if (kHAL_GpioDirectionIn == gpioState->direction)
789 {
790 (void)HAL_GpioSetTriggerMode(gpioHandle, (hal_gpio_interrupt_trigger_t)gpioState->trigger);
791 }
792 return kStatus_HAL_GpioSuccess;
793 }
794
