1 /* 2 * Copyright 2018 NXP 3 * All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #include "fsl_flexspi.h" 9 10 /*! 11 * @addtogroup flexspi_nand_flash 12 * @{ 13 */ 14 15 /******************************************************************************* 16 * Definitions 17 ******************************************************************************/ 18 19 /*! @brief LUT sequence index for READ cache sequence */ 20 #define NAND_CMD_LUT_SEQ_IDX_READCACHE 0 21 /*! @brief LUT sequence index for Read Status sequence */ 22 #define NAND_CMD_LUT_SEQ_IDX_READSTATUS 1 23 /*! @brief LUT sequence index for Read ID sequence */ 24 #define NAND_CMD_LUT_SEQ_IDX_READJEDECID 2 25 /*! @brief LUT sequence index for write enable sequence */ 26 #define NAND_CMD_LUT_SEQ_IDX_WRITEENABLE 3 27 /*! @brief LUT sequence index for Read cache for odd blocks */ 28 #define NAND_CMD_LUT_SEQ_IDX_READCACHE_ODD 4 29 /*! @brief LUT sequence index for erase block */ 30 #define NAND_CMD_LUT_SEQ_IDX_ERASEBLOCK 5 31 /*! @brief LUT sequence index for program load */ 32 #define NAND_CMD_LUT_SEQ_IDX_PROGRAMLOAD 6 33 /*! @brief LUT sequence index for program load for odd blocks */ 34 #define NAND_CMD_LUT_SEQ_IDX_PROGRAMLOAD_ODD 7 35 /*! @brief LUT sequence index for program load for read page */ 36 #define NAND_CMD_LUT_SEQ_IDX_READPAGE 8 37 /*! @brief LUT sequence index for read ecc status */ 38 #define NAND_CMD_LUT_SEQ_IDX_READECCSTAT 9 39 /*! @brief LUT sequence index for program execute */ 40 #define NAND_CMD_LUT_SEQ_IDX_PROGRAMEXECUTE 10 41 /*! @brief LUT sequence index for get parameter table */ 42 #define NAND_CMD_LUT_SEQ_IDX_SETFEATURE 11 43 /*! @brief Unlock all blocks */ 44 #define NAND_CMD_LUT_SEQ_IDX_UNLOCKALL 12 45 46 /* !@brief FlexSPI Memory Configuration Block */ 47 typedef struct _flexspi_memory_config 48 { 49 flexspi_device_config_t deviceConfig; /*!< Device configuration structure */ 50 flexspi_port_t devicePort; /*!< Device connected to which port, SS0_A means port A1, SS0_B means port B1*/ 51 uint32_t dataBytesPerPage; /*!< Data Size in one page, usually it is 2048 or 4096*/ 52 uint32_t bytesInPageSpareArea; /*!< Total size in one page, usually, it equals 2 ^ width of column address*/ 53 uint32_t pagesPerBlock; /*!< Pages per block*/ 54 uint16_t busyOffset; /*!< Busy offset, valid value: 0-31, only need for check option kNandReadyCheckOption_RB */ 55 uint16_t busyBitPolarity; /*!< Busy flag polarity, 0 - busy flag is 1 when flash device is busy, 1 -busy flag is 0 56 when flash device is busy, only need for check option kNandReadyCheckOption_RB */ 57 uint32_t eccStatusMask; /*!< ECC status mask */ 58 uint32_t eccFailureMask; /*!< ECC failure mask */ 59 uint32_t lookupTable[64]; /*!< Lookup table holds Flash command sequences */ 60 } flexspi_mem_config_t; 61 62 /*!@brief NAND Flash handle info*/ 63 typedef struct _flexspi_mem_nand_handle 64 { 65 flexspi_port_t port; /*!< Device connected to which port, SS0_A means port A1, SS0_B means port B1*/ 66 uint16_t busyOffset; /*!< Busy offset, valid value: 0-31, only need for check option kNandReadyCheckOption_RB */ 67 uint16_t busyBitPolarity; /*!< Busy flag polarity, 0 - busy flag is 1 when flash device is busy, 1 -busy flag is 0 68 when flash device is busy, only need for check option kNandReadyCheckOption_RB */ 69 uint32_t eccStatusMask; /*!< ECC status mask */ 70 uint32_t eccFailureMask; /*!< ECC failure mask */ 71 } flexspi_mem_nand_handle_t; 72 /*! @} */ 73
