1 /*
2  * Copyright 2023 NXP
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef HAL_CLOCK_H_
8 #define HAL_CLOCK_H_
9 
10 #include "hal_clock_platform.h"
11 
12 /*******************************************************************************
13  * Definitions
14  ******************************************************************************/
15 extern volatile uint64_t g_halClkFreq[HAL_CLOCK_PLATFORM_MAX_ID];
16 
17 /* clock round options(Currently the enum is only used by System Manager Agent) */
18 typedef enum
19 {
20     hal_clk_round_down = 0,
21     hal_clk_round_up   = 1,
22     hal_clk_round_auto = 2
23 } hal_clk_rnd_opt_e;
24 
25 typedef struct
26 {
27     hal_clk_id_e clk_id;             /* clock device id */
28     hal_clk_id_e pclk_id;            /* parent clock device id */
29     uint32_t div;                    /* clock divider */
30     bool enable_clk;                 /* true: enable clock; false: disable clock */
31     hal_clk_rnd_opt_e clk_round_opt; /* clock round options */
32     uint32_t rateu;                   /* PLL clock Rate upper */
33     uint32_t ratel;                   /* PLL clock Rate lower */
34 } hal_clk_t;
35 
36 /*******************************************************************************
37  * API
38  ******************************************************************************/
39 #if defined(__cplusplus)
40 extern "C" {
41 #endif /*__cplusplus */
42 
43 void HAL_ClockSetRootClk(hal_clk_t *hal_clk);
44 void HAL_ClockSetPllClk(hal_clk_t *hal_clk);
45 void HAL_ClockEnableRootClk(hal_clk_t *hal_clk);
46 
47 uint64_t HAL_ClockGetIpFreq(hal_clk_id_e clk_id);
48 
49 uint64_t HAL_ClockGetFreq(hal_clk_id_e clk_id);
50 #if defined(__cplusplus)
51 }
52 #endif /*__cplusplus */
53 
54 /*! @} */
55 
56 #endif /* HAL_CLOCK_H_ */
57