1 /*
2  * Copyright 2024 NXP
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 /***********************************************************************************************************************
9  * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
10  * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
11  **********************************************************************************************************************/
12 /*
13  * How to setup clock using clock driver functions:
14  *
15  * 1. CLOCK_SetSimSafeDivs, to make sure core clock, bus clock, flexbus clock
16  *    and flash clock are in allowed range during clock mode switch.
17  *
18  * 2. Call CLOCK_Osc0Init to setup OSC clock, if it is used in target mode.
19  *
20  * 3. Call CLOCK_SetMcgliteConfig to set MCG_Lite configuration.
21  *
22  * 4. Call CLOCK_SetSimConfig to set the clock configuration in SIM.
23  */
24 
25 /* clang-format off */
26 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
27 !!GlobalInfo
28 product: Clocks v13.0
29 processor: MCXC444
30 package_id: MCXC444VLH
31 mcu_data: ksdk2_0
32 processor_version: 0.0.0
33  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
34 /* clang-format on */
35 
36 #include "fsl_smc.h"
37 #include "clock_config.h"
38 
39 /*******************************************************************************
40  * Definitions
41  ******************************************************************************/
42 #define OSC_CAP0P                                         0U  /*!< Oscillator 0pF capacitor load */
43 #define OSC_ER_CLK_DISABLE                                0U  /*!< Disable external reference clock */
44 #define SIM_OSC32KSEL_OSC32KCLK_CLK                       0U  /*!< OSC32KSEL select: OSC32KCLK clock */
45 
46 /*******************************************************************************
47  * Variables
48  ******************************************************************************/
49 /* System clock frequency. */
50 extern uint32_t SystemCoreClock;
51 
52 /*******************************************************************************
53  ************************ BOARD_InitBootClocks function ************************
54  ******************************************************************************/
BOARD_InitBootClocks(void)55 void BOARD_InitBootClocks(void)
56 {
57     BOARD_BootClockRUN();
58 }
59 
60 /*******************************************************************************
61  ********************** Configuration BOARD_BootClockRUN ***********************
62  ******************************************************************************/
63 /* clang-format off */
64 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
65 !!Configuration
66 name: BOARD_BootClockRUN
67 called_from_default_init: true
68 outputs:
69 - {id: Bus_clock.outFreq, value: 24 MHz}
70 - {id: Core_clock.outFreq, value: 48 MHz}
71 - {id: Flash_clock.outFreq, value: 24 MHz}
72 - {id: LPO_clock.outFreq, value: 1 kHz}
73 - {id: MCGIRCLK.outFreq, value: 8 MHz}
74 - {id: MCGPCLK.outFreq, value: 48 MHz}
75 - {id: System_clock.outFreq, value: 48 MHz}
76 settings:
77 - {id: MCGMode, value: HIRC}
78 - {id: MCG.CLKS.sel, value: MCG.HIRC}
79 - {id: MCG_C2_OSC_MODE_CFG, value: ModeOscLowPower}
80 - {id: MCG_C2_RANGE0_CFG, value: Very_high}
81 - {id: MCG_MC_HIRCEN_CFG, value: Enabled}
82 - {id: OSC0_CR_ERCLKEN_CFG, value: Enabled}
83 - {id: OSC_CR_ERCLKEN_CFG, value: Enabled}
84 sources:
85 - {id: MCG.HIRC.outFreq, value: 48 MHz}
86  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
87 /* clang-format on */
88 
89 /*******************************************************************************
90  * Variables for BOARD_BootClockRUN configuration
91  ******************************************************************************/
92 const mcglite_config_t mcgliteConfig_BOARD_BootClockRUN =
93     {
94         .outSrc = kMCGLITE_ClkSrcHirc,            /* MCGOUTCLK source is HIRC */
95         .irclkEnableMode = kMCGLITE_IrclkEnable,  /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */
96         .ircs = kMCGLITE_Lirc8M,                  /* Slow internal reference (LIRC) 8 MHz clock selected */
97         .fcrdiv = kMCGLITE_LircDivBy1,            /* Low-frequency Internal Reference Clock Divider: divided by 1 */
98         .lircDiv2 = kMCGLITE_LircDivBy1,          /* Second Low-frequency Internal Reference Clock Divider: divided by 1 */
99         .hircEnableInNotHircMode = true,          /* HIRC source is enabled */
100     };
101 const sim_clock_config_t simConfig_BOARD_BootClockRUN =
102     {
103         .er32kSrc = SIM_OSC32KSEL_OSC32KCLK_CLK,  /* OSC32KSEL select: OSC32KCLK clock */
104         .clkdiv1 = 0x10000U,                      /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */
105     };
106 const osc_config_t oscConfig_BOARD_BootClockRUN =
107     {
108         .freq = 0U,                               /* Oscillator frequency: 0Hz */
109         .capLoad = (OSC_CAP0P),                   /* Oscillator capacity load: 0pF */
110         .workMode = kOSC_ModeOscLowPower,         /* Oscillator low power */
111         .oscerConfig =
112             {
113                 .enableMode = kOSC_ErClkEnable,   /* Enable external reference clock, disable external reference clock in STOP mode */
114             }
115     };
116 
117 /*******************************************************************************
118  * Code for BOARD_BootClockRUN configuration
119  ******************************************************************************/
BOARD_BootClockRUN(void)120 void BOARD_BootClockRUN(void)
121 {
122     /* Set the system clock dividers in SIM to safe value. */
123     CLOCK_SetSimSafeDivs();
124     /* Set MCG to HIRC mode. */
125     CLOCK_SetMcgliteConfig(&mcgliteConfig_BOARD_BootClockRUN);
126     /* Set the clock configuration in SIM module. */
127     CLOCK_SetSimConfig(&simConfig_BOARD_BootClockRUN);
128     /* Set SystemCoreClock variable. */
129     SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
130 }
131 
132 /*******************************************************************************
133  ********************* Configuration BOARD_BootClockVLPR ***********************
134  ******************************************************************************/
135 /* clang-format off */
136 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
137 !!Configuration
138 name: BOARD_BootClockVLPR
139 outputs:
140 - {id: Bus_clock.outFreq, value: 1 MHz}
141 - {id: Core_clock.outFreq, value: 2 MHz}
142 - {id: Flash_clock.outFreq, value: 1 MHz}
143 - {id: LPO_clock.outFreq, value: 1 kHz}
144 - {id: MCGIRCLK.outFreq, value: 2 MHz}
145 - {id: System_clock.outFreq, value: 2 MHz}
146 settings:
147 - {id: MCGMode, value: LIRC2M}
148 - {id: powerMode, value: VLPR}
149 - {id: MCG_C2_OSC_MODE_CFG, value: ModeOscLowPower}
150 sources:
151 - {id: MCG.LIRC.outFreq, value: 2 MHz}
152  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
153 /* clang-format on */
154 
155 /*******************************************************************************
156  * Variables for BOARD_BootClockVLPR configuration
157  ******************************************************************************/
158 const mcglite_config_t mcgliteConfig_BOARD_BootClockVLPR =
159     {
160         .outSrc = kMCGLITE_ClkSrcLirc,            /* MCGOUTCLK source is LIRC */
161         .irclkEnableMode = kMCGLITE_IrclkEnable,  /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */
162         .ircs = kMCGLITE_Lirc2M,                  /* Slow internal reference (LIRC) 2 MHz clock selected */
163         .fcrdiv = kMCGLITE_LircDivBy1,            /* Low-frequency Internal Reference Clock Divider: divided by 1 */
164         .lircDiv2 = kMCGLITE_LircDivBy1,          /* Second Low-frequency Internal Reference Clock Divider: divided by 1 */
165         .hircEnableInNotHircMode = false,         /* HIRC source is not enabled */
166     };
167 const sim_clock_config_t simConfig_BOARD_BootClockVLPR =
168     {
169         .er32kSrc = SIM_OSC32KSEL_OSC32KCLK_CLK,  /* OSC32KSEL select: OSC32KCLK clock */
170         .clkdiv1 = 0x10000U,                      /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */
171     };
172 const osc_config_t oscConfig_BOARD_BootClockVLPR =
173     {
174         .freq = 0U,                               /* Oscillator frequency: 0Hz */
175         .capLoad = (OSC_CAP0P),                   /* Oscillator capacity load: 0pF */
176         .workMode = kOSC_ModeOscLowPower,         /* Oscillator low power */
177         .oscerConfig =
178             {
179                 .enableMode = OSC_ER_CLK_DISABLE, /* Disable external reference clock */
180             }
181     };
182 
183 /*******************************************************************************
184  * Code for BOARD_BootClockVLPR configuration
185  ******************************************************************************/
BOARD_BootClockVLPR(void)186 void BOARD_BootClockVLPR(void)
187 {
188     /* Set the system clock dividers in SIM to safe value. */
189     CLOCK_SetSimSafeDivs();
190     /* Set MCG to LIRC2M mode. */
191     CLOCK_SetMcgliteConfig(&mcgliteConfig_BOARD_BootClockVLPR);
192     /* Set the clock configuration in SIM module. */
193     CLOCK_SetSimConfig(&simConfig_BOARD_BootClockVLPR);
194     /* Set VLPR power mode. */
195     SMC_SetPowerModeProtection(SMC, kSMC_AllowPowerModeAll);
196 #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
197     SMC_SetPowerModeVlpr(SMC, false);
198 #else
199     SMC_SetPowerModeVlpr(SMC);
200 #endif
201     while (SMC_GetPowerModeState(SMC) != kSMC_PowerStateVlpr)
202     {
203     }
204     /* Set SystemCoreClock variable. */
205     SystemCoreClock = BOARD_BOOTCLOCKVLPR_CORE_CLOCK;
206 }
207 
208