1 /*
2  * Copyright 2024 NXP
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 /***********************************************************************************************************************
9  * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
10  * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
11  **********************************************************************************************************************/
12 /*
13  * How to setup clock using clock driver functions:
14  *
15  * 1. CLOCK_SetSimSafeDivs, to make sure core clock, bus clock, flexbus clock
16  *    and flash clock are in allowed range during clock mode switch.
17  *
18  * 2. Call CLOCK_Osc0Init to setup OSC clock, if it is used in target mode.
19  *
20  * 3. Call CLOCK_SetMcgliteConfig to set MCG_Lite configuration.
21  *
22  * 4. Call CLOCK_SetSimConfig to set the clock configuration in SIM.
23  */
24 
25 /* clang-format off */
26 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
27 !!GlobalInfo
28 product: Clocks v13.0
29 processor: MCXC041
30 package_id: MCXC041VFK
31 mcu_data: ksdk2_0
32 processor_version: 0.0.0
33 board: FRDM-MCXC041
34  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
35 /* clang-format on */
36 
37 #include "fsl_smc.h"
38 #include "clock_config.h"
39 
40 /*******************************************************************************
41  * Definitions
42  ******************************************************************************/
43 #define OSC_CAP0P                                         0U  /*!< Oscillator 0pF capacitor load */
44 #define OSC_ER_CLK_DISABLE                                0U  /*!< Disable external reference clock */
45 #define SIM_OSC32KSEL_OSC32KCLK_CLK                       0U  /*!< OSC32KSEL select: OSC32KCLK clock */
46 
47 /*******************************************************************************
48  * Variables
49  ******************************************************************************/
50 
51 /*******************************************************************************
52  ************************ BOARD_InitBootClocks function ************************
53  ******************************************************************************/
BOARD_InitBootClocks(void)54 void BOARD_InitBootClocks(void)
55 {
56     BOARD_BootClockRUN();
57 }
58 
59 /*******************************************************************************
60  ********************** Configuration BOARD_BootClockRUN ***********************
61  ******************************************************************************/
62 /* clang-format off */
63 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
64 !!Configuration
65 name: BOARD_BootClockRUN
66 called_from_default_init: true
67 outputs:
68 - {id: Bus_clock.outFreq, value: 24 MHz}
69 - {id: Core_clock.outFreq, value: 48 MHz}
70 - {id: Flash_clock.outFreq, value: 24 MHz}
71 - {id: LPO_clock.outFreq, value: 1 kHz}
72 - {id: MCGIRCLK.outFreq, value: 8 MHz}
73 - {id: MCGPCLK.outFreq, value: 48 MHz}
74 - {id: System_clock.outFreq, value: 48 MHz}
75 settings:
76 - {id: MCGMode, value: HIRC}
77 - {id: MCG.CLKS.sel, value: MCG.HIRC}
78 - {id: MCG_C2_OSC_MODE_CFG, value: ModeOscLowPower}
79 - {id: MCG_MC_HIRCEN_CFG, value: Enabled}
80 - {id: RTCClkConfig, value: 'yes'}
81 - {id: SIM.CLKOUTSEL.sel, value: MCG.MCGPCLK}
82 - {id: SIM.COPCLKSEL.sel, value: SIM.OUTDIV4}
83 - {id: SIM.LPUART0SRCSEL.sel, value: MCG.MCGPCLK}
84 - {id: SIM.RTCCLKOUTSEL.sel, value: OSC.OSCERCLK}
85 - {id: SIM.TPMSRCSEL.sel, value: MCG.MCGPCLK}
86 sources:
87 - {id: MCG.HIRC.outFreq, value: 48 MHz}
88 - {id: OSC.OSC.outFreq, value: 32.768 kHz}
89  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
90 /* clang-format on */
91 
92 /*******************************************************************************
93  * Variables for BOARD_BootClockRUN configuration
94  ******************************************************************************/
95 const mcglite_config_t mcgliteConfig_BOARD_BootClockRUN =
96     {
97         .outSrc = kMCGLITE_ClkSrcHirc,            /* MCGOUTCLK source is HIRC */
98         .irclkEnableMode = kMCGLITE_IrclkEnable,  /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */
99         .ircs = kMCGLITE_Lirc8M,                  /* Slow internal reference (LIRC) 8 MHz clock selected */
100         .fcrdiv = kMCGLITE_LircDivBy1,            /* Low-frequency Internal Reference Clock Divider: divided by 1 */
101         .lircDiv2 = kMCGLITE_LircDivBy1,          /* Second Low-frequency Internal Reference Clock Divider: divided by 1 */
102         .hircEnableInNotHircMode = true,          /* HIRC source is enabled */
103     };
104 const sim_clock_config_t simConfig_BOARD_BootClockRUN =
105     {
106         .er32kSrc = SIM_OSC32KSEL_OSC32KCLK_CLK,  /* OSC32KSEL select: OSC32KCLK clock */
107         .clkdiv1 = 0x10000U,                      /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */
108     };
109 const osc_config_t oscConfig_BOARD_BootClockRUN =
110     {
111         .freq = 0U,                               /* Oscillator frequency: 0Hz */
112         .capLoad = (OSC_CAP0P),                   /* Oscillator capacity load: 0pF */
113         .workMode = kOSC_ModeOscLowPower,         /* Oscillator low power */
114         .oscerConfig =
115             {
116                 .enableMode = OSC_ER_CLK_DISABLE, /* Disable external reference clock */
117             }
118     };
119 
120 /*******************************************************************************
121  * Code for BOARD_BootClockRUN configuration
122  ******************************************************************************/
BOARD_BootClockRUN(void)123 void BOARD_BootClockRUN(void)
124 {
125     /* Set the system clock dividers in SIM to safe value. */
126     CLOCK_SetSimSafeDivs();
127     /* Set MCG to HIRC mode. */
128     CLOCK_SetMcgliteConfig(&mcgliteConfig_BOARD_BootClockRUN);
129     /* Set the clock configuration in SIM module. */
130     CLOCK_SetSimConfig(&simConfig_BOARD_BootClockRUN);
131     /* Set SystemCoreClock variable. */
132     SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
133 }
134 
135 /*******************************************************************************
136  ********************* Configuration BOARD_BootClockVLPR ***********************
137  ******************************************************************************/
138 /* clang-format off */
139 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
140 !!Configuration
141 name: BOARD_BootClockVLPR
142 outputs:
143 - {id: Bus_clock.outFreq, value: 1 MHz}
144 - {id: Core_clock.outFreq, value: 2 MHz}
145 - {id: Flash_clock.outFreq, value: 1 MHz}
146 - {id: LPO_clock.outFreq, value: 1 kHz}
147 - {id: MCGIRCLK.outFreq, value: 2 MHz}
148 - {id: System_clock.outFreq, value: 2 MHz}
149 settings:
150 - {id: MCGMode, value: LIRC2M}
151 - {id: powerMode, value: VLPR}
152 - {id: SIM.OUTDIV1.scale, value: '1', locked: true}
153 sources:
154 - {id: MCG.LIRC.outFreq, value: 2 MHz}
155  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
156 /* clang-format on */
157 
158 /*******************************************************************************
159  * Variables for BOARD_BootClockVLPR configuration
160  ******************************************************************************/
161 const mcglite_config_t mcgliteConfig_BOARD_BootClockVLPR =
162     {
163         .outSrc = kMCGLITE_ClkSrcLirc,            /* MCGOUTCLK source is LIRC */
164         .irclkEnableMode = kMCGLITE_IrclkEnable,  /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */
165         .ircs = kMCGLITE_Lirc2M,                  /* Slow internal reference (LIRC) 2 MHz clock selected */
166         .fcrdiv = kMCGLITE_LircDivBy1,            /* Low-frequency Internal Reference Clock Divider: divided by 1 */
167         .lircDiv2 = kMCGLITE_LircDivBy1,          /* Second Low-frequency Internal Reference Clock Divider: divided by 1 */
168         .hircEnableInNotHircMode = false,         /* HIRC source is not enabled */
169     };
170 const sim_clock_config_t simConfig_BOARD_BootClockVLPR =
171     {
172         .er32kSrc = SIM_OSC32KSEL_OSC32KCLK_CLK,  /* OSC32KSEL select: OSC32KCLK clock */
173         .clkdiv1 = 0x10000U,                      /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */
174     };
175 const osc_config_t oscConfig_BOARD_BootClockVLPR =
176     {
177         .freq = 0U,                               /* Oscillator frequency: 0Hz */
178         .capLoad = (OSC_CAP0P),                   /* Oscillator capacity load: 0pF */
179         .workMode = kOSC_ModeExt,                 /* Use external clock */
180         .oscerConfig =
181             {
182                 .enableMode = OSC_ER_CLK_DISABLE, /* Disable external reference clock */
183             }
184     };
185 
186 /*******************************************************************************
187  * Code for BOARD_BootClockVLPR configuration
188  ******************************************************************************/
BOARD_BootClockVLPR(void)189 void BOARD_BootClockVLPR(void)
190 {
191     /* Set the system clock dividers in SIM to safe value. */
192     CLOCK_SetSimSafeDivs();
193     /* Set MCG to LIRC2M mode. */
194     CLOCK_SetMcgliteConfig(&mcgliteConfig_BOARD_BootClockVLPR);
195     /* Set the clock configuration in SIM module. */
196     CLOCK_SetSimConfig(&simConfig_BOARD_BootClockVLPR);
197     /* Set VLPR power mode. */
198     SMC_SetPowerModeProtection(SMC, kSMC_AllowPowerModeAll);
199 #if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
200     SMC_SetPowerModeVlpr(SMC, false);
201 #else
202     SMC_SetPowerModeVlpr(SMC);
203 #endif
204     while (SMC_GetPowerModeState(SMC) != kSMC_PowerStateVlpr)
205     {
206     }
207     /* Set SystemCoreClock variable. */
208     SystemCoreClock = BOARD_BOOTCLOCKVLPR_CORE_CLOCK;
209 }
210 
211