1 /*
2 * Copyright 2020-2023 NXP
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 /**
8 * @file SchM_Dio.c
9 * @version 3.0.0
10 *
11 * @brief AUTOSAR Rte - module implementation
12 * @details This module implements stubs for the AUTOSAR Rte
13 * This file contains sample code only. It is not part of the production code deliverables.
14 *
15 * @addtogroup RTE_MODULE
16 * @{
17 */
18
19 #ifdef __cplusplus
20 extern "C"{
21 #endif
22
23 /*==================================================================================================
24 * INCLUDE FILES
25 * 1) system and project includes
26 * 2) needed interfaces from external units
27 * 3) internal and external interfaces from this unit
28 ==================================================================================================*/
29 #include "Std_Types.h"
30 #include "Mcal.h"
31 #include "OsIf.h"
32 #include "SchM_Dio.h"
33 #ifdef MCAL_TESTING_ENVIRONMENT
34 #include "EUnit.h" /* EUnit Test Suite */
35 #endif
36
37 /*==================================================================================================
38 * SOURCE FILE VERSION INFORMATION
39 ==================================================================================================*/
40 #define SCHM_DIO_AR_RELEASE_MAJOR_VERSION_C 4
41 #define SCHM_DIO_AR_RELEASE_MINOR_VERSION_C 7
42 #define SCHM_DIO_AR_RELEASE_REVISION_VERSION_C 0
43 #define SCHM_DIO_SW_MAJOR_VERSION_C 3
44 #define SCHM_DIO_SW_MINOR_VERSION_C 0
45 #define SCHM_DIO_SW_PATCH_VERSION_C 0
46
47 /*==================================================================================================
48 * LOCAL CONSTANTS
49 ==================================================================================================*/
50 #ifdef MCAL_PLATFORM_ARM
51 #if (MCAL_PLATFORM_ARM == MCAL_ARM_AARCH64)
52 #define ISR_STATE_MASK ((uint32)0x000000C0UL) /**< @brief DAIF bit I and F */
53 #elif (MCAL_PLATFORM_ARM == MCAL_ARM_RARCH)
54 #define ISR_STATE_MASK ((uint32)0x00000080UL) /**< @brief CPSR bit I */
55 #else
56 #if ((defined MCAL_ENABLE_USER_MODE_SUPPORT)&&(!defined MCAL_PLATFORM_ARM_M0PLUS))
57 #define ISR_STATE_MASK ((uint32)0x000000FFUL) /**< @brief BASEPRI[7:0] mask */
58 #else
59 #define ISR_STATE_MASK ((uint32)0x00000001UL) /**< @brief PRIMASK bit 0 */
60 #endif
61 #endif
62 #else
63 #ifdef MCAL_PLATFORM_S12
64 #define ISR_STATE_MASK ((uint32)0x00000010UL) /**< @brief I bit of CCR */
65 #else
66 #define ISR_STATE_MASK ((uint32)0x00008000UL) /**< @brief EE bit of MSR */
67 #endif
68 #endif
69 /*==================================================================================================
70 * LOCAL MACROS
71 ==================================================================================================*/
72 #ifdef MCAL_PLATFORM_ARM
73 #if (MCAL_PLATFORM_ARM == MCAL_ARM_AARCH64)
74 #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR_STATE_MASK))
75 #elif (MCAL_PLATFORM_ARM == MCAL_ARM_RARCH)
76 #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR_STATE_MASK))
77 #else
78 #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0)
79 #endif
80 #else
81 #ifdef MCAL_PLATFORM_S12
82 #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0)
83 #else
84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK))
85 #endif
86 #endif
87
88 /*==================================================================================================
89 * FILE VERSION CHECKS
90 ==================================================================================================*/
91
92 /*==================================================================================================
93 * LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
94 ==================================================================================================*/
95
96
97 /*==================================================================================================
98 * LOCAL VARIABLES
99 ==================================================================================================*/
100 #define RTE_START_SEC_VAR_CLEARED_32_NO_CACHEABLE
101 #include "Rte_MemMap.h"
102 VAR_SEC_NOCACHE(msr_DIO_EXCLUSIVE_AREA_00) static volatile uint32 msr_DIO_EXCLUSIVE_AREA_00[NUMBER_OF_CORES];
103 VAR_SEC_NOCACHE(reentry_guard_DIO_EXCLUSIVE_AREA_00) static volatile uint32 reentry_guard_DIO_EXCLUSIVE_AREA_00[NUMBER_OF_CORES];
104 VAR_SEC_NOCACHE(msr_DIO_EXCLUSIVE_AREA_01) static volatile uint32 msr_DIO_EXCLUSIVE_AREA_01[NUMBER_OF_CORES];
105 VAR_SEC_NOCACHE(reentry_guard_DIO_EXCLUSIVE_AREA_01) static volatile uint32 reentry_guard_DIO_EXCLUSIVE_AREA_01[NUMBER_OF_CORES];
106
107 #define RTE_STOP_SEC_VAR_CLEARED_32_NO_CACHEABLE
108 #include "Rte_MemMap.h"
109 /*==================================================================================================
110 * GLOBAL CONSTANTS
111 ==================================================================================================*/
112
113
114 /*==================================================================================================
115 * GLOBAL VARIABLES
116 ==================================================================================================*/
117
118 /*==================================================================================================
119 * LOCAL FUNCTION PROTOTYPES
120 ==================================================================================================*/
121
122 #ifndef _COSMIC_C_S32K3XX_
123 /*================================================================================================*/
124 /**
125 * @brief This function returns the MSR register value (32 bits).
126 * @details This function returns the MSR register value (32 bits).
127 *
128 * @param[in] void No input parameters
129 * @return uint32 msr This function returns the MSR register value (32 bits).
130 *
131 * @pre None
132 * @post None
133 *
134 */
135 uint32 Dio_schm_read_msr(void);
136 #endif /*ifndef _COSMIC_C_S32K3XX_*/
137 /*==================================================================================================
138 * LOCAL FUNCTIONS
139 ==================================================================================================*/
140 #define RTE_START_SEC_CODE
141 #include "Rte_MemMap.h"
142
143 #if (defined(_GREENHILLS_C_S32K3XX_) || defined(_CODEWARRIOR_C_S32K3XX_))
144 /*================================================================================================*/
145 /**
146 * @brief This macro returns the MSR register value (32 bits).
147 * @details This macro function implementation returns the MSR register value in r3 (32 bits).
148 *
149 * @pre None
150 * @post None
151 *
152 */
153 #ifdef MCAL_PLATFORM_ARM
154 #if (MCAL_PLATFORM_ARM == MCAL_ARM_AARCH64)
Dio_schm_read_msr(void)155 ASM_KEYWORD uint32 Dio_schm_read_msr(void)
156 {
157 mrs x0, S3_3_c4_c2_1
158 }
159 #elif (MCAL_PLATFORM_ARM == MCAL_ARM_RARCH)
Dio_schm_read_msr(void)160 ASM_KEYWORD uint32 Dio_schm_read_msr(void)
161 {
162 mrs r0, CPSR
163 }
164 #else
Dio_schm_read_msr(void)165 ASM_KEYWORD uint32 Dio_schm_read_msr(void)
166 {
167 #if ((defined MCAL_ENABLE_USER_MODE_SUPPORT)&&(!defined MCAL_PLATFORM_ARM_M0PLUS))
168 mrs r0, BASEPRI
169 #else
170 mrs r0, PRIMASK
171 #endif
172 }
173 #endif
174 #else
175 #ifdef MCAL_PLATFORM_S12
Dio_schm_read_msr(void)176 ASM_KEYWORD uint32 Dio_schm_read_msr(void)
177 {
178 tfr ccr, d6
179 }
180 #else
Dio_schm_read_msr(void)181 ASM_KEYWORD uint32 Dio_schm_read_msr(void)
182 {
183 mfmsr r3
184 }
185 #endif
186 #endif
187 #endif /*#ifdef GHS||CW*/
188
189 #ifdef _DIABDATA_C_S32K3XX_
190 /**
191 * @brief This function returns the MSR register value (32 bits).
192 * @details This function returns the MSR register value (32 bits).
193 *
194 * @param[in] void No input parameters
195 * @return uint32 msr This function returns the MSR register value (32 bits).
196 *
197 * @pre None
198 * @post None
199 *
200 */
201 #ifdef MCAL_PLATFORM_ARM
Dio_schm_read_msr(void)202 uint32 Dio_schm_read_msr(void)
203 {
204 register uint32 reg_tmp;
205 #if (MCAL_PLATFORM_ARM == MCAL_ARM_AARCH64)
206 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) );
207 #elif (MCAL_PLATFORM_ARM == MCAL_ARM_RARCH)
208 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) );
209 #else
210 #if ((defined MCAL_ENABLE_USER_MODE_SUPPORT)&&(!defined MCAL_PLATFORM_ARM_M0PLUS))
211 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) );
212 #else
213 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) );
214 #endif
215 #endif
216 return (uint32)reg_tmp;
217 }
218 #else
Dio_schm_read_msr(void)219 ASM_KEYWORD uint32 Dio_schm_read_msr(void)
220 {
221 mfmsr r3
222 }
223 #endif /* MCAL_PLATFORM_ARM */
224
225 #endif /* _DIABDATA_C_S32K3XX_*/
226
227 #ifdef _COSMIC_C_S32K3XX_
228 /*================================================================================================*/
229 /**
230 * @brief This function returns the MSR register value (32 bits).
231 * @details This function returns the MSR register value (32 bits).
232 *
233 * @param[in] void No input parameters
234 * @return uint32 msr This function returns the MSR register value (32 bits).
235 *
236 * @pre None
237 * @post None
238 *
239 */
240
241 #ifdef MCAL_PLATFORM_S12
242 #define Dio_schm_read_msr() ASM_KEYWORD("tfr ccr, d6")
243 #else
244 #define Dio_schm_read_msr() ASM_KEYWORD("mfmsr r3")
245 #endif
246
247 #endif /*Cosmic compiler only*/
248
249
250 #ifdef _HITECH_C_S32K3XX_
251 /*================================================================================================*/
252 /**
253 * @brief This function returns the MSR register value (32 bits).
254 * @details This function returns the MSR register value (32 bits).
255 *
256 * @param[in] void No input parameters
257 * @return uint32 msr This function returns the MSR register value (32 bits).
258 *
259 * @pre None
260 * @post None
261 *
262 */
Dio_schm_read_msr(void)263 uint32 Dio_schm_read_msr(void)
264 {
265 uint32 result;
266 __asm volatile("mfmsr %0" : "=r" (result) :);
267 return result;
268 }
269
270 #endif /*HighTec compiler only*/
271 /*================================================================================================*/
272 #ifdef _LINARO_C_S32K3XX_
273 /**
274 * @brief This function returns the MSR register value (32 bits).
275 * @details This function returns the MSR register value (32 bits).
276 *
277 * @param[in] void No input parameters
278 * @return uint32 msr This function returns the MSR register value (32 bits).
279 *
280 * @pre None
281 * @post None
282 *
283 */
Dio_schm_read_msr(void)284 uint32 Dio_schm_read_msr(void)
285 {
286 register uint32 reg_tmp;
287 #if (MCAL_PLATFORM_ARM == MCAL_ARM_AARCH64)
288 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) );
289 #elif (MCAL_PLATFORM_ARM == MCAL_ARM_RARCH)
290 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) );
291 #else
292 #if ((defined MCAL_ENABLE_USER_MODE_SUPPORT)&&(!defined MCAL_PLATFORM_ARM_M0PLUS))
293 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) );
294 #else
295 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) );
296 #endif
297 #endif
298 return (uint32)reg_tmp;
299 }
300 #endif /* _LINARO_C_S32K3XX_*/
301 /*================================================================================================*/
302
303 #ifdef _ARM_DS5_C_S32K3XX_
304 /**
305 * @brief This function returns the MSR register value (32 bits).
306 * @details This function returns the MSR register value (32 bits).
307 *
308 * @param[in] void No input parameters
309 * @return uint32 msr This function returns the MSR register value (32 bits).
310 *
311 * @pre None
312 * @post None
313 *
314 */
Dio_schm_read_msr(void)315 uint32 Dio_schm_read_msr(void)
316 {
317 register uint32 reg_tmp;
318 #if (MCAL_PLATFORM_ARM == MCAL_ARM_AARCH64)
319 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) );
320 #elif (MCAL_PLATFORM_ARM == MCAL_ARM_RARCH)
321 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) );
322 #else
323 #if ((defined MCAL_ENABLE_USER_MODE_SUPPORT)&&(!defined MCAL_PLATFORM_ARM_M0PLUS))
324 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) );
325 #else
326 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) );
327 #endif
328 #endif
329 return (uint32)reg_tmp;
330 }
331 #endif /* _ARM_DS5_C_S32K3XX_ */
332
333 #ifdef _IAR_C_S32K3XX_
334 /**
335 * @brief This function returns the MSR register value (32 bits).
336 * @details This function returns the MSR register value (32 bits).
337 *
338 * @param[in] void No input parameters
339 * @return uint32 msr This function returns the MSR register value (32 bits).
340 *
341 * @pre None
342 * @post None
343 *
344 */
Dio_schm_read_msr(void)345 uint32 Dio_schm_read_msr(void)
346 {
347 register uint32 reg_tmp;
348
349 #if ((defined MCAL_ENABLE_USER_MODE_SUPPORT)&&(!defined MCAL_PLATFORM_ARM_M0PLUS))
350 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) );
351 #else
352 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) );
353 #endif
354
355 return (uint32)reg_tmp;
356 }
357 #endif /* _IAR_C_S32K3XX_ */
358
359 #define RTE_STOP_SEC_CODE
360 #include "Rte_MemMap.h"
361
362 /*==================================================================================================
363 * GLOBAL FUNCTIONS
364 ==================================================================================================*/
365 #define RTE_START_SEC_CODE
366 #include "Rte_MemMap.h"
367
SchM_Enter_Dio_DIO_EXCLUSIVE_AREA_00(void)368 void SchM_Enter_Dio_DIO_EXCLUSIVE_AREA_00(void)
369 {
370 uint32 msr;
371 uint32 u32CoreId = (uint32)OsIf_GetCoreID();
372
373 if(0UL == reentry_guard_DIO_EXCLUSIVE_AREA_00[u32CoreId])
374 {
375 #if (defined MCAL_ENABLE_USER_MODE_SUPPORT)
376 msr = OsIf_Trusted_Call_Return(Dio_schm_read_msr);
377 #else
378 msr = Dio_schm_read_msr(); /*read MSR (to store interrupts state)*/
379 #endif /* MCAL_ENABLE_USER_MODE_SUPPORT */
380 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/
381 {
382 OsIf_SuspendAllInterrupts();
383 #ifdef _ARM_DS5_C_S32K3XX_
384 ASM_KEYWORD(" nop ");/* Compiler fix - forces the CSPID instruction to be generated with -02, -Ospace are selected*/
385 #endif
386 }
387 msr_DIO_EXCLUSIVE_AREA_00[u32CoreId] = msr;
388 }
389 reentry_guard_DIO_EXCLUSIVE_AREA_00[u32CoreId]++;
390 }
391
SchM_Exit_Dio_DIO_EXCLUSIVE_AREA_00(void)392 void SchM_Exit_Dio_DIO_EXCLUSIVE_AREA_00(void)
393 {
394 uint32 u32CoreId = (uint32)OsIf_GetCoreID();
395
396 reentry_guard_DIO_EXCLUSIVE_AREA_00[u32CoreId]--;
397 if ((ISR_ON(msr_DIO_EXCLUSIVE_AREA_00[u32CoreId]))&&(0UL == reentry_guard_DIO_EXCLUSIVE_AREA_00[u32CoreId])) /*if interrupts were enabled*/
398 {
399 OsIf_ResumeAllInterrupts();
400 #ifdef _ARM_DS5_C_S32K3XX_
401 ASM_KEYWORD(" nop ");/* Compiler fix - forces the CSPID instruction to be generated with -02, -Ospace are selected*/
402 #endif
403 }
404 }
405
SchM_Enter_Dio_DIO_EXCLUSIVE_AREA_01(void)406 void SchM_Enter_Dio_DIO_EXCLUSIVE_AREA_01(void)
407 {
408 uint32 msr;
409 uint32 u32CoreId = (uint32)OsIf_GetCoreID();
410
411 if(0UL == reentry_guard_DIO_EXCLUSIVE_AREA_01[u32CoreId])
412 {
413 #if (defined MCAL_ENABLE_USER_MODE_SUPPORT)
414 msr = OsIf_Trusted_Call_Return(Dio_schm_read_msr);
415 #else
416 msr = Dio_schm_read_msr(); /*read MSR (to store interrupts state)*/
417 #endif /* MCAL_ENABLE_USER_MODE_SUPPORT */
418 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/
419 {
420 OsIf_SuspendAllInterrupts();
421 #ifdef _ARM_DS5_C_S32K3XX_
422 ASM_KEYWORD(" nop ");/* Compiler fix - forces the CSPID instruction to be generated with -02, -Ospace are selected*/
423 #endif
424 }
425 msr_DIO_EXCLUSIVE_AREA_01[u32CoreId] = msr;
426 }
427 reentry_guard_DIO_EXCLUSIVE_AREA_01[u32CoreId]++;
428 }
429
SchM_Exit_Dio_DIO_EXCLUSIVE_AREA_01(void)430 void SchM_Exit_Dio_DIO_EXCLUSIVE_AREA_01(void)
431 {
432 uint32 u32CoreId = (uint32)OsIf_GetCoreID();
433
434 reentry_guard_DIO_EXCLUSIVE_AREA_01[u32CoreId]--;
435 if ((ISR_ON(msr_DIO_EXCLUSIVE_AREA_01[u32CoreId]))&&(0UL == reentry_guard_DIO_EXCLUSIVE_AREA_01[u32CoreId])) /*if interrupts were enabled*/
436 {
437 OsIf_ResumeAllInterrupts();
438 #ifdef _ARM_DS5_C_S32K3XX_
439 ASM_KEYWORD(" nop ");/* Compiler fix - forces the CSPID instruction to be generated with -02, -Ospace are selected*/
440 #endif
441 }
442 }
443
444
445 #ifdef MCAL_TESTING_ENVIRONMENT
446 /**
447 @brief This function checks that all entered exclusive areas were also exited.
448 @details This function checks that all entered exclusive areas were also exited. The check
449 is done by verifying that all reentry_guard_* static variables are back to the
450 zero value.
451
452 @param[in] void No input parameters
453 @return void This function does not return a value. Test asserts are used instead.
454
455 @pre None
456 @post None
457
458 @remarks Covers
459 @remarks Implements
460 */
SchM_Check_dio(void)461 void SchM_Check_dio(void)
462 {
463 uint32 u32CoreId = (uint32)OsIf_GetCoreID();
464
465 EU_ASSERT(0UL == reentry_guard_DIO_EXCLUSIVE_AREA_00[u32CoreId]);
466 reentry_guard_DIO_EXCLUSIVE_AREA_00[u32CoreId] = 0UL; /*reset reentry_guard_DIO_EXCLUSIVE_AREA_00 for the next test in the suite*/
467
468 EU_ASSERT(0UL == reentry_guard_DIO_EXCLUSIVE_AREA_01[u32CoreId]);
469 reentry_guard_DIO_EXCLUSIVE_AREA_01[u32CoreId] = 0UL; /*reset reentry_guard_DIO_EXCLUSIVE_AREA_01 for the next test in the suite*/
470
471
472 }
473 #endif /*MCAL_TESTING_ENVIRONMENT*/
474
475 #define RTE_STOP_SEC_CODE
476 #include "Rte_MemMap.h"
477
478 #ifdef __cplusplus
479 }
480 #endif
481
482 /** @} */
483
