1 /*
2 * Copyright 2020-2023 NXP
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 /**
8 * @file
9 *
10 * @addtogroup siul2_icu_ip SIUL2 IPL
11 * @{
12 */
13
14 #ifdef __cplusplus
15 extern "C"{
16 #endif
17
18 /*==================================================================================================
19 * INCLUDE FILES
20 ==================================================================================================*/
21 #include "Siul2_Icu_Ip.h"
22 #include "OsIf.h"
23
24 #if (STD_ON == SIUL2_ICU_IP_USED)
25 #if(SIUL2_ICU_IP_DEV_ERROR_DETECT == STD_ON)
26 #include "Devassert.h"
27 #endif
28
29 #if (STD_ON == SIUL2_ICU_IP_ENABLE_USER_MODE_SUPPORT)
30 #define USER_MODE_REG_PROT_ENABLED (SIUL2_ICU_IP_ENABLE_USER_MODE_SUPPORT)
31 #include "RegLockMacros.h"
32 #endif
33 #endif /* SIUL2_ICU_IP_USED */
34 /*==================================================================================================
35 * SOURCE FILE VERSION INFORMATION
36 ==================================================================================================*/
37 #define SIUL2_ICU_IP_VENDOR_ID_C 43
38 #define SIUL2_ICU_IP_AR_RELEASE_MAJOR_VERSION_C 4
39 #define SIUL2_ICU_IP_AR_RELEASE_MINOR_VERSION_C 7
40 #define SIUL2_ICU_IP_AR_RELEASE_REVISION_VERSION_C 0
41 #define SIUL2_ICU_IP_SW_MAJOR_VERSION_C 3
42 #define SIUL2_ICU_IP_SW_MINOR_VERSION_C 0
43 #define SIUL2_ICU_IP_SW_PATCH_VERSION_C 0
44
45 /*==================================================================================================
46 * FILE VERSION CHECKS
47 ==================================================================================================*/
48 #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK
49 #if (STD_ON == SIUL2_ICU_IP_USED)
50 #if (STD_ON == SIUL2_ICU_IP_ENABLE_USER_MODE_SUPPORT)
51 /* Check if header file and RegLockMacros.h file are of the same Autosar version */
52 #if ((SIUL2_ICU_IP_AR_RELEASE_MAJOR_VERSION_C != REGLOCKMACROS_AR_RELEASE_MAJOR_VERSION) || \
53 (SIUL2_ICU_IP_AR_RELEASE_MINOR_VERSION_C != REGLOCKMACROS_AR_RELEASE_MINOR_VERSION))
54 #error "AutoSar Version Numbers of Siul2_Icu_Ip.c and RegLockMacros.h are different"
55 #endif
56 #endif
57 #endif /* SIUL2_ICU_IP_USED */
58
59 /* Check if this header file and OsIf.h file are of the same Autosar version */
60 #if ((SIUL2_ICU_IP_AR_RELEASE_MAJOR_VERSION_C != OSIF_AR_RELEASE_MAJOR_VERSION) || \
61 (SIUL2_ICU_IP_AR_RELEASE_MINOR_VERSION_C != OSIF_AR_RELEASE_MINOR_VERSION))
62 #error "AutoSar Version Numbers of Siul2_Icu_Ip.c and OsIf.h are different"
63 #endif
64
65 #if (STD_ON == SIUL2_ICU_IP_USED)
66 #if(SIUL2_ICU_IP_DEV_ERROR_DETECT == STD_ON)
67 /* Check if this header file and Devassert.h file are of the same Autosar version */
68 #if ((SIUL2_ICU_IP_AR_RELEASE_MAJOR_VERSION_C != DEVASSERT_AR_RELEASE_MAJOR_VERSION) || \
69 (SIUL2_ICU_IP_AR_RELEASE_MINOR_VERSION_C != DEVASSERT_AR_RELEASE_MINOR_VERSION))
70 #error "AutoSar Version Numbers of Siul2_Icu_Ip.c and Devassert.h are different"
71 #endif
72 #endif
73 #endif /* SIUL2_ICU_IP_USED */
74 #endif
75
76 /* Check if source file and ICU header file are of the same vendor */
77 #if (SIUL2_ICU_IP_VENDOR_ID_C != SIUL2_ICU_IP_VENDOR_ID)
78 #error "Siul2_Icu_Ip.c and Siul2_Icu_Ip.h have different vendor IDs"
79 #endif
80 /* Check if source file and ICU header file are of the same AutoSar version */
81 #if ((SIUL2_ICU_IP_AR_RELEASE_MAJOR_VERSION_C != SIUL2_ICU_IP_AR_RELEASE_MAJOR_VERSION) || \
82 (SIUL2_ICU_IP_AR_RELEASE_MINOR_VERSION_C != SIUL2_ICU_IP_AR_RELEASE_MINOR_VERSION) || \
83 (SIUL2_ICU_IP_AR_RELEASE_REVISION_VERSION_C != SIUL2_ICU_IP_AR_RELEASE_REVISION_VERSION))
84 #error "AutoSar Version Numbers of Siul2_Icu_Ip.c and Siul2_Icu_Ip.h are different"
85 #endif
86 /* Check if source file and ICU header file are of the same Software version */
87 #if ((SIUL2_ICU_IP_SW_MAJOR_VERSION_C != SIUL2_ICU_IP_SW_MAJOR_VERSION) || \
88 (SIUL2_ICU_IP_SW_MINOR_VERSION_C != SIUL2_ICU_IP_SW_MINOR_VERSION) || \
89 (SIUL2_ICU_IP_SW_PATCH_VERSION_C != SIUL2_ICU_IP_SW_PATCH_VERSION))
90 #error "Software Version Numbers of Siul2_Icu_Ip.c and Siul2_Icu_Ip.h are different"
91 #endif
92
93
94 /*==================================================================================================
95 * CONSTANTS
96 ==================================================================================================*/
97
98 /*==================================================================================================
99 * GLOBAL CONSTANTS
100 ==================================================================================================*/
101 #if (STD_ON == SIUL2_ICU_IP_USED)
102
103 #define ICU_START_SEC_CONST_UNSPECIFIED
104 #include "Icu_MemMap.h"
105
106 /* Table of base addresses for SUIL2 instances. */
107 SIUL2_Type * const Siul2_Icu_Ip_pBase[] = SIUL2_ICU_IP_BASE_PTRS;
108
109 #define ICU_STOP_SEC_CONST_UNSPECIFIED
110 #include "Icu_MemMap.h"
111
112 /*==================================================================================================
113 * LOCAL VARIABLE DECLARATIONS
114 ==================================================================================================*/
115 #define ICU_START_SEC_VAR_CLEARED_UNSPECIFIED
116 #include "Icu_MemMap.h"
117
118 /* Store channel state for each SIUL2. */
119 Siul2_Icu_Ip_State Siul2_Icu_Ip_aChannelState[SIUL2_ICU_IP_NUM_OF_CHANNELS_USED];
120
121 #if (SIUL2_ICU_IP_DUAL_CLOCK_MODE_API == STD_ON)
122 static Siul2_Icu_Ip_InstanceConfigType Siul2_Icu_Ip_aInstanceConfiguration[SIUL2_ICU_IP_NUM_OF_INSTANCES];
123 #endif
124
125 #define ICU_STOP_SEC_VAR_CLEARED_UNSPECIFIED
126 #include "Icu_MemMap.h"
127
128 #define ICU_START_SEC_VAR_INIT_8
129 #include "Icu_MemMap.h"
130 /* This array stores the positions in the Siul2_Icu_Ip_aChannelState array of the configured Siul2 channels. */
131 uint8 Siul2_Icu_Ip_IndexInChState[SIUL2_ICU_IP_NUM_OF_INSTANCES][SIUL2_ICU_IP_NUM_OF_CHANNELS] = SIUL2_ICU_IP_INITIAL_INDEX_OF_CHANNELS;
132 #define ICU_STOP_SEC_VAR_INIT_8
133 #include "Icu_MemMap.h"
134
135 /*==================================================================================================
136 * DEFINES AND MACROS
137 ==================================================================================================*/
138
139 /*==================================================================================================
140 * ENUMS
141 ==================================================================================================*/
142
143 /*==================================================================================================
144 * STRUCTURES AND OTHER TYPEDEFS
145 ==================================================================================================*/
146
147 /*==================================================================================================
148 * LOCAL FUNCTION PROTOTYPES
149 ==================================================================================================*/
150 #define ICU_START_SEC_CODE
151 #include "Icu_MemMap.h"
152
153 #if (STD_ON == SIUL2_ICU_IP_ENABLE_USER_MODE_SUPPORT)
154 void Siul2_Icu_SetUserAccessAllowed(uint32 siul2BaseAddr);
155 #endif
156
157 #if (STD_ON == SIUL2_ICU_IP_ENABLE_USER_MODE_SUPPORT)
158 #if (defined (MCAL_SIUL2_AE_REG_PROT_AVAILABLE))
159 #if (STD_ON == MCAL_SIUL2_AE_REG_PROT_AVAILABLE)
160 #define Call_Siul2_Icu_SetUserAccessAllowed(BaseAddr) OsIf_Trusted_Call1param(Siul2_Icu_SetUserAccessAllowed,(BaseAddr))
161 #else
162 #define Call_Siul2_Icu_SetUserAccessAllowed(BaseAddr)
163 #endif
164 #elif (defined (MCAL_SIUL2_REG_PROT_AVAILABLE))
165 #if (STD_ON == MCAL_SIUL2_REG_PROT_AVAILABLE)
166 #define Call_Siul2_Icu_SetUserAccessAllowed(BaseAddr) OsIf_Trusted_Call1param(Siul2_Icu_SetUserAccessAllowed,(BaseAddr))
167 #else
168 #define Call_Siul2_Icu_SetUserAccessAllowed(BaseAddr)
169 #endif
170 #else
171 #define Call_Siul2_Icu_SetUserAccessAllowed(BaseAddr)
172 #endif
173
174 #else
175 #define Call_Siul2_Icu_SetUserAccessAllowed(BaseAddr)
176 #endif
177
178 /*==================================================================================================
179 * LOCAL FUNCTIONS
180 ==================================================================================================*/
Siul2_Icu_Ip_ConfigIntFilterClock(uint8 instance,uint8 prescaler)181 static inline void Siul2_Icu_Ip_ConfigIntFilterClock(uint8 instance, uint8 prescaler)
182 {
183 (Siul2_Icu_Ip_pBase[instance])->IFCPR = (uint32)prescaler & SIUL2_IFCPR_IFCP_MASK;
184 }
185
186 #if (STD_ON == SIUL2_ICU_IP_ENABLE_USER_MODE_SUPPORT)
187 /**
188 * @brief Enables SIUL2 registers writing in User Mode by configuring REG_PROT
189 * @details Sets the UAA (User Access Allowed) bit of the SIUL2 IP allowing SIUL2 registers writing in User Mode
190 *
191 * @param[in] siul2BaseAddr
192 *
193 * @return none
194 * @pre Should be executed in supervisor mode
195 */
Siul2_Icu_SetUserAccessAllowed(uint32 siul2BaseAddr)196 void Siul2_Icu_SetUserAccessAllowed(uint32 siul2BaseAddr)
197 {
198 #if defined(SIUL2_ICU_AE_REG_PROT_AVAILABLE)
199 SET_USER_ACCESS_ALLOWED((uint32)siul2BaseAddr, SIUL2_AE_PROT_MEM_U32);
200 #else
201 SET_USER_ACCESS_ALLOWED((uint32)siul2BaseAddr, SIUL2_PROT_MEM_U32);
202 #endif /* SIUL2_ICU_AE_REG_PROT_AVAILABLE */
203 }
204
205 #endif /* STD_ON == SIUL2_ICU_IP_ENABLE_USER_MODE_SUPPORT */
206
207 /*==================================================================================================
208 * FUNCTION PROTOTYPES
209 ==================================================================================================*/
210
211 /*==================================================================================================
212 * GLOBAL FUNCTIONS
213 ==================================================================================================*/
214 #if (SIUL2_ICU_IP_DEINIT_API == STD_ON)
215 /** @implements Siul2_Icu_Ip_DeInit_Activity **/
Siul2_Icu_Ip_DeInit(uint8 instance)216 Siul2_Icu_Ip_StatusType Siul2_Icu_Ip_DeInit(uint8 instance)
217 {
218 SIUL2_Type* base;
219 uint8 hwChannel;
220 Siul2_Icu_Ip_StatusType status;
221
222 #if(SIUL2_ICU_IP_DEV_ERROR_DETECT == STD_ON)
223 DevAssert(instance < SIUL2_ICU_IP_NUM_OF_INSTANCES);
224 #endif
225 base = Siul2_Icu_Ip_pBase[instance];
226
227 /* Clear all channels used */
228 for(hwChannel = 0; hwChannel < (uint8)SIUL2_ICU_IP_NUM_OF_CHANNELS; hwChannel++)
229 {
230 status = SIUL2_ICU_IP_ERROR;
231 if (Siul2_Icu_Ip_IndexInChState[instance][hwChannel] < SIUL2_ICU_IP_NUM_OF_CHANNELS_USED)
232 {
233 if(TRUE == Siul2_Icu_Ip_aChannelState[Siul2_Icu_Ip_IndexInChState[instance][hwChannel]].chInit)
234 {
235 /* Disable IRQ Interrupt */
236 Siul2_Icu_Ip_DisableInterrupt (instance, hwChannel);
237 /* Clear edge event enable registers */
238 base->IREER0 &= ~((uint32)1U << hwChannel);
239 base->IFEER0 &= ~((uint32)1U << hwChannel);
240 /* Clear Interrupt Filter Enable Register */
241 base->IFER0 &= ~((uint32)1U << hwChannel);
242 /* Clear Interrupt Filter Clock Prescaler Register */
243 base->IFMCR[hwChannel] = 0x0U;
244
245 Siul2_Icu_Ip_aChannelState[Siul2_Icu_Ip_IndexInChState[instance][hwChannel]].chInit = FALSE;
246 Siul2_Icu_Ip_aChannelState[Siul2_Icu_Ip_IndexInChState[instance][hwChannel]].callback = NULL_PTR;
247 Siul2_Icu_Ip_aChannelState[Siul2_Icu_Ip_IndexInChState[instance][hwChannel]].callbackParam = 0U;
248 Siul2_Icu_Ip_aChannelState[Siul2_Icu_Ip_IndexInChState[instance][hwChannel]].Siul2ChannelNotification = NULL_PTR;
249 status = SIUL2_ICU_IP_SUCCESS;
250 }
251 }
252 if(SIUL2_ICU_IP_SUCCESS == status)
253 {
254 /* Clear Interrupt Filter Clock Prescaler Register */
255 Siul2_Icu_Ip_ConfigIntFilterClock(instance, (uint8)0x0U);
256 }
257 }
258
259 #if (SIUL2_ICU_IP_DUAL_CLOCK_MODE_API == STD_ON)
260 Siul2_Icu_Ip_aInstanceConfiguration[instance].intFilterClk = 0x0U;
261 Siul2_Icu_Ip_aInstanceConfiguration[instance].altIntFilterClk = 0x0U;
262 #endif
263
264 return status;
265 }
266 #endif /* SIUL2_ICU_IP_DEINIT_API == STD_ON */
267
268 /** @implements Siul2_Icu_Ip_Init_Activity **/
Siul2_Icu_Ip_Init(uint8 instance,const Siul2_Icu_Ip_ConfigType * userConfig)269 Siul2_Icu_Ip_StatusType Siul2_Icu_Ip_Init(uint8 instance, const Siul2_Icu_Ip_ConfigType* userConfig)
270 {
271 SIUL2_Type* base;
272 uint32 pinIntValue;
273 uint8 hwChannel;
274 uint8 index;
275
276 #if(SIUL2_ICU_IP_DEV_ERROR_DETECT == STD_ON)
277 DevAssert(userConfig->numChannels <= (uint8)SIUL2_ICU_IP_NUM_OF_CHANNELS);
278 DevAssert(instance < SIUL2_ICU_IP_NUM_OF_INSTANCES);
279 #endif
280 base = Siul2_Icu_Ip_pBase[instance];
281
282 /* Call user acces mode if it is enabled. */
283 #ifdef SIUL2_ICU_AE_REG_PROT_AVAILABLE
284 if (instance >= SIUL2_ICU_AE_MIN_INSTANCE)
285 {
286 #endif
287 Call_Siul2_Icu_SetUserAccessAllowed((uint32)Siul2_Icu_Ip_pBase[instance]);
288 #ifdef SIUL2_ICU_AE_REG_PROT_AVAILABLE
289 }
290 #endif
291
292 /* Global IP configuration */
293 Siul2_Icu_Ip_ConfigIntFilterClock(instance, userConfig->pInstanceConfig->intFilterClk);
294
295 #if (SIUL2_ICU_IP_DUAL_CLOCK_MODE_API == STD_ON)
296 Siul2_Icu_Ip_aInstanceConfiguration[instance].intFilterClk = userConfig->pInstanceConfig->intFilterClk;
297 Siul2_Icu_Ip_aInstanceConfiguration[instance].altIntFilterClk = userConfig->pInstanceConfig->altIntFilterClk;
298 #endif
299
300 for(index=0; index < userConfig->numChannels; index++)
301 {
302 hwChannel = (*userConfig->pChannelsConfig)[index].hwChannel;
303 /* Get the appropriate value follow index of pin interrupt */
304 pinIntValue = (1UL << hwChannel);
305 /* Save in state structure the callback information */
306 Siul2_Icu_Ip_aChannelState[Siul2_Icu_Ip_IndexInChState[instance][hwChannel]].callback = (*userConfig->pChannelsConfig)[index].callback;
307 Siul2_Icu_Ip_aChannelState[Siul2_Icu_Ip_IndexInChState[instance][hwChannel]].callbackParam = (*userConfig->pChannelsConfig)[index].callbackParam;
308 Siul2_Icu_Ip_aChannelState[Siul2_Icu_Ip_IndexInChState[instance][hwChannel]].Siul2ChannelNotification = (*userConfig->pChannelsConfig)[index].Siul2ChannelNotification;
309 /* External interrupt initialization */
310 if ((*userConfig->pChannelsConfig)[index].intEdgeSel != SIUL2_ICU_DISABLE)
311 {
312 /* Set maximum interrupt filter counter value */
313 base->IFMCR[hwChannel] = (uint32)((uint32)(*userConfig->pChannelsConfig)[index].maxFilterCnt & (uint32)SIUL2_IFMCR_MAXCNT_MASK);
314 /* Setting the appropriate IFEn bits in IFER0 */
315 if ( TRUE == (*userConfig->pChannelsConfig)[index].digFilterEn)
316 {
317 base->IFER0 |= pinIntValue;
318 }
319 else
320 {
321 base->IFER0 &= ~pinIntValue;
322 }
323
324 /* Setting the appropriate IREEn bits in IREER0 */
325 if (((*userConfig->pChannelsConfig)[index].intEdgeSel == SIUL2_ICU_RISING_EDGE) ||
326 ((*userConfig->pChannelsConfig)[index].intEdgeSel == SIUL2_ICU_BOTH_EDGES))
327 {
328 base->IREER0 |= pinIntValue;
329 }
330 else
331 {
332 base->IREER0 &= ~pinIntValue;
333 }
334 /* Setting the appropriate IREEn bits in IFEER0 */
335 if (((*userConfig->pChannelsConfig)[index].intEdgeSel == SIUL2_ICU_FALLING_EDGE) ||
336 ((*userConfig->pChannelsConfig)[index].intEdgeSel == SIUL2_ICU_BOTH_EDGES))
337 {
338 base->IFEER0 |= pinIntValue;
339 }
340 else
341 {
342 base->IFEER0 &= ~pinIntValue;
343 }
344
345 /* Select the request desired between DMA or Interrupt */
346 if (SIUL2_ICU_DMA == (*userConfig->pChannelsConfig)[index].intSel)
347 {
348 base->DIRSR0 |= pinIntValue;
349 }
350 else
351 {
352 base->DIRSR0 &= ~pinIntValue;
353 }
354
355 /* Write to EIFn bits in DISR0 to clear any flags */
356 base->DISR0 |= pinIntValue;
357 }
358
359 /* Mask interrupts by clearing the EIREn bits in DIRER0 */
360 base->DIRER0 &= ~pinIntValue;
361 Siul2_Icu_Ip_aChannelState[Siul2_Icu_Ip_IndexInChState[instance][hwChannel]].chInit = TRUE;
362 }
363
364 return SIUL2_ICU_IP_SUCCESS;
365 }
366
367 /** @implements Siul2_Icu_Ip_SetActivationCondition_Activity */
Siul2_Icu_Ip_SetActivationCondition(uint8 instance,uint8 hwChannel,Siul2_Icu_Ip_EdgeType edge)368 void Siul2_Icu_Ip_SetActivationCondition(uint8 instance, uint8 hwChannel, Siul2_Icu_Ip_EdgeType edge)
369 {
370 SIUL2_Type* base;
371 uint32 pinIntValue;
372
373 #if(SIUL2_ICU_IP_DEV_ERROR_DETECT == STD_ON)
374 DevAssert(hwChannel < (uint8)SIUL2_ICU_IP_NUM_OF_CHANNELS);
375 DevAssert(instance < SIUL2_ICU_IP_NUM_OF_INSTANCES);
376 #endif
377
378 base = Siul2_Icu_Ip_pBase[instance];
379 /* Get the appropriate value follow index of pin interrupt */
380 pinIntValue = (1UL << hwChannel);
381
382 /* Setting the appropriate IREEn bits in IREER0 */
383 if ((edge == SIUL2_ICU_RISING_EDGE) || (edge == SIUL2_ICU_BOTH_EDGES))
384 {
385 base->IREER0 |= pinIntValue;
386 }
387 else
388 {
389 base->IREER0 &= ~pinIntValue;
390 }
391 /* Setting the appropriate IREEn bits in IFEER0 */
392 if ((edge == SIUL2_ICU_FALLING_EDGE) || (edge == SIUL2_ICU_BOTH_EDGES))
393 {
394 base->IFEER0 |= pinIntValue;
395 }
396 else
397 {
398 base->IFEER0 &= ~pinIntValue;
399 }
400 }
401
402 #if (SIUL2_ICU_IP_GET_INPUT_STATE_API == STD_ON)
403 /** @implements Siul2_Icu_Ip_GetInputState_Activity */
Siul2_Icu_Ip_GetInputState(uint8 instance,uint8 hwChannel)404 boolean Siul2_Icu_Ip_GetInputState(uint8 instance, uint8 hwChannel)
405 {
406 uint32 flag;
407 uint32 irqEnable;
408 boolean bStatus = FALSE;
409
410 #if(SIUL2_ICU_IP_DEV_ERROR_DETECT == STD_ON)
411 DevAssert(instance < SIUL2_ICU_IP_NUM_OF_INSTANCES);
412 DevAssert(hwChannel < SIUL2_ICU_IP_NUM_OF_CHANNELS);
413 #endif
414
415 flag = (Siul2_Icu_Ip_pBase[instance])->DISR0 & ((uint32)1U << hwChannel);
416 irqEnable = (Siul2_Icu_Ip_pBase[instance])->DIRER0 & ((uint32)1U << hwChannel);
417
418 /* Interrupt condition activated (ISR), interrupt not enabled (IRER) */
419 if ( (0x0U != flag) && (0x0U == irqEnable) )
420 {
421 /* Clear IRQ Flag */
422 (Siul2_Icu_Ip_pBase[instance])->DISR0 = flag;
423 bStatus = TRUE;
424 }
425
426 return bStatus;
427 }
428 #endif /* SIUL2_ICU_IP_GET_INPUT_STATE_API */
429
430 #if (SIUL2_ICU_IP_DUAL_CLOCK_MODE_API == STD_ON)
431 /** @implements Siul2_Icu_Ip_SetClockMode_Activity */
Siul2_Icu_Ip_SetClockMode(uint8 instance,Siul2_Icu_Ip_ClockModeType mode)432 void Siul2_Icu_Ip_SetClockMode(uint8 instance, Siul2_Icu_Ip_ClockModeType mode)
433 {
434 #if(SIUL2_ICU_IP_DEV_ERROR_DETECT == STD_ON)
435 DevAssert(instance < SIUL2_ICU_IP_NUM_OF_INSTANCES);
436 #endif
437
438 if(SIUL2_ICU_NORMAL_CLK == mode)
439 {
440 Siul2_Icu_Ip_ConfigIntFilterClock(instance, Siul2_Icu_Ip_aInstanceConfiguration[instance].intFilterClk);
441 }
442 else
443 {
444 Siul2_Icu_Ip_ConfigIntFilterClock(instance, Siul2_Icu_Ip_aInstanceConfiguration[instance].altIntFilterClk);
445 }
446 }
447 #endif
448
449 /** @implements Siul2_Icu_Ip_EnableInterrupt_Activity **/
Siul2_Icu_Ip_EnableInterrupt(uint8 instance,uint8 hwChannel)450 void Siul2_Icu_Ip_EnableInterrupt(uint8 instance, uint8 hwChannel)
451 {
452 #if(SIUL2_ICU_IP_DEV_ERROR_DETECT == STD_ON)
453 DevAssert(instance < SIUL2_ICU_IP_NUM_OF_INSTANCES);
454 DevAssert(hwChannel < SIUL2_ICU_IP_NUM_OF_CHANNELS);
455 #endif
456
457 /* Clear interrupt flag */
458 (Siul2_Icu_Ip_pBase[instance])->DISR0 = ((uint32)1U << hwChannel);
459 /* Enable interrupt */
460 (Siul2_Icu_Ip_pBase[instance])->DIRER0 |= ((uint32)1U << hwChannel);
461 }
462
463 /** @implements Siul2_Icu_Ip_DisableInterrupt_Activity **/
Siul2_Icu_Ip_DisableInterrupt(uint8 instance,uint8 hwChannel)464 void Siul2_Icu_Ip_DisableInterrupt(uint8 instance, uint8 hwChannel)
465 {
466 #if(SIUL2_ICU_IP_DEV_ERROR_DETECT == STD_ON)
467 DevAssert(instance < SIUL2_ICU_IP_NUM_OF_INSTANCES);
468 DevAssert(hwChannel < SIUL2_ICU_IP_NUM_OF_CHANNELS);
469 #endif
470
471 /* Disable interrupt */
472 (Siul2_Icu_Ip_pBase[instance])->DIRER0 &= ~((uint32)1U << hwChannel);
473 /* Clear interrupt flag */
474 (Siul2_Icu_Ip_pBase[instance])->DISR0 = ((uint32)1U << hwChannel);
475 }
476
477 #if (SIUL2_ICU_IP_SET_MODE_API == STD_ON)
Siul2_Icu_Ip_SetSleepMode(uint8 instance,uint8 hwChannel)478 void Siul2_Icu_Ip_SetSleepMode(uint8 instance, uint8 hwChannel)
479 {
480 /*disable IRQ for the given instance*/
481 Siul2_Icu_Ip_DisableInterrupt(instance, hwChannel);
482 }
483
Siul2_Icu_Ip_SetNormalMode(uint8 instance,uint8 HwChannel)484 void Siul2_Icu_Ip_SetNormalMode(uint8 instance, uint8 HwChannel)
485 {
486 /*Enable IRQ*/
487 Siul2_Icu_Ip_EnableInterrupt(instance, HwChannel);
488 }
489 #endif /* SIUL2_ICU_IP_SET_MODE_API */
490
491 /* @implements Siul2_Icu_Ip_EnableNotification_Activity */
Siul2_Icu_Ip_EnableNotification(uint8 instance,uint8 hwChannel)492 void Siul2_Icu_Ip_EnableNotification(uint8 instance, uint8 hwChannel)
493 {
494 Siul2_Icu_Ip_aChannelState[Siul2_Icu_Ip_IndexInChState[instance][hwChannel]].notificationEnable = TRUE;
495 }
496
497 /* @implements Siul2_Icu_Ip_DisableNotification_Activity */
Siul2_Icu_Ip_DisableNotification(uint8 instance,uint8 hwChannel)498 void Siul2_Icu_Ip_DisableNotification(uint8 instance, uint8 hwChannel)
499 {
500 Siul2_Icu_Ip_aChannelState[Siul2_Icu_Ip_IndexInChState[instance][hwChannel]].notificationEnable = FALSE;
501 }
502
503 #define ICU_STOP_SEC_CODE
504 #include "Icu_MemMap.h"
505
506 #endif /* SIUL2_ICU_IP_USED */
507
508 #ifdef __cplusplus
509 }
510 #endif
511
512 /** @} */
513
