1 /* 2 * Copyright (c) 2015, Freescale Semiconductor, Inc. 3 * Copyright 2016,2019 NXP 4 * All rights reserved. 5 * 6 * SPDX-License-Identifier: BSD-3-Clause 7 */ 8 9 #ifndef _USB_HOST_CONTROLLER_EHCI_H_ 10 #define _USB_HOST_CONTROLLER_EHCI_H_ 11 12 /******************************************************************************* 13 * KHCI private public structures, enumerations, macros, functions 14 ******************************************************************************/ 15 16 /******************************************************************************* 17 * Definitions 18 ******************************************************************************/ 19 /* EHCI host macros */ 20 #define EHCI_HOST_T_INVALID_VALUE (1U) 21 #define EHCI_HOST_POINTER_TYPE_ITD (0x00U) 22 #define EHCI_HOST_POINTER_TYPE_QH (0x00000002U) 23 #define EHCI_HOST_POINTER_TYPE_SITD (0x00000004U) 24 #define EHCI_HOST_POINTER_TYPE_FSTN (0x00000006U) 25 #define EHCI_HOST_POINTER_TYPE_MASK (0x00000006U) 26 #define EHCI_HOST_POINTER_ADDRESS_MASK (0xFFFFFFE0U) 27 #define EHCI_HOST_PID_OUT (0UL) 28 #define EHCI_HOST_PID_IN (1UL) 29 #define EHCI_HOST_PID_SETUP (2UL) 30 31 #define EHCI_HOST_QH_RL_SHIFT (28U) 32 #define EHCI_HOST_QH_RL_MASK (0xF0000000U) 33 #define EHCI_HOST_QH_C_SHIFT (27U) 34 #define EHCI_HOST_QH_MAX_PACKET_LENGTH_SHIFT (16U) 35 #define EHCI_HOST_QH_MAX_PACKET_LENGTH_MASK (0x07FF0000U) 36 #define EHCI_HOST_QH_H_SHIFT (15U) 37 #define EHCI_HOST_QH_DTC_SHIFT (14U) 38 #define EHCI_HOST_QH_EPS_SHIFT (12U) 39 #define EHCI_HOST_QH_ENDPT_SHIFT (8U) 40 #define EHCI_HOST_QH_I_SHIFT (7U) 41 #define EHCI_HOST_QH_DEVICE_ADDRESS_SHIFT (0U) 42 #define EHCI_HOST_QH_MULT_SHIFT (30U) 43 #define EHCI_HOST_QH_PORT_NUMBER_SHIFT (23U) 44 #define EHCI_HOST_QH_HUB_ADDR_SHIFT (16U) 45 #define EHCI_HOST_QH_UFRAME_CMASK_SHIFT (8U) 46 #define EHCI_HOST_QH_UFRAME_SMASK_SHIFT (0U) 47 #define EHCI_HOST_QH_STATUS_ERROR_MASK (0x0000007EU) 48 #define EHCI_HOST_QH_STATUS_NOSTALL_ERROR_MASK (0x0000003EU) 49 50 #define EHCI_HOST_QTD_DT_SHIFT (31U) 51 #define EHCI_HOST_QTD_DT_MASK (0x80000000U) 52 #define EHCI_HOST_QTD_TOTAL_BYTES_SHIFT (16U) 53 #define EHCI_HOST_QTD_TOTAL_BYTES_MASK (0x7FFF0000U) 54 #define EHCI_HOST_QTD_IOC_MASK (0x00008000U) 55 #define EHCI_HOST_QTD_C_PAGE_SHIFT (12U) 56 #define EHCI_HOST_QTD_CERR_SHIFT (10U) 57 #define EHCI_HOST_QTD_CERR_MAX_VALUE (0x00000003UL) 58 #define EHCI_HOST_QTD_PID_CODE_SHIFT (8U) 59 #define EHCI_HOST_QTD_STATUS_SHIFT (0U) 60 #define EHCI_HOST_QTD_CURRENT_OFFSET_MASK (0x00000FFFU) 61 #define EHCI_HOST_QTD_BUFFER_POINTER_SHIFT (12U) 62 #define EHCI_HOST_QTD_STATUS_ACTIVE_MASK (0x00000080U) 63 #define EHCI_HOST_QTD_STATUS_MASK (0x000000ffU) 64 #define EHCI_HOST_QTD_STATUS_ERROR_MASK (0x0000007EU) 65 #define EHCI_HOST_QTD_STATUS_STALL_ERROR_MASK (0x00000040U) 66 67 #define EHCI_HOST_ITD_STATUS_ACTIVE_MASK (0x80000000U) 68 #define EHCI_HOST_ITD_TRANSACTION_LEN_SHIFT (16U) 69 #define EHCI_HOST_ITD_TRANSACTION_LEN_MASK (0x0FFF0000U) 70 #define EHCI_HOST_ITD_IOC_SHIFT (15U) 71 #define EHCI_HOST_ITD_PG_SHIFT (12U) 72 #define EHCI_HOST_ITD_TRANSACTION_OFFSET_SHIFT (0U) 73 #define EHCI_HOST_ITD_TRANSACTION_OFFSET_MASK (0x00000FFFU) 74 #define EHCI_HOST_ITD_BUFFER_POINTER_SHIFT (12U) 75 #define EHCI_HOST_ITD_ENDPT_SHIFT (8U) 76 #define EHCI_HOST_ITD_DEVICE_ADDRESS_SHIFT (0U) 77 #define EHCI_HOST_ITD_MAX_PACKET_SIZE_SHIFT (0U) 78 #define EHCI_HOST_ITD_MULT_SHIFT (0U) 79 #define EHCI_HOST_ITD_DIRECTION_SHIFT (11U) 80 81 #define EHCI_HOST_SITD_STATUS_ACTIVE_MASK (0x00000080U) 82 #define EHCI_HOST_SITD_DIRECTION_SHIFT (31U) 83 #define EHCI_HOST_SITD_PORT_NUMBER_SHIFT (24U) 84 #define EHCI_HOST_SITD_HUB_ADDR_SHIFT (16U) 85 #define EHCI_HOST_SITD_ENDPT_SHIFT (8U) 86 #define EHCI_HOST_SITD_DEVICE_ADDRESS_SHIFT (0U) 87 #define EHCI_HOST_SITD_CMASK_SHIFT (8U) 88 #define EHCI_HOST_SITD_SMASK_SHIFT (0U) 89 #define EHCI_HOST_SITD_TOTAL_BYTES_SHIFT (16U) 90 #define EHCI_HOST_SITD_TOTAL_BYTES_MASK (0x03FF0000U) 91 #define EHCI_HOST_SITD_TP_SHIFT (3U) 92 #define EHCI_HOST_SITD_TCOUNT_SHIFT (0U) 93 #define EHCI_HOST_SITD_IOC_SHIFT (31U) 94 95 /* register related MACROs */ 96 #define EHCI_PORTSC1_W1_BITS (0x0000002AU) 97 #define EHCI_MAX_UFRAME_VALUE (0x00003FFFU) 98 99 /* task event */ 100 #define EHCI_TASK_EVENT_DEVICE_ATTACH (0x01U) 101 #define EHCI_TASK_EVENT_TRANSACTION_DONE (0x02U) 102 #define EHCI_TASK_EVENT_DEVICE_DETACH (0x04U) 103 #define EHCI_TASK_EVENT_PORT_CHANGE (0x08U) 104 #define EHCI_TASK_EVENT_TIMER0 (0x10U) 105 #define EHCI_TASK_EVENT_TIMER1 (0x20U) 106 107 #define USB_HostEhciLock() (void)OSA_MutexLock(ehciInstance->ehciMutex, USB_OSA_WAIT_TIMEOUT) 108 #define USB_HostEhciUnlock() (void)OSA_MutexUnlock(ehciInstance->ehciMutex) 109 110 /******************************************************************************* 111 * KHCI driver public structures, enumerations, macros, functions 112 ******************************************************************************/ 113 114 /*! 115 * @addtogroup usb_host_controller_ehci 116 * @{ 117 */ 118 119 /*! @brief The maximum supported ISO pipe number */ 120 #define USB_HOST_EHCI_ISO_NUMBER USB_HOST_CONFIG_EHCI_MAX_ITD 121 /*! @brief Check the port connect state delay if the state is unstable */ 122 #define USB_HOST_EHCI_PORT_CONNECT_DEBOUNCE_DELAY (101U) 123 /*! @brief Delay for port reset */ 124 #define USB_HOST_EHCI_PORT_RESET_DELAY (11U) 125 /*! @brief The MAX continuous transfers that application can send. */ 126 #define USB_HOST_EHCI_ISO_MAX_CONTINUOUS_TRANSFER (8U) 127 /*! @brief The SITD inserts a frame interval for putting more SITD continuously. 128 * There is an interval when an application sends two FS/LS ISO transfers. 129 * When the interval is less than the macro, the two transfers are continuous in the frame list. Otherwise, the two 130 * transfers 131 * are not continuous. 132 * For example: 133 * - Use case 1: when inserting the SITD first, the inserted frame = the current frame value + this MACRO value. 134 * - Use case 2: when inserting SITD is not first, choose between the last inserted frame value and the 135 * current frame value according to the following criteria: 136 * If the interval is less than the MACRO value, the new SITD is continuous with the last SITD. 137 * If not, the new SITD inserting frame = the current frame value + this MACRO value. 138 */ 139 #define USB_HOST_EHCI_ISO_BOUNCE_FRAME_NUMBER (2U) 140 /*! @brief The ITD inserts a micro-frame interval for putting more ITD continuously. 141 * There is an interval when an application sends two HS ISO transfers. 142 * When the interval is less than the macro, the two transfers are continuous in the frame list. Otherwise, the two 143 * transfers 144 * are not continuous. 145 * For example: 146 * - Use case 1: when inserting ITD first, the inserted micro-frame = the current micro-frame value + this MACRO value. 147 * - Use case 2: when inserting ITD is not first, choose between the last inserted micro-frame value and the 148 * current micro-frame value according to the following criteria: 149 * If the interval is less than this MACRO value, the new ITD is continuous with the last ITD. 150 * If not, the new ITD inserting micro-frame = the current micro-frame value + this MACRO value. 151 */ 152 #define USB_HOST_EHCI_ISO_BOUNCE_UFRAME_NUMBER (16U) 153 /*! @brief Control or bulk transaction timeout value (unit: 100 ms) */ 154 #define USB_HOST_EHCI_CONTROL_BULK_TIME_OUT_VALUE (50U) 155 156 #if ((defined(USB_HOST_CONFIG_LOW_POWER_MODE)) && (USB_HOST_CONFIG_LOW_POWER_MODE > 0U)) 157 typedef enum _bus_ehci_suspend_request_state 158 { 159 kBus_EhciIdle = 0U, 160 kBus_EhciStartSuspend, 161 kBus_EhciSuspended, 162 kBus_EhciStartResume, 163 } bus_ehci_suspend_request_state_t; 164 #endif 165 166 /*! @brief EHCI state for device attachment/detachment. */ 167 typedef enum _host_ehci_device_state_ 168 { 169 kEHCIDevicePhyAttached = 1, /*!< Device is physically attached */ 170 kEHCIDeviceAttached, /*!< Device is attached and initialized */ 171 kEHCIDeviceDetached, /*!< Device is detached and de-initialized */ 172 } host_ehci_device_state_t; 173 174 /*! @brief EHCI pipe structure */ 175 typedef struct _usb_host_ehci_pipe 176 { 177 usb_host_pipe_t pipeCommon; /*!< Common pipe information */ 178 void *ehciQh; /*!< Control/bulk/interrupt: QH; ISO: usb_host_ehci_iso_t*/ 179 180 /* bandwidth */ 181 uint16_t uframeInterval; /*!< Micro-frame interval value */ 182 uint16_t startFrame; /*!< 183 Bandwidth start frame: its value is from 0 to frame_list. 184 */ 185 uint16_t dataTime; /*!< 186 Bandwidth time value: 187 - When the host works as HS: it's the data bandwidth value. 188 - When the host works as FS/LS: 189 - For FS/LS device, it's the data bandwidth value when transferring the data by FS/LS. 190 - For HS device, it's the data bandwidth value when transferring the data by HS. 191 */ 192 uint16_t startSplitTime; /*!< 193 Start splitting the bandwidth time value: 194 - When the host works as HS, it is the start split bandwidth value. 195 */ 196 uint16_t completeSplitTime; /*!< 197 Complete splitting the bandwidth time value: 198 - When host works as HS, it is the complete split bandwidth value. 199 */ 200 uint8_t startUframe; /*!< 201 Bandwidth start micro-frame: its value is from 0 to 7. 202 */ 203 uint8_t uframeSmask; /*!< 204 Start micro-frame. 205 - When host works as an HS: 206 - For FS/LS device, it's the interrupt or ISO transfer start-split mask. 207 - For HS device, it's the interrupt transfer start micro-frame mask. 208 - When host works as FS/LS, it's the interrupt and ISO start micro-frame mask 209 */ 210 uint8_t uframeCmask; /*!< 211 Complete micro-frame 212 - When host works as HS: 213 - For FS/LS device, it's the interrupt or ISO transfer complete-split mask. 214 */ 215 } usb_host_ehci_pipe_t; 216 217 /*! @brief EHCI QH structure. See the USB EHCI specification */ 218 typedef struct _usb_host_ehci_qh 219 { 220 uint32_t horizontalLinkPointer; /*!< QH specification filed, queue head a horizontal link pointer */ 221 uint32_t 222 staticEndpointStates[2]; /*!< QH specification filed, static endpoint state and configuration information */ 223 uint32_t currentQtdPointer; /*!< QH specification filed, current qTD pointer */ 224 uint32_t nextQtdPointer; /*!< QH specification filed, next qTD pointer */ 225 uint32_t alternateNextQtdPointer; /*!< QH specification filed, alternate next qTD pointer */ 226 uint32_t 227 transferOverlayResults[6]; /*!< QH specification filed, transfer overlay configuration and transfer results */ 228 229 /* reserved space */ 230 usb_host_ehci_pipe_t *ehciPipePointer; /*!< EHCI pipe pointer */ 231 usb_host_transfer_t *ehciTransferHead; /*!< Transfer list head on this QH */ 232 usb_host_transfer_t *ehciTransferTail; /*!< Transfer list tail on this QH */ 233 uint16_t timeOutValue; /*!< Its maximum value is USB_HOST_EHCI_CONTROL_BULK_TIME_OUT_VALUE. When the value is 234 zero, the transfer times out. */ 235 uint16_t timeOutLabel; /*!< It's used to judge the transfer timeout. The EHCI driver maintain the value */ 236 } usb_host_ehci_qh_t; 237 238 /*! @brief EHCI QTD structure. See the USB EHCI specification. */ 239 typedef struct _usb_host_ehci_qtd 240 { 241 uint32_t nextQtdPointer; /*!< QTD specification filed, the next QTD pointer */ 242 uint32_t alternateNextQtdPointer; /*!< QTD specification filed, alternate next QTD pointer */ 243 uint32_t transferResults[2]; /*!< QTD specification filed, transfer results fields */ 244 uint32_t bufferPointers[4]; /*!< QTD specification filed, transfer buffer fields */ 245 } usb_host_ehci_qtd_t; 246 247 /*! @brief EHCI ITD structure. See the USB EHCI specification. */ 248 typedef struct _usb_host_ehci_itd 249 { 250 uint32_t nextLinkPointer; /*!< ITD specification filed, the next linker pointer */ 251 uint32_t transactions[8]; /*!< ITD specification filed, transactions information */ 252 uint32_t bufferPointers[7]; /*!< ITD specification filed, transfer buffer fields */ 253 254 /* add space */ 255 struct _usb_host_ehci_itd *nextItdPointer; /*!< Next ITD pointer */ 256 uint32_t frameEntryIndex; /*!< The ITD inserted frame value */ 257 uint32_t reserved[6]; /*!< Reserved fields for 32 bytes align */ 258 } usb_host_ehci_itd_t; 259 260 /*! @brief EHCI SITD structure. See the USB EHCI specification. */ 261 typedef struct _usb_host_ehci_sitd 262 { 263 uint32_t nextLinkPointer; /*!< SITD specification filed, the next linker pointer */ 264 uint32_t endpointStates[2]; /*!< SITD specification filed, endpoint configuration information */ 265 uint32_t transferResults[3]; /*!< SITD specification filed, transfer result fields */ 266 uint32_t backPointer; /*!< SITD specification filed, back pointer */ 267 268 /* reserved space */ 269 uint16_t frameEntryIndex; /*!< The SITD inserted frame value */ 270 uint8_t nextSitdIndex; /*!< The next SITD index; Get the next SITD pointer through adding base address with the 271 index. 0xFF means invalid. */ 272 uint8_t reserved; /*!< Reserved fields for 32 bytes align */ 273 } usb_host_ehci_sitd_t; 274 275 /*! @brief EHCI ISO structure; An ISO pipe has an instance of this structure to keep the ISO pipe-specific information. 276 */ 277 typedef struct _usb_host_ehci_iso 278 { 279 struct _usb_host_ehci_iso *next; /*!< Next instance pointer */ 280 usb_host_pipe_t *ehciPipePointer; /*!< This ISO's EHCI pipe pointer */ 281 usb_host_transfer_t *ehciTransferHead; /*!< Transfer list head on this ISO pipe */ 282 usb_host_transfer_t *ehciTransferTail; /*!< Transfer list head on this ISO pipe */ 283 284 uint16_t lastLinkFrame; /*!< It means that the inserted frame for ISO ITD/SITD. 0xFFFF is invalid. For ITD, it is a 285 micro-frame value. For SITD, it is a frame value */ 286 } usb_host_ehci_iso_t; 287 288 /*! @brief EHCI instance structure */ 289 typedef struct _usb_host_ehci_instance 290 { 291 usb_host_handle hostHandle; /*!< Related host handle*/ 292 uint32_t *ehciUnitBase; /*!< Keep the QH/QTD/ITD/SITD buffer pointer for release*/ 293 uint8_t *ehciFrameList; /*!< The frame list of the current ehci instance*/ 294 usb_host_ehci_qh_t *ehciQhList; /*!< Idle QH list pointer */ 295 usb_host_ehci_qtd_t *ehciQtdHead; /*!< Idle QTD list pointer head */ 296 usb_host_ehci_qtd_t *ehciQtdTail; /*!< Idle QTD list pointer tail (recently used qTD will be used)*/ 297 usb_host_ehci_itd_t *ehciItdList; /*!< Idle ITD list pointer*/ 298 usb_host_ehci_sitd_t *ehciSitdIndexBase; /*!< SITD buffer's start pointer*/ 299 usb_host_ehci_sitd_t *ehciSitdList; /*!< Idle SITD list pointer*/ 300 usb_host_ehci_iso_t *ehciIsoList; /*!< Idle ISO list pointer*/ 301 USBHS_Type *ehciIpBase; /*!< EHCI IP base address*/ 302 usb_host_ehci_qh_t *shedFirstQh; /*!< First async QH*/ 303 usb_host_ehci_pipe_t *ehciPipeIndexBase; /*!< Pipe buffer's start pointer*/ 304 usb_host_ehci_pipe_t *ehciPipeList; /*!< Idle pipe list pointer*/ 305 usb_host_ehci_pipe_t *ehciRunningPipeList; /*!< Running pipe list pointer*/ 306 osa_mutex_handle_t ehciMutex; /*!< EHCI mutex*/ 307 uint32_t mutexBuffer[(OSA_MUTEX_HANDLE_SIZE + 3) / 4]; /*!< The mutex buffer. */ 308 osa_event_handle_t taskEventHandle; /*!< EHCI task event*/ 309 uint32_t taskEventHandleBuffer[(OSA_EVENT_HANDLE_SIZE + 3) / 4]; /*!< EHCI task event handle buffer*/ 310 #if ((defined(USB_HOST_CONFIG_LOW_POWER_MODE)) && (USB_HOST_CONFIG_LOW_POWER_MODE > 0U)) 311 uint64_t matchTick; 312 #if ((defined FSL_FEATURE_SOC_USBPHY_COUNT) && (FSL_FEATURE_SOC_USBPHY_COUNT > 0U)) 313 USBPHY_Type *registerPhyBase; /*!< The base address of the PHY register */ 314 #endif 315 #if (defined(FSL_FEATURE_SOC_USBNC_COUNT) && (FSL_FEATURE_SOC_USBNC_COUNT > 0U)) 316 USBNC_Type *registerNcBase; /*!< The base address of the USBNC register */ 317 #endif 318 319 #endif 320 uint8_t controllerId; /*!< EHCI controller ID*/ 321 uint8_t deviceAttached; /*!< Device attach/detach state, see #host_ehci_device_state_t */ 322 uint8_t firstDeviceSpeed; /*!< The first device's speed, the controller's work speed*/ 323 uint8_t ehciItdNumber; /*!< Idle ITD number*/ 324 uint8_t ehciSitdNumber; /*!< Idle SITD number*/ 325 uint8_t ehciQtdNumber; /*!< Idle QTD number*/ 326 #if ((defined(USB_HOST_CONFIG_LOW_POWER_MODE)) && (USB_HOST_CONFIG_LOW_POWER_MODE > 0U)) 327 bus_ehci_suspend_request_state_t busSuspendStatus; /*!< Bus Suspend Status*/ 328 #endif 329 } usb_host_ehci_instance_t; 330 331 /*! @brief EHCI data structure */ 332 typedef struct _usb_host_ehci_data 333 { 334 #if ((defined(USB_HOST_CONFIG_EHCI_MAX_QH)) && (USB_HOST_CONFIG_EHCI_MAX_QH > 0U)) 335 usb_host_ehci_qh_t ehciQh[USB_HOST_CONFIG_EHCI_MAX_QH]; /*!< Idle QH list array*/ 336 #endif 337 #if ((defined(USB_HOST_CONFIG_EHCI_MAX_QTD)) && (USB_HOST_CONFIG_EHCI_MAX_QTD > 0U)) 338 usb_host_ehci_qtd_t ehciQtd[USB_HOST_CONFIG_EHCI_MAX_QTD]; /*!< Idle QTD list array*/ 339 #endif 340 #if ((defined(USB_HOST_CONFIG_EHCI_MAX_ITD)) && (USB_HOST_CONFIG_EHCI_MAX_ITD > 0U)) 341 usb_host_ehci_itd_t ehciItd[USB_HOST_CONFIG_EHCI_MAX_ITD]; /*!< Idle ITD list array*/ 342 /* add additional 32bytes because the itd cannot cross over 4K boundary, 343 * If one ITD cross over 4K boundary, the code will move 32 bytes for ITD. 344 */ 345 uint32_t reserved[8]; 346 #endif 347 #if ((defined(USB_HOST_CONFIG_EHCI_MAX_SITD)) && (USB_HOST_CONFIG_EHCI_MAX_SITD > 0U)) 348 usb_host_ehci_sitd_t ehciSitd[USB_HOST_CONFIG_EHCI_MAX_SITD]; /*!< Idle SITD list array*/ 349 #endif 350 #if ((defined(USB_HOST_EHCI_ISO_NUMBER)) && (USB_HOST_EHCI_ISO_NUMBER > 0U)) 351 usb_host_ehci_iso_t ehciIso[USB_HOST_EHCI_ISO_NUMBER]; /*!< Idle ISO list array*/ 352 #endif 353 #if ((defined(USB_HOST_CONFIG_MAX_PIPES)) && (USB_HOST_CONFIG_MAX_PIPES > 0U)) 354 usb_host_ehci_pipe_t ehciPipe[USB_HOST_CONFIG_MAX_PIPES]; /*!< Idle pipe list array*/ 355 #endif 356 } usb_host_ehci_data_t; 357 358 /******************************************************************************* 359 * API 360 ******************************************************************************/ 361 362 #ifdef __cplusplus 363 extern "C" { 364 #endif 365 /*! 366 * @name USB host EHCI APIs 367 * @{ 368 */ 369 370 /*! 371 * @brief Creates the USB host EHCI instance. 372 * 373 * This function initializes the USB host EHCI controller driver. 374 * 375 * @param[in] controllerId The controller ID of the USB IP. Please refer to the enumeration usb_controller_index_t. 376 * @param[in] upperLayerHandle The host level handle. 377 * @param[out] controllerHandle return the controller instance handle. 378 * 379 * @retval kStatus_USB_Success The host is initialized successfully. 380 * @retval kStatus_USB_AllocFail Allocating memory failed. 381 * @retval kStatus_USB_Error Host mutex create fail, KHCI/EHCI mutex or KHCI/EHCI event create fail. 382 * Or, KHCI/EHCI IP initialize fail. 383 */ 384 extern usb_status_t USB_HostEhciCreate(uint8_t controllerId, 385 usb_host_handle upperLayerHandle, 386 usb_host_controller_handle *controllerHandle); 387 388 /*! 389 * @brief Destroys the USB host EHCI instance. 390 * 391 * This function de-initializes The USB host EHCI controller driver. 392 * 393 * @param[in] controllerHandle The controller handle. 394 * 395 * @retval kStatus_USB_Success The host is initialized successfully. 396 */ 397 extern usb_status_t USB_HostEhciDestory(usb_host_controller_handle controllerHandle); 398 399 /*! 400 * @brief Opens the USB host pipe. 401 * 402 * This function opens a pipe according to the pipe_init_ptr parameter. 403 * 404 * @param[in] controllerHandle The controller handle. 405 * @param[out] pipeHandle The pipe handle pointer, it is used to return the pipe handle. 406 * @param[in] pipeInit It is used to initialize the pipe. 407 * 408 * @retval kStatus_USB_Success The host is initialized successfully. 409 * @retval kStatus_USB_Error There is no idle pipe. 410 * Or, there is no idle QH for EHCI. 411 * Or, bandwidth allocate fail for EHCI. 412 */ 413 extern usb_status_t USB_HostEhciOpenPipe(usb_host_controller_handle controllerHandle, 414 usb_host_pipe_handle *pipeHandle, 415 usb_host_pipe_init_t *pipeInit); 416 417 /*! 418 * @brief Closes the USB host pipe. 419 * 420 * This function closes a pipe and releases related resources. 421 * 422 * @param[in] controllerHandle The controller handle. 423 * @param[in] pipeHandle The closing pipe handle. 424 * 425 * @retval kStatus_USB_Success The host is initialized successfully. 426 */ 427 extern usb_status_t USB_HostEhciClosePipe(usb_host_controller_handle controllerHandle, usb_host_pipe_handle pipeHandle); 428 429 /*! 430 * @brief Sends data to the pipe. 431 * 432 * This function requests to send the transfer to the specified pipe. 433 * 434 * @param[in] controllerHandle The controller handle. 435 * @param[in] pipeHandle The sending pipe handle. 436 * @param[in] transfer The transfer information. 437 * 438 * @retval kStatus_USB_Success Sent successfully. 439 * @retval kStatus_USB_LackSwapBuffer There is no swap buffer for KHCI. 440 * @retval kStatus_USB_Error There is no idle QTD/ITD/SITD for EHCI. 441 */ 442 extern usb_status_t USB_HostEhciWritePipe(usb_host_controller_handle controllerHandle, 443 usb_host_pipe_handle pipeHandle, 444 usb_host_transfer_t *transfer); 445 446 /*! 447 * @brief Receives data from the pipe. 448 * 449 * This function requests to receive the transfer from the specified pipe. 450 * 451 * @param[in] controllerHandle The controller handle. 452 * @param[in] pipeHandle The receiving pipe handle. 453 * @param[in] transfer The transfer information. 454 455 * @retval kStatus_USB_Success Send successfully. 456 * @retval kStatus_USB_LackSwapBuffer There is no swap buffer for KHCI. 457 * @retval kStatus_USB_Error There is no idle QTD/ITD/SITD for EHCI. 458 */ 459 extern usb_status_t USB_HostEhciReadpipe(usb_host_controller_handle controllerHandle, 460 usb_host_pipe_handle pipeHandle, 461 usb_host_transfer_t *transfer); 462 463 /*! 464 * @brief Controls the EHCI. 465 * 466 * This function controls the EHCI. 467 * 468 * @param[in] controllerHandle The controller handle. 469 * @param[in] ioctlEvent See enumeration host_bus_control_t. 470 * @param[in] ioctlParam The control parameter. 471 * 472 * @retval kStatus_USB_Success Cancel successfully. 473 * @retval kStatus_USB_InvalidHandle The controllerHandle is a NULL pointer. 474 */ 475 extern usb_status_t USB_HostEhciIoctl(usb_host_controller_handle controllerHandle, 476 uint32_t ioctlEvent, 477 void *ioctlParam); 478 479 /*! @}*/ 480 481 #ifdef __cplusplus 482 } 483 #endif 484 485 /*! @}*/ 486 487 #endif /* _USB_HOST_CONTROLLER_EHCI_H_ */ 488
