1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2022 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #ifndef _FSL_SAI_H_
10 #define _FSL_SAI_H_
11
12 #include "fsl_common.h"
13
14 /*!
15 * @addtogroup sai_driver SAI Driver
16 * @{
17 */
18
19 /*******************************************************************************
20 * Definitions
21 ******************************************************************************/
22
23 /*! @brief Used to control whether SAI_RxSetFifoConfig()/SAI_TxSetFifoConfig()
24 * allows a NULL FIFO watermark.
25 *
26 * If this macro is set to 0 then SAI_RxSetFifoConfig()/SAI_TxSetFifoConfig()
27 * will set the watermark to half of the FIFO's depth if passed a NULL
28 * watermark.
29 */
30 #ifndef MCUX_SDK_SAI_ALLOW_NULL_FIFO_WATERMARK
31 #define MCUX_SDK_SAI_ALLOW_NULL_FIFO_WATERMARK 0
32 #endif /* MCUX_SDK_SAI_ALLOW_NULL_FIFO_WATERMARK */
33
34 /*! @brief Disable implicit channel data configuration within SAI_TxSetConfig()/SAI_RxSetConfig().
35 *
36 * Use this macro to control whether SAI_RxSetConfig()/SAI_TxSetConfig() will
37 * attempt to implicitly configure the channel data. By channel data we mean
38 * the startChannel, channelMask, endChannel, and channelNums fields from the
39 * sai_transciever_t structure. By default, SAI_TxSetConfig()/SAI_RxSetConfig()
40 * will attempt to compute these fields, which may not be desired in cases where
41 * the user wants to set them before the call to said functions.
42 */
43 #ifndef MCUX_SDK_SAI_DISABLE_IMPLICIT_CHAN_CONFIG
44 #define MCUX_SDK_SAI_DISABLE_IMPLICIT_CHAN_CONFIG 0
45 #endif /* MCUX_SDK_SAI_DISABLE_IMPLICIT_CHAN_CONFIG */
46
47 /*! @name Driver version */
48 /*@{*/
49 #define FSL_SAI_DRIVER_VERSION (MAKE_VERSION(2, 3, 8)) /*!< Version 2.3.8 */
50 /*@}*/
51
52 /*! @brief _sai_status_t, SAI return status.*/
53 enum
54 {
55 kStatus_SAI_TxBusy = MAKE_STATUS(kStatusGroup_SAI, 0), /*!< SAI Tx is busy. */
56 kStatus_SAI_RxBusy = MAKE_STATUS(kStatusGroup_SAI, 1), /*!< SAI Rx is busy. */
57 kStatus_SAI_TxError = MAKE_STATUS(kStatusGroup_SAI, 2), /*!< SAI Tx FIFO error. */
58 kStatus_SAI_RxError = MAKE_STATUS(kStatusGroup_SAI, 3), /*!< SAI Rx FIFO error. */
59 kStatus_SAI_QueueFull = MAKE_STATUS(kStatusGroup_SAI, 4), /*!< SAI transfer queue is full. */
60 kStatus_SAI_TxIdle = MAKE_STATUS(kStatusGroup_SAI, 5), /*!< SAI Tx is idle */
61 kStatus_SAI_RxIdle = MAKE_STATUS(kStatusGroup_SAI, 6) /*!< SAI Rx is idle */
62 };
63
64 /*! @brief _sai_channel_mask,.sai channel mask value, actual channel numbers is depend soc specific */
65 enum
66 {
67 kSAI_Channel0Mask = 1 << 0U, /*!< channel 0 mask value */
68 kSAI_Channel1Mask = 1 << 1U, /*!< channel 1 mask value */
69 kSAI_Channel2Mask = 1 << 2U, /*!< channel 2 mask value */
70 kSAI_Channel3Mask = 1 << 3U, /*!< channel 3 mask value */
71 kSAI_Channel4Mask = 1 << 4U, /*!< channel 4 mask value */
72 kSAI_Channel5Mask = 1 << 5U, /*!< channel 5 mask value */
73 kSAI_Channel6Mask = 1 << 6U, /*!< channel 6 mask value */
74 kSAI_Channel7Mask = 1 << 7U, /*!< channel 7 mask value */
75 };
76
77 /*! @brief Define the SAI bus type */
78 typedef enum _sai_protocol
79 {
80 kSAI_BusLeftJustified = 0x0U, /*!< Uses left justified format.*/
81 kSAI_BusRightJustified, /*!< Uses right justified format. */
82 kSAI_BusI2S, /*!< Uses I2S format. */
83 kSAI_BusPCMA, /*!< Uses I2S PCM A format.*/
84 kSAI_BusPCMB /*!< Uses I2S PCM B format. */
85 } sai_protocol_t;
86
87 /*! @brief Master or slave mode */
88 typedef enum _sai_master_slave
89 {
90 kSAI_Master = 0x0U, /*!< Master mode include bclk and frame sync */
91 kSAI_Slave = 0x1U, /*!< Slave mode include bclk and frame sync */
92 kSAI_Bclk_Master_FrameSync_Slave = 0x2U, /*!< bclk in master mode, frame sync in slave mode */
93 kSAI_Bclk_Slave_FrameSync_Master = 0x3U, /*!< bclk in slave mode, frame sync in master mode */
94 } sai_master_slave_t;
95
96 /*! @brief Mono or stereo audio format */
97 typedef enum _sai_mono_stereo
98 {
99 kSAI_Stereo = 0x0U, /*!< Stereo sound. */
100 kSAI_MonoRight, /*!< Only Right channel have sound. */
101 kSAI_MonoLeft /*!< Only left channel have sound. */
102 } sai_mono_stereo_t;
103
104 /*! @brief SAI data order, MSB or LSB */
105 typedef enum _sai_data_order
106 {
107 kSAI_DataLSB = 0x0U, /*!< LSB bit transferred first */
108 kSAI_DataMSB /*!< MSB bit transferred first */
109 } sai_data_order_t;
110
111 /*! @brief SAI clock polarity, active high or low */
112 typedef enum _sai_clock_polarity
113 {
114 kSAI_PolarityActiveHigh = 0x0U, /*!< Drive outputs on rising edge */
115 kSAI_PolarityActiveLow = 0x1U, /*!< Drive outputs on falling edge */
116 kSAI_SampleOnFallingEdge = 0x0U, /*!< Sample inputs on falling edge */
117 kSAI_SampleOnRisingEdge = 0x1U, /*!< Sample inputs on rising edge */
118 } sai_clock_polarity_t;
119
120 /*! @brief Synchronous or asynchronous mode */
121 typedef enum _sai_sync_mode
122 {
123 kSAI_ModeAsync = 0x0U, /*!< Asynchronous mode */
124 kSAI_ModeSync, /*!< Synchronous mode (with receiver or transmit) */
125 #if defined(FSL_FEATURE_SAI_HAS_SYNC_WITH_ANOTHER_SAI) && (FSL_FEATURE_SAI_HAS_SYNC_WITH_ANOTHER_SAI)
126 kSAI_ModeSyncWithOtherTx, /*!< Synchronous with another SAI transmit */
127 kSAI_ModeSyncWithOtherRx /*!< Synchronous with another SAI receiver */
128 #endif /* FSL_FEATURE_SAI_HAS_SYNC_WITH_ANOTHER_SAI */
129 } sai_sync_mode_t;
130
131 #if !(defined(FSL_FEATURE_SAI_HAS_NO_MCR_MICS) && (FSL_FEATURE_SAI_HAS_NO_MCR_MICS))
132 /*! @brief Mater clock source */
133 typedef enum _sai_mclk_source
134 {
135 kSAI_MclkSourceSysclk = 0x0U, /*!< Master clock from the system clock */
136 kSAI_MclkSourceSelect1, /*!< Master clock from source 1 */
137 kSAI_MclkSourceSelect2, /*!< Master clock from source 2 */
138 kSAI_MclkSourceSelect3 /*!< Master clock from source 3 */
139 } sai_mclk_source_t;
140 #endif
141
142 /*! @brief Bit clock source */
143 typedef enum _sai_bclk_source
144 {
145 kSAI_BclkSourceBusclk = 0x0U, /*!< Bit clock using bus clock */
146 /* General device bit source definition */
147 kSAI_BclkSourceMclkOption1 = 0x1U, /*!< Bit clock MCLK option 1 */
148 kSAI_BclkSourceMclkOption2 = 0x2U, /*!< Bit clock MCLK option2 */
149 kSAI_BclkSourceMclkOption3 = 0x3U, /*!< Bit clock MCLK option3 */
150 /* Kinetis device bit clock source definition */
151 kSAI_BclkSourceMclkDiv = 0x1U, /*!< Bit clock using master clock divider */
152 kSAI_BclkSourceOtherSai0 = 0x2U, /*!< Bit clock from other SAI device */
153 kSAI_BclkSourceOtherSai1 = 0x3U /*!< Bit clock from other SAI device */
154 } sai_bclk_source_t;
155
156 /*! @brief _sai_interrupt_enable_t, The SAI interrupt enable flag */
157 enum
158 {
159 kSAI_WordStartInterruptEnable =
160 I2S_TCSR_WSIE_MASK, /*!< Word start flag, means the first word in a frame detected */
161 kSAI_SyncErrorInterruptEnable = I2S_TCSR_SEIE_MASK, /*!< Sync error flag, means the sync error is detected */
162 kSAI_FIFOWarningInterruptEnable = I2S_TCSR_FWIE_MASK, /*!< FIFO warning flag, means the FIFO is empty */
163 kSAI_FIFOErrorInterruptEnable = I2S_TCSR_FEIE_MASK, /*!< FIFO error flag */
164 #if defined(FSL_FEATURE_SAI_HAS_FIFO) && (FSL_FEATURE_SAI_HAS_FIFO)
165 kSAI_FIFORequestInterruptEnable = I2S_TCSR_FRIE_MASK, /*!< FIFO request, means reached watermark */
166 #endif /* FSL_FEATURE_SAI_HAS_FIFO */
167 };
168
169 /*! @brief _sai_dma_enable_t, The DMA request sources */
170 enum
171 {
172 kSAI_FIFOWarningDMAEnable = I2S_TCSR_FWDE_MASK, /*!< FIFO warning caused by the DMA request */
173 #if defined(FSL_FEATURE_SAI_HAS_FIFO) && (FSL_FEATURE_SAI_HAS_FIFO)
174 kSAI_FIFORequestDMAEnable = I2S_TCSR_FRDE_MASK, /*!< FIFO request caused by the DMA request */
175 #endif /* FSL_FEATURE_SAI_HAS_FIFO */
176 };
177
178 /*! @brief _sai_flags, The SAI status flag */
179 enum
180 {
181 kSAI_WordStartFlag = I2S_TCSR_WSF_MASK, /*!< Word start flag, means the first word in a frame detected */
182 kSAI_SyncErrorFlag = I2S_TCSR_SEF_MASK, /*!< Sync error flag, means the sync error is detected */
183 kSAI_FIFOErrorFlag = I2S_TCSR_FEF_MASK, /*!< FIFO error flag */
184 #if defined(FSL_FEATURE_SAI_HAS_FIFO) && (FSL_FEATURE_SAI_HAS_FIFO)
185 kSAI_FIFORequestFlag = I2S_TCSR_FRF_MASK, /*!< FIFO request flag. */
186 #endif /* FSL_FEATURE_SAI_HAS_FIFO */
187 kSAI_FIFOWarningFlag = I2S_TCSR_FWF_MASK, /*!< FIFO warning flag */
188 };
189
190 /*! @brief The reset type */
191 typedef enum _sai_reset_type
192 {
193 kSAI_ResetTypeSoftware = I2S_TCSR_SR_MASK, /*!< Software reset, reset the logic state */
194 kSAI_ResetTypeFIFO = I2S_TCSR_FR_MASK, /*!< FIFO reset, reset the FIFO read and write pointer */
195 kSAI_ResetAll = I2S_TCSR_SR_MASK | I2S_TCSR_FR_MASK /*!< All reset. */
196 } sai_reset_type_t;
197
198 #if defined(FSL_FEATURE_SAI_HAS_FIFO_PACKING) && FSL_FEATURE_SAI_HAS_FIFO_PACKING
199 /*!
200 * @brief The SAI packing mode
201 * The mode includes 8 bit and 16 bit packing.
202 */
203 typedef enum _sai_fifo_packing
204 {
205 kSAI_FifoPackingDisabled = 0x0U, /*!< Packing disabled */
206 kSAI_FifoPacking8bit = 0x2U, /*!< 8 bit packing enabled */
207 kSAI_FifoPacking16bit = 0x3U /*!< 16bit packing enabled */
208 } sai_fifo_packing_t;
209 #endif /* FSL_FEATURE_SAI_HAS_FIFO_PACKING */
210
211 /*! @brief SAI user configuration structure */
212 typedef struct _sai_config
213 {
214 sai_protocol_t protocol; /*!< Audio bus protocol in SAI */
215 sai_sync_mode_t syncMode; /*!< SAI sync mode, control Tx/Rx clock sync */
216 #if defined(FSL_FEATURE_SAI_HAS_MCR) && (FSL_FEATURE_SAI_HAS_MCR)
217 bool mclkOutputEnable; /*!< Master clock output enable, true means master clock divider enabled */
218 #if !(defined(FSL_FEATURE_SAI_HAS_NO_MCR_MICS) && (FSL_FEATURE_SAI_HAS_NO_MCR_MICS))
219 sai_mclk_source_t mclkSource; /*!< Master Clock source */
220 #endif /* FSL_FEATURE_SAI_HAS_MCR */
221 #endif
222 sai_bclk_source_t bclkSource; /*!< Bit Clock source */
223 sai_master_slave_t masterSlave; /*!< Master or slave */
224 } sai_config_t;
225
226 #ifndef SAI_XFER_QUEUE_SIZE
227 /*!@brief SAI transfer queue size, user can refine it according to use case. */
228 #define SAI_XFER_QUEUE_SIZE (4U)
229 #endif
230
231 /*! @brief Audio sample rate */
232 typedef enum _sai_sample_rate
233 {
234 kSAI_SampleRate8KHz = 8000U, /*!< Sample rate 8000 Hz */
235 kSAI_SampleRate11025Hz = 11025U, /*!< Sample rate 11025 Hz */
236 kSAI_SampleRate12KHz = 12000U, /*!< Sample rate 12000 Hz */
237 kSAI_SampleRate16KHz = 16000U, /*!< Sample rate 16000 Hz */
238 kSAI_SampleRate22050Hz = 22050U, /*!< Sample rate 22050 Hz */
239 kSAI_SampleRate24KHz = 24000U, /*!< Sample rate 24000 Hz */
240 kSAI_SampleRate32KHz = 32000U, /*!< Sample rate 32000 Hz */
241 kSAI_SampleRate44100Hz = 44100U, /*!< Sample rate 44100 Hz */
242 kSAI_SampleRate48KHz = 48000U, /*!< Sample rate 48000 Hz */
243 kSAI_SampleRate96KHz = 96000U, /*!< Sample rate 96000 Hz */
244 kSAI_SampleRate192KHz = 192000U, /*!< Sample rate 192000 Hz */
245 kSAI_SampleRate384KHz = 384000U, /*!< Sample rate 384000 Hz */
246 } sai_sample_rate_t;
247
248 /*! @brief Audio word width */
249 typedef enum _sai_word_width
250 {
251 kSAI_WordWidth8bits = 8U, /*!< Audio data width 8 bits */
252 kSAI_WordWidth16bits = 16U, /*!< Audio data width 16 bits */
253 kSAI_WordWidth24bits = 24U, /*!< Audio data width 24 bits */
254 kSAI_WordWidth32bits = 32U /*!< Audio data width 32 bits */
255 } sai_word_width_t;
256
257 #if defined(FSL_FEATURE_SAI_HAS_CHANNEL_MODE) && FSL_FEATURE_SAI_HAS_CHANNEL_MODE
258 /*! @brief sai data pin state definition */
259 typedef enum _sai_data_pin_state
260 {
261 kSAI_DataPinStateTriState =
262 0U, /*!< transmit data pins are tri-stated when slots are masked or channels are disabled */
263 kSAI_DataPinStateOutputZero = 1U, /*!< transmit data pins are never tri-stated and will output zero when slots
264 are masked or channel disabled */
265 } sai_data_pin_state_t;
266 #endif
267
268 #if defined(FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE) && FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE
269 /*! @brief sai fifo combine mode definition */
270 typedef enum _sai_fifo_combine
271 {
272 kSAI_FifoCombineDisabled = 0U, /*!< sai fifo combine mode disabled */
273 kSAI_FifoCombineModeEnabledOnRead, /*!< sai fifo combine mode enabled on FIFO reads */
274 kSAI_FifoCombineModeEnabledOnWrite, /*!< sai fifo combine mode enabled on FIFO write */
275 kSAI_FifoCombineModeEnabledOnReadWrite, /*!< sai fifo combined mode enabled on FIFO read/writes */
276 } sai_fifo_combine_t;
277 #endif
278
279 /*! @brief sai transceiver type */
280 typedef enum _sai_transceiver_type
281 {
282 kSAI_Transmitter = 0U, /*!< sai transmitter */
283 kSAI_Receiver = 1U, /*!< sai receiver */
284 } sai_transceiver_type_t;
285
286 /*! @brief sai frame sync len */
287 typedef enum _sai_frame_sync_len
288 {
289 kSAI_FrameSyncLenOneBitClk = 0U, /*!< 1 bit clock frame sync len for DSP mode */
290 kSAI_FrameSyncLenPerWordWidth = 1U, /*!< Frame sync length decided by word width */
291 } sai_frame_sync_len_t;
292
293 /*! @brief sai transfer format */
294 typedef struct _sai_transfer_format
295 {
296 uint32_t sampleRate_Hz; /*!< Sample rate of audio data */
297 uint32_t bitWidth; /*!< Data length of audio data, usually 8/16/24/32 bits */
298 sai_mono_stereo_t stereo; /*!< Mono or stereo */
299 #if defined(FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER) && (FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER)
300 uint32_t masterClockHz; /*!< Master clock frequency in Hz */
301 #endif /* FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER */
302 #if defined(FSL_FEATURE_SAI_HAS_FIFO) && (FSL_FEATURE_SAI_HAS_FIFO)
303 uint8_t watermark; /*!< Watermark value */
304 #endif /* FSL_FEATURE_SAI_HAS_FIFO */
305
306 /* for the multi channel usage, user can provide channelMask Oonly, then sai driver will handle
307 * other parameter carefully, such as
308 * channelMask = kSAI_Channel0Mask | kSAI_Channel1Mask | kSAI_Channel4Mask
309 * then in SAI_RxSetFormat/SAI_TxSetFormat function, channel/endChannel/channelNums will be calculated.
310 * for the single channel usage, user can provide channel or channel mask only, such as,
311 * channel = 0 or channelMask = kSAI_Channel0Mask.
312 */
313 uint8_t channel; /*!< Transfer start channel */
314 uint8_t channelMask; /*!< enabled channel mask value, reference _sai_channel_mask */
315 uint8_t endChannel; /*!< end channel number */
316 uint8_t channelNums; /*!< Total enabled channel numbers */
317
318 sai_protocol_t protocol; /*!< Which audio protocol used */
319 bool isFrameSyncCompact; /*!< True means Frame sync length is configurable according to bitWidth, false means frame
320 sync length is 64 times of bit clock. */
321 } sai_transfer_format_t;
322
323 #if (defined(FSL_FEATURE_SAI_HAS_MCR) && (FSL_FEATURE_SAI_HAS_MCR)) || \
324 (defined(FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER) && (FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER))
325 /*! @brief master clock configurations */
326 typedef struct _sai_master_clock
327 {
328 #if defined(FSL_FEATURE_SAI_HAS_MCR) && (FSL_FEATURE_SAI_HAS_MCR)
329 bool mclkOutputEnable; /*!< master clock output enable */
330 #if !(defined(FSL_FEATURE_SAI_HAS_NO_MCR_MICS) && (FSL_FEATURE_SAI_HAS_NO_MCR_MICS))
331 sai_mclk_source_t mclkSource; /*!< Master Clock source */
332 #endif
333 #endif
334
335 #if (defined(FSL_FEATURE_SAI_HAS_MCR) && (FSL_FEATURE_SAI_HAS_MCR)) || \
336 (defined(FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER) && (FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER))
337 uint32_t mclkHz; /*!< target mclk frequency */
338 uint32_t mclkSourceClkHz; /*!< mclk source frequency*/
339 #endif
340 } sai_master_clock_t;
341 #endif
342
343 /*! @brief sai fifo feature*/
344 #if (defined(FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR) && FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR) || \
345 (defined(FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE) && FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE) || \
346 (defined(FSL_FEATURE_SAI_HAS_FIFO_PACKING) && FSL_FEATURE_SAI_HAS_FIFO_PACKING) || \
347 (defined(FSL_FEATURE_SAI_HAS_FIFO) && (FSL_FEATURE_SAI_HAS_FIFO))
348 #define FSL_SAI_HAS_FIFO_EXTEND_FEATURE 1
349 #else
350 #define FSL_SAI_HAS_FIFO_EXTEND_FEATURE 0
351 #endif
352
353 #if FSL_SAI_HAS_FIFO_EXTEND_FEATURE
354 /*! @brief sai fifo configurations */
355 typedef struct _sai_fifo
356 {
357 #if defined(FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR) && FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR
358 bool fifoContinueOneError; /*!< fifo continues when error occur */
359 #endif
360
361 #if defined(FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE) && FSL_FEATURE_SAI_HAS_FIFO_COMBINE_MODE
362 sai_fifo_combine_t fifoCombine; /*!< fifo combine mode */
363 #endif
364
365 #if defined(FSL_FEATURE_SAI_HAS_FIFO_PACKING) && FSL_FEATURE_SAI_HAS_FIFO_PACKING
366 sai_fifo_packing_t fifoPacking; /*!< fifo packing mode */
367 #endif
368 #if defined(FSL_FEATURE_SAI_HAS_FIFO) && (FSL_FEATURE_SAI_HAS_FIFO)
369 uint8_t fifoWatermark; /*!< fifo watermark */
370 #endif
371 } sai_fifo_t;
372 #endif
373
374 /*! @brief sai bit clock configurations */
375 typedef struct _sai_bit_clock
376 {
377 bool bclkSrcSwap; /*!< bit clock source swap */
378 bool bclkInputDelay; /*!< bit clock actually used by the transmitter is delayed by the pad output delay,
379 this has effect of decreasing the data input setup time, but increasing the data output valid
380 time .*/
381 sai_clock_polarity_t bclkPolarity; /*!< bit clock polarity */
382 sai_bclk_source_t bclkSource; /*!< bit Clock source */
383 } sai_bit_clock_t;
384
385 /*! @brief sai frame sync configurations */
386 typedef struct _sai_frame_sync
387 {
388 uint8_t frameSyncWidth; /*!< frame sync width in number of bit clocks */
389 bool frameSyncEarly; /*!< TRUE is frame sync assert one bit before the first bit of frame
390 FALSE is frame sync assert with the first bit of the frame */
391
392 #if defined(FSL_FEATURE_SAI_HAS_ON_DEMAND_MODE) && FSL_FEATURE_SAI_HAS_ON_DEMAND_MODE
393 bool frameSyncGenerateOnDemand; /*!< internal frame sync is generated when FIFO waring flag is clear */
394 #endif
395
396 sai_clock_polarity_t frameSyncPolarity; /*!< frame sync polarity */
397
398 } sai_frame_sync_t;
399
400 /*! @brief sai serial data configurations */
401 typedef struct _sai_serial_data
402 {
403 #if defined(FSL_FEATURE_SAI_HAS_CHANNEL_MODE) && FSL_FEATURE_SAI_HAS_CHANNEL_MODE
404 sai_data_pin_state_t dataMode; /*!< sai data pin state when slots masked or channel disabled */
405 #endif
406
407 sai_data_order_t dataOrder; /*!< configure whether the LSB or MSB is transmitted first */
408 uint8_t dataWord0Length; /*!< configure the number of bits in the first word in each frame */
409 uint8_t dataWordNLength; /*!< configure the number of bits in the each word in each frame, except the first word */
410 uint8_t dataWordLength; /*!< used to record the data length for dma transfer */
411 uint8_t
412 dataFirstBitShifted; /*!< Configure the bit index for the first bit transmitted for each word in the frame */
413 uint8_t dataWordNum; /*!< configure the number of words in each frame */
414 uint32_t dataMaskedWord; /*!< configure whether the transmit word is masked */
415 } sai_serial_data_t;
416
417 /*! @brief sai transceiver configurations */
418 typedef struct _sai_transceiver
419 {
420 sai_serial_data_t serialData; /*!< serial data configurations */
421 sai_frame_sync_t frameSync; /*!< ws configurations */
422 sai_bit_clock_t bitClock; /*!< bit clock configurations */
423 #if FSL_SAI_HAS_FIFO_EXTEND_FEATURE
424 sai_fifo_t fifo; /*!< fifo configurations */
425 #endif
426 sai_master_slave_t masterSlave; /*!< transceiver is master or slave */
427
428 sai_sync_mode_t syncMode; /*!< transceiver sync mode */
429
430 uint8_t startChannel; /*!< Transfer start channel */
431 uint8_t channelMask; /*!< enabled channel mask value, reference _sai_channel_mask */
432 uint8_t endChannel; /*!< end channel number */
433 uint8_t channelNums; /*!< Total enabled channel numbers */
434
435 } sai_transceiver_t;
436
437 /*! @brief SAI transfer structure */
438 typedef struct _sai_transfer
439 {
440 uint8_t *data; /*!< Data start address to transfer. */
441 size_t dataSize; /*!< Transfer size. */
442 } sai_transfer_t;
443
444 typedef struct _sai_handle sai_handle_t;
445
446 /*! @brief SAI transfer callback prototype */
447 typedef void (*sai_transfer_callback_t)(I2S_Type *base, sai_handle_t *handle, status_t status, void *userData);
448
449 /*! @brief SAI handle structure */
450 struct _sai_handle
451 {
452 I2S_Type *base; /*!< base address */
453
454 uint32_t state; /*!< Transfer status */
455 sai_transfer_callback_t callback; /*!< Callback function called at transfer event*/
456 void *userData; /*!< Callback parameter passed to callback function*/
457 uint8_t bitWidth; /*!< Bit width for transfer, 8/16/24/32 bits */
458
459 /* for the multi channel usage, user can provide channelMask Oonly, then sai driver will handle
460 * other parameter carefully, such as
461 * channelMask = kSAI_Channel0Mask | kSAI_Channel1Mask | kSAI_Channel4Mask
462 * then in SAI_RxSetFormat/SAI_TxSetFormat function, channel/endChannel/channelNums will be calculated.
463 * for the single channel usage, user can provide channel or channel mask only, such as,
464 * channel = 0 or channelMask = kSAI_Channel0Mask.
465 */
466 uint8_t channel; /*!< Transfer start channel */
467 uint8_t channelMask; /*!< enabled channel mask value, refernece _sai_channel_mask */
468 uint8_t endChannel; /*!< end channel number */
469 uint8_t channelNums; /*!< Total enabled channel numbers */
470
471 sai_transfer_t saiQueue[SAI_XFER_QUEUE_SIZE]; /*!< Transfer queue storing queued transfer */
472 size_t transferSize[SAI_XFER_QUEUE_SIZE]; /*!< Data bytes need to transfer */
473 volatile uint8_t queueUser; /*!< Index for user to queue transfer */
474 volatile uint8_t queueDriver; /*!< Index for driver to get the transfer data and size */
475 #if defined(FSL_FEATURE_SAI_HAS_FIFO) && (FSL_FEATURE_SAI_HAS_FIFO)
476 uint8_t watermark; /*!< Watermark value */
477 #endif
478 };
479
480 /*******************************************************************************
481 * API
482 ******************************************************************************/
483
484 #if defined(__cplusplus)
485 extern "C" {
486 #endif /*_cplusplus*/
487
488 /*!
489 * @name Initialization and deinitialization
490 * @{
491 */
492
493 /*!
494 * @brief Initializes the SAI Tx peripheral.
495 * @deprecated Do not use this function. It has been superceded by @ref SAI_Init
496 *
497 * Ungates the SAI clock, resets the module, and configures SAI Tx with a configuration structure.
498 * The configuration structure can be custom filled or set with default values by
499 * SAI_TxGetDefaultConfig().
500 *
501 * @note This API should be called at the beginning of the application to use
502 * the SAI driver. Otherwise, accessing the SAIM module can cause a hard fault
503 * because the clock is not enabled.
504 *
505 * @param base SAI base pointer
506 * @param config SAI configuration structure.
507 */
508 void SAI_TxInit(I2S_Type *base, const sai_config_t *config);
509
510 /*!
511 * @brief Initializes the SAI Rx peripheral.
512 * @deprecated Do not use this function. It has been superceded by @ref SAI_Init
513 *
514 * Ungates the SAI clock, resets the module, and configures the SAI Rx with a configuration structure.
515 * The configuration structure can be custom filled or set with default values by
516 * SAI_RxGetDefaultConfig().
517 *
518 * @note This API should be called at the beginning of the application to use
519 * the SAI driver. Otherwise, accessing the SAI module can cause a hard fault
520 * because the clock is not enabled.
521 *
522 * @param base SAI base pointer
523 * @param config SAI configuration structure.
524 */
525 void SAI_RxInit(I2S_Type *base, const sai_config_t *config);
526
527 /*!
528 * @brief Sets the SAI Tx configuration structure to default values.
529 * @deprecated Do not use this function. It has been superceded by
530 * @ref SAI_GetClassicI2SConfig, @ref SAI_GetLeftJustifiedConfig , @ref SAI_GetRightJustifiedConfig, @ref
531 SAI_GetDSPConfig, @ref SAI_GetTDMConfig
532 *
533 * This API initializes the configuration structure for use in SAI_TxConfig().
534 * The initialized structure can remain unchanged in SAI_TxConfig(), or it can be modified
535 * before calling SAI_TxConfig().
536 * This is an example.
537 @code
538 sai_config_t config;
539 SAI_TxGetDefaultConfig(&config);
540 @endcode
541 *
542 * @param config pointer to master configuration structure
543 */
544 void SAI_TxGetDefaultConfig(sai_config_t *config);
545
546 /*!
547 * @brief Sets the SAI Rx configuration structure to default values.
548 * @deprecated Do not use this function. It has been superceded by
549 * @ref SAI_GetClassicI2SConfig, @ref SAI_GetLeftJustifiedConfig , @ref SAI_GetRightJustifiedConfig, @ref
550 SAI_GetDSPConfig, @ref SAI_GetTDMConfig
551 *
552 * This API initializes the configuration structure for use in SAI_RxConfig().
553 * The initialized structure can remain unchanged in SAI_RxConfig() or it can be modified
554 * before calling SAI_RxConfig().
555 * This is an example.
556 @code
557 sai_config_t config;
558 SAI_RxGetDefaultConfig(&config);
559 @endcode
560 *
561 * @param config pointer to master configuration structure
562 */
563 void SAI_RxGetDefaultConfig(sai_config_t *config);
564
565 /*!
566 * @brief Initializes the SAI peripheral.
567 *
568 * This API gates the SAI clock. The SAI module can't operate unless SAI_Init is called to enable the clock.
569 *
570 * @param base SAI base pointer.
571 */
572 void SAI_Init(I2S_Type *base);
573
574 /*!
575 * @brief De-initializes the SAI peripheral.
576 *
577 * This API gates the SAI clock. The SAI module can't operate unless SAI_TxInit
578 * or SAI_RxInit is called to enable the clock.
579 *
580 * @param base SAI base pointer.
581 */
582 void SAI_Deinit(I2S_Type *base);
583
584 /*!
585 * @brief Resets the SAI Tx.
586 *
587 * This function enables the software reset and FIFO reset of SAI Tx. After reset, clear the reset bit.
588 *
589 * @param base SAI base pointer
590 */
591 void SAI_TxReset(I2S_Type *base);
592
593 /*!
594 * @brief Resets the SAI Rx.
595 *
596 * This function enables the software reset and FIFO reset of SAI Rx. After reset, clear the reset bit.
597 *
598 * @param base SAI base pointer
599 */
600 void SAI_RxReset(I2S_Type *base);
601
602 /*!
603 * @brief Enables/disables the SAI Tx.
604 *
605 * @param base SAI base pointer.
606 * @param enable True means enable SAI Tx, false means disable.
607 */
608 void SAI_TxEnable(I2S_Type *base, bool enable);
609
610 /*!
611 * @brief Enables/disables the SAI Rx.
612 *
613 * @param base SAI base pointer.
614 * @param enable True means enable SAI Rx, false means disable.
615 */
616 void SAI_RxEnable(I2S_Type *base, bool enable);
617
618 /*!
619 * @brief Set Rx bit clock direction.
620 *
621 * Select bit clock direction, master or slave.
622 *
623 * @param base SAI base pointer.
624 * @param masterSlave reference sai_master_slave_t.
625 */
SAI_TxSetBitClockDirection(I2S_Type * base,sai_master_slave_t masterSlave)626 static inline void SAI_TxSetBitClockDirection(I2S_Type *base, sai_master_slave_t masterSlave)
627 {
628 if (masterSlave == kSAI_Master)
629 {
630 base->TCR2 |= I2S_TCR2_BCD_MASK;
631 }
632 else
633 {
634 base->TCR2 &= ~I2S_TCR2_BCD_MASK;
635 }
636 }
637
638 /*!
639 * @brief Set Rx bit clock direction.
640 *
641 * Select bit clock direction, master or slave.
642 *
643 * @param base SAI base pointer.
644 * @param masterSlave reference sai_master_slave_t.
645 */
SAI_RxSetBitClockDirection(I2S_Type * base,sai_master_slave_t masterSlave)646 static inline void SAI_RxSetBitClockDirection(I2S_Type *base, sai_master_slave_t masterSlave)
647 {
648 if (masterSlave == kSAI_Master)
649 {
650 base->RCR2 |= I2S_RCR2_BCD_MASK;
651 }
652 else
653 {
654 base->RCR2 &= ~I2S_RCR2_BCD_MASK;
655 }
656 }
657
658 /*!
659 * @brief Set Rx frame sync direction.
660 *
661 * Select frame sync direction, master or slave.
662 *
663 * @param base SAI base pointer.
664 * @param masterSlave reference sai_master_slave_t.
665 */
SAI_RxSetFrameSyncDirection(I2S_Type * base,sai_master_slave_t masterSlave)666 static inline void SAI_RxSetFrameSyncDirection(I2S_Type *base, sai_master_slave_t masterSlave)
667 {
668 if (masterSlave == kSAI_Master)
669 {
670 base->RCR4 |= I2S_RCR4_FSD_MASK;
671 }
672 else
673 {
674 base->RCR4 &= ~I2S_RCR4_FSD_MASK;
675 }
676 }
677
678 /*!
679 * @brief Set Tx frame sync direction.
680 *
681 * Select frame sync direction, master or slave.
682 *
683 * @param base SAI base pointer.
684 * @param masterSlave reference sai_master_slave_t.
685 */
SAI_TxSetFrameSyncDirection(I2S_Type * base,sai_master_slave_t masterSlave)686 static inline void SAI_TxSetFrameSyncDirection(I2S_Type *base, sai_master_slave_t masterSlave)
687 {
688 if (masterSlave == kSAI_Master)
689 {
690 base->TCR4 |= I2S_TCR4_FSD_MASK;
691 }
692 else
693 {
694 base->TCR4 &= ~I2S_TCR4_FSD_MASK;
695 }
696 }
697
698 /*!
699 * @brief Transmitter bit clock rate configurations.
700 *
701 * @param base SAI base pointer.
702 * @param sourceClockHz Bit clock source frequency.
703 * @param sampleRate Audio data sample rate.
704 * @param bitWidth Audio data bitWidth.
705 * @param channelNumbers Audio channel numbers.
706 */
707 void SAI_TxSetBitClockRate(
708 I2S_Type *base, uint32_t sourceClockHz, uint32_t sampleRate, uint32_t bitWidth, uint32_t channelNumbers);
709
710 /*!
711 * @brief Receiver bit clock rate configurations.
712 *
713 * @param base SAI base pointer.
714 * @param sourceClockHz Bit clock source frequency.
715 * @param sampleRate Audio data sample rate.
716 * @param bitWidth Audio data bitWidth.
717 * @param channelNumbers Audio channel numbers.
718 */
719 void SAI_RxSetBitClockRate(
720 I2S_Type *base, uint32_t sourceClockHz, uint32_t sampleRate, uint32_t bitWidth, uint32_t channelNumbers);
721
722 /*!
723 * @brief Transmitter Bit clock configurations.
724 *
725 * @param base SAI base pointer.
726 * @param masterSlave master or slave.
727 * @param config bit clock other configurations, can be NULL in slave mode.
728 */
729 void SAI_TxSetBitclockConfig(I2S_Type *base, sai_master_slave_t masterSlave, sai_bit_clock_t *config);
730
731 /*!
732 * @brief Receiver Bit clock configurations.
733 *
734 * @param base SAI base pointer.
735 * @param masterSlave master or slave.
736 * @param config bit clock other configurations, can be NULL in slave mode.
737 */
738 void SAI_RxSetBitclockConfig(I2S_Type *base, sai_master_slave_t masterSlave, sai_bit_clock_t *config);
739
740 #if (defined(FSL_FEATURE_SAI_HAS_MCR) && (FSL_FEATURE_SAI_HAS_MCR)) || \
741 (defined(FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER) && (FSL_FEATURE_SAI_HAS_MCLKDIV_REGISTER))
742 /*!
743 * @brief Master clock configurations.
744 *
745 * @param base SAI base pointer.
746 * @param config master clock configurations.
747 */
748 void SAI_SetMasterClockConfig(I2S_Type *base, sai_master_clock_t *config);
749 #endif
750
751 #if FSL_SAI_HAS_FIFO_EXTEND_FEATURE
752 /*!
753 * @brief SAI transmitter fifo configurations.
754 *
755 * @param base SAI base pointer.
756 * @param config fifo configurations.
757 */
758 void SAI_TxSetFifoConfig(I2S_Type *base, sai_fifo_t *config);
759
760 /*!
761 * @brief SAI receiver fifo configurations.
762 *
763 * @param base SAI base pointer.
764 * @param config fifo configurations.
765 */
766 void SAI_RxSetFifoConfig(I2S_Type *base, sai_fifo_t *config);
767 #endif
768
769 /*!
770 * @brief SAI transmitter Frame sync configurations.
771 *
772 * @param base SAI base pointer.
773 * @param masterSlave master or slave.
774 * @param config frame sync configurations, can be NULL in slave mode.
775 */
776 void SAI_TxSetFrameSyncConfig(I2S_Type *base, sai_master_slave_t masterSlave, sai_frame_sync_t *config);
777
778 /*!
779 * @brief SAI receiver Frame sync configurations.
780 *
781 * @param base SAI base pointer.
782 * @param masterSlave master or slave.
783 * @param config frame sync configurations, can be NULL in slave mode.
784 */
785 void SAI_RxSetFrameSyncConfig(I2S_Type *base, sai_master_slave_t masterSlave, sai_frame_sync_t *config);
786
787 /*!
788 * @brief SAI transmitter Serial data configurations.
789 *
790 * @param base SAI base pointer.
791 * @param config serial data configurations.
792 */
793 void SAI_TxSetSerialDataConfig(I2S_Type *base, sai_serial_data_t *config);
794
795 /*!
796 * @brief SAI receiver Serial data configurations.
797 *
798 * @param base SAI base pointer.
799 * @param config serial data configurations.
800 */
801 void SAI_RxSetSerialDataConfig(I2S_Type *base, sai_serial_data_t *config);
802
803 /*!
804 * @brief SAI transmitter configurations.
805 *
806 * @param base SAI base pointer.
807 * @param config transmitter configurations.
808 */
809 void SAI_TxSetConfig(I2S_Type *base, sai_transceiver_t *config);
810
811 /*!
812 * @brief SAI receiver configurations.
813 *
814 * @param base SAI base pointer.
815 * @param config receiver configurations.
816 */
817 void SAI_RxSetConfig(I2S_Type *base, sai_transceiver_t *config);
818
819 /*!
820 * @brief Get classic I2S mode configurations.
821 *
822 * @param config transceiver configurations.
823 * @param bitWidth audio data bitWidth.
824 * @param mode audio data channel.
825 * @param saiChannelMask mask value of the channel to be enable.
826 */
827 void SAI_GetClassicI2SConfig(sai_transceiver_t *config,
828 sai_word_width_t bitWidth,
829 sai_mono_stereo_t mode,
830 uint32_t saiChannelMask);
831
832 /*!
833 * @brief Get left justified mode configurations.
834 *
835 * @param config transceiver configurations.
836 * @param bitWidth audio data bitWidth.
837 * @param mode audio data channel.
838 * @param saiChannelMask mask value of the channel to be enable.
839 */
840 void SAI_GetLeftJustifiedConfig(sai_transceiver_t *config,
841 sai_word_width_t bitWidth,
842 sai_mono_stereo_t mode,
843 uint32_t saiChannelMask);
844
845 /*!
846 * @brief Get right justified mode configurations.
847 *
848 * @param config transceiver configurations.
849 * @param bitWidth audio data bitWidth.
850 * @param mode audio data channel.
851 * @param saiChannelMask mask value of the channel to be enable.
852 */
853 void SAI_GetRightJustifiedConfig(sai_transceiver_t *config,
854 sai_word_width_t bitWidth,
855 sai_mono_stereo_t mode,
856 uint32_t saiChannelMask);
857
858 /*!
859 * @brief Get TDM mode configurations.
860 *
861 * @param config transceiver configurations.
862 * @param frameSyncWidth length of frame sync.
863 * @param bitWidth audio data word width.
864 * @param dataWordNum word number in one frame.
865 * @param saiChannelMask mask value of the channel to be enable.
866 */
867 void SAI_GetTDMConfig(sai_transceiver_t *config,
868 sai_frame_sync_len_t frameSyncWidth,
869 sai_word_width_t bitWidth,
870 uint32_t dataWordNum,
871 uint32_t saiChannelMask);
872
873 /*!
874 * @brief Get DSP mode configurations.
875 *
876 * @note DSP mode is also called PCM mode which support MODE A and MODE B,
877 * DSP/PCM MODE A configuration flow. RX is similiar but uses SAI_RxSetConfig instead of SAI_TxSetConfig:
878 * @code
879 * SAI_GetDSPConfig(config, kSAI_FrameSyncLenOneBitClk, bitWidth, kSAI_Stereo, channelMask)
880 * config->frameSync.frameSyncEarly = true;
881 * SAI_TxSetConfig(base, config)
882 * @endcode
883 *
884 * DSP/PCM MODE B configuration flow for TX. RX is similiar but uses SAI_RxSetConfig instead of SAI_TxSetConfig:
885 * @code
886 * SAI_GetDSPConfig(config, kSAI_FrameSyncLenOneBitClk, bitWidth, kSAI_Stereo, channelMask)
887 * SAI_TxSetConfig(base, config)
888 * @endcode
889 *
890 * @param config transceiver configurations.
891 * @param frameSyncWidth length of frame sync.
892 * @param bitWidth audio data bitWidth.
893 * @param mode audio data channel.
894 * @param saiChannelMask mask value of the channel to enable.
895 */
896 void SAI_GetDSPConfig(sai_transceiver_t *config,
897 sai_frame_sync_len_t frameSyncWidth,
898 sai_word_width_t bitWidth,
899 sai_mono_stereo_t mode,
900 uint32_t saiChannelMask);
901 /*! @} */
902
903 /*!
904 * @name Status
905 * @{
906 */
907
908 /*!
909 * @brief Gets the SAI Tx status flag state.
910 *
911 * @param base SAI base pointer
912 * @return SAI Tx status flag value. Use the Status Mask to get the status value needed.
913 */
SAI_TxGetStatusFlag(I2S_Type * base)914 static inline uint32_t SAI_TxGetStatusFlag(I2S_Type *base)
915 {
916 return base->TCSR;
917 }
918
919 /*!
920 * @brief Clears the SAI Tx status flag state.
921 *
922 * @param base SAI base pointer
923 * @param mask State mask. It can be a combination of the following source if defined:
924 * @arg kSAI_WordStartFlag
925 * @arg kSAI_SyncErrorFlag
926 * @arg kSAI_FIFOErrorFlag
927 */
SAI_TxClearStatusFlags(I2S_Type * base,uint32_t mask)928 static inline void SAI_TxClearStatusFlags(I2S_Type *base, uint32_t mask)
929 {
930 base->TCSR = ((base->TCSR & 0xFFE3FFFFU) | mask);
931 }
932
933 /*!
934 * @brief Gets the SAI Tx status flag state.
935 *
936 * @param base SAI base pointer
937 * @return SAI Rx status flag value. Use the Status Mask to get the status value needed.
938 */
SAI_RxGetStatusFlag(I2S_Type * base)939 static inline uint32_t SAI_RxGetStatusFlag(I2S_Type *base)
940 {
941 return base->RCSR;
942 }
943
944 /*!
945 * @brief Clears the SAI Rx status flag state.
946 *
947 * @param base SAI base pointer
948 * @param mask State mask. It can be a combination of the following sources if defined.
949 * @arg kSAI_WordStartFlag
950 * @arg kSAI_SyncErrorFlag
951 * @arg kSAI_FIFOErrorFlag
952 */
SAI_RxClearStatusFlags(I2S_Type * base,uint32_t mask)953 static inline void SAI_RxClearStatusFlags(I2S_Type *base, uint32_t mask)
954 {
955 base->RCSR = ((base->RCSR & 0xFFE3FFFFU) | mask);
956 }
957
958 /*!
959 * @brief Do software reset or FIFO reset .
960 *
961 * FIFO reset means clear all the data in the FIFO, and make the FIFO pointer both to 0.
962 * Software reset means clear the Tx internal logic, including the bit clock, frame count etc. But software
963 * reset will not clear any configuration registers like TCR1~TCR5.
964 * This function will also clear all the error flags such as FIFO error, sync error etc.
965 *
966 * @param base SAI base pointer
967 * @param tresetType Reset type, FIFO reset or software reset
968 */
969 void SAI_TxSoftwareReset(I2S_Type *base, sai_reset_type_t resetType);
970
971 /*!
972 * @brief Do software reset or FIFO reset .
973 *
974 * FIFO reset means clear all the data in the FIFO, and make the FIFO pointer both to 0.
975 * Software reset means clear the Rx internal logic, including the bit clock, frame count etc. But software
976 * reset will not clear any configuration registers like RCR1~RCR5.
977 * This function will also clear all the error flags such as FIFO error, sync error etc.
978 *
979 * @param base SAI base pointer
980 * @param resetType Reset type, FIFO reset or software reset
981 */
982 void SAI_RxSoftwareReset(I2S_Type *base, sai_reset_type_t resetType);
983
984 /*!
985 * @brief Set the Tx channel FIFO enable mask.
986 *
987 * @param base SAI base pointer
988 * @param mask Channel enable mask, 0 means all channel FIFO disabled, 1 means channel 0 enabled,
989 * 3 means both channel 0 and channel 1 enabled.
990 */
991 void SAI_TxSetChannelFIFOMask(I2S_Type *base, uint8_t mask);
992
993 /*!
994 * @brief Set the Rx channel FIFO enable mask.
995 *
996 * @param base SAI base pointer
997 * @param mask Channel enable mask, 0 means all channel FIFO disabled, 1 means channel 0 enabled,
998 * 3 means both channel 0 and channel 1 enabled.
999 */
1000 void SAI_RxSetChannelFIFOMask(I2S_Type *base, uint8_t mask);
1001
1002 /*!
1003 * @brief Set the Tx data order.
1004 *
1005 * @param base SAI base pointer
1006 * @param order Data order MSB or LSB
1007 */
1008 void SAI_TxSetDataOrder(I2S_Type *base, sai_data_order_t order);
1009
1010 /*!
1011 * @brief Set the Rx data order.
1012 *
1013 * @param base SAI base pointer
1014 * @param order Data order MSB or LSB
1015 */
1016 void SAI_RxSetDataOrder(I2S_Type *base, sai_data_order_t order);
1017
1018 /*!
1019 * @brief Set the Tx data order.
1020 *
1021 * @param base SAI base pointer
1022 * @param polarity
1023 */
1024 void SAI_TxSetBitClockPolarity(I2S_Type *base, sai_clock_polarity_t polarity);
1025
1026 /*!
1027 * @brief Set the Rx data order.
1028 *
1029 * @param base SAI base pointer
1030 * @param polarity
1031 */
1032 void SAI_RxSetBitClockPolarity(I2S_Type *base, sai_clock_polarity_t polarity);
1033
1034 /*!
1035 * @brief Set the Tx data order.
1036 *
1037 * @param base SAI base pointer
1038 * @param polarity
1039 */
1040 void SAI_TxSetFrameSyncPolarity(I2S_Type *base, sai_clock_polarity_t polarity);
1041
1042 /*!
1043 * @brief Set the Rx data order.
1044 *
1045 * @param base SAI base pointer
1046 * @param polarity
1047 */
1048 void SAI_RxSetFrameSyncPolarity(I2S_Type *base, sai_clock_polarity_t polarity);
1049
1050 #if defined(FSL_FEATURE_SAI_HAS_FIFO_PACKING) && FSL_FEATURE_SAI_HAS_FIFO_PACKING
1051 /*!
1052 * @brief Set Tx FIFO packing feature.
1053 *
1054 * @param base SAI base pointer.
1055 * @param pack FIFO pack type. It is element of sai_fifo_packing_t.
1056 */
1057 void SAI_TxSetFIFOPacking(I2S_Type *base, sai_fifo_packing_t pack);
1058
1059 /*!
1060 * @brief Set Rx FIFO packing feature.
1061 *
1062 * @param base SAI base pointer.
1063 * @param pack FIFO pack type. It is element of sai_fifo_packing_t.
1064 */
1065 void SAI_RxSetFIFOPacking(I2S_Type *base, sai_fifo_packing_t pack);
1066 #endif /* FSL_FEATURE_SAI_HAS_FIFO_PACKING */
1067
1068 #if defined(FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR) && FSL_FEATURE_SAI_HAS_FIFO_FUNCTION_AFTER_ERROR
1069 /*!
1070 * @brief Set Tx FIFO error continue.
1071 *
1072 * FIFO error continue mode means SAI will keep running while FIFO error occurred. If this feature
1073 * not enabled, SAI will hang and users need to clear FEF flag in TCSR register.
1074 *
1075 * @param base SAI base pointer.
1076 * @param isEnabled Is FIFO error continue enabled, true means enable, false means disable.
1077 */
SAI_TxSetFIFOErrorContinue(I2S_Type * base,bool isEnabled)1078 static inline void SAI_TxSetFIFOErrorContinue(I2S_Type *base, bool isEnabled)
1079 {
1080 if (isEnabled)
1081 {
1082 base->TCR4 |= I2S_TCR4_FCONT_MASK;
1083 }
1084 else
1085 {
1086 base->TCR4 &= ~I2S_TCR4_FCONT_MASK;
1087 }
1088 }
1089
1090 /*!
1091 * @brief Set Rx FIFO error continue.
1092 *
1093 * FIFO error continue mode means SAI will keep running while FIFO error occurred. If this feature
1094 * not enabled, SAI will hang and users need to clear FEF flag in RCSR register.
1095 *
1096 * @param base SAI base pointer.
1097 * @param isEnabled Is FIFO error continue enabled, true means enable, false means disable.
1098 */
SAI_RxSetFIFOErrorContinue(I2S_Type * base,bool isEnabled)1099 static inline void SAI_RxSetFIFOErrorContinue(I2S_Type *base, bool isEnabled)
1100 {
1101 if (isEnabled)
1102 {
1103 base->RCR4 |= I2S_RCR4_FCONT_MASK;
1104 }
1105 else
1106 {
1107 base->RCR4 &= ~I2S_RCR4_FCONT_MASK;
1108 }
1109 }
1110 #endif
1111
1112 /*! @} */
1113
1114 /*!
1115 * @name Interrupts
1116 * @{
1117 */
1118
1119 /*!
1120 * @brief Enables the SAI Tx interrupt requests.
1121 *
1122 * @param base SAI base pointer
1123 * @param mask interrupt source
1124 * The parameter can be a combination of the following sources if defined.
1125 * @arg kSAI_WordStartInterruptEnable
1126 * @arg kSAI_SyncErrorInterruptEnable
1127 * @arg kSAI_FIFOWarningInterruptEnable
1128 * @arg kSAI_FIFORequestInterruptEnable
1129 * @arg kSAI_FIFOErrorInterruptEnable
1130 */
SAI_TxEnableInterrupts(I2S_Type * base,uint32_t mask)1131 static inline void SAI_TxEnableInterrupts(I2S_Type *base, uint32_t mask)
1132 {
1133 base->TCSR = ((base->TCSR & 0xFFE3FFFFU) | mask);
1134 }
1135
1136 /*!
1137 * @brief Enables the SAI Rx interrupt requests.
1138 *
1139 * @param base SAI base pointer
1140 * @param mask interrupt source
1141 * The parameter can be a combination of the following sources if defined.
1142 * @arg kSAI_WordStartInterruptEnable
1143 * @arg kSAI_SyncErrorInterruptEnable
1144 * @arg kSAI_FIFOWarningInterruptEnable
1145 * @arg kSAI_FIFORequestInterruptEnable
1146 * @arg kSAI_FIFOErrorInterruptEnable
1147 */
SAI_RxEnableInterrupts(I2S_Type * base,uint32_t mask)1148 static inline void SAI_RxEnableInterrupts(I2S_Type *base, uint32_t mask)
1149 {
1150 base->RCSR = ((base->RCSR & 0xFFE3FFFFU) | mask);
1151 }
1152
1153 /*!
1154 * @brief Disables the SAI Tx interrupt requests.
1155 *
1156 * @param base SAI base pointer
1157 * @param mask interrupt source
1158 * The parameter can be a combination of the following sources if defined.
1159 * @arg kSAI_WordStartInterruptEnable
1160 * @arg kSAI_SyncErrorInterruptEnable
1161 * @arg kSAI_FIFOWarningInterruptEnable
1162 * @arg kSAI_FIFORequestInterruptEnable
1163 * @arg kSAI_FIFOErrorInterruptEnable
1164 */
SAI_TxDisableInterrupts(I2S_Type * base,uint32_t mask)1165 static inline void SAI_TxDisableInterrupts(I2S_Type *base, uint32_t mask)
1166 {
1167 base->TCSR = ((base->TCSR & 0xFFE3FFFFU) & (~mask));
1168 }
1169
1170 /*!
1171 * @brief Disables the SAI Rx interrupt requests.
1172 *
1173 * @param base SAI base pointer
1174 * @param mask interrupt source
1175 * The parameter can be a combination of the following sources if defined.
1176 * @arg kSAI_WordStartInterruptEnable
1177 * @arg kSAI_SyncErrorInterruptEnable
1178 * @arg kSAI_FIFOWarningInterruptEnable
1179 * @arg kSAI_FIFORequestInterruptEnable
1180 * @arg kSAI_FIFOErrorInterruptEnable
1181 */
SAI_RxDisableInterrupts(I2S_Type * base,uint32_t mask)1182 static inline void SAI_RxDisableInterrupts(I2S_Type *base, uint32_t mask)
1183 {
1184 base->RCSR = ((base->RCSR & 0xFFE3FFFFU) & (~mask));
1185 }
1186
1187 /*! @} */
1188
1189 /*!
1190 * @name DMA Control
1191 * @{
1192 */
1193
1194 /*!
1195 * @brief Enables/disables the SAI Tx DMA requests.
1196 * @param base SAI base pointer
1197 * @param mask DMA source
1198 * The parameter can be combination of the following sources if defined.
1199 * @arg kSAI_FIFOWarningDMAEnable
1200 * @arg kSAI_FIFORequestDMAEnable
1201 * @param enable True means enable DMA, false means disable DMA.
1202 */
SAI_TxEnableDMA(I2S_Type * base,uint32_t mask,bool enable)1203 static inline void SAI_TxEnableDMA(I2S_Type *base, uint32_t mask, bool enable)
1204 {
1205 if (enable)
1206 {
1207 base->TCSR = ((base->TCSR & 0xFFE3FFFFU) | mask);
1208 }
1209 else
1210 {
1211 base->TCSR = ((base->TCSR & 0xFFE3FFFFU) & (~mask));
1212 }
1213 }
1214
1215 /*!
1216 * @brief Enables/disables the SAI Rx DMA requests.
1217 * @param base SAI base pointer
1218 * @param mask DMA source
1219 * The parameter can be a combination of the following sources if defined.
1220 * @arg kSAI_FIFOWarningDMAEnable
1221 * @arg kSAI_FIFORequestDMAEnable
1222 * @param enable True means enable DMA, false means disable DMA.
1223 */
SAI_RxEnableDMA(I2S_Type * base,uint32_t mask,bool enable)1224 static inline void SAI_RxEnableDMA(I2S_Type *base, uint32_t mask, bool enable)
1225 {
1226 if (enable)
1227 {
1228 base->RCSR = ((base->RCSR & 0xFFE3FFFFU) | mask);
1229 }
1230 else
1231 {
1232 base->RCSR = ((base->RCSR & 0xFFE3FFFFU) & (~mask));
1233 }
1234 }
1235
1236 /*!
1237 * @brief Gets the SAI Tx data register address.
1238 *
1239 * This API is used to provide a transfer address for the SAI DMA transfer configuration.
1240 *
1241 * @param base SAI base pointer.
1242 * @param channel Which data channel used.
1243 * @return data register address.
1244 */
SAI_TxGetDataRegisterAddress(I2S_Type * base,uint32_t channel)1245 static inline uintptr_t SAI_TxGetDataRegisterAddress(I2S_Type *base, uint32_t channel)
1246 {
1247 return (uintptr_t)(&(base->TDR)[channel]);
1248 }
1249
1250 /*!
1251 * @brief Gets the SAI Rx data register address.
1252 *
1253 * This API is used to provide a transfer address for the SAI DMA transfer configuration.
1254 *
1255 * @param base SAI base pointer.
1256 * @param channel Which data channel used.
1257 * @return data register address.
1258 */
SAI_RxGetDataRegisterAddress(I2S_Type * base,uint32_t channel)1259 static inline uintptr_t SAI_RxGetDataRegisterAddress(I2S_Type *base, uint32_t channel)
1260 {
1261 return (uintptr_t)(&(base->RDR)[channel]);
1262 }
1263
1264 /*! @} */
1265
1266 /*!
1267 * @name Bus Operations
1268 * @{
1269 */
1270
1271 /*!
1272 * @brief Configures the SAI Tx audio format.
1273 * @deprecated Do not use this function. It has been superceded by @ref SAI_TxSetConfig
1274 *
1275 * The audio format can be changed at run-time. This function configures the sample rate and audio data
1276 * format to be transferred.
1277 *
1278 * @param base SAI base pointer.
1279 * @param format Pointer to the SAI audio data format structure.
1280 * @param mclkSourceClockHz SAI master clock source frequency in Hz.
1281 * @param bclkSourceClockHz SAI bit clock source frequency in Hz. If the bit clock source is a master
1282 * clock, this value should equal the masterClockHz.
1283 */
1284 void SAI_TxSetFormat(I2S_Type *base,
1285 sai_transfer_format_t *format,
1286 uint32_t mclkSourceClockHz,
1287 uint32_t bclkSourceClockHz);
1288
1289 /*!
1290 * @brief Configures the SAI Rx audio format.
1291 * @deprecated Do not use this function. It has been superceded by @ref SAI_RxSetConfig
1292 *
1293 * The audio format can be changed at run-time. This function configures the sample rate and audio data
1294 * format to be transferred.
1295 *
1296 * @param base SAI base pointer.
1297 * @param format Pointer to the SAI audio data format structure.
1298 * @param mclkSourceClockHz SAI master clock source frequency in Hz.
1299 * @param bclkSourceClockHz SAI bit clock source frequency in Hz. If the bit clock source is a master
1300 * clock, this value should equal the masterClockHz.
1301 */
1302 void SAI_RxSetFormat(I2S_Type *base,
1303 sai_transfer_format_t *format,
1304 uint32_t mclkSourceClockHz,
1305 uint32_t bclkSourceClockHz);
1306
1307 /*!
1308 * @brief Sends data using a blocking method.
1309 *
1310 * @note This function blocks by polling until data is ready to be sent.
1311 *
1312 * @param base SAI base pointer.
1313 * @param channel Data channel used.
1314 * @param bitWidth How many bits in an audio word; usually 8/16/24/32 bits.
1315 * @param buffer Pointer to the data to be written.
1316 * @param size Bytes to be written.
1317 */
1318 void SAI_WriteBlocking(I2S_Type *base, uint32_t channel, uint32_t bitWidth, uint8_t *buffer, uint32_t size);
1319
1320 /*!
1321 * @brief Sends data to multi channel using a blocking method.
1322 *
1323 * @note This function blocks by polling until data is ready to be sent.
1324 *
1325 * @param base SAI base pointer.
1326 * @param channel Data channel used.
1327 * @param channelMask channel mask.
1328 * @param bitWidth How many bits in an audio word; usually 8/16/24/32 bits.
1329 * @param buffer Pointer to the data to be written.
1330 * @param size Bytes to be written.
1331 */
1332 void SAI_WriteMultiChannelBlocking(
1333 I2S_Type *base, uint32_t channel, uint32_t channelMask, uint32_t bitWidth, uint8_t *buffer, uint32_t size);
1334
1335 /*!
1336 * @brief Writes data into SAI FIFO.
1337 *
1338 * @param base SAI base pointer.
1339 * @param channel Data channel used.
1340 * @param data Data needs to be written.
1341 */
SAI_WriteData(I2S_Type * base,uint32_t channel,uint32_t data)1342 static inline void SAI_WriteData(I2S_Type *base, uint32_t channel, uint32_t data)
1343 {
1344 base->TDR[channel] = data;
1345 }
1346
1347 /*!
1348 * @brief Receives data using a blocking method.
1349 *
1350 * @note This function blocks by polling until data is ready to be sent.
1351 *
1352 * @param base SAI base pointer.
1353 * @param channel Data channel used.
1354 * @param bitWidth How many bits in an audio word; usually 8/16/24/32 bits.
1355 * @param buffer Pointer to the data to be read.
1356 * @param size Bytes to be read.
1357 */
1358 void SAI_ReadBlocking(I2S_Type *base, uint32_t channel, uint32_t bitWidth, uint8_t *buffer, uint32_t size);
1359
1360 /*!
1361 * @brief Receives multi channel data using a blocking method.
1362 *
1363 * @note This function blocks by polling until data is ready to be sent.
1364 *
1365 * @param base SAI base pointer.
1366 * @param channel Data channel used.
1367 * @param channelMask channel mask.
1368 * @param bitWidth How many bits in an audio word; usually 8/16/24/32 bits.
1369 * @param buffer Pointer to the data to be read.
1370 * @param size Bytes to be read.
1371 */
1372 void SAI_ReadMultiChannelBlocking(
1373 I2S_Type *base, uint32_t channel, uint32_t channelMask, uint32_t bitWidth, uint8_t *buffer, uint32_t size);
1374
1375 /*!
1376 * @brief Reads data from the SAI FIFO.
1377 *
1378 * @param base SAI base pointer.
1379 * @param channel Data channel used.
1380 * @return Data in SAI FIFO.
1381 */
SAI_ReadData(I2S_Type * base,uint32_t channel)1382 static inline uint32_t SAI_ReadData(I2S_Type *base, uint32_t channel)
1383 {
1384 return base->RDR[channel];
1385 }
1386
1387 /*! @} */
1388
1389 /*!
1390 * @name Transactional
1391 * @{
1392 */
1393
1394 /*!
1395 * @brief Initializes the SAI Tx handle.
1396 *
1397 * This function initializes the Tx handle for the SAI Tx transactional APIs. Call
1398 * this function once to get the handle initialized.
1399 *
1400 * @param base SAI base pointer
1401 * @param handle SAI handle pointer.
1402 * @param callback Pointer to the user callback function.
1403 * @param userData User parameter passed to the callback function
1404 */
1405 void SAI_TransferTxCreateHandle(I2S_Type *base, sai_handle_t *handle, sai_transfer_callback_t callback, void *userData);
1406
1407 /*!
1408 * @brief Initializes the SAI Rx handle.
1409 *
1410 * This function initializes the Rx handle for the SAI Rx transactional APIs. Call
1411 * this function once to get the handle initialized.
1412 *
1413 * @param base SAI base pointer.
1414 * @param handle SAI handle pointer.
1415 * @param callback Pointer to the user callback function.
1416 * @param userData User parameter passed to the callback function.
1417 */
1418 void SAI_TransferRxCreateHandle(I2S_Type *base, sai_handle_t *handle, sai_transfer_callback_t callback, void *userData);
1419
1420 /*!
1421 * @brief SAI transmitter transfer configurations.
1422 *
1423 * This function initializes the Tx, include bit clock, frame sync, master clock, serial data and fifo
1424 * configurations.
1425 *
1426 * @param base SAI base pointer.
1427 * @param handle SAI handle pointer.
1428 * @param config tranmitter configurations.
1429 */
1430 void SAI_TransferTxSetConfig(I2S_Type *base, sai_handle_t *handle, sai_transceiver_t *config);
1431
1432 /*!
1433 * @brief SAI receiver transfer configurations.
1434 *
1435 * This function initializes the Rx, include bit clock, frame sync, master clock, serial data and fifo
1436 * configurations.
1437 *
1438 * @param base SAI base pointer.
1439 * @param handle SAI handle pointer.
1440 * @param config receiver configurations.
1441 */
1442 void SAI_TransferRxSetConfig(I2S_Type *base, sai_handle_t *handle, sai_transceiver_t *config);
1443
1444 /*!
1445 * @brief Configures the SAI Tx audio format.
1446 * @deprecated Do not use this function. It has been superceded by @ref SAI_TransferTxSetConfig
1447 *
1448 * The audio format can be changed at run-time. This function configures the sample rate and audio data
1449 * format to be transferred.
1450 *
1451 * @param base SAI base pointer.
1452 * @param handle SAI handle pointer.
1453 * @param format Pointer to the SAI audio data format structure.
1454 * @param mclkSourceClockHz SAI master clock source frequency in Hz.
1455 * @param bclkSourceClockHz SAI bit clock source frequency in Hz. If a bit clock source is a master
1456 * clock, this value should equal the masterClockHz in format.
1457 * @return Status of this function. Return value is the status_t.
1458 */
1459 status_t SAI_TransferTxSetFormat(I2S_Type *base,
1460 sai_handle_t *handle,
1461 sai_transfer_format_t *format,
1462 uint32_t mclkSourceClockHz,
1463 uint32_t bclkSourceClockHz);
1464
1465 /*!
1466 * @brief Configures the SAI Rx audio format.
1467 * @deprecated Do not use this function. It has been superceded by @ref SAI_TransferRxSetConfig
1468 *
1469 * The audio format can be changed at run-time. This function configures the sample rate and audio data
1470 * format to be transferred.
1471 *
1472 * @param base SAI base pointer.
1473 * @param handle SAI handle pointer.
1474 * @param format Pointer to the SAI audio data format structure.
1475 * @param mclkSourceClockHz SAI master clock source frequency in Hz.
1476 * @param bclkSourceClockHz SAI bit clock source frequency in Hz. If a bit clock source is a master
1477 * clock, this value should equal the masterClockHz in format.
1478 * @return Status of this function. Return value is one of status_t.
1479 */
1480 status_t SAI_TransferRxSetFormat(I2S_Type *base,
1481 sai_handle_t *handle,
1482 sai_transfer_format_t *format,
1483 uint32_t mclkSourceClockHz,
1484 uint32_t bclkSourceClockHz);
1485
1486 /*!
1487 * @brief Performs an interrupt non-blocking send transfer on SAI.
1488 *
1489 * @note This API returns immediately after the transfer initiates.
1490 * Call the SAI_TxGetTransferStatusIRQ to poll the transfer status and check whether
1491 * the transfer is finished. If the return status is not kStatus_SAI_Busy, the transfer
1492 * is finished.
1493 *
1494 * @param base SAI base pointer.
1495 * @param handle Pointer to the sai_handle_t structure which stores the transfer state.
1496 * @param xfer Pointer to the sai_transfer_t structure.
1497 * @retval kStatus_Success Successfully started the data receive.
1498 * @retval kStatus_SAI_TxBusy Previous receive still not finished.
1499 * @retval kStatus_InvalidArgument The input parameter is invalid.
1500 */
1501 status_t SAI_TransferSendNonBlocking(I2S_Type *base, sai_handle_t *handle, sai_transfer_t *xfer);
1502
1503 /*!
1504 * @brief Performs an interrupt non-blocking receive transfer on SAI.
1505 *
1506 * @note This API returns immediately after the transfer initiates.
1507 * Call the SAI_RxGetTransferStatusIRQ to poll the transfer status and check whether
1508 * the transfer is finished. If the return status is not kStatus_SAI_Busy, the transfer
1509 * is finished.
1510 *
1511 * @param base SAI base pointer
1512 * @param handle Pointer to the sai_handle_t structure which stores the transfer state.
1513 * @param xfer Pointer to the sai_transfer_t structure.
1514 * @retval kStatus_Success Successfully started the data receive.
1515 * @retval kStatus_SAI_RxBusy Previous receive still not finished.
1516 * @retval kStatus_InvalidArgument The input parameter is invalid.
1517 */
1518 status_t SAI_TransferReceiveNonBlocking(I2S_Type *base, sai_handle_t *handle, sai_transfer_t *xfer);
1519
1520 /*!
1521 * @brief Gets a set byte count.
1522 *
1523 * @param base SAI base pointer.
1524 * @param handle Pointer to the sai_handle_t structure which stores the transfer state.
1525 * @param count Bytes count sent.
1526 * @retval kStatus_Success Succeed get the transfer count.
1527 * @retval kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress.
1528 */
1529 status_t SAI_TransferGetSendCount(I2S_Type *base, sai_handle_t *handle, size_t *count);
1530
1531 /*!
1532 * @brief Gets a received byte count.
1533 *
1534 * @param base SAI base pointer.
1535 * @param handle Pointer to the sai_handle_t structure which stores the transfer state.
1536 * @param count Bytes count received.
1537 * @retval kStatus_Success Succeed get the transfer count.
1538 * @retval kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress.
1539 */
1540 status_t SAI_TransferGetReceiveCount(I2S_Type *base, sai_handle_t *handle, size_t *count);
1541
1542 /*!
1543 * @brief Aborts the current send.
1544 *
1545 * @note This API can be called any time when an interrupt non-blocking transfer initiates
1546 * to abort the transfer early.
1547 *
1548 * @param base SAI base pointer.
1549 * @param handle Pointer to the sai_handle_t structure which stores the transfer state.
1550 */
1551 void SAI_TransferAbortSend(I2S_Type *base, sai_handle_t *handle);
1552
1553 /*!
1554 * @brief Aborts the current IRQ receive.
1555 *
1556 * @note This API can be called when an interrupt non-blocking transfer initiates
1557 * to abort the transfer early.
1558 *
1559 * @param base SAI base pointer
1560 * @param handle Pointer to the sai_handle_t structure which stores the transfer state.
1561 */
1562 void SAI_TransferAbortReceive(I2S_Type *base, sai_handle_t *handle);
1563
1564 /*!
1565 * @brief Terminate all SAI send.
1566 *
1567 * This function will clear all transfer slots buffered in the sai queue. If users only want to abort the
1568 * current transfer slot, please call SAI_TransferAbortSend.
1569 *
1570 * @param base SAI base pointer.
1571 * @param handle SAI eDMA handle pointer.
1572 */
1573 void SAI_TransferTerminateSend(I2S_Type *base, sai_handle_t *handle);
1574
1575 /*!
1576 * @brief Terminate all SAI receive.
1577 *
1578 * This function will clear all transfer slots buffered in the sai queue. If users only want to abort the
1579 * current transfer slot, please call SAI_TransferAbortReceive.
1580 *
1581 * @param base SAI base pointer.
1582 * @param handle SAI eDMA handle pointer.
1583 */
1584 void SAI_TransferTerminateReceive(I2S_Type *base, sai_handle_t *handle);
1585
1586 /*!
1587 * @brief Tx interrupt handler.
1588 *
1589 * @param base SAI base pointer.
1590 * @param handle Pointer to the sai_handle_t structure.
1591 */
1592 void SAI_TransferTxHandleIRQ(I2S_Type *base, sai_handle_t *handle);
1593
1594 /*!
1595 * @brief Tx interrupt handler.
1596 *
1597 * @param base SAI base pointer.
1598 * @param handle Pointer to the sai_handle_t structure.
1599 */
1600 void SAI_TransferRxHandleIRQ(I2S_Type *base, sai_handle_t *handle);
1601
1602 /*! @} */
1603
1604 #if defined(__cplusplus)
1605 }
1606 #endif /*_cplusplus*/
1607
1608 /*! @} */
1609
1610 #endif /* _FSL_SAI_H_ */
1611
