1/* ------------------------------------------------------------------------- */
2/*  @file:    startup_MK22F12810.s                                           */
3/*  @purpose: CMSIS Cortex-M4 Core Device Startup File                       */
4/*            MK22F12810                                                     */
5/*  @version: 1.6                                                            */
6/*  @date:    2015-2-19                                                      */
7/*  @build:   b190918                                                        */
8/* ------------------------------------------------------------------------- */
9/*                                                                           */
10/* Copyright 1997-2016 Freescale Semiconductor, Inc.                         */
11/* Copyright 2016-2019 NXP                                                   */
12/* All rights reserved.                                                      */
13/*                                                                           */
14/* SPDX-License-Identifier: BSD-3-Clause                                     */
15/*****************************************************************************/
16/* Version: GCC for ARM Embedded Processors                                  */
17/*****************************************************************************/
18    .syntax unified
19    .arch armv7-m
20
21    .section .isr_vector, "a"
22    .align 2
23    .globl __isr_vector
24__isr_vector:
25    .long   __StackTop                                      /* Top of Stack */
26    .long   Reset_Handler                                   /* Reset Handler */
27    .long   NMI_Handler                                     /* NMI Handler*/
28    .long   HardFault_Handler                               /* Hard Fault Handler*/
29    .long   MemManage_Handler                               /* MPU Fault Handler*/
30    .long   BusFault_Handler                                /* Bus Fault Handler*/
31    .long   UsageFault_Handler                              /* Usage Fault Handler*/
32    .long   0                                               /* Reserved*/
33    .long   0                                               /* Reserved*/
34    .long   0                                               /* Reserved*/
35    .long   0                                               /* Reserved*/
36    .long   SVC_Handler                                     /* SVCall Handler*/
37    .long   DebugMon_Handler                                /* Debug Monitor Handler*/
38    .long   0                                               /* Reserved*/
39    .long   PendSV_Handler                                  /* PendSV Handler*/
40    .long   SysTick_Handler                                 /* SysTick Handler*/
41
42                                                            /* External Interrupts*/
43    .long   DMA0_IRQHandler                                 /* DMA Channel 0 Transfer Complete*/
44    .long   DMA1_IRQHandler                                 /* DMA Channel 1 Transfer Complete*/
45    .long   DMA2_IRQHandler                                 /* DMA Channel 2 Transfer Complete*/
46    .long   DMA3_IRQHandler                                 /* DMA Channel 3 Transfer Complete*/
47    .long   Reserved20_IRQHandler                           /* Reserved interrupt 20*/
48    .long   Reserved21_IRQHandler                           /* Reserved interrupt 21*/
49    .long   Reserved22_IRQHandler                           /* Reserved interrupt 22*/
50    .long   Reserved23_IRQHandler                           /* Reserved interrupt 23*/
51    .long   Reserved24_IRQHandler                           /* Reserved interrupt 24*/
52    .long   Reserved25_IRQHandler                           /* Reserved interrupt 25*/
53    .long   Reserved26_IRQHandler                           /* Reserved interrupt 26*/
54    .long   Reserved27_IRQHandler                           /* Reserved interrupt 27*/
55    .long   Reserved28_IRQHandler                           /* Reserved interrupt 28*/
56    .long   Reserved29_IRQHandler                           /* Reserved interrupt 29*/
57    .long   Reserved30_IRQHandler                           /* Reserved interrupt 30*/
58    .long   Reserved31_IRQHandler                           /* Reserved interrupt 31*/
59    .long   DMA_Error_IRQHandler                            /* DMA Error Interrupt*/
60    .long   MCM_IRQHandler                                  /* Normal Interrupt*/
61    .long   FTF_IRQHandler                                  /* FTFA Command complete interrupt*/
62    .long   Read_Collision_IRQHandler                       /* Read Collision Interrupt*/
63    .long   LVD_LVW_IRQHandler                              /* Low Voltage Detect, Low Voltage Warning*/
64    .long   LLWU_IRQHandler                                 /* Low Leakage Wakeup Unit*/
65    .long   WDOG_EWM_IRQHandler                             /* WDOG Interrupt*/
66    .long   Reserved39_IRQHandler                           /* Reserved Interrupt 39*/
67    .long   I2C0_IRQHandler                                 /* I2C0 interrupt*/
68    .long   I2C1_IRQHandler                                 /* I2C1 interrupt*/
69    .long   SPI0_IRQHandler                                 /* SPI0 Interrupt*/
70    .long   SPI1_IRQHandler                                 /* SPI1 Interrupt*/
71    .long   I2S0_Tx_IRQHandler                              /* I2S0 transmit interrupt*/
72    .long   I2S0_Rx_IRQHandler                              /* I2S0 receive interrupt*/
73    .long   LPUART0_IRQHandler                              /* LPUART0 status/error interrupt*/
74    .long   UART0_RX_TX_IRQHandler                          /* UART0 Receive/Transmit interrupt*/
75    .long   UART0_ERR_IRQHandler                            /* UART0 Error interrupt*/
76    .long   UART1_RX_TX_IRQHandler                          /* UART1 Receive/Transmit interrupt*/
77    .long   UART1_ERR_IRQHandler                            /* UART1 Error interrupt*/
78    .long   UART2_RX_TX_IRQHandler                          /* UART2 Receive/Transmit interrupt*/
79    .long   UART2_ERR_IRQHandler                            /* UART2 Error interrupt*/
80    .long   Reserved53_IRQHandler                           /* Reserved interrupt 53*/
81    .long   Reserved54_IRQHandler                           /* Reserved interrupt 54*/
82    .long   ADC0_IRQHandler                                 /* ADC0 interrupt*/
83    .long   CMP0_IRQHandler                                 /* CMP0 interrupt*/
84    .long   CMP1_IRQHandler                                 /* CMP1 interrupt*/
85    .long   FTM0_IRQHandler                                 /* FTM0 fault, overflow and channels interrupt*/
86    .long   FTM1_IRQHandler                                 /* FTM1 fault, overflow and channels interrupt*/
87    .long   FTM2_IRQHandler                                 /* FTM2 fault, overflow and channels interrupt*/
88    .long   Reserved61_IRQHandler                           /* Reserved interrupt 61*/
89    .long   RTC_IRQHandler                                  /* RTC interrupt*/
90    .long   RTC_Seconds_IRQHandler                          /* RTC seconds interrupt*/
91    .long   PIT0_IRQHandler                                 /* PIT timer channel 0 interrupt*/
92    .long   PIT1_IRQHandler                                 /* PIT timer channel 1 interrupt*/
93    .long   PIT2_IRQHandler                                 /* PIT timer channel 2 interrupt*/
94    .long   PIT3_IRQHandler                                 /* PIT timer channel 3 interrupt*/
95    .long   PDB0_IRQHandler                                 /* PDB0 Interrupt*/
96    .long   USB0_IRQHandler                                 /* USB0 interrupt*/
97    .long   Reserved70_IRQHandler                           /* Reserved interrupt 70*/
98    .long   Reserved71_IRQHandler                           /* Reserved interrupt 71*/
99    .long   DAC0_IRQHandler                                 /* DAC0 interrupt*/
100    .long   MCG_IRQHandler                                  /* MCG Interrupt*/
101    .long   LPTMR0_IRQHandler                               /* LPTimer interrupt*/
102    .long   PORTA_IRQHandler                                /* Port A interrupt*/
103    .long   PORTB_IRQHandler                                /* Port B interrupt*/
104    .long   PORTC_IRQHandler                                /* Port C interrupt*/
105    .long   PORTD_IRQHandler                                /* Port D interrupt*/
106    .long   PORTE_IRQHandler                                /* Port E interrupt*/
107    .long   SWI_IRQHandler                                  /* Software interrupt*/
108    .long   Reserved81_IRQHandler                           /* Reserved interrupt 81*/
109    .long   Reserved82_IRQHandler                           /* Reserved interrupt 82*/
110    .long   Reserved83_IRQHandler                           /* Reserved interrupt 83*/
111    .long   Reserved84_IRQHandler                           /* Reserved interrupt 84*/
112    .long   Reserved85_IRQHandler                           /* Reserved interrupt 85*/
113    .long   Reserved86_IRQHandler                           /* Reserved interrupt 86*/
114    .long   Reserved87_IRQHandler                           /* Reserved interrupt 87*/
115    .long   Reserved88_IRQHandler                           /* Reserved interrupt 88*/
116    .long   ADC1_IRQHandler                                 /* ADC1 interrupt*/
117    .long   Reserved90_IRQHandler                           /* Reserved Interrupt 90*/
118    .long   Reserved91_IRQHandler                           /* Reserved Interrupt 91*/
119    .long   Reserved92_IRQHandler                           /* Reserved Interrupt 92*/
120    .long   Reserved93_IRQHandler                           /* Reserved Interrupt 93*/
121    .long   Reserved94_IRQHandler                           /* Reserved Interrupt 94*/
122    .long   Reserved95_IRQHandler                           /* Reserved Interrupt 95*/
123    .long   Reserved96_IRQHandler                           /* Reserved Interrupt 96*/
124    .long   Reserved97_IRQHandler                           /* Reserved Interrupt 97*/
125    .long   Reserved98_IRQHandler                           /* Reserved Interrupt 98*/
126    .long   Reserved99_IRQHandler                           /* Reserved Interrupt 99*/
127    .long   Reserved100_IRQHandler                          /* Reserved Interrupt 100*/
128    .long   Reserved101_IRQHandler                          /* Reserved Interrupt 101*/
129    .long   DefaultISR                                      /* 102*/
130    .long   DefaultISR                                      /* 103*/
131    .long   DefaultISR                                      /* 104*/
132    .long   DefaultISR                                      /* 105*/
133    .long   DefaultISR                                      /* 106*/
134    .long   DefaultISR                                      /* 107*/
135    .long   DefaultISR                                      /* 108*/
136    .long   DefaultISR                                      /* 109*/
137    .long   DefaultISR                                      /* 110*/
138    .long   DefaultISR                                      /* 111*/
139    .long   DefaultISR                                      /* 112*/
140    .long   DefaultISR                                      /* 113*/
141    .long   DefaultISR                                      /* 114*/
142    .long   DefaultISR                                      /* 115*/
143    .long   DefaultISR                                      /* 116*/
144    .long   DefaultISR                                      /* 117*/
145    .long   DefaultISR                                      /* 118*/
146    .long   DefaultISR                                      /* 119*/
147    .long   DefaultISR                                      /* 120*/
148    .long   DefaultISR                                      /* 121*/
149    .long   DefaultISR                                      /* 122*/
150    .long   DefaultISR                                      /* 123*/
151    .long   DefaultISR                                      /* 124*/
152    .long   DefaultISR                                      /* 125*/
153    .long   DefaultISR                                      /* 126*/
154    .long   DefaultISR                                      /* 127*/
155    .long   DefaultISR                                      /* 128*/
156    .long   DefaultISR                                      /* 129*/
157    .long   DefaultISR                                      /* 130*/
158    .long   DefaultISR                                      /* 131*/
159    .long   DefaultISR                                      /* 132*/
160    .long   DefaultISR                                      /* 133*/
161    .long   DefaultISR                                      /* 134*/
162    .long   DefaultISR                                      /* 135*/
163    .long   DefaultISR                                      /* 136*/
164    .long   DefaultISR                                      /* 137*/
165    .long   DefaultISR                                      /* 138*/
166    .long   DefaultISR                                      /* 139*/
167    .long   DefaultISR                                      /* 140*/
168    .long   DefaultISR                                      /* 141*/
169    .long   DefaultISR                                      /* 142*/
170    .long   DefaultISR                                      /* 143*/
171    .long   DefaultISR                                      /* 144*/
172    .long   DefaultISR                                      /* 145*/
173    .long   DefaultISR                                      /* 146*/
174    .long   DefaultISR                                      /* 147*/
175    .long   DefaultISR                                      /* 148*/
176    .long   DefaultISR                                      /* 149*/
177    .long   DefaultISR                                      /* 150*/
178    .long   DefaultISR                                      /* 151*/
179    .long   DefaultISR                                      /* 152*/
180    .long   DefaultISR                                      /* 153*/
181    .long   DefaultISR                                      /* 154*/
182    .long   DefaultISR                                      /* 155*/
183    .long   DefaultISR                                      /* 156*/
184    .long   DefaultISR                                      /* 157*/
185    .long   DefaultISR                                      /* 158*/
186    .long   DefaultISR                                      /* 159*/
187    .long   DefaultISR                                      /* 160*/
188    .long   DefaultISR                                      /* 161*/
189    .long   DefaultISR                                      /* 162*/
190    .long   DefaultISR                                      /* 163*/
191    .long   DefaultISR                                      /* 164*/
192    .long   DefaultISR                                      /* 165*/
193    .long   DefaultISR                                      /* 166*/
194    .long   DefaultISR                                      /* 167*/
195    .long   DefaultISR                                      /* 168*/
196    .long   DefaultISR                                      /* 169*/
197    .long   DefaultISR                                      /* 170*/
198    .long   DefaultISR                                      /* 171*/
199    .long   DefaultISR                                      /* 172*/
200    .long   DefaultISR                                      /* 173*/
201    .long   DefaultISR                                      /* 174*/
202    .long   DefaultISR                                      /* 175*/
203    .long   DefaultISR                                      /* 176*/
204    .long   DefaultISR                                      /* 177*/
205    .long   DefaultISR                                      /* 178*/
206    .long   DefaultISR                                      /* 179*/
207    .long   DefaultISR                                      /* 180*/
208    .long   DefaultISR                                      /* 181*/
209    .long   DefaultISR                                      /* 182*/
210    .long   DefaultISR                                      /* 183*/
211    .long   DefaultISR                                      /* 184*/
212    .long   DefaultISR                                      /* 185*/
213    .long   DefaultISR                                      /* 186*/
214    .long   DefaultISR                                      /* 187*/
215    .long   DefaultISR                                      /* 188*/
216    .long   DefaultISR                                      /* 189*/
217    .long   DefaultISR                                      /* 190*/
218    .long   DefaultISR                                      /* 191*/
219    .long   DefaultISR                                      /* 192*/
220    .long   DefaultISR                                      /* 193*/
221    .long   DefaultISR                                      /* 194*/
222    .long   DefaultISR                                      /* 195*/
223    .long   DefaultISR                                      /* 196*/
224    .long   DefaultISR                                      /* 197*/
225    .long   DefaultISR                                      /* 198*/
226    .long   DefaultISR                                      /* 199*/
227    .long   DefaultISR                                      /* 200*/
228    .long   DefaultISR                                      /* 201*/
229    .long   DefaultISR                                      /* 202*/
230    .long   DefaultISR                                      /* 203*/
231    .long   DefaultISR                                      /* 204*/
232    .long   DefaultISR                                      /* 205*/
233    .long   DefaultISR                                      /* 206*/
234    .long   DefaultISR                                      /* 207*/
235    .long   DefaultISR                                      /* 208*/
236    .long   DefaultISR                                      /* 209*/
237    .long   DefaultISR                                      /* 210*/
238    .long   DefaultISR                                      /* 211*/
239    .long   DefaultISR                                      /* 212*/
240    .long   DefaultISR                                      /* 213*/
241    .long   DefaultISR                                      /* 214*/
242    .long   DefaultISR                                      /* 215*/
243    .long   DefaultISR                                      /* 216*/
244    .long   DefaultISR                                      /* 217*/
245    .long   DefaultISR                                      /* 218*/
246    .long   DefaultISR                                      /* 219*/
247    .long   DefaultISR                                      /* 220*/
248    .long   DefaultISR                                      /* 221*/
249    .long   DefaultISR                                      /* 222*/
250    .long   DefaultISR                                      /* 223*/
251    .long   DefaultISR                                      /* 224*/
252    .long   DefaultISR                                      /* 225*/
253    .long   DefaultISR                                      /* 226*/
254    .long   DefaultISR                                      /* 227*/
255    .long   DefaultISR                                      /* 228*/
256    .long   DefaultISR                                      /* 229*/
257    .long   DefaultISR                                      /* 230*/
258    .long   DefaultISR                                      /* 231*/
259    .long   DefaultISR                                      /* 232*/
260    .long   DefaultISR                                      /* 233*/
261    .long   DefaultISR                                      /* 234*/
262    .long   DefaultISR                                      /* 235*/
263    .long   DefaultISR                                      /* 236*/
264    .long   DefaultISR                                      /* 237*/
265    .long   DefaultISR                                      /* 238*/
266    .long   DefaultISR                                      /* 239*/
267    .long   DefaultISR                                      /* 240*/
268    .long   DefaultISR                                      /* 241*/
269    .long   DefaultISR                                      /* 242*/
270    .long   DefaultISR                                      /* 243*/
271    .long   DefaultISR                                      /* 244*/
272    .long   DefaultISR                                      /* 245*/
273    .long   DefaultISR                                      /* 246*/
274    .long   DefaultISR                                      /* 247*/
275    .long   DefaultISR                                      /* 248*/
276    .long   DefaultISR                                      /* 249*/
277    .long   DefaultISR                                      /* 250*/
278    .long   DefaultISR                                      /* 251*/
279    .long   DefaultISR                                      /* 252*/
280    .long   DefaultISR                                      /* 253*/
281    .long   DefaultISR                                      /* 254*/
282    .long   0xFFFFFFFF                                      /*  Reserved for user TRIM value*/
283
284    .size    __isr_vector, . - __isr_vector
285
286/* Flash Configuration */
287    .section .FlashConfig, "a"
288    .long 0xFFFFFFFF
289    .long 0xFFFFFFFF
290    .long 0xFFFFFFFF
291    .long 0xFFFFFFFE
292
293    .text
294    .thumb
295
296/* Reset Handler */
297
298    .thumb_func
299    .align 2
300    .globl   Reset_Handler
301    .weak    Reset_Handler
302    .type    Reset_Handler, %function
303Reset_Handler:
304    cpsid   i               /* Mask interrupts */
305    .equ    VTOR, 0xE000ED08
306    ldr     r0, =VTOR
307    ldr     r1, =__isr_vector
308    str     r1, [r0]
309    ldr     r2, [r1]
310    msr     msp, r2
311#ifndef __NO_SYSTEM_INIT
312    ldr   r0,=SystemInit
313    blx   r0
314#endif
315/*     Loop to copy data from read only memory to RAM. The ranges
316 *      of copy from/to are specified by following symbols evaluated in
317 *      linker script.
318 *      __etext: End of code section, i.e., begin of data sections to copy from.
319 *      __data_start__/__data_end__: RAM address range that data should be
320 *      copied to. Both must be aligned to 4 bytes boundary.  */
321
322    ldr    r1, =__etext
323    ldr    r2, =__data_start__
324    ldr    r3, =__data_end__
325
326#ifdef __PERFORMANCE_IMPLEMENTATION
327/* Here are two copies of loop implementations. First one favors performance
328 * and the second one favors code size. Default uses the second one.
329 * Define macro "__PERFORMANCE_IMPLEMENTATION" in project to use the first one */
330    subs    r3, r2
331    ble    .LC1
332.LC0:
333    subs    r3, #4
334    ldr    r0, [r1, r3]
335    str    r0, [r2, r3]
336    bgt    .LC0
337.LC1:
338#else  /* code size implemenation */
339.LC0:
340    cmp     r2, r3
341    ittt    lt
342    ldrlt   r0, [r1], #4
343    strlt   r0, [r2], #4
344    blt    .LC0
345#endif
346
347#ifdef __STARTUP_CLEAR_BSS
348/*     This part of work usually is done in C library startup code. Otherwise,
349 *     define this macro to enable it in this startup.
350 *
351 *     Loop to zero out BSS section, which uses following symbols
352 *     in linker script:
353 *      __bss_start__: start of BSS section. Must align to 4
354 *      __bss_end__: end of BSS section. Must align to 4
355 */
356    ldr r1, =__bss_start__
357    ldr r2, =__bss_end__
358
359    movs    r0, 0
360.LC2:
361    cmp     r1, r2
362    itt    lt
363    strlt   r0, [r1], #4
364    blt    .LC2
365#endif /* __STARTUP_CLEAR_BSS */
366
367    cpsie   i               /* Unmask interrupts */
368#ifndef __START
369#define __START _start
370#endif
371#ifndef __ATOLLIC__
372    ldr   r0,=__START
373    blx   r0
374#else
375    ldr   r0,=__libc_init_array
376    blx   r0
377    ldr   r0,=main
378    bx    r0
379#endif
380    .pool
381    .size Reset_Handler, . - Reset_Handler
382
383    .align  1
384    .thumb_func
385    .weak DefaultISR
386    .type DefaultISR, %function
387DefaultISR:
388    b DefaultISR
389    .size DefaultISR, . - DefaultISR
390
391    .align 1
392    .thumb_func
393    .weak NMI_Handler
394    .type NMI_Handler, %function
395NMI_Handler:
396    ldr   r0,=NMI_Handler
397    bx    r0
398    .size NMI_Handler, . - NMI_Handler
399
400    .align 1
401    .thumb_func
402    .weak HardFault_Handler
403    .type HardFault_Handler, %function
404HardFault_Handler:
405    ldr   r0,=HardFault_Handler
406    bx    r0
407    .size HardFault_Handler, . - HardFault_Handler
408
409    .align 1
410    .thumb_func
411    .weak SVC_Handler
412    .type SVC_Handler, %function
413SVC_Handler:
414    ldr   r0,=SVC_Handler
415    bx    r0
416    .size SVC_Handler, . - SVC_Handler
417
418    .align 1
419    .thumb_func
420    .weak PendSV_Handler
421    .type PendSV_Handler, %function
422PendSV_Handler:
423    ldr   r0,=PendSV_Handler
424    bx    r0
425    .size PendSV_Handler, . - PendSV_Handler
426
427    .align 1
428    .thumb_func
429    .weak SysTick_Handler
430    .type SysTick_Handler, %function
431SysTick_Handler:
432    ldr   r0,=SysTick_Handler
433    bx    r0
434    .size SysTick_Handler, . - SysTick_Handler
435
436    .align 1
437    .thumb_func
438    .weak DMA0_IRQHandler
439    .type DMA0_IRQHandler, %function
440DMA0_IRQHandler:
441    ldr   r0,=DMA0_DriverIRQHandler
442    bx    r0
443    .size DMA0_IRQHandler, . - DMA0_IRQHandler
444
445    .align 1
446    .thumb_func
447    .weak DMA1_IRQHandler
448    .type DMA1_IRQHandler, %function
449DMA1_IRQHandler:
450    ldr   r0,=DMA1_DriverIRQHandler
451    bx    r0
452    .size DMA1_IRQHandler, . - DMA1_IRQHandler
453
454    .align 1
455    .thumb_func
456    .weak DMA2_IRQHandler
457    .type DMA2_IRQHandler, %function
458DMA2_IRQHandler:
459    ldr   r0,=DMA2_DriverIRQHandler
460    bx    r0
461    .size DMA2_IRQHandler, . - DMA2_IRQHandler
462
463    .align 1
464    .thumb_func
465    .weak DMA3_IRQHandler
466    .type DMA3_IRQHandler, %function
467DMA3_IRQHandler:
468    ldr   r0,=DMA3_DriverIRQHandler
469    bx    r0
470    .size DMA3_IRQHandler, . - DMA3_IRQHandler
471
472    .align 1
473    .thumb_func
474    .weak DMA_Error_IRQHandler
475    .type DMA_Error_IRQHandler, %function
476DMA_Error_IRQHandler:
477    ldr   r0,=DMA_Error_DriverIRQHandler
478    bx    r0
479    .size DMA_Error_IRQHandler, . - DMA_Error_IRQHandler
480
481    .align 1
482    .thumb_func
483    .weak I2C0_IRQHandler
484    .type I2C0_IRQHandler, %function
485I2C0_IRQHandler:
486    ldr   r0,=I2C0_DriverIRQHandler
487    bx    r0
488    .size I2C0_IRQHandler, . - I2C0_IRQHandler
489
490    .align 1
491    .thumb_func
492    .weak I2C1_IRQHandler
493    .type I2C1_IRQHandler, %function
494I2C1_IRQHandler:
495    ldr   r0,=I2C1_DriverIRQHandler
496    bx    r0
497    .size I2C1_IRQHandler, . - I2C1_IRQHandler
498
499    .align 1
500    .thumb_func
501    .weak SPI0_IRQHandler
502    .type SPI0_IRQHandler, %function
503SPI0_IRQHandler:
504    ldr   r0,=SPI0_DriverIRQHandler
505    bx    r0
506    .size SPI0_IRQHandler, . - SPI0_IRQHandler
507
508    .align 1
509    .thumb_func
510    .weak SPI1_IRQHandler
511    .type SPI1_IRQHandler, %function
512SPI1_IRQHandler:
513    ldr   r0,=SPI1_DriverIRQHandler
514    bx    r0
515    .size SPI1_IRQHandler, . - SPI1_IRQHandler
516
517    .align 1
518    .thumb_func
519    .weak I2S0_Tx_IRQHandler
520    .type I2S0_Tx_IRQHandler, %function
521I2S0_Tx_IRQHandler:
522    ldr   r0,=I2S0_Tx_DriverIRQHandler
523    bx    r0
524    .size I2S0_Tx_IRQHandler, . - I2S0_Tx_IRQHandler
525
526    .align 1
527    .thumb_func
528    .weak I2S0_Rx_IRQHandler
529    .type I2S0_Rx_IRQHandler, %function
530I2S0_Rx_IRQHandler:
531    ldr   r0,=I2S0_Rx_DriverIRQHandler
532    bx    r0
533    .size I2S0_Rx_IRQHandler, . - I2S0_Rx_IRQHandler
534
535    .align 1
536    .thumb_func
537    .weak LPUART0_IRQHandler
538    .type LPUART0_IRQHandler, %function
539LPUART0_IRQHandler:
540    ldr   r0,=LPUART0_DriverIRQHandler
541    bx    r0
542    .size LPUART0_IRQHandler, . - LPUART0_IRQHandler
543
544    .align 1
545    .thumb_func
546    .weak UART0_RX_TX_IRQHandler
547    .type UART0_RX_TX_IRQHandler, %function
548UART0_RX_TX_IRQHandler:
549    ldr   r0,=UART0_RX_TX_DriverIRQHandler
550    bx    r0
551    .size UART0_RX_TX_IRQHandler, . - UART0_RX_TX_IRQHandler
552
553    .align 1
554    .thumb_func
555    .weak UART0_ERR_IRQHandler
556    .type UART0_ERR_IRQHandler, %function
557UART0_ERR_IRQHandler:
558    ldr   r0,=UART0_ERR_DriverIRQHandler
559    bx    r0
560    .size UART0_ERR_IRQHandler, . - UART0_ERR_IRQHandler
561
562    .align 1
563    .thumb_func
564    .weak UART1_RX_TX_IRQHandler
565    .type UART1_RX_TX_IRQHandler, %function
566UART1_RX_TX_IRQHandler:
567    ldr   r0,=UART1_RX_TX_DriverIRQHandler
568    bx    r0
569    .size UART1_RX_TX_IRQHandler, . - UART1_RX_TX_IRQHandler
570
571    .align 1
572    .thumb_func
573    .weak UART1_ERR_IRQHandler
574    .type UART1_ERR_IRQHandler, %function
575UART1_ERR_IRQHandler:
576    ldr   r0,=UART1_ERR_DriverIRQHandler
577    bx    r0
578    .size UART1_ERR_IRQHandler, . - UART1_ERR_IRQHandler
579
580    .align 1
581    .thumb_func
582    .weak UART2_RX_TX_IRQHandler
583    .type UART2_RX_TX_IRQHandler, %function
584UART2_RX_TX_IRQHandler:
585    ldr   r0,=UART2_RX_TX_DriverIRQHandler
586    bx    r0
587    .size UART2_RX_TX_IRQHandler, . - UART2_RX_TX_IRQHandler
588
589    .align 1
590    .thumb_func
591    .weak UART2_ERR_IRQHandler
592    .type UART2_ERR_IRQHandler, %function
593UART2_ERR_IRQHandler:
594    ldr   r0,=UART2_ERR_DriverIRQHandler
595    bx    r0
596    .size UART2_ERR_IRQHandler, . - UART2_ERR_IRQHandler
597
598
599/*    Macro to define default handlers. Default handler
600 *    will be weak symbol and just dead loops. They can be
601 *    overwritten by other handlers */
602    .macro def_irq_handler  handler_name
603    .weak \handler_name
604    .set  \handler_name, DefaultISR
605    .endm
606
607/* Exception Handlers */
608    def_irq_handler    MemManage_Handler
609    def_irq_handler    BusFault_Handler
610    def_irq_handler    UsageFault_Handler
611    def_irq_handler    DebugMon_Handler
612    def_irq_handler    DMA0_DriverIRQHandler
613    def_irq_handler    DMA1_DriverIRQHandler
614    def_irq_handler    DMA2_DriverIRQHandler
615    def_irq_handler    DMA3_DriverIRQHandler
616    def_irq_handler    Reserved20_IRQHandler
617    def_irq_handler    Reserved21_IRQHandler
618    def_irq_handler    Reserved22_IRQHandler
619    def_irq_handler    Reserved23_IRQHandler
620    def_irq_handler    Reserved24_IRQHandler
621    def_irq_handler    Reserved25_IRQHandler
622    def_irq_handler    Reserved26_IRQHandler
623    def_irq_handler    Reserved27_IRQHandler
624    def_irq_handler    Reserved28_IRQHandler
625    def_irq_handler    Reserved29_IRQHandler
626    def_irq_handler    Reserved30_IRQHandler
627    def_irq_handler    Reserved31_IRQHandler
628    def_irq_handler    DMA_Error_DriverIRQHandler
629    def_irq_handler    MCM_IRQHandler
630    def_irq_handler    FTF_IRQHandler
631    def_irq_handler    Read_Collision_IRQHandler
632    def_irq_handler    LVD_LVW_IRQHandler
633    def_irq_handler    LLWU_IRQHandler
634    def_irq_handler    WDOG_EWM_IRQHandler
635    def_irq_handler    Reserved39_IRQHandler
636    def_irq_handler    I2C0_DriverIRQHandler
637    def_irq_handler    I2C1_DriverIRQHandler
638    def_irq_handler    SPI0_DriverIRQHandler
639    def_irq_handler    SPI1_DriverIRQHandler
640    def_irq_handler    I2S0_Tx_DriverIRQHandler
641    def_irq_handler    I2S0_Rx_DriverIRQHandler
642    def_irq_handler    LPUART0_DriverIRQHandler
643    def_irq_handler    UART0_RX_TX_DriverIRQHandler
644    def_irq_handler    UART0_ERR_DriverIRQHandler
645    def_irq_handler    UART1_RX_TX_DriverIRQHandler
646    def_irq_handler    UART1_ERR_DriverIRQHandler
647    def_irq_handler    UART2_RX_TX_DriverIRQHandler
648    def_irq_handler    UART2_ERR_DriverIRQHandler
649    def_irq_handler    Reserved53_IRQHandler
650    def_irq_handler    Reserved54_IRQHandler
651    def_irq_handler    ADC0_IRQHandler
652    def_irq_handler    CMP0_IRQHandler
653    def_irq_handler    CMP1_IRQHandler
654    def_irq_handler    FTM0_IRQHandler
655    def_irq_handler    FTM1_IRQHandler
656    def_irq_handler    FTM2_IRQHandler
657    def_irq_handler    Reserved61_IRQHandler
658    def_irq_handler    RTC_IRQHandler
659    def_irq_handler    RTC_Seconds_IRQHandler
660    def_irq_handler    PIT0_IRQHandler
661    def_irq_handler    PIT1_IRQHandler
662    def_irq_handler    PIT2_IRQHandler
663    def_irq_handler    PIT3_IRQHandler
664    def_irq_handler    PDB0_IRQHandler
665    def_irq_handler    USB0_IRQHandler
666    def_irq_handler    Reserved70_IRQHandler
667    def_irq_handler    Reserved71_IRQHandler
668    def_irq_handler    DAC0_IRQHandler
669    def_irq_handler    MCG_IRQHandler
670    def_irq_handler    LPTMR0_IRQHandler
671    def_irq_handler    PORTA_IRQHandler
672    def_irq_handler    PORTB_IRQHandler
673    def_irq_handler    PORTC_IRQHandler
674    def_irq_handler    PORTD_IRQHandler
675    def_irq_handler    PORTE_IRQHandler
676    def_irq_handler    SWI_IRQHandler
677    def_irq_handler    Reserved81_IRQHandler
678    def_irq_handler    Reserved82_IRQHandler
679    def_irq_handler    Reserved83_IRQHandler
680    def_irq_handler    Reserved84_IRQHandler
681    def_irq_handler    Reserved85_IRQHandler
682    def_irq_handler    Reserved86_IRQHandler
683    def_irq_handler    Reserved87_IRQHandler
684    def_irq_handler    Reserved88_IRQHandler
685    def_irq_handler    ADC1_IRQHandler
686    def_irq_handler    Reserved90_IRQHandler
687    def_irq_handler    Reserved91_IRQHandler
688    def_irq_handler    Reserved92_IRQHandler
689    def_irq_handler    Reserved93_IRQHandler
690    def_irq_handler    Reserved94_IRQHandler
691    def_irq_handler    Reserved95_IRQHandler
692    def_irq_handler    Reserved96_IRQHandler
693    def_irq_handler    Reserved97_IRQHandler
694    def_irq_handler    Reserved98_IRQHandler
695    def_irq_handler    Reserved99_IRQHandler
696    def_irq_handler    Reserved100_IRQHandler
697    def_irq_handler    Reserved101_IRQHandler
698
699    .end
700