1// Memory map file to generate linker scripts for programs run on the ISS. 2 3// Customer ID=13270; Build=0x802a5; Copyright (c) 2004-2015 Cadence Design Systems, Inc. 4// 5// Permission is hereby granted, free of charge, to any person obtaining 6// a copy of this software and associated documentation files (the 7// "Software"), to deal in the Software without restriction, including 8// without limitation the rights to use, copy, modify, merge, publish, 9// distribute, sublicense, and/or sell copies of the Software, and to 10// permit persons to whom the Software is furnished to do so, subject to 11// the following conditions: 12// 13// The above copyright notice and this permission notice shall be included 14// in all copies or substantial portions of the Software. 15// 16// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 17// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 18// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 19// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 20// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 21// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 22// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 23 24 25// A memory map is a sequence of memory descriptions and 26// optional parameter assignments. 27// 28// Each memory description has the following format: 29// BEGIN <name> 30// <addr> [,<paddr>] : <mem-type> : <mem-name> : <size> [,<psize>] 31// : [writable] [,executable] [,device] ; 32// <segment>* 33// END <name> 34// 35// where each <segment> description has the following format: 36// <seg-name> : F|C : <start-addr> - <end-addr> [ : STACK ] [ : HEAP ] 37// : <section-name>* ; 38// 39// Each parameter assignment is a keyword/value pair in the following format: 40// <keyword> = <value> (no spaces in <value>) 41// or 42// <keyword> = "<value>" (spaces allowed in <value>) 43// 44// The following primitives are also defined: 45// PLACE SECTIONS( <section-name>* ) { WITH_SECTION(<section-name>) 46// | IN_SEGMENT(<seg-name>) } 47// 48// NOLOAD <section-name1> [ <section-name2> ... ] 49// 50// Please refer to the Xtensa LSP Reference Manual for more details. 51// 52BEGIN dsp_core 530x00200000: sysram : dsp_core : 0x280000 : executable, writable ; 54 dsp_core : C : 0x00200000 - 0x0047ffff : STACK : HEAP : .rodata .literal .text .data __llvm_prf_names .bss; 55END dsp_core 56 57BEGIN dsp_uncached 580x20000000: sysram : dsp_uncached : 0x480000 : uncached, executable, writable ; 59 dsp_uncached : C : 0x20060000 - 0x2006ffff : NonCacheable.init NonCacheable ; 60END dsp_uncached 61 62BEGIN dram0 630x24000000: dataRam : dram0 : 0x10000 : writable ; 64 dram0_0 : C : 0x24000000 - 0x2400ffff : .dram0.rodata .ResetVector.literal .Level2InterruptVector.literal .Level3InterruptVector.literal .DebugExceptionVector.literal .NMIExceptionVector.literal .KernelExceptionVector.literal .UserExceptionVector.literal .DoubleExceptionVector.literal .iram0.literal .dram0.data .dram0.bss; 65END dram0 66 67BEGIN iram0 680x24020000: instRam : iram0 : 0x10000 : executable, writable ; 69 iram0_0 : F : 0x24020000 - 0x240203ff : .ResetVector.text .ResetHandler.literal .ResetHandler.text; 70 iram0_1 : F : 0x24020400 - 0x2402057b : .WindowVectors.text; 71 iram0_2 : F : 0x2402057c - 0x2402059b : .Level2InterruptVector.text; 72 iram0_3 : F : 0x2402059c - 0x240205bb : .Level3InterruptVector.text; 73 iram0_4 : F : 0x240205bc - 0x240205db : .DebugExceptionVector.text; 74 iram0_5 : F : 0x240205dc - 0x240205fb : .NMIExceptionVector.text; 75 iram0_6 : F : 0x240205fc - 0x2402061b : .KernelExceptionVector.text; 76 iram0_7 : F : 0x2402061c - 0x2402063b : .UserExceptionVector.text; 77 iram0_8 : F : 0x2402063c - 0x2402ffff : .DoubleExceptionVector.text .iram0.text; 78END iram0 79