1 /* This linker script generated from xt-genldscripts.tpp for LSP c:\_ddm\dev\devices\MIMXRT595S\xtensa\gdbio */
2 /* Linker Script for default link */
3 MEMORY
4 {
5   iram0_0_seg :                       	org = 0x00000000, len = 0x400
6   iram1_0_seg :                       	org = 0x00180400, len = 0x17C
7   iram1_1_seg :                       	org = 0x0018057C, len = 0x20
8   iram1_2_seg :                       	org = 0x0018059C, len = 0x20
9   iram1_3_seg :                       	org = 0x001805BC, len = 0x20
10   iram1_4_seg :                       	org = 0x001805DC, len = 0x20
11   iram1_5_seg :                       	org = 0x001805FC, len = 0x20
12   iram1_6_seg :                       	org = 0x0018061C, len = 0x20
13   iram1_7_seg :                       	org = 0x0018063C, len = 0x400
14   iram1_8_seg :                       	org = 0x00180A3C, len = 0xFF5C4
15   dram0_0_seg :                       	org = 0x00820000, len = 0x60000
16   dram1_0_seg :                       	org = 0x00880000, len = 0x100000
17 }
18 
19 PHDRS
20 {
21   iram0_0_phdr PT_LOAD;
22   iram1_0_phdr PT_LOAD;
23   iram1_1_phdr PT_LOAD;
24   iram1_2_phdr PT_LOAD;
25   iram1_3_phdr PT_LOAD;
26   iram1_4_phdr PT_LOAD;
27   iram1_5_phdr PT_LOAD;
28   iram1_6_phdr PT_LOAD;
29   iram1_7_phdr PT_LOAD;
30   iram1_8_phdr PT_LOAD;
31   dram0_0_phdr PT_LOAD;
32   dram1_0_phdr PT_LOAD;
33   dram1_0_bss_phdr PT_LOAD;
34 }
35 
36 
37 /*  Default entry point:  */
38 ENTRY(_ResetVector)
39 
40 
41 /*  Memory boundary addresses:  */
42 _memmap_mem_iram0_start = 0x0;
43 _memmap_mem_iram0_end   = 0x400;
44 _memmap_mem_iram1_start = 0x180400;
45 _memmap_mem_iram1_end   = 0x280000;
46 _memmap_mem_dram0_start = 0x820000;
47 _memmap_mem_dram0_end   = 0x880000;
48 _memmap_mem_dram1_start = 0x880000;
49 _memmap_mem_dram1_end   = 0x980000;
50 
51 /*  Memory segment boundary addresses:  */
52 _memmap_seg_iram0_0_start = 0x0;
53 _memmap_seg_iram0_0_max   = 0x400;
54 _memmap_seg_iram1_0_start = 0x180400;
55 _memmap_seg_iram1_0_max   = 0x18057c;
56 _memmap_seg_iram1_1_start = 0x18057c;
57 _memmap_seg_iram1_1_max   = 0x18059c;
58 _memmap_seg_iram1_2_start = 0x18059c;
59 _memmap_seg_iram1_2_max   = 0x1805bc;
60 _memmap_seg_iram1_3_start = 0x1805bc;
61 _memmap_seg_iram1_3_max   = 0x1805dc;
62 _memmap_seg_iram1_4_start = 0x1805dc;
63 _memmap_seg_iram1_4_max   = 0x1805fc;
64 _memmap_seg_iram1_5_start = 0x1805fc;
65 _memmap_seg_iram1_5_max   = 0x18061c;
66 _memmap_seg_iram1_6_start = 0x18061c;
67 _memmap_seg_iram1_6_max   = 0x18063c;
68 _memmap_seg_iram1_7_start = 0x18063c;
69 _memmap_seg_iram1_7_max   = 0x180a3c;
70 _memmap_seg_iram1_8_start = 0x180a3c;
71 _memmap_seg_iram1_8_max   = 0x280000;
72 _memmap_seg_dram0_0_start = 0x820000;
73 _memmap_seg_dram0_0_max   = 0x880000;
74 _memmap_seg_dram1_0_start = 0x880000;
75 _memmap_seg_dram1_0_max   = 0x980000;
76 
77 _rom_store_table = 0;
78 PROVIDE(_memmap_reset_vector = 0x0);
79 PROVIDE(_memmap_vecbase_reset = 0x180400);
80 /* Various memory-map dependent cache attribute settings: */
81 _memmap_cacheattr_wb_base = 0x00000002;
82 _memmap_cacheattr_wt_base = 0x00000002;
83 _memmap_cacheattr_bp_base = 0x00000002;
84 _memmap_cacheattr_unused_mask = 0xFFFFFFF0;
85 _memmap_cacheattr_wb_trapnull = 0x22222222;
86 _memmap_cacheattr_wba_trapnull = 0x22222222;
87 _memmap_cacheattr_wbna_trapnull = 0x22222222;
88 _memmap_cacheattr_wt_trapnull = 0x22222222;
89 _memmap_cacheattr_bp_trapnull = 0x22222222;
90 _memmap_cacheattr_wb_strict = 0xFFFFFFF2;
91 _memmap_cacheattr_wt_strict = 0xFFFFFFF2;
92 _memmap_cacheattr_bp_strict = 0xFFFFFFF2;
93 _memmap_cacheattr_wb_allvalid = 0x22222222;
94 _memmap_cacheattr_wt_allvalid = 0x22222222;
95 _memmap_cacheattr_bp_allvalid = 0x22222222;
96 _memmap_region_map = 0x00000001;
97 PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
98 
99 SECTIONS
100 {
101 
102   .ResetVector.text : ALIGN(4)
103   {
104     _ResetVector_text_start = ABSOLUTE(.);
105     KEEP (*(.ResetVector.text))
106     . = ALIGN (4);
107     _ResetVector_text_end = ABSOLUTE(.);
108   } >iram0_0_seg :iram0_0_phdr
109 
110   .ResetHandler.text : ALIGN(4)
111   {
112     _ResetHandler_text_start = ABSOLUTE(.);
113     *(.ResetHandler.literal .ResetHandler.text)
114     . = ALIGN (4);
115     _ResetHandler_text_end = ABSOLUTE(.);
116     _memmap_seg_iram0_0_end = ALIGN(0x8);
117   } >iram0_0_seg :iram0_0_phdr
118 
119   _memmap_mem_iram0_max = ABSOLUTE(.);
120 
121   .WindowVectors.text : ALIGN(4)
122   {
123     _WindowVectors_text_start = ABSOLUTE(.);
124     KEEP (*(.WindowVectors.text))
125     . = ALIGN (4);
126     _WindowVectors_text_end = ABSOLUTE(.);
127   } >iram1_0_seg :iram1_0_phdr
128 
129   .Level2InterruptVector.literal : ALIGN(4)
130   {
131     _Level2InterruptVector_literal_start = ABSOLUTE(.);
132     *(.Level2InterruptVector.literal)
133     . = ALIGN (4);
134     _Level2InterruptVector_literal_end = ABSOLUTE(.);
135     _memmap_seg_iram1_0_end = ALIGN(0x8);
136   } >iram1_0_seg :iram1_0_phdr
137 
138 
139   .Level2InterruptVector.text : ALIGN(4)
140   {
141     _Level2InterruptVector_text_start = ABSOLUTE(.);
142     KEEP (*(.Level2InterruptVector.text))
143     . = ALIGN (4);
144     _Level2InterruptVector_text_end = ABSOLUTE(.);
145   } >iram1_1_seg :iram1_1_phdr
146 
147   .Level3InterruptVector.literal : ALIGN(4)
148   {
149     _Level3InterruptVector_literal_start = ABSOLUTE(.);
150     *(.Level3InterruptVector.literal)
151     . = ALIGN (4);
152     _Level3InterruptVector_literal_end = ABSOLUTE(.);
153     _memmap_seg_iram1_1_end = ALIGN(0x8);
154   } >iram1_1_seg :iram1_1_phdr
155 
156 
157   .Level3InterruptVector.text : ALIGN(4)
158   {
159     _Level3InterruptVector_text_start = ABSOLUTE(.);
160     KEEP (*(.Level3InterruptVector.text))
161     . = ALIGN (4);
162     _Level3InterruptVector_text_end = ABSOLUTE(.);
163   } >iram1_2_seg :iram1_2_phdr
164 
165   .DebugExceptionVector.literal : ALIGN(4)
166   {
167     _DebugExceptionVector_literal_start = ABSOLUTE(.);
168     *(.DebugExceptionVector.literal)
169     . = ALIGN (4);
170     _DebugExceptionVector_literal_end = ABSOLUTE(.);
171     _memmap_seg_iram1_2_end = ALIGN(0x8);
172   } >iram1_2_seg :iram1_2_phdr
173 
174 
175   .DebugExceptionVector.text : ALIGN(4)
176   {
177     _DebugExceptionVector_text_start = ABSOLUTE(.);
178     KEEP (*(.DebugExceptionVector.text))
179     . = ALIGN (4);
180     _DebugExceptionVector_text_end = ABSOLUTE(.);
181   } >iram1_3_seg :iram1_3_phdr
182 
183   .NMIExceptionVector.literal : ALIGN(4)
184   {
185     _NMIExceptionVector_literal_start = ABSOLUTE(.);
186     *(.NMIExceptionVector.literal)
187     . = ALIGN (4);
188     _NMIExceptionVector_literal_end = ABSOLUTE(.);
189     _memmap_seg_iram1_3_end = ALIGN(0x8);
190   } >iram1_3_seg :iram1_3_phdr
191 
192 
193   .NMIExceptionVector.text : ALIGN(4)
194   {
195     _NMIExceptionVector_text_start = ABSOLUTE(.);
196     KEEP (*(.NMIExceptionVector.text))
197     . = ALIGN (4);
198     _NMIExceptionVector_text_end = ABSOLUTE(.);
199   } >iram1_4_seg :iram1_4_phdr
200 
201   .KernelExceptionVector.literal : ALIGN(4)
202   {
203     _KernelExceptionVector_literal_start = ABSOLUTE(.);
204     *(.KernelExceptionVector.literal)
205     . = ALIGN (4);
206     _KernelExceptionVector_literal_end = ABSOLUTE(.);
207     _memmap_seg_iram1_4_end = ALIGN(0x8);
208   } >iram1_4_seg :iram1_4_phdr
209 
210 
211   .KernelExceptionVector.text : ALIGN(4)
212   {
213     _KernelExceptionVector_text_start = ABSOLUTE(.);
214     KEEP (*(.KernelExceptionVector.text))
215     . = ALIGN (4);
216     _KernelExceptionVector_text_end = ABSOLUTE(.);
217   } >iram1_5_seg :iram1_5_phdr
218 
219   .UserExceptionVector.literal : ALIGN(4)
220   {
221     _UserExceptionVector_literal_start = ABSOLUTE(.);
222     *(.UserExceptionVector.literal)
223     . = ALIGN (4);
224     _UserExceptionVector_literal_end = ABSOLUTE(.);
225     _memmap_seg_iram1_5_end = ALIGN(0x8);
226   } >iram1_5_seg :iram1_5_phdr
227 
228 
229   .UserExceptionVector.text : ALIGN(4)
230   {
231     _UserExceptionVector_text_start = ABSOLUTE(.);
232     KEEP (*(.UserExceptionVector.text))
233     . = ALIGN (4);
234     _UserExceptionVector_text_end = ABSOLUTE(.);
235   } >iram1_6_seg :iram1_6_phdr
236 
237   .DoubleExceptionVector.literal : ALIGN(4)
238   {
239     _DoubleExceptionVector_literal_start = ABSOLUTE(.);
240     *(.DoubleExceptionVector.literal)
241     . = ALIGN (4);
242     _DoubleExceptionVector_literal_end = ABSOLUTE(.);
243     _memmap_seg_iram1_6_end = ALIGN(0x8);
244   } >iram1_6_seg :iram1_6_phdr
245 
246 
247   .DoubleExceptionVector.text : ALIGN(4)
248   {
249     _DoubleExceptionVector_text_start = ABSOLUTE(.);
250     KEEP (*(.DoubleExceptionVector.text))
251     . = ALIGN (4);
252     _DoubleExceptionVector_text_end = ABSOLUTE(.);
253     _memmap_seg_iram1_7_end = ALIGN(0x8);
254   } >iram1_7_seg :iram1_7_phdr
255 
256 
257   __llvm_prf_names : ALIGN(4)
258   {
259     __llvm_prf_names_start = ABSOLUTE(.);
260     KEEP (*(__llvm_prf_names))
261     . = ALIGN (4);
262     __llvm_prf_names_end = ABSOLUTE(.);
263   } >iram1_8_seg :iram1_8_phdr
264 
265   .text : ALIGN(4)
266   {
267     _stext = .;
268     _text_start = ABSOLUTE(.);
269     *(.entry.text)
270     *(.init.literal)
271     KEEP(*(.init))
272     *(.literal.sort.* SORT(.text.sort.*))
273     KEEP (*(.literal.keepsort.* SORT(.text.keepsort.*) .literal.keep.* .text.keep.* .literal.*personality* .text.*personality*))
274     *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
275     *(.fini.literal)
276     KEEP(*(.fini))
277     *(.gnu.version)
278     . = ALIGN (4);
279     _text_end = ABSOLUTE(.);
280     _etext = .;
281   } >iram1_8_seg :iram1_8_phdr
282 
283   .clib.text : ALIGN(4)
284   {
285     _clib_text_start = ABSOLUTE(.);
286     *(.clib.literal .clib.text)
287     . = ALIGN (4);
288     _clib_text_end = ABSOLUTE(.);
289   } >iram1_8_seg :iram1_8_phdr
290 
291   .rtos.text : ALIGN(4)
292   {
293     _rtos_text_start = ABSOLUTE(.);
294     *(.rtos.literal .rtos.text)
295     . = ALIGN (4);
296     _rtos_text_end = ABSOLUTE(.);
297   } >iram1_8_seg :iram1_8_phdr
298 
299   _memmap_mem_iram1_max = ABSOLUTE(.);
300 
301   .shmem : ALIGN(4)
302   {
303     _shmem_start = ABSOLUTE(.);
304     *(.shmem)
305     . = ALIGN (4);
306     _shmem_end = ABSOLUTE(.);
307     _memmap_seg_dram0_0_end = ALIGN(0x8);
308   } >dram0_0_seg :dram0_0_phdr
309 
310   _memmap_mem_dram0_max = ABSOLUTE(.);
311 
312   .clib.rodata : ALIGN(4)
313   {
314     _clib_rodata_start = ABSOLUTE(.);
315     *(.clib.rodata)
316     . = ALIGN (4);
317     _clib_rodata_end = ABSOLUTE(.);
318   } >dram1_0_seg :dram1_0_phdr
319 
320   .rtos.rodata : ALIGN(4)
321   {
322     _rtos_rodata_start = ABSOLUTE(.);
323     *(.rtos.rodata)
324     . = ALIGN (4);
325     _rtos_rodata_end = ABSOLUTE(.);
326   } >dram1_0_seg :dram1_0_phdr
327 
328   .rodata : ALIGN(4)
329   {
330     _rodata_start = ABSOLUTE(.);
331     *(.rodata)
332     *(SORT(.rodata.sort.*))
333     KEEP (*(SORT(.rodata.keepsort.*) .rodata.keep.*))
334     *(.rodata.*)
335     *(.gnu.linkonce.r.*)
336     *(.rodata1)
337     __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
338     KEEP (*(.xt_except_table))
339     KEEP (*(.gcc_except_table))
340     *(.gnu.linkonce.e.*)
341     *(.gnu.version_r)
342     KEEP (*(.eh_frame))
343     /*  C++ constructor and destructor tables, properly ordered:  */
344     KEEP (*crtbegin.o(.ctors))
345     KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
346     KEEP (*(SORT(.ctors.*)))
347     KEEP (*(.ctors))
348     KEEP (*crtbegin.o(.dtors))
349     KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
350     KEEP (*(SORT(.dtors.*)))
351     KEEP (*(.dtors))
352     /*  C++ exception handlers table:  */
353     __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
354     *(.xt_except_desc)
355     *(.gnu.linkonce.h.*)
356     __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
357     *(.xt_except_desc_end)
358     *(.dynamic)
359     *(.gnu.version_d)
360     . = ALIGN(4);		/* this table MUST be 4-byte aligned */
361     _bss_table_start = ABSOLUTE(.);
362     LONG(_bss_start)
363     LONG(_bss_end)
364     _bss_table_end = ABSOLUTE(.);
365     . = ALIGN (4);
366     _rodata_end = ABSOLUTE(.);
367   } >dram1_0_seg :dram1_0_phdr
368 
369   .clib.data : ALIGN(4)
370   {
371     _clib_data_start = ABSOLUTE(.);
372     *(.clib.data)
373     . = ALIGN (4);
374     _clib_data_end = ABSOLUTE(.);
375   } >dram1_0_seg :dram1_0_phdr
376 
377   .clib.percpu.data : ALIGN(4)
378   {
379     _clib_percpu_data_start = ABSOLUTE(.);
380     *(.clib.percpu.data)
381     . = ALIGN (4);
382     _clib_percpu_data_end = ABSOLUTE(.);
383   } >dram1_0_seg :dram1_0_phdr
384 
385   .rtos.percpu.data : ALIGN(4)
386   {
387     _rtos_percpu_data_start = ABSOLUTE(.);
388     *(.rtos.percpu.data)
389     . = ALIGN (4);
390     _rtos_percpu_data_end = ABSOLUTE(.);
391   } >dram1_0_seg :dram1_0_phdr
392 
393   .rtos.data : ALIGN(4)
394   {
395     _rtos_data_start = ABSOLUTE(.);
396     *(.rtos.data)
397     . = ALIGN (4);
398     _rtos_data_end = ABSOLUTE(.);
399   } >dram1_0_seg :dram1_0_phdr
400 
401   .data : ALIGN(4)
402   {
403     _data_start = ABSOLUTE(.);
404     *(.data)
405     *(SORT(.data.sort.*))
406     KEEP (*(SORT(.data.keepsort.*) .data.keep.*))
407     *(.data.*)
408     *(.gnu.linkonce.d.*)
409     KEEP(*(.gnu.linkonce.d.*personality*))
410     *(.data1)
411     *(.sdata)
412     *(.sdata.*)
413     *(.gnu.linkonce.s.*)
414     *(.sdata2)
415     *(.sdata2.*)
416     *(.gnu.linkonce.s2.*)
417     KEEP(*(.jcr))
418     *(__llvm_prf_cnts)
419     *(__llvm_prf_data)
420     *(__llvm_prf_vnds)
421     . = ALIGN (4);
422     _data_end = ABSOLUTE(.);
423   } >dram1_0_seg :dram1_0_phdr
424 
bss(NOLOAD)425   .bss (NOLOAD) : ALIGN(8)
426   {
427     . = ALIGN (8);
428     _bss_start = ABSOLUTE(.);
429     *(.dynsbss)
430     *(.sbss)
431     *(.sbss.*)
432     *(.gnu.linkonce.sb.*)
433     *(.scommon)
434     *(.sbss2)
435     *(.sbss2.*)
436     *(.gnu.linkonce.sb2.*)
437     *(.dynbss)
438     *(.bss)
439     *(SORT(.bss.sort.*))
440     KEEP (*(SORT(.bss.keepsort.*) .bss.keep.*))
441     *(.bss.*)
442     *(.gnu.linkonce.b.*)
443     *(COMMON)
444     *(.clib.bss)
445     *(.clib.percpu.bss)
446     *(.rtos.percpu.bss)
447     *(.rtos.bss)
448     . = ALIGN (8);
449     _bss_end = ABSOLUTE(.);
450     _end = ALIGN(0x8);
451     PROVIDE(end = ALIGN(0x8));
452     _stack_sentry = ALIGN(0x8);
453     _memmap_seg_dram1_0_end = ALIGN(0x8);
454   } >dram1_0_seg :dram1_0_bss_phdr
455 
456   PROVIDE(__stack = 0x980000);
457   _heap_sentry = 0x980000;
458 
459   _memmap_mem_dram1_max = ABSOLUTE(.);
460 
461   .debug  0 :  { *(.debug) }
462   .line  0 :  { *(.line) }
463   .debug_srcinfo  0 :  { *(.debug_srcinfo) }
464   .debug_sfnames  0 :  { *(.debug_sfnames) }
465   .debug_aranges  0 :  { *(.debug_aranges) }
466   .debug_pubnames  0 :  { *(.debug_pubnames) }
467   .debug_info  0 :  { *(.debug_info) }
468   .debug_abbrev  0 :  { *(.debug_abbrev) }
469   .debug_line  0 :  { *(.debug_line) }
470   .debug_frame  0 :  { *(.debug_frame) }
471   .debug_str  0 :  { *(.debug_str) }
472   .debug_loc  0 :  { *(.debug_loc) }
473   .debug_macinfo  0 :  { *(.debug_macinfo) }
474   .debug_weaknames  0 :  { *(.debug_weaknames) }
475   .debug_funcnames  0 :  { *(.debug_funcnames) }
476   .debug_typenames  0 :  { *(.debug_typenames) }
477   .debug_varnames  0 :  { *(.debug_varnames) }
478   .xt.insn 0 :
479   {
480     KEEP (*(.xt.insn))
481     KEEP (*(.gnu.linkonce.x.*))
482   }
483   .xt.prop 0 :
484   {
485     KEEP (*(.xt.prop))
486     KEEP (*(.xt.prop.*))
487     KEEP (*(.gnu.linkonce.prop.*))
488   }
489   .xt.lit 0 :
490   {
491     KEEP (*(.xt.lit))
492     KEEP (*(.xt.lit.*))
493     KEEP (*(.gnu.linkonce.p.*))
494   }
495   .debug.xt.callgraph 0 :
496   {
497     KEEP (*(.debug.xt.callgraph .debug.xt.callgraph.* .gnu.linkonce.xt.callgraph.*))
498   }
499   .note.gnu.build-id 0 :
500   {
501     KEEP(*(.note.gnu.build-id))
502   }
503 }
504 
505