1/* 2** ################################################################### 3** Processors: MIMXRT1042DFP6B 4** MIMXRT1042XFP5B 5** MIMXRT1042XJM5B 6** 7** Compiler: GNU C Compiler 8** Reference manual: IMXRT1040RM Rev.1, 09/2022 9** Version: rev. 0.1, 2021-07-20 10** Build: b221011 11** 12** Abstract: 13** Linker file for the GNU C Compiler 14** 15** Copyright 2016 Freescale Semiconductor, Inc. 16** Copyright 2016-2022 NXP 17** All rights reserved. 18** 19** SPDX-License-Identifier: BSD-3-Clause 20** 21** http: www.nxp.com 22** mail: support@nxp.com 23** 24** ################################################################### 25*/ 26 27/* Entry Point */ 28ENTRY(Reset_Handler) 29 30HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400; 31STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400; 32VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x00000400 : 0; 33NCACHE_HEAP_START = DEFINED(__heap_noncacheable__) ? 0x82000000 - HEAP_SIZE : 0x81E00000 - HEAP_SIZE; 34NCACHE_HEAP_SIZE = DEFINED(__heap_noncacheable__) ? HEAP_SIZE : 0x0000; 35 36/* Specify the memory areas */ 37MEMORY 38{ 39 m_flash_config (RX) : ORIGIN = 0x60000000, LENGTH = 0x00001000 40 m_ivt (RX) : ORIGIN = 0x60001000, LENGTH = 0x00001000 41 m_interrupts (RX) : ORIGIN = 0x60002000, LENGTH = 0x00000400 42 m_text (RX) : ORIGIN = 0x60002400, LENGTH = 0x007FDC00 43 m_qacode (RX) : ORIGIN = 0x00000000, LENGTH = 0x00020000 44 m_data (RW) : ORIGIN = 0x80000000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x01E00000 : 0x01E00000 - HEAP_SIZE 45 m_ncache (RW) : ORIGIN = 0x81E00000, LENGTH = DEFINED(__heap_noncacheable__) ? 0x00200000 - HEAP_SIZE : 0x00200000 46 m_data2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00020000 47 m_data3 (RW) : ORIGIN = 0x20200000, LENGTH = 0x00040000 48 m_heap (RW) : ORIGIN = NCACHE_HEAP_START, LENGTH = HEAP_SIZE 49} 50 51/* Define output sections */ 52SECTIONS 53{ 54 __NCACHE_REGION_START = ORIGIN(m_ncache); 55 __NCACHE_REGION_SIZE = LENGTH(m_ncache) + NCACHE_HEAP_SIZE; 56 57 .flash_config : 58 { 59 . = ALIGN(4); 60 __FLASH_BASE = .; 61 KEEP(* (.boot_hdr.conf)) /* flash config section */ 62 . = ALIGN(4); 63 } > m_flash_config 64 65 ivt_begin = ORIGIN(m_flash_config) + LENGTH(m_flash_config); 66 67 .ivt : AT(ivt_begin) 68 { 69 . = ALIGN(4); 70 KEEP(* (.boot_hdr.ivt)) /* ivt section */ 71 KEEP(* (.boot_hdr.boot_data)) /* boot section */ 72 KEEP(* (.boot_hdr.dcd_data)) /* dcd section */ 73 . = ALIGN(4); 74 } > m_ivt 75 76 /* The startup code goes first into internal RAM */ 77 .interrupts : 78 { 79 __VECTOR_TABLE = .; 80 __Vectors = .; 81 . = ALIGN(4); 82 KEEP(*(.isr_vector)) /* Startup code */ 83 . = ALIGN(4); 84 } > m_interrupts 85 86 /* The program code and other data goes into internal RAM */ 87 .text : 88 { 89 . = ALIGN(4); 90 *(.text) /* .text sections (code) */ 91 *(.text*) /* .text* sections (code) */ 92 *(.rodata) /* .rodata sections (constants, strings, etc.) */ 93 *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ 94 *(.glue_7) /* glue arm to thumb code */ 95 *(.glue_7t) /* glue thumb to arm code */ 96 *(.eh_frame) 97 KEEP (*(.init)) 98 KEEP (*(.fini)) 99 . = ALIGN(4); 100 } > m_text 101 102 .ARM.extab : 103 { 104 *(.ARM.extab* .gnu.linkonce.armextab.*) 105 } > m_text 106 107 .ARM : 108 { 109 __exidx_start = .; 110 *(.ARM.exidx*) 111 __exidx_end = .; 112 } > m_text 113 114 .ctors : 115 { 116 __CTOR_LIST__ = .; 117 /* gcc uses crtbegin.o to find the start of 118 the constructors, so we make sure it is 119 first. Because this is a wildcard, it 120 doesn't matter if the user does not 121 actually link against crtbegin.o; the 122 linker won't look for a file to match a 123 wildcard. The wildcard also means that it 124 doesn't matter which directory crtbegin.o 125 is in. */ 126 KEEP (*crtbegin.o(.ctors)) 127 KEEP (*crtbegin?.o(.ctors)) 128 /* We don't want to include the .ctor section from 129 from the crtend.o file until after the sorted ctors. 130 The .ctor section from the crtend file contains the 131 end of ctors marker and it must be last */ 132 KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)) 133 KEEP (*(SORT(.ctors.*))) 134 KEEP (*(.ctors)) 135 __CTOR_END__ = .; 136 } > m_text 137 138 .dtors : 139 { 140 __DTOR_LIST__ = .; 141 KEEP (*crtbegin.o(.dtors)) 142 KEEP (*crtbegin?.o(.dtors)) 143 KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)) 144 KEEP (*(SORT(.dtors.*))) 145 KEEP (*(.dtors)) 146 __DTOR_END__ = .; 147 } > m_text 148 149 .preinit_array : 150 { 151 PROVIDE_HIDDEN (__preinit_array_start = .); 152 KEEP (*(.preinit_array*)) 153 PROVIDE_HIDDEN (__preinit_array_end = .); 154 } > m_text 155 156 .init_array : 157 { 158 PROVIDE_HIDDEN (__init_array_start = .); 159 KEEP (*(SORT(.init_array.*))) 160 KEEP (*(.init_array*)) 161 PROVIDE_HIDDEN (__init_array_end = .); 162 } > m_text 163 164 .fini_array : 165 { 166 PROVIDE_HIDDEN (__fini_array_start = .); 167 KEEP (*(SORT(.fini_array.*))) 168 KEEP (*(.fini_array*)) 169 PROVIDE_HIDDEN (__fini_array_end = .); 170 } > m_text 171 172 __etext = .; /* define a global symbol at end of code */ 173 __DATA_ROM = .; /* Symbol is used by startup for data initialization */ 174 175 .interrupts_ram : 176 { 177 . = ALIGN(4); 178 __VECTOR_RAM__ = .; 179 __interrupts_ram_start__ = .; /* Create a global symbol at data start */ 180 *(.m_interrupts_ram) /* This is a user defined section */ 181 . += VECTOR_RAM_SIZE; 182 . = ALIGN(4); 183 __interrupts_ram_end__ = .; /* Define a global symbol at data end */ 184 } > m_data 185 186 __VECTOR_RAM = DEFINED(__ram_vector_table__) ? __VECTOR_RAM__ : ORIGIN(m_interrupts); 187 __RAM_VECTOR_TABLE_SIZE_BYTES = DEFINED(__ram_vector_table__) ? (__interrupts_ram_end__ - __interrupts_ram_start__) : 0x0; 188 189 .data : AT(__DATA_ROM) 190 { 191 . = ALIGN(4); 192 __DATA_RAM = .; 193 __data_start__ = .; /* create a global symbol at data start */ 194 *(m_usb_dma_init_data) 195 *(.data) /* .data sections */ 196 *(.data*) /* .data* sections */ 197 KEEP(*(.jcr*)) 198 . = ALIGN(4); 199 __data_end__ = .; /* define a global symbol at data end */ 200 } > m_data 201 202 __ram_function_flash_start = __DATA_ROM + (__data_end__ - __data_start__); /* Symbol is used by startup for TCM data initialization */ 203 204 .ram_function : AT(__ram_function_flash_start) 205 { 206 . = ALIGN(32); 207 __ram_function_start__ = .; 208 *(CodeQuickAccess) 209 . = ALIGN(128); 210 __ram_function_end__ = .; 211 } > m_qacode 212 213 __NDATA_ROM = __ram_function_flash_start + (__ram_function_end__ - __ram_function_start__); 214 .ncache.init : AT(__NDATA_ROM) 215 { 216 __noncachedata_start__ = .; /* create a global symbol at ncache data start */ 217 *(NonCacheable.init) 218 . = ALIGN(4); 219 __noncachedata_init_end__ = .; /* create a global symbol at initialized ncache data end */ 220 } > m_ncache 221 . = __noncachedata_init_end__; 222 .ncache : 223 { 224 *(NonCacheable) 225 . = ALIGN(4); 226 __noncachedata_end__ = .; /* define a global symbol at ncache data end */ 227 } > m_ncache 228 229 __DATA_END = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__); 230 text_end = ORIGIN(m_text) + LENGTH(m_text); 231 ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data") 232 233 .qadata : 234 { 235 . = ALIGN(4); 236 *(DataQuickAccess) /* quick access data section */ 237 . = ALIGN(4); 238 } > m_data2 239 240 /* Uninitialized data section */ 241 .bss : 242 { 243 /* This is used by the startup in order to initialize the .bss section */ 244 . = ALIGN(4); 245 __START_BSS = .; 246 __bss_start__ = .; 247 *(m_usb_dma_noninit_data) 248 *(.bss) 249 *(.bss*) 250 *(COMMON) 251 . = ALIGN(4); 252 __bss_end__ = .; 253 __END_BSS = .; 254 } > m_data 255 256 .heap : 257 { 258 . = ALIGN(8); 259 __end__ = .; 260 PROVIDE(end = .); 261 __HeapBase = .; 262 . += HEAP_SIZE; 263 __HeapLimit = .; 264 __heap_limit = .; /* Add for _sbrk */ 265 } > m_heap 266 267 .stack : 268 { 269 . = ALIGN(8); 270 . += STACK_SIZE; 271 } > m_data 272 273 /* Initializes stack on the end of block */ 274 __StackTop = ORIGIN(m_data) + LENGTH(m_data); 275 __StackLimit = __StackTop - STACK_SIZE; 276 PROVIDE(__stack = __StackTop); 277 278 .ARM.attributes 0 : { *(.ARM.attributes) } 279} 280