1 /*
2 * Copyright (c) 2019-2020, NXP
3 * All rights reserved.
4 *
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #include "fsl_display.h"
10 #include "fsl_rm67162.h"
11
12 /*******************************************************************************
13 * Definitions
14 ******************************************************************************/
15 #define RM67162_DelayMs VIDEO_DelayMs
16
17 /*******************************************************************************
18 * Variables
19 ******************************************************************************/
20 static const uint8_t rm67162InitSetting_400x400[][2] = {
21 /* Page 3:GOA */
22 {0xFE, 0x04},
23 /* GOA SETTING */
24 {0x00, 0xDC},
25 {0x01, 0x00},
26 {0x02, 0x02},
27 {0x03, 0x00},
28 {0x04, 0x00},
29 {0x05, 0x03},
30 {0x06, 0x16},
31 {0x07, 0x13},
32 {0x08, 0x08},
33 {0x09, 0xDC},
34 {0x0A, 0x00},
35 {0x0B, 0x02},
36 {0x0C, 0x00},
37 {0x0D, 0x00},
38 {0x0E, 0x02},
39 {0x0F, 0x16},
40 {0x10, 0x18},
41 {0x11, 0x08},
42 {0x12, 0x92},
43 {0x13, 0x00},
44 {0x14, 0x02},
45 {0x15, 0x05},
46 {0x16, 0x40},
47 {0x17, 0x03},
48 {0x18, 0x16},
49 {0x19, 0xD7},
50 {0x1A, 0x01},
51 {0x1B, 0xDC},
52 {0x1C, 0x00},
53 {0x1D, 0x04},
54 {0x1E, 0x00},
55 {0x1F, 0x00},
56 {0x20, 0x03},
57 {0x21, 0x16},
58 {0x22, 0x18},
59 {0x23, 0x08},
60 {0x24, 0xDC},
61 {0x25, 0x00},
62 {0x26, 0x04},
63 {0x27, 0x00},
64 {0x28, 0x00},
65 {0x29, 0x01},
66 {0x2A, 0x16},
67 {0x2B, 0x18},
68 {0x2D, 0x08},
69 {0x4C, 0x99},
70 {0x4D, 0x00},
71 {0x4E, 0x00},
72 {0x4F, 0x00},
73 {0x50, 0x01},
74 {0x51, 0x0A},
75 {0x52, 0x00},
76 {0x5A, 0xE4},
77 {0x5E, 0x77},
78 {0x5F, 0x77},
79 {0x60, 0x34},
80 {0x61, 0x02},
81 {0x62, 0x81},
82
83 /* Page 6 */
84 {0xFE, 0x07},
85 {0x07, 0x4F},
86
87 /* Page 0 */
88 {0xFE, 0x01},
89 /* Display Resolution Panel Option */
90 {0x05, 0x15},
91 /* DDVDH Charge Pump Control Normal Mode */
92 {0x0E, 0x8B},
93 /* DDVDH Charge Pump Control ldle Mode */
94 {0x0F, 0x8B},
95 /* DDVDH/VCL Regulator Enable */
96 {0x10, 0x11},
97 /* VCL Charge Pump Control Normal Mode */
98 {0x11, 0xA2},
99 /* VCL Charge Pump Control Idle Mode */
100 {0x12, 0xA0},
101 /* VGH Charge Pump Control ldle Mode */
102 {0x14, 0xA1},
103 /* VGL Charge Pump Control Normal Mode */
104 {0x15, 0x82},
105 /* VGHR Control */
106 {0x18, 0x47},
107 /* VGLR Control */
108 {0x19, 0x36},
109 /* VREFPN5 REGULATOR ENABLE */
110 {0x1A, 0x10},
111 /* VREFPN5 */
112 {0x1C, 0x57},
113 /* SWITCH EQ Control */
114 {0x1D, 0x02},
115 /* VGMP Control */
116 {0x21, 0xF8},
117 /* VGSP Control */
118 {0x22, 0x90},
119 /* VGMP / VGSP control */
120 {0x23, 0x00},
121 /* Low Frame Rate Control Normal Mode */
122 {0x25, 0x03},
123 {0x26, 0x4a},
124 /* Low Frame Rate Control Idle Mode */
125 {0x2A, 0x03},
126 {0x2B, 0x4A},
127 {0x2D, 0x12},
128 {0x2F, 0x12},
129
130 {0x30, 0x45},
131
132 /* Source Control */
133 {0x37, 0x0C},
134 /* Switch Timing Control */
135 {0x3A, 0x00},
136 {0x3B, 0x20},
137 {0x3D, 0x0B},
138 {0x3F, 0x38},
139 {0x40, 0x0B},
140 {0x41, 0x0B},
141
142 /* Switch Output Selection */
143 {0x42, 0x33},
144 {0x43, 0x66},
145 {0x44, 0x11},
146 {0x45, 0x44},
147 {0x46, 0x22},
148 {0x47, 0x55},
149 {0x4C, 0x33},
150 {0x4D, 0x66},
151 {0x4E, 0x11},
152 {0x4f, 0x44},
153 {0x50, 0x22},
154 {0x51, 0x55},
155
156 /* Source Data Output Selection */
157 {0x56, 0x11},
158 {0x58, 0x44},
159 {0x59, 0x22},
160 {0x5A, 0x55},
161 {0x5B, 0x33},
162 {0x5C, 0x66},
163 {0x61, 0x11},
164 {0x62, 0x44},
165 {0x63, 0x22},
166 {0x64, 0x55},
167 {0x65, 0x33},
168 {0x66, 0x66},
169
170 {0x6D, 0x90},
171 {0x6E, 0x40},
172
173 /* Source Sequence 2 */
174 {0x70, 0xA5},
175
176 /* OVDD control */
177 {0x72, 0x04},
178
179 /* OVSS control */
180 {0x73, 0x15},
181
182 /* Page 9 */
183 {0xFE, 0x0A},
184 {0x29, 0x10},
185
186 /* Page 4 */
187 {0xFE, 0x05},
188 /* ELVSS -2.4V(RT4723). 0x15: RT4723. 0x01: RT4723B. 0x17: STAM1332. */
189 {0x05, 0x15},
190
191 {0xFE, 0x00},
192 /* enable TE. */
193 {0x35, 0x00},
194 };
195
196 static const uint8_t rm67162InitSetting_400x392[][2] = {
197 {0xFE, 0x01},
198 {0x06, 0x62},
199 {0x0E, 0x80},
200 {0x0F, 0x80},
201 {0x10, 0x71},
202 {0x13, 0x81},
203 {0x14, 0x81},
204 {0x15, 0x82},
205 {0x16, 0x82},
206 {0x18, 0x88},
207 {0x19, 0x55},
208 {0x1A, 0x10},
209 {0x1C, 0x99},
210 {0x1D, 0x03},
211 {0x1E, 0x03},
212 {0x1F, 0x03},
213 {0x20, 0x03},
214 {0x25, 0x03},
215 {0x26, 0x8D},
216 {0x2A, 0x03},
217 {0x2B, 0x8D},
218 {0x36, 0x00},
219 {0x37, 0x10},
220 {0x3A, 0x00},
221 {0x3B, 0x00},
222 {0x3D, 0x20},
223 {0x3F, 0x3A},
224 {0x40, 0x30},
225 {0x41, 0x30},
226 {0x42, 0x33},
227 {0x43, 0x22},
228 {0x44, 0x11},
229 {0x45, 0x66},
230 {0x46, 0x55},
231 {0x47, 0x44},
232 {0x4C, 0x33},
233 {0x4D, 0x22},
234 {0x4E, 0x11},
235 {0x4F, 0x66},
236 {0x50, 0x55},
237 {0x51, 0x44},
238 {0x57, 0xB3},
239 {0x6B, 0x19},
240 {0x70, 0x55},
241 {0x74, 0x0C},
242
243 /* VGMP/VGSP Voltage Control */
244 {0xFE, 0x02},
245 {0x9B, 0x40},
246 {0x9C, 0x67},
247 {0x9D, 0x20},
248
249 /* VGMP/VGSP Voltage Control */
250 {0xFE, 0x03},
251 {0x9B, 0x40},
252 {0x9C, 0x67},
253 {0x9D, 0x20},
254
255 /* VSR Command */
256 {0xFE, 0x04},
257 {0x5D, 0x10},
258
259 /* VSR1 Timing Set */
260 {0xFE, 0x04},
261 {0x00, 0x8D},
262 {0x01, 0x00},
263 {0x02, 0x01},
264 {0x03, 0x01},
265 {0x04, 0x10},
266 {0x05, 0x01},
267 {0x06, 0xA7},
268 {0x07, 0x20},
269 {0x08, 0x00},
270
271 /* VSR2 Timing Set */
272 {0xFE, 0x04},
273 {0x09, 0xC2},
274 {0x0A, 0x00},
275 {0x0B, 0x02},
276 {0x0C, 0x01},
277 {0x0D, 0x40},
278 {0x0E, 0x06},
279 {0x0F, 0x01},
280 {0x10, 0xA7},
281 {0x11, 0x00},
282
283 /* VSR3 Timing Set */
284 {0xFE, 0x04},
285 {0x12, 0xC2},
286 {0x13, 0x00},
287 {0x14, 0x02},
288 {0x15, 0x01},
289 {0x16, 0x40},
290 {0x17, 0x07},
291 {0x18, 0x01},
292 {0x19, 0xA7},
293 {0x1A, 0x00},
294
295 /* VSR4 Timing Set */
296 {0xFE, 0x04},
297 {0x1B, 0x82},
298 {0x1C, 0x00},
299 {0x1D, 0xFF},
300 {0x1E, 0x05},
301 {0x1F, 0x60},
302 {0x20, 0x02},
303 {0x21, 0x01},
304 {0x22, 0x7C},
305 {0x23, 0x00},
306
307 /* VSR5 Timing Set */
308 {0xFE, 0x04},
309 {0x24, 0xC2},
310 {0x25, 0x00},
311 {0x26, 0x04},
312 {0x27, 0x02},
313 {0x28, 0x70},
314 {0x29, 0x05},
315 {0x2A, 0x74},
316 {0x2B, 0x8D},
317 {0x2D, 0x00},
318
319 /* VSR6 Timing Set */
320 {0xFE, 0x04},
321 {0x2F, 0xC2},
322 {0x30, 0x00},
323 {0x31, 0x04},
324 {0x32, 0x02},
325 {0x33, 0x70},
326 {0x34, 0x07},
327 {0x35, 0x74},
328 {0x36, 0x8D},
329 {0x37, 0x00},
330
331 /* VSR Marping command */
332 {0xFE, 0x04},
333 {0x5E, 0x20},
334 {0x5F, 0x31},
335 {0x60, 0x54},
336 {0x61, 0x76},
337 {0x62, 0x98},
338
339 /* ELVSS -2.4V(RT4723). 0x15: RT4723. 0x01: RT4723B. 0x17: STAM1332. */
340 {0xFE, 0x05},
341 {0x05, 0x15},
342 {0x2A, 0x04},
343 {0x91, 0x00},
344
345 {0xFE, 0x00},
346 {0x35, 0x00}, /* TE enable. */
347 };
348
349 const display_operations_t rm67162_ops = {
350 .init = RM67162_Init,
351 .deinit = RM67162_Deinit,
352 .start = RM67162_Start,
353 .stop = RM67162_Stop,
354 };
355
356 /*******************************************************************************
357 * Code
358 ******************************************************************************/
359
RM67162_Init(display_handle_t * handle,const display_config_t * config)360 status_t RM67162_Init(display_handle_t *handle, const display_config_t *config)
361 {
362 uint32_t i;
363 status_t status = kStatus_Success;
364 mipi_dsc_pixel_format_t dscPixelFormat;
365 const rm67162_resource_t *resource = (const rm67162_resource_t *)(handle->resource);
366 mipi_dsi_device_t *dsiDevice = resource->dsiDevice;
367 uint32_t initSettingSize;
368 const uint8_t(*initSetting)[2];
369
370 if (config->resolution == FSL_VIDEO_RESOLUTION(400, 400))
371 {
372 initSetting = rm67162InitSetting_400x400;
373 initSettingSize = ARRAY_SIZE(rm67162InitSetting_400x400);
374 }
375 else if (config->resolution == FSL_VIDEO_RESOLUTION(400, 392))
376 {
377 initSetting = rm67162InitSetting_400x392;
378 initSettingSize = ARRAY_SIZE(rm67162InitSetting_400x392);
379 }
380 else
381 {
382 return kStatus_InvalidArgument;
383 }
384
385 handle->height = FSL_VIDEO_EXTRACT_HEIGHT(config->resolution);
386 handle->width = FSL_VIDEO_EXTRACT_WIDTH(config->resolution);
387
388 /* Only support RGB888 and RGB565. */
389 if (kVIDEO_PixelFormatRGB565 == config->pixelFormat)
390 {
391 dscPixelFormat = kMIPI_DCS_Pixel16Bits;
392 }
393 else if ((kVIDEO_PixelFormatXRGB8888 == config->pixelFormat) || (kVIDEO_PixelFormatRGB888 == config->pixelFormat))
394 {
395 dscPixelFormat = kMIPI_DCS_Pixel24Bits;
396 }
397 else
398 {
399 return kStatus_InvalidArgument;
400 }
401
402 handle->pixelFormat = config->pixelFormat;
403
404 /* Power on. */
405 resource->pullPowerPin(true);
406 RM67162_DelayMs(1);
407
408 /* Perform reset. */
409 resource->pullResetPin(false);
410 RM67162_DelayMs(1);
411 resource->pullResetPin(true);
412 RM67162_DelayMs(150);
413
414 /* Set the init settings. */
415 for (i = 0; i < initSettingSize; i++)
416 {
417 status = MIPI_DSI_GenericWrite(dsiDevice, initSetting[i], 2);
418
419 if (kStatus_Success != status)
420 {
421 return status;
422 }
423 }
424 status = MIPI_DSI_DCS_SetPixelFormat(dsiDevice, dscPixelFormat, kMIPI_DCS_Pixel24Bits);
425 if (kStatus_Success != status)
426 {
427 return status;
428 }
429
430 RM67162_DelayMs(50);
431
432 /* Sleep out. */
433 status = MIPI_DSI_DCS_EnterSleepMode(dsiDevice, false);
434 if (kStatus_Success != status)
435 {
436 return status;
437 }
438
439 RM67162_DelayMs(150);
440
441 return MIPI_DSI_DCS_SetDisplayOn(dsiDevice, true);
442 }
443
RM67162_Deinit(display_handle_t * handle)444 status_t RM67162_Deinit(display_handle_t *handle)
445 {
446 const rm67162_resource_t *resource = (const rm67162_resource_t *)(handle->resource);
447 mipi_dsi_device_t *dsiDevice = resource->dsiDevice;
448
449 (void)MIPI_DSI_DCS_EnterSleepMode(dsiDevice, true);
450
451 resource->pullResetPin(false);
452 resource->pullPowerPin(false);
453
454 return kStatus_Success;
455 }
456
RM67162_Start(display_handle_t * handle)457 status_t RM67162_Start(display_handle_t *handle)
458 {
459 const rm67162_resource_t *resource = (const rm67162_resource_t *)(handle->resource);
460 mipi_dsi_device_t *dsiDevice = resource->dsiDevice;
461
462 return MIPI_DSI_DCS_SetDisplayOn(dsiDevice, true);
463 }
464
RM67162_Stop(display_handle_t * handle)465 status_t RM67162_Stop(display_handle_t *handle)
466 {
467 const rm67162_resource_t *resource = (const rm67162_resource_t *)(handle->resource);
468 mipi_dsi_device_t *dsiDevice = resource->dsiDevice;
469
470 return MIPI_DSI_DCS_SetDisplayOn(dsiDevice, false);
471 }
472
