1 /*
2  * Copyright 2021 NXP
3  * All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 #include "flash_config.h"
8 
9 /* Component ID definition, used by tools. */
10 #ifndef FSL_COMPONENT_ID
11 #define FSL_COMPONENT_ID "platform.drivers.flash_config"
12 #endif
13 
14 /*******************************************************************************
15  * Code
16  ******************************************************************************/
17 #if defined(BOOT_HEADER_ENABLE) && (BOOT_HEADER_ENABLE == 1)
18 #if defined(__ARMCC_VERSION) || defined(__GNUC__)
19 __attribute__((section(".flash_conf"), used))
20 #elif defined(__ICCARM__)
21 #pragma location = ".flash_conf"
22 #endif
23 
24 const flexspi_nor_config_t flexspi_config = {
25     .memConfig =
26         {
27             .tag                  = FLASH_CONFIG_BLOCK_TAG,
28             .version              = FLASH_CONFIG_BLOCK_VERSION,
29             .csHoldTime           = 3,
30             .csSetupTime          = 3,
31             .configCmdEnable      = 0,
32             .controllerMiscOption = (1u << kFlexSpiMiscOffset_SafeConfigFreqEnable),
33             .deviceType           = 0x1,
34             .sflashPadType        = kSerialFlash_4Pads,
35             .serialClkFreq        = kFlexSpiSerialClk_SDR_24MHz,
36             .sflashA1Size         = 0,
37             .sflashA2Size         = 0,
38             .sflashB1Size         = 0x4000000U,
39             .sflashB2Size         = 0,
40             .lookupTable =
41                 {
42                     /* Read */
43                     [0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEC, RADDR_SDR, FLEXSPI_4PAD, 0x20),
44                     [1] = FLEXSPI_LUT_SEQ(MODE8_SDR, FLEXSPI_4PAD, 0x00, DUMMY_SDR, FLEXSPI_4PAD, 0x04),
45                     [2] = FLEXSPI_LUT_SEQ(READ_SDR, FLEXSPI_4PAD, 0x04, STOP_EXE, FLEXSPI_1PAD, 0x00),
46 
47                     /* Read Status */
48                     [4 * 1 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x04),
49 
50                     /* Write Enable */
51                     [4 * 3 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP_EXE, FLEXSPI_1PAD, 0x00),
52 
53                     /* Sector erase */
54                     [4 * 5 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x21, RADDR_SDR, FLEXSPI_1PAD, 0x20),
55 
56                     /* block erase */
57                     [4 * 8 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xDC, RADDR_SDR, FLEXSPI_1PAD, 0x20),
58 
59                     /* 4PP4B */
60                     [4 * 9 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x3E, RADDR_SDR, FLEXSPI_4PAD, 0x20),
61                     [4 * 9 + 1] = FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_4PAD, 0x04, STOP_EXE, FLEXSPI_1PAD, 0x00),
62 
63                     /* chip erase */
64                     [4 * 11 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60, STOP_EXE, FLEXSPI_1PAD, 0x00),
65                 },
66         },
67     .pageSize           = 0x100,
68     .sectorSize         = 0x1000,
69     .ipcmdSerialClkFreq = 1,
70     .blockSize          = 0x10000,
71 };
72 #endif /* BOOT_HEADER_ENABLE */
73