1 /**************************************************************************//** 2 * @file lpadc.h 3 * @version V1.0 4 * @brief M2L31 series LPADC driver header file 5 * 6 * SPDX-License-Identifier: Apache-2.0 7 * Copyright (C) 2023 Nuvoton Technology Corp. All rights reserved. 8 *****************************************************************************/ 9 #ifndef __LPADC_H__ 10 #define __LPADC_H__ 11 12 #ifdef __cplusplus 13 extern "C" 14 { 15 #endif 16 17 18 /** @addtogroup Standard_Driver Standard Driver 19 @{ 20 */ 21 22 /** @addtogroup LPADC_Driver LPADC Driver 23 @{ 24 */ 25 26 /** @addtogroup LPADC_EXPORTED_CONSTANTS LPADC Exported Constants 27 @{ 28 */ 29 30 /*---------------------------------------------------------------------------------------------------------*/ 31 /* ADCR Constant Definitions */ 32 /*---------------------------------------------------------------------------------------------------------*/ 33 #define LPADC_ADCR_ADEN_CONVERTER_DISABLE (0UL<<LPADC_ADCR_ADEN_Pos) /*!< LPADC converter disable \hideinitializer */ 34 #define LPADC_ADCR_ADEN_CONVERTER_ENABLE (1UL<<LPADC_ADCR_ADEN_Pos) /*!< LPADC converter enable \hideinitializer */ 35 36 #define LPADC_ADCR_ADMD_SINGLE (0UL<<LPADC_ADCR_ADMD_Pos) /*!< Single mode \hideinitializer */ 37 #define LPADC_ADCR_ADMD_BURST (1UL<<LPADC_ADCR_ADMD_Pos) /*!< Burst mode \hideinitializer */ 38 #define LPADC_ADCR_ADMD_SINGLE_CYCLE (2UL<<LPADC_ADCR_ADMD_Pos) /*!< Single cycle scan mode \hideinitializer */ 39 #define LPADC_ADCR_ADMD_CONTINUOUS (3UL<<LPADC_ADCR_ADMD_Pos) /*!< Continuous scan mode \hideinitializer */ 40 41 #define LPADC_ADCR_DIFFEN_SINGLE_END (0UL<<LPADC_ADCR_DIFFEN_Pos) /*!< Single-end input mode \hideinitializer */ 42 #define LPADC_ADCR_DIFFEN_DIFFERENTIAL (1UL<<LPADC_ADCR_DIFFEN_Pos) /*!< Differential input mode \hideinitializer */ 43 44 #define LPADC_ADCR_DMOF_UNSIGNED_OUTPUT (0UL<<LPADC_ADCR_DMOF_Pos) /*!< Select the straight binary format as the output format of the conversion result \hideinitializer */ 45 #define LPADC_ADCR_DMOF_TWOS_COMPLEMENT (1UL<<LPADC_ADCR_DMOF_Pos) /*!< Select the 2's complement format as the output format of the conversion result \hideinitializer */ 46 47 #define LPADC_ADCR_TRGEN_DISABLE (0UL<<LPADC_ADCR_TRGEN_Pos) /*!< Disable triggering of A/D conversion by external STADC pin or PWM \hideinitializer */ 48 #define LPADC_ADCR_TRGEN_ENABLE (1UL<<LPADC_ADCR_TRGEN_Pos) /*!< Enable triggering of A/D conversion by external STADC pin or PWM \hideinitializer */ 49 50 #define LPADC_ADCR_TRGS_STADC (0UL<<LPADC_ADCR_TRGS_Pos) /*!< A/D conversion is started by external STADC pin \hideinitializer */ 51 #define LPADC_ADCR_TRGS_TIMER (1UL<<LPADC_ADCR_TRGS_Pos) /*!< A/D conversion is started by Timer \hideinitializer */ 52 #define LPADC_ADCR_TRGS_PWM (3UL<<LPADC_ADCR_TRGS_Pos) /*!< A/D conversion is started by PWM \hideinitializer */ 53 #define LPADC_ADCR_TRGS_EPWM (4UL<<LPADC_ADCR_TRGS_Pos) /*!< A/D conversion is started by EPWM \hideinitializer */ 54 #define LPADC_ADCR_TRGS_ACMP0 (8UL<<LPADC_ADCR_TRGS_Pos) /*!< A/D conversion is started by ACMP0 \hideinitializer */ 55 #define LPADC_ADCR_TRGS_ACMP1 (9UL<<LPADC_ADCR_TRGS_Pos) /*!< A/D conversion is started by ACMP1 \hideinitializer */ 56 #define LPADC_ADCR_TRGS_ACMP2 (10UL<<LPADC_ADCR_TRGS_Pos) /*!< A/D conversion is started by ACMP2 \hideinitializer */ 57 58 #define LPADC_ADCR_TRGCOND_LOW_LEVEL (0UL<<LPADC_ADCR_TRGCOND_Pos) /*!< STADC Low level active \hideinitializer */ 59 #define LPADC_ADCR_TRGCOND_HIGH_LEVEL (1UL<<LPADC_ADCR_TRGCOND_Pos) /*!< STADC High level active \hideinitializer */ 60 #define LPADC_ADCR_TRGCOND_FALLING_EDGE (2UL<<LPADC_ADCR_TRGCOND_Pos) /*!< STADC Falling edge active \hideinitializer */ 61 #define LPADC_ADCR_TRGCOND_RISING_EDGE (3UL<<LPADC_ADCR_TRGCOND_Pos) /*!< STADC Rising edge active \hideinitializer */ 62 63 #define LPADC_ADCR_RESSEL_12BITS (0UL<<LPADC_ADCR_RESSEL_Pos) /*!< Resolution Select 12 Bits \hideinitializer */ 64 #define LPADC_ADCR_RESSEL_10BITS (1UL<<LPADC_ADCR_RESSEL_Pos) /*!< Resolution Select 10 Bits \hideinitializer */ 65 #define LPADC_ADCR_RESSEL_8BITS (2UL<<LPADC_ADCR_RESSEL_Pos) /*!< Resolution Select 8 Bits \hideinitializer */ 66 67 /*---------------------------------------------------------------------------------------------------------*/ 68 /* ADCMPR Constant Definitions */ 69 /*---------------------------------------------------------------------------------------------------------*/ 70 #define LPADC_ADCMPR_CMPD(x) ((x) << LPADC_ADCMPR_CMPD_Pos) /*!< Compare value for compare function \hideinitializer */ 71 #define LPADC_ADCMPR_CMPMATCNT(x) (((x)-1) << LPADC_ADCMPR_CMPMATCNT_Pos) /*!< Match count for compare function \hideinitializer */ 72 #define LPADC_ADCMPR_CMPCH(x) ((x) << LPADC_ADCMPR_CMPCH_Pos) /*!< Compare channel for compare function \hideinitializer */ 73 #define LPADC_ADCMPR_CMPCOND_LESS_THAN (0<<LPADC_ADCMPR_CMPCOND_Pos) /*!< The compare condition is "less than" \hideinitializer */ 74 #define LPADC_ADCMPR_CMPCOND_GREATER_OR_EQUAL (1<<LPADC_ADCMPR_CMPCOND_Pos) /*!< The compare condition is "greater than or equal to" \hideinitializer */ 75 #define LPADC_ADCMPR_CMPIE_INTERRUPT_ENABLE (LPADC_ADCMPR_CMPIE_Msk) /*!< The compare function interrupt enable \hideinitializer */ 76 77 /*---------------------------------------------------------------------------------------------------------*/ 78 /* LPADC Interrupt Constant Definitions */ 79 /*---------------------------------------------------------------------------------------------------------*/ 80 #define LPADC_ADF_INT (LPADC_ADSR0_ADF_Msk) /*!< LPADC convert complete interrupt \hideinitializer */ 81 #define LPADC_CMP0_INT (LPADC_ADSR0_CMPF0_Msk) /*!< LPADC comparator 0 interrupt \hideinitializer */ 82 #define LPADC_CMP1_INT (LPADC_ADSR0_CMPF1_Msk) /*!< LPADC comparator 1 interrupt \hideinitializer */ 83 84 /*---------------------------------------------------------------------------------------------------------*/ 85 /* LPADC Operation Mode Constant Definitions */ 86 /*---------------------------------------------------------------------------------------------------------*/ 87 #define LPADC_SINGLE_MODE 0 /*!< LPADC single mode \hideinitializer */ 88 #define LPADC_BURST_MODE 1 /*!< LPADC burst mode \hideinitializer */ 89 #define LPADC_SINGLE_CYCLE_MODE 2 /*!< LPADC single-cycle scan mode \hideinitializer */ 90 #define LPADC_CONTINUOUS_MODE 3 /*!< LPADC continuous scan mode \hideinitializer */ 91 92 /*---------------------------------------------------------------------------------------------------------*/ 93 /* LPADC Trigger Condition Constant Definitions */ 94 /*---------------------------------------------------------------------------------------------------------*/ 95 #define LPADC_LOW_LEVEL 0 /*!< LPADC external trigger condition is low level trigger \hideinitializer */ 96 #define LPADC_HIGH_LEVEL 1 /*!< LPADC external trigger condition is high level trigger \hideinitializer */ 97 #define LPADC_FALLING_EDGE 2 /*!< LPADC external trigger condition is falling edge trigger \hideinitializer */ 98 #define LPADC_RISING_EDGE 3 /*!< LPADC external trigger condition is rising edge trigger \hideinitializer */ 99 100 /*---------------------------------------------------------------------------------------------------------*/ 101 /* LPADC Compare Condition Constant Definitions */ 102 /*---------------------------------------------------------------------------------------------------------*/ 103 #define LPADC_LESS_THAN 0 /*!< LPADC compare condition is "less than the compare value" \hideinitializer */ 104 #define LPADC_GREATER_OR_EQUAL 1 /*!< LPADC compare condition is "greater than or equal to the compare value" \hideinitializer */ 105 106 /*---------------------------------------------------------------------------------------------------------*/ 107 /* AUTOCTL Constant Definitions */ 108 /*---------------------------------------------------------------------------------------------------------*/ 109 #define LPADC_AUTOCTL_TRIGSEL_SOFTWARE (0xFFUL) /*!< LPADC Automatic Operation Trigger Source Select is Software \hideinitializer */ 110 #define LPADC_AUTOCTL_TRIGSEL_LPTMR0 (0UL<<LPADC_AUTOCTL_TRIGSEL_Pos) /*!< LPADC Automatic Operation Trigger Source Select is LPTMR0 \hideinitializer */ 111 #define LPADC_AUTOCTL_TRIGSEL_LPTMR1 (1UL<<LPADC_AUTOCTL_TRIGSEL_Pos) /*!< LPADC Automatic Operation Trigger Source Select is LPTMR1 \hideinitializer */ 112 #define LPADC_AUTOCTL_TRIGSEL_TTMR0 (2UL<<LPADC_AUTOCTL_TRIGSEL_Pos) /*!< LPADC Automatic Operation Trigger Source Select is TTMR0 \hideinitializer */ 113 #define LPADC_AUTOCTL_TRIGSEL_TTMR1 (3UL<<LPADC_AUTOCTL_TRIGSEL_Pos) /*!< LPADC Automatic Operation Trigger Source Select is TTMR1 \hideinitializer */ 114 #define LPADC_AUTOCTL_TRIGSEL_WKIOA0 (4UL<<LPADC_AUTOCTL_TRIGSEL_Pos) /*!< LPADC Automatic Operation Trigger Source Select is WKIOA0 \hideinitializer */ 115 #define LPADC_AUTOCTL_TRIGSEL_WKIOB0 (5UL<<LPADC_AUTOCTL_TRIGSEL_Pos) /*!< LPADC Automatic Operation Trigger Source Select is WKIOB0 \hideinitializer */ 116 #define LPADC_AUTOCTL_TRIGSEL_WKIOC0 (6UL<<LPADC_AUTOCTL_TRIGSEL_Pos) /*!< LPADC Automatic Operation Trigger Source Select is WKIOC0 \hideinitializer */ 117 #define LPADC_AUTOCTL_TRIGSEL_WKIOD0 (7UL<<LPADC_AUTOCTL_TRIGSEL_Pos) /*!< LPADC Automatic Operation Trigger Source Select is WKIOD0 \hideinitializer */ 118 #define LPADC_AUTOCTL_TRIGSEL_ACMP0 (8UL<<LPADC_AUTOCTL_TRIGSEL_Pos) /*!< LPADC Automatic Operation Trigger Source Select is ACMP0 \hideinitializer */ 119 #define LPADC_AUTOCTL_TRIGSEL_ACMP1 (9UL<<LPADC_AUTOCTL_TRIGSEL_Pos) /*!< LPADC Automatic Operation Trigger Source Select is ACMP1 \hideinitializer */ 120 #define LPADC_AUTOCTL_TRIGSEL_ACMP2 (10UL<<LPADC_AUTOCTL_TRIGSEL_Pos) /*!< LPADC Automatic Operation Trigger Source Select is ACMP2 \hideinitializer */ 121 122 /*--------------------------------------------------------------------------------------------------*/ 123 /* Define Error Code */ 124 /*--------------------------------------------------------------------------------------------------*/ 125 #define LPADC_TIMEOUT_ERR (-1) /*!< LPADC operation abort due to timeout error \hideinitializer */ 126 127 /*@}*/ /* end of group LPADC_EXPORTED_CONSTANTS */ 128 129 extern int32_t g_LPADC_i32ErrCode; 130 131 /** @addtogroup LPADC_EXPORTED_FUNCTIONS LPADC Exported Functions 132 @{ 133 */ 134 135 136 /** 137 * @brief Get conversion data of specified channel. 138 * @param[in] lpadc The pointer of the specified LPADC module. 139 * @param[in] u32ChNum LPADC Channel, valid value are from 0 to 26, 28 ~ 31. 140 * @return 16-bit data. 141 * @details Read RSLT bit field to get conversion data. 142 * \hideinitializer 143 */ 144 #define LPADC_GET_CONVERSION_DATA(lpadc, u32ChNum) ((lpadc)->ADDR[(u32ChNum)] & LPADC_ADDR0_RSLT_Msk) 145 146 /** 147 * @brief Return the user-specified interrupt flags. 148 * @param[in] lpadc The pointer of the specified LPADC module. 149 * @param[in] u32Mask The combination of following interrupt status bits. Each bit corresponds to a interrupt status. 150 * Valid values are: 151 * - \ref LPADC_ADF_INT :Convert complete interrupt flag. 152 * - \ref LPADC_CMP0_INT :Comparator 0 interrupt flag. 153 * - \ref LPADC_CMP1_INT :Comparator 1 interrupt flag. 154 * @return User specified interrupt flags. 155 * @details Get the status of the LPADC interrupt flag. 156 * \hideinitializer 157 */ 158 #define LPADC_GET_INT_FLAG(lpadc, u32Mask) ((lpadc)->ADSR0 & (u32Mask)) 159 160 /** 161 * @brief This macro clear the selected interrupt status bits. 162 * @param[in] lpadc The pointer of the specified LPADC module. 163 * @param[in] u32Mask The combination of following interrupt status bits. Each bit corresponds to a interrupt status. 164 * Valid values are: 165 * - \ref LPADC_ADF_INT :Convert complete interrupt flag. 166 * - \ref LPADC_CMP0_INT :Comparator 0 interrupt flag. 167 * - \ref LPADC_CMP1_INT :Comparator 1 interrupt flag. 168 * @return None 169 * @details ADF (ADSR0[0])/CMPF0 (ADSR0[1])/CMPF1 (ADSR0[2]) can be cleared by writing 1 to itself. 170 * \hideinitializer 171 */ 172 #define LPADC_CLR_INT_FLAG(lpadc, u32Mask) ((lpadc)->ADSR0 = (u32Mask)) 173 174 /** 175 * @brief Get the busy state of LPADC. 176 * @param[in] lpadc The pointer of the specified LPADC module. 177 * @retval 0 LPADC is not busy. 178 * @retval 1 LPADC is busy. 179 * @details ADSR0[7] (BUSY) is a mirror of ADCR[11] (ADST). 180 * \hideinitializer 181 */ 182 #define LPADC_IS_BUSY(lpadc) ((lpadc)->ADSR0 & LPADC_ADSR0_BUSY_Msk ? 1 : 0) 183 184 /** 185 * @brief Check if the LPADC conversion data is over written or not. 186 * @param[in] lpadc The pointer of the specified LPADC module. 187 * @param[in] u32ChNum LPADC Channel, valid value are from 0 to 26, 28 ~ 31. 188 * @retval 0 LPADC data is not overrun. 189 * @retval 1 LPADC data is overrun. 190 * @details ADSR2[31:0] (OVERRUN) is the mirror of ADDR0~31[16] OVERRUN bits. 191 * \hideinitializer 192 */ 193 #define LPADC_IS_DATA_OVERRUN(lpadc, u32ChNum) (((lpadc)->ADSR2 & (1<<(u32ChNum))) ? 1 : 0) 194 195 /** 196 * @brief Check if the LPADC conversion data is valid or not. 197 * @param[in] lpadc The pointer of the specified LPADC module. 198 * @param[in] u32ChNum LPADC Channel, valid value are from 0 to 26, 28 ~ 31. 199 * @retval 0 LPADC data is not valid. 200 * @retval 1 LPADC data is valid. 201 * @details VALID (ADDR0~31[17]) is set to 1 when corresponding channel analog input conversion is completed and cleared by hardware after ADDR register is read. 202 * \hideinitializer 203 */ 204 #define LPADC_IS_DATA_VALID(lpadc, u32ChNum) ((lpadc)->ADSR1 & (0x1<<(u32ChNum)) ? 1 : 0) 205 206 /** 207 * @brief Power down LPADC module. 208 * @param[in] lpadc The pointer of the specified LPADC module. 209 * @return None 210 * @details Disable A/D converter analog circuit for saving power consumption. 211 * \hideinitializer 212 */ 213 #define LPADC_POWER_DOWN(lpadc) ((lpadc)->ADCR &= ~LPADC_ADCR_ADEN_Msk) 214 215 /** 216 * @brief Power on LPADC module. 217 * @param[in] lpadc The pointer of the specified LPADC module. 218 * @return None 219 * @details Before starting A/D conversion function, ADEN bit (ADCR[0]) should be set to 1. 220 * \hideinitializer 221 */ 222 #define LPADC_POWER_ON(lpadc) ((lpadc)->ADCR |= LPADC_ADCR_ADEN_Msk) 223 224 /** 225 * @brief Configure the comparator 0 and enable it. 226 * @param[in] lpadc The pointer of the specified LPADC module. 227 * @param[in] u32ChNum LPADC Channel, valid value are from 0 to 26, 28 ~ 31. 228 * @param[in] u32Condition Specifies the compare condition. Valid values are: 229 * - \ref LPADC_ADCMPR_CMPCOND_LESS_THAN :The compare condition is "less than the compare value". 230 * - \ref LPADC_ADCMPR_CMPCOND_GREATER_OR_EQUAL :The compare condition is "greater than or equal to the compare value". 231 * @param[in] u32Data Specifies the compare value, valid value are between 0 ~ 0xFFF. 232 * @param[in] u32MatchCount Specifies the match count setting, valid values are between 1~16. 233 * @return None 234 * @details For example, LPADC_ENABLE_CMP0(LPADC, 5, LPADC_ADCMPR_CMPCOND_GREATER_OR_EQUAL, 0x800, 10); 235 * means LPADC will assert comparator 0 flag if channel 5 conversion result is greater than or 236 * equal to 0x800 for 10 times continuously. 237 * \hideinitializer 238 */ 239 #define LPADC_ENABLE_CMP0(lpadc, \ 240 u32ChNum, \ 241 u32Condition, \ 242 u32Data, \ 243 u32MatchCount) ((lpadc)->ADCMPR[0] = ((u32ChNum) << LPADC_ADCMPR_CMPCH_Pos) | \ 244 (u32Condition) | \ 245 ((u32Data) << LPADC_ADCMPR_CMPD_Pos) | \ 246 (((u32MatchCount) - 1) << LPADC_ADCMPR_CMPMCNT_Pos) |\ 247 LPADC_ADCMPR_CMPEN_Msk) 248 249 /** 250 * @brief Disable comparator 0 251 * @param[in] lpadc The pointer of the specified LPADC module 252 * @return None 253 * @details Set CMPEN (ADCMPR0[0]) to 0 and reset comparator 0 configurations to disable LPADC compare function. 254 * \hideinitializer 255 */ 256 #define LPADC_DISABLE_CMP0(lpadc) ((lpadc)->ADCMPR[0] = 0) 257 258 /** 259 * @brief Configure the comparator 1 and enable it. 260 * @param[in] lpadc The pointer of the specified LPADC module. 261 * @param[in] u32ChNum LPADC Channel, valid value are from 0 to 26, 28 ~ 31. 262 * @param[in] u32Condition Specifies the compare condition. Valid values are: 263 * - \ref LPADC_ADCMPR_CMPCOND_LESS_THAN :The compare condition is "less than the compare value". 264 * - \ref LPADC_ADCMPR_CMPCOND_GREATER_OR_EQUAL :The compare condition is "greater than or equal to the compare value". 265 * @param[in] u32Data Specifies the compare value, valid value are between 0 ~ 0xFFF. 266 * @param[in] u32MatchCount Specifies the match count setting, valid values are between 1~16. 267 * @return None 268 * @details For example, LPADC_ENABLE_CMP1(LPADC, 5, LPADC_ADCMPR_CMPCOND_GREATER_OR_EQUAL, 0x800, 10); 269 * means LPADC will assert comparator 1 flag if channel 5 conversion result is greater than or 270 * equal to 0x800 for 10 times continuously. 271 * \hideinitializer 272 */ 273 #define LPADC_ENABLE_CMP1(lpadc, \ 274 u32ChNum, \ 275 u32Condition, \ 276 u32Data, \ 277 u32MatchCount) ((lpadc)->ADCMPR[1] = ((u32ChNum) << LPADC_ADCMPR_CMPCH_Pos) | \ 278 (u32Condition) | \ 279 ((u32Data) << LPADC_ADCMPR_CMPD_Pos) | \ 280 (((u32MatchCount) - 1) << LPADC_ADCMPR_CMPMCNT_Pos) |\ 281 LPADC_ADCMPR_CMPEN_Msk) 282 283 /** 284 * @brief Disable comparator 1. 285 * @param[in] lpadc The pointer of the specified LPADC module. 286 * @return None 287 * @details Set CMPEN (ADCMPR1[0]) to 0 and reset comparator 1 configurations to disable LPADC compare function. 288 * \hideinitializer 289 */ 290 #define LPADC_DISABLE_CMP1(lpadc) ((lpadc)->ADCMPR[1] = 0) 291 292 /** 293 * @brief Enable the compare window mode. 294 * @param[in] lpadc The pointer of the specified LPADC module. 295 * @param[in] u32CMP Specifies the compare register, valid value are 0. 296 * @return None 297 * @details CMPF0 (ADSR0[1]) will be set when both LPADC_CMP0 and LPADC_CMP1 compared condition matched. 298 * \hideinitializer 299 */ 300 #define LPADC_ENABLE_CMP_WINDOW_MODE(lpadc, u32CMP) ((lpadc)->ADCMPR[(u32CMP)] |= LPADC_ADCMPR_CMPWEN_Msk) 301 302 /** 303 * @brief Disable the compare window mode. 304 * @param[in] lpadc The pointer of the specified LPADC module. 305 * @param[in] u32CMP Specifies the compare register, valid value are 0. 306 * @return None 307 * @details Disable the compare window mode for specified LPADC module. 308 * \hideinitializer 309 */ 310 #define LPADC_DISABLE_CMP_WINDOW_MODE(lpadc, u32CMP) ((lpadc)->ADCMPR[(u32CMP)] &= ~LPADC_ADCMPR_CMPWEN_Msk) 311 312 /** 313 * @brief Set LPADC input channel. 314 * @param[in] lpadc The pointer of the specified LPADC module. 315 * @param[in] u32Mask Channel enable bit. Each bit corresponds to a input channel. Bit 0 is channel 0, bit 1 is channel 1..., bit 15 is channel 15. 316 * @return None 317 * @details Enabled channel will be converted while LPADC starts. 318 * @note In single mode, LPADC can only convert 1 channel. If more than 1 channel are enabled, only the channel with smallest number will be converted. 319 * \hideinitializer 320 */ 321 #define LPADC_SET_INPUT_CHANNEL(lpadc, u32Mask) ((lpadc)->ADCHER = ((lpadc)->ADCHER & ~LPADC_ADCHER_CHEN_Msk) | (u32Mask)) 322 323 /** 324 * @brief Set the output format mode. 325 * @param[in] lpadc The pointer of the specified LPADC module. 326 * @param[in] u32Format Decides the output format. Valid values are: 327 * - \ref LPADC_ADCR_DMOF_UNSIGNED_OUTPUT : Select the straight binary format as the output format of the conversion result. 328 * - \ref LPADC_ADCR_DMOF_TWOS_COMPLEMENT : Select the 2's complement format as the output format of the conversion result. 329 * @return None 330 * @details The macro is used to set the output format of LPADC differential input mode. 331 * @note LPADC compare function can not support 2's complement output format, u32Format should be set to LPADC_ADCR_DMOF_UNSIGNED_OUTPUT. 332 * \hideinitializer 333 */ 334 #define LPADC_SET_DMOF(lpadc, u32Format) ((lpadc)->ADCR = ((lpadc)->ADCR & ~LPADC_ADCR_DMOF_Msk) | (u32Format)) 335 336 /** 337 * @brief Start the A/D conversion. 338 * @param[in] lpadc The pointer of the specified LPADC module. 339 * @return None 340 * @details Set ADST bit to 1 to start the A/D conversion. 341 * \hideinitializer 342 */ 343 #define LPADC_START_CONV(lpadc) ((lpadc)->ADCR |= LPADC_ADCR_ADST_Msk) 344 345 /** 346 * @brief Stop the A/D conversion. 347 * @param[in] lpadc The pointer of the specified LPADC module. 348 * @return None 349 * @details ADST (ADCR[11]) will be cleared to 0 by hardware automatically at the ends of single mode and single-cycle scan mode. 350 * In continuous scan mode and burst mode, A/D conversion is continuously performed until software writes 0 to this bit. 351 * @note When the ADST bit is cleared to 0, the ADST bit must be kept at 0 at least one LPADC peripheral clock period 352 * before setting it to 1 again, otherwise the A/D converter may not work. 353 * If ADST bit is cleared to 0 when LPADC is in converting, the BUSY bit will be cleared to 0 immediately, 354 * LPADC will terminate the current conversion and enter idle state directly. 355 * \hideinitializer 356 */ 357 #define LPADC_STOP_CONV(lpadc) ((lpadc)->ADCR &= ~LPADC_ADCR_ADST_Msk) 358 359 /** 360 * @brief Enable LPPDMA transfer. 361 * @param[in] lpadc The pointer of the specified LPADC module 362 * @return None 363 * @details Enable LPPDMA to transfer the conversion data. 364 * @note While enable PDMA transfer, software must set ADIE = 0 to disable interrupt. 365 * \hideinitializer 366 */ 367 #define LPADC_ENABLE_LPPDMA(lpadc) ((lpadc)->ADCR |= LPADC_ADCR_PTEN_Msk) 368 369 /** 370 * @brief Disable LPPDMA transfer. 371 * @param[in] lpadc The pointer of the specified LPADC module 372 * @return None 373 * @details Disable LPPDMA to transfer the conversion data. 374 * \hideinitializer 375 */ 376 #define LPADC_DISABLE_LPPDMA(lpadc) ((lpadc)->ADCR &= ~LPADC_ADCR_PTEN_Msk) 377 378 /** 379 * @brief Get PDMA current transfer data 380 * @param[in] lpadc The pointer of the specified LPADC module. 381 * @return PDMA current transfer data 382 * \hideinitializer 383 */ 384 #define LPADC_GET_LPPDMA_DATA(lpadc) ((lpadc)->ADPDMA & LPADC_ADPDMA_CURDAT_Msk) 385 386 /** 387 * @brief Enable the interrupt(s) selected by u32Mask parameter. 388 * @param[in] lpadc The pointer of the specified LPADC module 389 * @param[in] u32Mask The combination of interrupt status bits listed below. Each bit 390 * corresponds to a interrupt status. This parameter decides which 391 * interrupts will be enabled. 392 * - \ref LPADC_ADF_INT :LPADC convert complete interrupt 393 * - \ref LPADC_CMP0_INT :LPADC comparator 0 interrupt 394 * - \ref LPADC_CMP1_INT :LPADC comparator 1 interrupt 395 * @return None 396 * \hideinitializer 397 */ 398 #define LPADC_ENABLE_INT LPADC_EnableInt 399 400 /** 401 * @brief Disable the interrupt(s) selected by u32Mask parameter. 402 * @param[in] lpadc The pointer of the specified LPADC module 403 * @param[in] u32Mask The combination of interrupt status bits listed below. Each bit 404 * corresponds to a interrupt status. This parameter decides which 405 * interrupts will be disabled. 406 * - \ref LPADC_ADF_INT :LPADC convert complete interrupt 407 * - \ref LPADC_CMP0_INT :LPADC comparator 0 interrupt 408 * - \ref LPADC_CMP1_INT :LPADC comparator 1 interrupt 409 * @return None 410 * \hideinitializer 411 */ 412 #define LPADC_DISABLE_INT LPADC_DisableInt 413 414 /** 415 * @brief Enable specified LPADC Automatic Operation function 416 * @param[in] lpadc The pointer of the specified LPADC module 417 * @return None 418 * @details This macro enable specified LPADC Automatic Operation function. 419 */ 420 #define LPADC_AUTO_OP_ENABLE(lpadc) ((lpadc)->AUTOCTL |= LPADC_AUTOCTL_AUTOEN_Msk) 421 422 /** 423 * @brief Disable specified LPADC Automatic Operation function 424 * @param[in] lpadc The pointer of the specified LPADC module 425 * @return None 426 * @details This macro disable specified LPADC Automatic Operation function. 427 */ 428 #define LPADC_AUTO_OP_DISABLE(lpadc) ((lpadc)->AUTOCTL &= ~LPADC_AUTOCTL_AUTOEN_Msk) 429 430 /** 431 * @brief Enable specified LPADC Automatic Operation Software Trigger function 432 * @param[in] lpadc The pointer of the specified LPADC module 433 * @return None 434 * @details This macro enable specified LPADC Automatic Operation Software Trigger function. 435 */ 436 #define LPADC_AUTO_OP_SW_TRIGGER_ENABLE(lpadc) ((lpadc)->AUTOSTRG |= LPADC_AUTOSTRG_SWTRIG_Msk) 437 438 /** 439 * @brief Enable specified LPADC Automatic Operation Mode Conversion End Wake-up function 440 * @param[in] lpadc The pointer of the specified LPADC module 441 * @return None 442 */ 443 #define LPADC_CONVERSION_END_WAKEUP_ENABLE(lpadc) ((lpadc)->AUTOCTL |= LPADC_AUTOCTL_ADWKEN_Msk) 444 445 /** 446 * @brief Disable specified LPADC Automatic Operation Mode Conversion End Wake-up function 447 * @param[in] lpadc The pointer of the specified LPADC module 448 * @return None 449 */ 450 #define LPADC_CONVERSION_END_WAKEUP_DISABLE(lpadc) ((lpadc)->AUTOCTL &= ~LPADC_AUTOCTL_ADWKEN_Msk) 451 452 /** 453 * @brief Enable specified LPADC Automatic Operation Mode Comparator 0 Wake-up function 454 * @param[in] lpadc The pointer of the specified LPADC module 455 * @return None 456 */ 457 #define LPADC_COMPARATOR_0_MATCH_WAKEUP_ENABLE(lpadc) ((lpadc)->AUTOCTL |= LPADC_AUTOCTL_CMP0WKEN_Msk) 458 459 /** 460 * @brief Disable specified LPADC Automatic Operation Mode Comparator 0 Wake-up function 461 * @param[in] lpadc The pointer of the specified LPADC module 462 * @return None 463 */ 464 #define LPADC_COMPARATOR_0_MATCH_WAKEUP_DISABLE(lpadc) ((lpadc)->AUTOCTL &= ~LPADC_AUTOCTL_CMP0WKEN_Msk) 465 466 /** 467 * @brief Enable specified LPADC Automatic Operation Mode Comparator 1 Wake-up function 468 * @param[in] lpadc The pointer of the specified LPADC module 469 * @return None 470 */ 471 #define LPADC_COMPARATOR_1_MATCH_WAKEUP_ENABLE(lpadc) ((lpadc)->AUTOCTL |= LPADC_AUTOCTL_CMP1WKEN_Msk) 472 473 /** 474 * @brief Disable specified LPADC Automatic Operation Mode Comparator 1 Wake-up function 475 * @param[in] lpadc The pointer of the specified LPADC module 476 * @return None 477 */ 478 #define LPADC_COMPARATOR_1_MATCH_WAKEUP_DISABLE(lpadc) ((lpadc)->AUTOCTL &= ~LPADC_AUTOCTL_CMP1WKEN_Msk) 479 480 /** 481 * @brief Automatic Operation Conversion End Wake-up Status register value 482 * @param[in] lpadc The pointer of the specified LPADC module 483 * @retval 0 There is no wakeup for Conversion End. 484 * @retval 1 Chip wake-up from power-down state by Conversion End Wake-up 485 * @details This macro get Conversion End Wake-up Status register value. 486 */ 487 #define LPADC_GET_CONVERSION_END_WAKEUP_FLAG(lpadc) (((lpadc)->AUTOSTS & LPADC_AUTOSTS_ADWKF_Msk) >> LPADC_AUTOSTS_ADWKF_Pos) 488 489 /** 490 * @brief Clear Conversion End Wake-up Flag 491 * @param[in] lpadc The pointer of the specified LPADC module 492 * @return None 493 * @details This macro clear Conversion End Wake-up flag. 494 */ 495 #define LPADC_CLEAR_CONVERSION_END_WAKEUP_FLAG(lpadc) ((lpadc)->AUTOSTS = LPADC_AUTOSTS_ADWKF_Msk) 496 497 /** 498 * @brief Automatic Operation Compare 0 Wake-up Status register value 499 * @param[in] lpadc The pointer of the specified LPADC module 500 * @retval 0 There is no wakeup for Compare 0 matching. 501 * @retval 1 Chip wake-up from power-down state by Compare 0 Wake-up 502 * @details This macro get Compare 0 Wake-up Status register value. 503 */ 504 #define LPADC_GET_Compare_0_WAKEUP_FLAG(lpadc) (((lpadc)->AUTOSTS & LPADC_AUTOSTS_CMP0WKF_Msk) >> LPADC_AUTOSTS_CMP0WKF_Pos) 505 506 /** 507 * @brief Clear Compare 0 Wake-up Flag 508 * @param[in] lpadc The pointer of the specified LPADC module 509 * @return None 510 * @details This macro clear Compare 0 Wake-up flag. 511 */ 512 #define LPADC_CLEAR_Compare_0_WAKEUP_FLAG(lpadc) ((lpadc)->AUTOSTS = LPADC_AUTOSTS_CMP0WKF_Msk) 513 514 /** 515 * @brief Automatic Operation Compare 1 Wake-up Status register value 516 * @param[in] lpadc The pointer of the specified LPADC module 517 * @retval 0 There is no wakeup for Compare 1 matching. 518 * @retval 1 Chip wake-up from power-down state by Compare 1 Wake-up 519 * @details This macro get Compare 1 Wake-up Status register value. 520 */ 521 #define LPADC_GET_Compare_1_WAKEUP_FLAG(lpadc) (((lpadc)->AUTOSTS & LPADC_AUTOSTS_CMP1WKF_Msk) >> LPADC_AUTOSTS_CMP1WKF_Pos) 522 523 /** 524 * @brief Clear Compare 1 Wake-up Flag 525 * @param[in] lpadc The pointer of the specified LPADC module 526 * @return None 527 * @details This macro clear Compare 1 Wake-up flag. 528 */ 529 #define LPADC_CLEAR_Compare_1_WAKEUP_FLAG(lpadc) ((lpadc)->AUTOSTS = LPADC_AUTOSTS_CMP1WKF_Msk) 530 531 532 void LPADC_Open(LPADC_T *lpadc, 533 uint32_t u32InputMode, 534 uint32_t u32OpMode, 535 uint32_t u32ChMask); 536 void LPADC_Close(LPADC_T *lpadc); 537 void LPADC_EnableHWTrigger(LPADC_T *lpadc, 538 uint32_t u32Source, 539 uint32_t u32Param); 540 void LPADC_DisableHWTrigger(LPADC_T *lpadc); 541 void LPADC_EnableInt(LPADC_T *lpadc, uint32_t u32Mask); 542 void LPADC_DisableInt(LPADC_T *lpadc, uint32_t u32Mask); 543 void LPADC_SetExtendSampleTime(LPADC_T *lpadc, 544 uint32_t u32ModuleNum, 545 uint32_t u32ExtendSampleTime); 546 void LPADC_SelectAutoOperationMode(LPADC_T *lpadc, uint32_t u32TrigSel); 547 548 /*@}*/ /* end of group LPADC_EXPORTED_FUNCTIONS */ 549 550 /*@}*/ /* end of group LPADC_Driver */ 551 552 /*@}*/ /* end of group Standard_Driver */ 553 554 #ifdef __cplusplus 555 } 556 #endif 557 558 #endif //__LPADC_H__ 559 560 /*** (C) COPYRIGHT 2023 Nuvoton Technology Corp. ***/ 561
