1 /*
2  * Peripheral I/O description for PIC32CX1025SG41128
3  *
4  * Copyright (c) 2024 Microchip Technology Inc. and its subsidiaries.
5  *
6  * Licensed under the Apache License, Version 2.0 (the "License");
7  * you may not use this file except in compliance with the License.
8  * You may obtain a copy of the License at
9  *
10  *   http://www.apache.org/licenses/LICENSE-2.0
11  *
12  * Unless required by applicable law or agreed to in writing, software
13  * distributed under the License is distributed on an "AS IS" BASIS,
14  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15  * See the License for the specific language governing permissions and
16  * limitations under the License.
17  *
18  */
19 
20 /*  file generated from device description file (ATDF) version 2023-03-17T09:48:34Z  */
21 #ifndef _PIC32CX1025SG41128_GPIO_H_
22 #define _PIC32CX1025SG41128_GPIO_H_
23 
24 /* ======================= Peripheral I/O pin numbers ======================= */
25 #define PIN_PA00                    (    0)  /* Pin Number for PA00 */
26 #define PIN_PA01                    (    1)  /* Pin Number for PA01 */
27 #define PIN_PA02                    (    2)  /* Pin Number for PA02 */
28 #define PIN_PA03                    (    3)  /* Pin Number for PA03 */
29 #define PIN_PA04                    (    4)  /* Pin Number for PA04 */
30 #define PIN_PA05                    (    5)  /* Pin Number for PA05 */
31 #define PIN_PA06                    (    6)  /* Pin Number for PA06 */
32 #define PIN_PA07                    (    7)  /* Pin Number for PA07 */
33 #define PIN_PA08                    (    8)  /* Pin Number for PA08 */
34 #define PIN_PA09                    (    9)  /* Pin Number for PA09 */
35 #define PIN_PA10                    (   10)  /* Pin Number for PA10 */
36 #define PIN_PA11                    (   11)  /* Pin Number for PA11 */
37 #define PIN_PA12                    (   12)  /* Pin Number for PA12 */
38 #define PIN_PA13                    (   13)  /* Pin Number for PA13 */
39 #define PIN_PA14                    (   14)  /* Pin Number for PA14 */
40 #define PIN_PA15                    (   15)  /* Pin Number for PA15 */
41 #define PIN_PA16                    (   16)  /* Pin Number for PA16 */
42 #define PIN_PA17                    (   17)  /* Pin Number for PA17 */
43 #define PIN_PA18                    (   18)  /* Pin Number for PA18 */
44 #define PIN_PA19                    (   19)  /* Pin Number for PA19 */
45 #define PIN_PA20                    (   20)  /* Pin Number for PA20 */
46 #define PIN_PA21                    (   21)  /* Pin Number for PA21 */
47 #define PIN_PA22                    (   22)  /* Pin Number for PA22 */
48 #define PIN_PA23                    (   23)  /* Pin Number for PA23 */
49 #define PIN_PA24                    (   24)  /* Pin Number for PA24 */
50 #define PIN_PA25                    (   25)  /* Pin Number for PA25 */
51 #define PIN_PA27                    (   27)  /* Pin Number for PA27 */
52 #define PIN_PA30                    (   30)  /* Pin Number for PA30 */
53 #define PIN_PA31                    (   31)  /* Pin Number for PA31 */
54 #define PIN_PB00                    (   32)  /* Pin Number for PB00 */
55 #define PIN_PB01                    (   33)  /* Pin Number for PB01 */
56 #define PIN_PB02                    (   34)  /* Pin Number for PB02 */
57 #define PIN_PB03                    (   35)  /* Pin Number for PB03 */
58 #define PIN_PB04                    (   36)  /* Pin Number for PB04 */
59 #define PIN_PB05                    (   37)  /* Pin Number for PB05 */
60 #define PIN_PB06                    (   38)  /* Pin Number for PB06 */
61 #define PIN_PB07                    (   39)  /* Pin Number for PB07 */
62 #define PIN_PB08                    (   40)  /* Pin Number for PB08 */
63 #define PIN_PB09                    (   41)  /* Pin Number for PB09 */
64 #define PIN_PB10                    (   42)  /* Pin Number for PB10 */
65 #define PIN_PB11                    (   43)  /* Pin Number for PB11 */
66 #define PIN_PB12                    (   44)  /* Pin Number for PB12 */
67 #define PIN_PB13                    (   45)  /* Pin Number for PB13 */
68 #define PIN_PB14                    (   46)  /* Pin Number for PB14 */
69 #define PIN_PB15                    (   47)  /* Pin Number for PB15 */
70 #define PIN_PB16                    (   48)  /* Pin Number for PB16 */
71 #define PIN_PB17                    (   49)  /* Pin Number for PB17 */
72 #define PIN_PB18                    (   50)  /* Pin Number for PB18 */
73 #define PIN_PB19                    (   51)  /* Pin Number for PB19 */
74 #define PIN_PB20                    (   52)  /* Pin Number for PB20 */
75 #define PIN_PB21                    (   53)  /* Pin Number for PB21 */
76 #define PIN_PB22                    (   54)  /* Pin Number for PB22 */
77 #define PIN_PB23                    (   55)  /* Pin Number for PB23 */
78 #define PIN_PB24                    (   56)  /* Pin Number for PB24 */
79 #define PIN_PB25                    (   57)  /* Pin Number for PB25 */
80 #define PIN_PB26                    (   58)  /* Pin Number for PB26 */
81 #define PIN_PB27                    (   59)  /* Pin Number for PB27 */
82 #define PIN_PB28                    (   60)  /* Pin Number for PB28 */
83 #define PIN_PB29                    (   61)  /* Pin Number for PB29 */
84 #define PIN_PB30                    (   62)  /* Pin Number for PB30 */
85 #define PIN_PB31                    (   63)  /* Pin Number for PB31 */
86 #define PIN_PC00                    (   64)  /* Pin Number for PC00 */
87 #define PIN_PC01                    (   65)  /* Pin Number for PC01 */
88 #define PIN_PC02                    (   66)  /* Pin Number for PC02 */
89 #define PIN_PC03                    (   67)  /* Pin Number for PC03 */
90 #define PIN_PC04                    (   68)  /* Pin Number for PC04 */
91 #define PIN_PC05                    (   69)  /* Pin Number for PC05 */
92 #define PIN_PC06                    (   70)  /* Pin Number for PC06 */
93 #define PIN_PC07                    (   71)  /* Pin Number for PC07 */
94 #define PIN_PC10                    (   74)  /* Pin Number for PC10 */
95 #define PIN_PC11                    (   75)  /* Pin Number for PC11 */
96 #define PIN_PC12                    (   76)  /* Pin Number for PC12 */
97 #define PIN_PC13                    (   77)  /* Pin Number for PC13 */
98 #define PIN_PC14                    (   78)  /* Pin Number for PC14 */
99 #define PIN_PC15                    (   79)  /* Pin Number for PC15 */
100 #define PIN_PC16                    (   80)  /* Pin Number for PC16 */
101 #define PIN_PC17                    (   81)  /* Pin Number for PC17 */
102 #define PIN_PC18                    (   82)  /* Pin Number for PC18 */
103 #define PIN_PC19                    (   83)  /* Pin Number for PC19 */
104 #define PIN_PC20                    (   84)  /* Pin Number for PC20 */
105 #define PIN_PC21                    (   85)  /* Pin Number for PC21 */
106 #define PIN_PC22                    (   86)  /* Pin Number for PC22 */
107 #define PIN_PC23                    (   87)  /* Pin Number for PC23 */
108 #define PIN_PC24                    (   88)  /* Pin Number for PC24 */
109 #define PIN_PC25                    (   89)  /* Pin Number for PC25 */
110 #define PIN_PC26                    (   90)  /* Pin Number for PC26 */
111 #define PIN_PC27                    (   91)  /* Pin Number for PC27 */
112 #define PIN_PC28                    (   92)  /* Pin Number for PC28 */
113 #define PIN_PC30                    (   94)  /* Pin Number for PC30 */
114 #define PIN_PC31                    (   95)  /* Pin Number for PC31 */
115 #define PIN_PD00                    (   96)  /* Pin Number for PD00 */
116 #define PIN_PD01                    (   97)  /* Pin Number for PD01 */
117 #define PIN_PD08                    (  104)  /* Pin Number for PD08 */
118 #define PIN_PD09                    (  105)  /* Pin Number for PD09 */
119 #define PIN_PD10                    (  106)  /* Pin Number for PD10 */
120 #define PIN_PD11                    (  107)  /* Pin Number for PD11 */
121 #define PIN_PD12                    (  108)  /* Pin Number for PD12 */
122 #define PIN_PD20                    (  116)  /* Pin Number for PD20 */
123 #define PIN_PD21                    (  117)  /* Pin Number for PD21 */
124 
125 /* ========================== Peripheral I/O masks ========================== */
126 #define PORT_PA00                   (_UINT32_(1) << 0) /* PORT mask for PA00 */
127 #define PORT_PA01                   (_UINT32_(1) << 1) /* PORT mask for PA01 */
128 #define PORT_PA02                   (_UINT32_(1) << 2) /* PORT mask for PA02 */
129 #define PORT_PA03                   (_UINT32_(1) << 3) /* PORT mask for PA03 */
130 #define PORT_PA04                   (_UINT32_(1) << 4) /* PORT mask for PA04 */
131 #define PORT_PA05                   (_UINT32_(1) << 5) /* PORT mask for PA05 */
132 #define PORT_PA06                   (_UINT32_(1) << 6) /* PORT mask for PA06 */
133 #define PORT_PA07                   (_UINT32_(1) << 7) /* PORT mask for PA07 */
134 #define PORT_PA08                   (_UINT32_(1) << 8) /* PORT mask for PA08 */
135 #define PORT_PA09                   (_UINT32_(1) << 9) /* PORT mask for PA09 */
136 #define PORT_PA10                   (_UINT32_(1) << 10) /* PORT mask for PA10 */
137 #define PORT_PA11                   (_UINT32_(1) << 11) /* PORT mask for PA11 */
138 #define PORT_PA12                   (_UINT32_(1) << 12) /* PORT mask for PA12 */
139 #define PORT_PA13                   (_UINT32_(1) << 13) /* PORT mask for PA13 */
140 #define PORT_PA14                   (_UINT32_(1) << 14) /* PORT mask for PA14 */
141 #define PORT_PA15                   (_UINT32_(1) << 15) /* PORT mask for PA15 */
142 #define PORT_PA16                   (_UINT32_(1) << 16) /* PORT mask for PA16 */
143 #define PORT_PA17                   (_UINT32_(1) << 17) /* PORT mask for PA17 */
144 #define PORT_PA18                   (_UINT32_(1) << 18) /* PORT mask for PA18 */
145 #define PORT_PA19                   (_UINT32_(1) << 19) /* PORT mask for PA19 */
146 #define PORT_PA20                   (_UINT32_(1) << 20) /* PORT mask for PA20 */
147 #define PORT_PA21                   (_UINT32_(1) << 21) /* PORT mask for PA21 */
148 #define PORT_PA22                   (_UINT32_(1) << 22) /* PORT mask for PA22 */
149 #define PORT_PA23                   (_UINT32_(1) << 23) /* PORT mask for PA23 */
150 #define PORT_PA24                   (_UINT32_(1) << 24) /* PORT mask for PA24 */
151 #define PORT_PA25                   (_UINT32_(1) << 25) /* PORT mask for PA25 */
152 #define PORT_PA27                   (_UINT32_(1) << 27) /* PORT mask for PA27 */
153 #define PORT_PA30                   (_UINT32_(1) << 30) /* PORT mask for PA30 */
154 #define PORT_PA31                   (_UINT32_(1) << 31) /* PORT mask for PA31 */
155 #define PORT_PB00                   (_UINT32_(1) << 0) /* PORT mask for PB00 */
156 #define PORT_PB01                   (_UINT32_(1) << 1) /* PORT mask for PB01 */
157 #define PORT_PB02                   (_UINT32_(1) << 2) /* PORT mask for PB02 */
158 #define PORT_PB03                   (_UINT32_(1) << 3) /* PORT mask for PB03 */
159 #define PORT_PB04                   (_UINT32_(1) << 4) /* PORT mask for PB04 */
160 #define PORT_PB05                   (_UINT32_(1) << 5) /* PORT mask for PB05 */
161 #define PORT_PB06                   (_UINT32_(1) << 6) /* PORT mask for PB06 */
162 #define PORT_PB07                   (_UINT32_(1) << 7) /* PORT mask for PB07 */
163 #define PORT_PB08                   (_UINT32_(1) << 8) /* PORT mask for PB08 */
164 #define PORT_PB09                   (_UINT32_(1) << 9) /* PORT mask for PB09 */
165 #define PORT_PB10                   (_UINT32_(1) << 10) /* PORT mask for PB10 */
166 #define PORT_PB11                   (_UINT32_(1) << 11) /* PORT mask for PB11 */
167 #define PORT_PB12                   (_UINT32_(1) << 12) /* PORT mask for PB12 */
168 #define PORT_PB13                   (_UINT32_(1) << 13) /* PORT mask for PB13 */
169 #define PORT_PB14                   (_UINT32_(1) << 14) /* PORT mask for PB14 */
170 #define PORT_PB15                   (_UINT32_(1) << 15) /* PORT mask for PB15 */
171 #define PORT_PB16                   (_UINT32_(1) << 16) /* PORT mask for PB16 */
172 #define PORT_PB17                   (_UINT32_(1) << 17) /* PORT mask for PB17 */
173 #define PORT_PB18                   (_UINT32_(1) << 18) /* PORT mask for PB18 */
174 #define PORT_PB19                   (_UINT32_(1) << 19) /* PORT mask for PB19 */
175 #define PORT_PB20                   (_UINT32_(1) << 20) /* PORT mask for PB20 */
176 #define PORT_PB21                   (_UINT32_(1) << 21) /* PORT mask for PB21 */
177 #define PORT_PB22                   (_UINT32_(1) << 22) /* PORT mask for PB22 */
178 #define PORT_PB23                   (_UINT32_(1) << 23) /* PORT mask for PB23 */
179 #define PORT_PB24                   (_UINT32_(1) << 24) /* PORT mask for PB24 */
180 #define PORT_PB25                   (_UINT32_(1) << 25) /* PORT mask for PB25 */
181 #define PORT_PB26                   (_UINT32_(1) << 26) /* PORT mask for PB26 */
182 #define PORT_PB27                   (_UINT32_(1) << 27) /* PORT mask for PB27 */
183 #define PORT_PB28                   (_UINT32_(1) << 28) /* PORT mask for PB28 */
184 #define PORT_PB29                   (_UINT32_(1) << 29) /* PORT mask for PB29 */
185 #define PORT_PB30                   (_UINT32_(1) << 30) /* PORT mask for PB30 */
186 #define PORT_PB31                   (_UINT32_(1) << 31) /* PORT mask for PB31 */
187 #define PORT_PC00                   (_UINT32_(1) << 0) /* PORT mask for PC00 */
188 #define PORT_PC01                   (_UINT32_(1) << 1) /* PORT mask for PC01 */
189 #define PORT_PC02                   (_UINT32_(1) << 2) /* PORT mask for PC02 */
190 #define PORT_PC03                   (_UINT32_(1) << 3) /* PORT mask for PC03 */
191 #define PORT_PC04                   (_UINT32_(1) << 4) /* PORT mask for PC04 */
192 #define PORT_PC05                   (_UINT32_(1) << 5) /* PORT mask for PC05 */
193 #define PORT_PC06                   (_UINT32_(1) << 6) /* PORT mask for PC06 */
194 #define PORT_PC07                   (_UINT32_(1) << 7) /* PORT mask for PC07 */
195 #define PORT_PC10                   (_UINT32_(1) << 10) /* PORT mask for PC10 */
196 #define PORT_PC11                   (_UINT32_(1) << 11) /* PORT mask for PC11 */
197 #define PORT_PC12                   (_UINT32_(1) << 12) /* PORT mask for PC12 */
198 #define PORT_PC13                   (_UINT32_(1) << 13) /* PORT mask for PC13 */
199 #define PORT_PC14                   (_UINT32_(1) << 14) /* PORT mask for PC14 */
200 #define PORT_PC15                   (_UINT32_(1) << 15) /* PORT mask for PC15 */
201 #define PORT_PC16                   (_UINT32_(1) << 16) /* PORT mask for PC16 */
202 #define PORT_PC17                   (_UINT32_(1) << 17) /* PORT mask for PC17 */
203 #define PORT_PC18                   (_UINT32_(1) << 18) /* PORT mask for PC18 */
204 #define PORT_PC19                   (_UINT32_(1) << 19) /* PORT mask for PC19 */
205 #define PORT_PC20                   (_UINT32_(1) << 20) /* PORT mask for PC20 */
206 #define PORT_PC21                   (_UINT32_(1) << 21) /* PORT mask for PC21 */
207 #define PORT_PC22                   (_UINT32_(1) << 22) /* PORT mask for PC22 */
208 #define PORT_PC23                   (_UINT32_(1) << 23) /* PORT mask for PC23 */
209 #define PORT_PC24                   (_UINT32_(1) << 24) /* PORT mask for PC24 */
210 #define PORT_PC25                   (_UINT32_(1) << 25) /* PORT mask for PC25 */
211 #define PORT_PC26                   (_UINT32_(1) << 26) /* PORT mask for PC26 */
212 #define PORT_PC27                   (_UINT32_(1) << 27) /* PORT mask for PC27 */
213 #define PORT_PC28                   (_UINT32_(1) << 28) /* PORT mask for PC28 */
214 #define PORT_PC30                   (_UINT32_(1) << 30) /* PORT mask for PC30 */
215 #define PORT_PC31                   (_UINT32_(1) << 31) /* PORT mask for PC31 */
216 #define PORT_PD00                   (_UINT32_(1) << 0) /* PORT mask for PD00 */
217 #define PORT_PD01                   (_UINT32_(1) << 1) /* PORT mask for PD01 */
218 #define PORT_PD08                   (_UINT32_(1) << 8) /* PORT mask for PD08 */
219 #define PORT_PD09                   (_UINT32_(1) << 9) /* PORT mask for PD09 */
220 #define PORT_PD10                   (_UINT32_(1) << 10) /* PORT mask for PD10 */
221 #define PORT_PD11                   (_UINT32_(1) << 11) /* PORT mask for PD11 */
222 #define PORT_PD12                   (_UINT32_(1) << 12) /* PORT mask for PD12 */
223 #define PORT_PD20                   (_UINT32_(1) << 20) /* PORT mask for PD20 */
224 #define PORT_PD21                   (_UINT32_(1) << 21) /* PORT mask for PD21 */
225 
226 /* =================== PORT definition for AC peripheral ==================== */
227 #define PIN_PA04B_AC_AIN0                          _UINT32_(4)
228 #define MUX_PA04B_AC_AIN0                          _UINT32_(1)
229 #define PINMUX_PA04B_AC_AIN0                       ((PIN_PA04B_AC_AIN0 << 16) | MUX_PA04B_AC_AIN0)
230 #define PORT_PA04B_AC_AIN0                         (_UINT32_(1) << 4)
231 
232 #define PIN_PA05B_AC_AIN1                          _UINT32_(5)
233 #define MUX_PA05B_AC_AIN1                          _UINT32_(1)
234 #define PINMUX_PA05B_AC_AIN1                       ((PIN_PA05B_AC_AIN1 << 16) | MUX_PA05B_AC_AIN1)
235 #define PORT_PA05B_AC_AIN1                         (_UINT32_(1) << 5)
236 
237 #define PIN_PA06B_AC_AIN2                          _UINT32_(6)
238 #define MUX_PA06B_AC_AIN2                          _UINT32_(1)
239 #define PINMUX_PA06B_AC_AIN2                       ((PIN_PA06B_AC_AIN2 << 16) | MUX_PA06B_AC_AIN2)
240 #define PORT_PA06B_AC_AIN2                         (_UINT32_(1) << 6)
241 
242 #define PIN_PA07B_AC_AIN3                          _UINT32_(7)
243 #define MUX_PA07B_AC_AIN3                          _UINT32_(1)
244 #define PINMUX_PA07B_AC_AIN3                       ((PIN_PA07B_AC_AIN3 << 16) | MUX_PA07B_AC_AIN3)
245 #define PORT_PA07B_AC_AIN3                         (_UINT32_(1) << 7)
246 
247 #define PIN_PA12M_AC_CMP0                          _UINT32_(12)
248 #define MUX_PA12M_AC_CMP0                          _UINT32_(12)
249 #define PINMUX_PA12M_AC_CMP0                       ((PIN_PA12M_AC_CMP0 << 16) | MUX_PA12M_AC_CMP0)
250 #define PORT_PA12M_AC_CMP0                         (_UINT32_(1) << 12)
251 
252 #define PIN_PA18M_AC_CMP0                          _UINT32_(18)
253 #define MUX_PA18M_AC_CMP0                          _UINT32_(12)
254 #define PINMUX_PA18M_AC_CMP0                       ((PIN_PA18M_AC_CMP0 << 16) | MUX_PA18M_AC_CMP0)
255 #define PORT_PA18M_AC_CMP0                         (_UINT32_(1) << 18)
256 
257 #define PIN_PB24M_AC_CMP0                          _UINT32_(56)
258 #define MUX_PB24M_AC_CMP0                          _UINT32_(12)
259 #define PINMUX_PB24M_AC_CMP0                       ((PIN_PB24M_AC_CMP0 << 16) | MUX_PB24M_AC_CMP0)
260 #define PORT_PB24M_AC_CMP0                         (_UINT32_(1) << 24)
261 
262 #define PIN_PA13M_AC_CMP1                          _UINT32_(13)
263 #define MUX_PA13M_AC_CMP1                          _UINT32_(12)
264 #define PINMUX_PA13M_AC_CMP1                       ((PIN_PA13M_AC_CMP1 << 16) | MUX_PA13M_AC_CMP1)
265 #define PORT_PA13M_AC_CMP1                         (_UINT32_(1) << 13)
266 
267 #define PIN_PA19M_AC_CMP1                          _UINT32_(19)
268 #define MUX_PA19M_AC_CMP1                          _UINT32_(12)
269 #define PINMUX_PA19M_AC_CMP1                       ((PIN_PA19M_AC_CMP1 << 16) | MUX_PA19M_AC_CMP1)
270 #define PORT_PA19M_AC_CMP1                         (_UINT32_(1) << 19)
271 
272 #define PIN_PB25M_AC_CMP1                          _UINT32_(57)
273 #define MUX_PB25M_AC_CMP1                          _UINT32_(12)
274 #define PINMUX_PB25M_AC_CMP1                       ((PIN_PB25M_AC_CMP1 << 16) | MUX_PB25M_AC_CMP1)
275 #define PORT_PB25M_AC_CMP1                         (_UINT32_(1) << 25)
276 
277 /* ================== PORT definition for ADC0 peripheral =================== */
278 #define PIN_PA02B_ADC0_AIN0                        _UINT32_(2)
279 #define MUX_PA02B_ADC0_AIN0                        _UINT32_(1)
280 #define PINMUX_PA02B_ADC0_AIN0                     ((PIN_PA02B_ADC0_AIN0 << 16) | MUX_PA02B_ADC0_AIN0)
281 #define PORT_PA02B_ADC0_AIN0                       (_UINT32_(1) << 2)
282 
283 #define PIN_PA03B_ADC0_AIN1                        _UINT32_(3)
284 #define MUX_PA03B_ADC0_AIN1                        _UINT32_(1)
285 #define PINMUX_PA03B_ADC0_AIN1                     ((PIN_PA03B_ADC0_AIN1 << 16) | MUX_PA03B_ADC0_AIN1)
286 #define PORT_PA03B_ADC0_AIN1                       (_UINT32_(1) << 3)
287 
288 #define PIN_PB08B_ADC0_AIN2                        _UINT32_(40)
289 #define MUX_PB08B_ADC0_AIN2                        _UINT32_(1)
290 #define PINMUX_PB08B_ADC0_AIN2                     ((PIN_PB08B_ADC0_AIN2 << 16) | MUX_PB08B_ADC0_AIN2)
291 #define PORT_PB08B_ADC0_AIN2                       (_UINT32_(1) << 8)
292 
293 #define PIN_PB09B_ADC0_AIN3                        _UINT32_(41)
294 #define MUX_PB09B_ADC0_AIN3                        _UINT32_(1)
295 #define PINMUX_PB09B_ADC0_AIN3                     ((PIN_PB09B_ADC0_AIN3 << 16) | MUX_PB09B_ADC0_AIN3)
296 #define PORT_PB09B_ADC0_AIN3                       (_UINT32_(1) << 9)
297 
298 #define PIN_PA04B_ADC0_AIN4                        _UINT32_(4)
299 #define MUX_PA04B_ADC0_AIN4                        _UINT32_(1)
300 #define PINMUX_PA04B_ADC0_AIN4                     ((PIN_PA04B_ADC0_AIN4 << 16) | MUX_PA04B_ADC0_AIN4)
301 #define PORT_PA04B_ADC0_AIN4                       (_UINT32_(1) << 4)
302 
303 #define PIN_PA05B_ADC0_AIN5                        _UINT32_(5)
304 #define MUX_PA05B_ADC0_AIN5                        _UINT32_(1)
305 #define PINMUX_PA05B_ADC0_AIN5                     ((PIN_PA05B_ADC0_AIN5 << 16) | MUX_PA05B_ADC0_AIN5)
306 #define PORT_PA05B_ADC0_AIN5                       (_UINT32_(1) << 5)
307 
308 #define PIN_PA06B_ADC0_AIN6                        _UINT32_(6)
309 #define MUX_PA06B_ADC0_AIN6                        _UINT32_(1)
310 #define PINMUX_PA06B_ADC0_AIN6                     ((PIN_PA06B_ADC0_AIN6 << 16) | MUX_PA06B_ADC0_AIN6)
311 #define PORT_PA06B_ADC0_AIN6                       (_UINT32_(1) << 6)
312 
313 #define PIN_PA07B_ADC0_AIN7                        _UINT32_(7)
314 #define MUX_PA07B_ADC0_AIN7                        _UINT32_(1)
315 #define PINMUX_PA07B_ADC0_AIN7                     ((PIN_PA07B_ADC0_AIN7 << 16) | MUX_PA07B_ADC0_AIN7)
316 #define PORT_PA07B_ADC0_AIN7                       (_UINT32_(1) << 7)
317 
318 #define PIN_PA08B_ADC0_AIN8                        _UINT32_(8)
319 #define MUX_PA08B_ADC0_AIN8                        _UINT32_(1)
320 #define PINMUX_PA08B_ADC0_AIN8                     ((PIN_PA08B_ADC0_AIN8 << 16) | MUX_PA08B_ADC0_AIN8)
321 #define PORT_PA08B_ADC0_AIN8                       (_UINT32_(1) << 8)
322 
323 #define PIN_PA09B_ADC0_AIN9                        _UINT32_(9)
324 #define MUX_PA09B_ADC0_AIN9                        _UINT32_(1)
325 #define PINMUX_PA09B_ADC0_AIN9                     ((PIN_PA09B_ADC0_AIN9 << 16) | MUX_PA09B_ADC0_AIN9)
326 #define PORT_PA09B_ADC0_AIN9                       (_UINT32_(1) << 9)
327 
328 #define PIN_PA10B_ADC0_AIN10                       _UINT32_(10)
329 #define MUX_PA10B_ADC0_AIN10                       _UINT32_(1)
330 #define PINMUX_PA10B_ADC0_AIN10                    ((PIN_PA10B_ADC0_AIN10 << 16) | MUX_PA10B_ADC0_AIN10)
331 #define PORT_PA10B_ADC0_AIN10                      (_UINT32_(1) << 10)
332 
333 #define PIN_PA11B_ADC0_AIN11                       _UINT32_(11)
334 #define MUX_PA11B_ADC0_AIN11                       _UINT32_(1)
335 #define PINMUX_PA11B_ADC0_AIN11                    ((PIN_PA11B_ADC0_AIN11 << 16) | MUX_PA11B_ADC0_AIN11)
336 #define PORT_PA11B_ADC0_AIN11                      (_UINT32_(1) << 11)
337 
338 #define PIN_PB00B_ADC0_AIN12                       _UINT32_(32)
339 #define MUX_PB00B_ADC0_AIN12                       _UINT32_(1)
340 #define PINMUX_PB00B_ADC0_AIN12                    ((PIN_PB00B_ADC0_AIN12 << 16) | MUX_PB00B_ADC0_AIN12)
341 #define PORT_PB00B_ADC0_AIN12                      (_UINT32_(1) << 0)
342 
343 #define PIN_PB01B_ADC0_AIN13                       _UINT32_(33)
344 #define MUX_PB01B_ADC0_AIN13                       _UINT32_(1)
345 #define PINMUX_PB01B_ADC0_AIN13                    ((PIN_PB01B_ADC0_AIN13 << 16) | MUX_PB01B_ADC0_AIN13)
346 #define PORT_PB01B_ADC0_AIN13                      (_UINT32_(1) << 1)
347 
348 #define PIN_PB02B_ADC0_AIN14                       _UINT32_(34)
349 #define MUX_PB02B_ADC0_AIN14                       _UINT32_(1)
350 #define PINMUX_PB02B_ADC0_AIN14                    ((PIN_PB02B_ADC0_AIN14 << 16) | MUX_PB02B_ADC0_AIN14)
351 #define PORT_PB02B_ADC0_AIN14                      (_UINT32_(1) << 2)
352 
353 #define PIN_PB03B_ADC0_AIN15                       _UINT32_(35)
354 #define MUX_PB03B_ADC0_AIN15                       _UINT32_(1)
355 #define PINMUX_PB03B_ADC0_AIN15                    ((PIN_PB03B_ADC0_AIN15 << 16) | MUX_PB03B_ADC0_AIN15)
356 #define PORT_PB03B_ADC0_AIN15                      (_UINT32_(1) << 3)
357 
358 #define PIN_PA03B_ADC0_VREFA                       _UINT32_(3)
359 #define MUX_PA03B_ADC0_VREFA                       _UINT32_(1)
360 #define PINMUX_PA03B_ADC0_VREFA                    ((PIN_PA03B_ADC0_VREFA << 16) | MUX_PA03B_ADC0_VREFA)
361 #define PORT_PA03B_ADC0_VREFA                      (_UINT32_(1) << 3)
362 
363 #define PIN_PA04B_ADC0_VREFB                       _UINT32_(4)
364 #define MUX_PA04B_ADC0_VREFB                       _UINT32_(1)
365 #define PINMUX_PA04B_ADC0_VREFB                    ((PIN_PA04B_ADC0_VREFB << 16) | MUX_PA04B_ADC0_VREFB)
366 #define PORT_PA04B_ADC0_VREFB                      (_UINT32_(1) << 4)
367 
368 #define PIN_PA06B_ADC0_VREFC                       _UINT32_(6)
369 #define MUX_PA06B_ADC0_VREFC                       _UINT32_(1)
370 #define PINMUX_PA06B_ADC0_VREFC                    ((PIN_PA06B_ADC0_VREFC << 16) | MUX_PA06B_ADC0_VREFC)
371 #define PORT_PA06B_ADC0_VREFC                      (_UINT32_(1) << 6)
372 
373 #define PIN_PA03B_ADC0_X0                          _UINT32_(3)
374 #define MUX_PA03B_ADC0_X0                          _UINT32_(1)
375 #define PINMUX_PA03B_ADC0_X0                       ((PIN_PA03B_ADC0_X0 << 16) | MUX_PA03B_ADC0_X0)
376 #define PORT_PA03B_ADC0_X0                         (_UINT32_(1) << 3)
377 
378 #define PIN_PB08B_ADC0_X1                          _UINT32_(40)
379 #define MUX_PB08B_ADC0_X1                          _UINT32_(1)
380 #define PINMUX_PB08B_ADC0_X1                       ((PIN_PB08B_ADC0_X1 << 16) | MUX_PB08B_ADC0_X1)
381 #define PORT_PB08B_ADC0_X1                         (_UINT32_(1) << 8)
382 
383 #define PIN_PB09B_ADC0_X2                          _UINT32_(41)
384 #define MUX_PB09B_ADC0_X2                          _UINT32_(1)
385 #define PINMUX_PB09B_ADC0_X2                       ((PIN_PB09B_ADC0_X2 << 16) | MUX_PB09B_ADC0_X2)
386 #define PORT_PB09B_ADC0_X2                         (_UINT32_(1) << 9)
387 
388 #define PIN_PA04B_ADC0_X3                          _UINT32_(4)
389 #define MUX_PA04B_ADC0_X3                          _UINT32_(1)
390 #define PINMUX_PA04B_ADC0_X3                       ((PIN_PA04B_ADC0_X3 << 16) | MUX_PA04B_ADC0_X3)
391 #define PORT_PA04B_ADC0_X3                         (_UINT32_(1) << 4)
392 
393 #define PIN_PA06B_ADC0_X4                          _UINT32_(6)
394 #define MUX_PA06B_ADC0_X4                          _UINT32_(1)
395 #define PINMUX_PA06B_ADC0_X4                       ((PIN_PA06B_ADC0_X4 << 16) | MUX_PA06B_ADC0_X4)
396 #define PORT_PA06B_ADC0_X4                         (_UINT32_(1) << 6)
397 
398 #define PIN_PA07B_ADC0_X5                          _UINT32_(7)
399 #define MUX_PA07B_ADC0_X5                          _UINT32_(1)
400 #define PINMUX_PA07B_ADC0_X5                       ((PIN_PA07B_ADC0_X5 << 16) | MUX_PA07B_ADC0_X5)
401 #define PORT_PA07B_ADC0_X5                         (_UINT32_(1) << 7)
402 
403 #define PIN_PA08B_ADC0_X6                          _UINT32_(8)
404 #define MUX_PA08B_ADC0_X6                          _UINT32_(1)
405 #define PINMUX_PA08B_ADC0_X6                       ((PIN_PA08B_ADC0_X6 << 16) | MUX_PA08B_ADC0_X6)
406 #define PORT_PA08B_ADC0_X6                         (_UINT32_(1) << 8)
407 
408 #define PIN_PA09B_ADC0_X7                          _UINT32_(9)
409 #define MUX_PA09B_ADC0_X7                          _UINT32_(1)
410 #define PINMUX_PA09B_ADC0_X7                       ((PIN_PA09B_ADC0_X7 << 16) | MUX_PA09B_ADC0_X7)
411 #define PORT_PA09B_ADC0_X7                         (_UINT32_(1) << 9)
412 
413 #define PIN_PA10B_ADC0_X8                          _UINT32_(10)
414 #define MUX_PA10B_ADC0_X8                          _UINT32_(1)
415 #define PINMUX_PA10B_ADC0_X8                       ((PIN_PA10B_ADC0_X8 << 16) | MUX_PA10B_ADC0_X8)
416 #define PORT_PA10B_ADC0_X8                         (_UINT32_(1) << 10)
417 
418 #define PIN_PA11B_ADC0_X9                          _UINT32_(11)
419 #define MUX_PA11B_ADC0_X9                          _UINT32_(1)
420 #define PINMUX_PA11B_ADC0_X9                       ((PIN_PA11B_ADC0_X9 << 16) | MUX_PA11B_ADC0_X9)
421 #define PORT_PA11B_ADC0_X9                         (_UINT32_(1) << 11)
422 
423 #define PIN_PA16B_ADC0_X10                         _UINT32_(16)
424 #define MUX_PA16B_ADC0_X10                         _UINT32_(1)
425 #define PINMUX_PA16B_ADC0_X10                      ((PIN_PA16B_ADC0_X10 << 16) | MUX_PA16B_ADC0_X10)
426 #define PORT_PA16B_ADC0_X10                        (_UINT32_(1) << 16)
427 
428 #define PIN_PA17B_ADC0_X11                         _UINT32_(17)
429 #define MUX_PA17B_ADC0_X11                         _UINT32_(1)
430 #define PINMUX_PA17B_ADC0_X11                      ((PIN_PA17B_ADC0_X11 << 16) | MUX_PA17B_ADC0_X11)
431 #define PORT_PA17B_ADC0_X11                        (_UINT32_(1) << 17)
432 
433 #define PIN_PA18B_ADC0_X12                         _UINT32_(18)
434 #define MUX_PA18B_ADC0_X12                         _UINT32_(1)
435 #define PINMUX_PA18B_ADC0_X12                      ((PIN_PA18B_ADC0_X12 << 16) | MUX_PA18B_ADC0_X12)
436 #define PORT_PA18B_ADC0_X12                        (_UINT32_(1) << 18)
437 
438 #define PIN_PA19B_ADC0_X13                         _UINT32_(19)
439 #define MUX_PA19B_ADC0_X13                         _UINT32_(1)
440 #define PINMUX_PA19B_ADC0_X13                      ((PIN_PA19B_ADC0_X13 << 16) | MUX_PA19B_ADC0_X13)
441 #define PORT_PA19B_ADC0_X13                        (_UINT32_(1) << 19)
442 
443 #define PIN_PA20B_ADC0_X14                         _UINT32_(20)
444 #define MUX_PA20B_ADC0_X14                         _UINT32_(1)
445 #define PINMUX_PA20B_ADC0_X14                      ((PIN_PA20B_ADC0_X14 << 16) | MUX_PA20B_ADC0_X14)
446 #define PORT_PA20B_ADC0_X14                        (_UINT32_(1) << 20)
447 
448 #define PIN_PA21B_ADC0_X15                         _UINT32_(21)
449 #define MUX_PA21B_ADC0_X15                         _UINT32_(1)
450 #define PINMUX_PA21B_ADC0_X15                      ((PIN_PA21B_ADC0_X15 << 16) | MUX_PA21B_ADC0_X15)
451 #define PORT_PA21B_ADC0_X15                        (_UINT32_(1) << 21)
452 
453 #define PIN_PA22B_ADC0_X16                         _UINT32_(22)
454 #define MUX_PA22B_ADC0_X16                         _UINT32_(1)
455 #define PINMUX_PA22B_ADC0_X16                      ((PIN_PA22B_ADC0_X16 << 16) | MUX_PA22B_ADC0_X16)
456 #define PORT_PA22B_ADC0_X16                        (_UINT32_(1) << 22)
457 
458 #define PIN_PA23B_ADC0_X17                         _UINT32_(23)
459 #define MUX_PA23B_ADC0_X17                         _UINT32_(1)
460 #define PINMUX_PA23B_ADC0_X17                      ((PIN_PA23B_ADC0_X17 << 16) | MUX_PA23B_ADC0_X17)
461 #define PORT_PA23B_ADC0_X17                        (_UINT32_(1) << 23)
462 
463 #define PIN_PA27B_ADC0_X18                         _UINT32_(27)
464 #define MUX_PA27B_ADC0_X18                         _UINT32_(1)
465 #define PINMUX_PA27B_ADC0_X18                      ((PIN_PA27B_ADC0_X18 << 16) | MUX_PA27B_ADC0_X18)
466 #define PORT_PA27B_ADC0_X18                        (_UINT32_(1) << 27)
467 
468 #define PIN_PA30B_ADC0_X19                         _UINT32_(30)
469 #define MUX_PA30B_ADC0_X19                         _UINT32_(1)
470 #define PINMUX_PA30B_ADC0_X19                      ((PIN_PA30B_ADC0_X19 << 16) | MUX_PA30B_ADC0_X19)
471 #define PORT_PA30B_ADC0_X19                        (_UINT32_(1) << 30)
472 
473 #define PIN_PB02B_ADC0_X20                         _UINT32_(34)
474 #define MUX_PB02B_ADC0_X20                         _UINT32_(1)
475 #define PINMUX_PB02B_ADC0_X20                      ((PIN_PB02B_ADC0_X20 << 16) | MUX_PB02B_ADC0_X20)
476 #define PORT_PB02B_ADC0_X20                        (_UINT32_(1) << 2)
477 
478 #define PIN_PB03B_ADC0_X21                         _UINT32_(35)
479 #define MUX_PB03B_ADC0_X21                         _UINT32_(1)
480 #define PINMUX_PB03B_ADC0_X21                      ((PIN_PB03B_ADC0_X21 << 16) | MUX_PB03B_ADC0_X21)
481 #define PORT_PB03B_ADC0_X21                        (_UINT32_(1) << 3)
482 
483 #define PIN_PB04B_ADC0_X22                         _UINT32_(36)
484 #define MUX_PB04B_ADC0_X22                         _UINT32_(1)
485 #define PINMUX_PB04B_ADC0_X22                      ((PIN_PB04B_ADC0_X22 << 16) | MUX_PB04B_ADC0_X22)
486 #define PORT_PB04B_ADC0_X22                        (_UINT32_(1) << 4)
487 
488 #define PIN_PB05B_ADC0_X23                         _UINT32_(37)
489 #define MUX_PB05B_ADC0_X23                         _UINT32_(1)
490 #define PINMUX_PB05B_ADC0_X23                      ((PIN_PB05B_ADC0_X23 << 16) | MUX_PB05B_ADC0_X23)
491 #define PORT_PB05B_ADC0_X23                        (_UINT32_(1) << 5)
492 
493 #define PIN_PB06B_ADC0_X24                         _UINT32_(38)
494 #define MUX_PB06B_ADC0_X24                         _UINT32_(1)
495 #define PINMUX_PB06B_ADC0_X24                      ((PIN_PB06B_ADC0_X24 << 16) | MUX_PB06B_ADC0_X24)
496 #define PORT_PB06B_ADC0_X24                        (_UINT32_(1) << 6)
497 
498 #define PIN_PB07B_ADC0_X25                         _UINT32_(39)
499 #define MUX_PB07B_ADC0_X25                         _UINT32_(1)
500 #define PINMUX_PB07B_ADC0_X25                      ((PIN_PB07B_ADC0_X25 << 16) | MUX_PB07B_ADC0_X25)
501 #define PORT_PB07B_ADC0_X25                        (_UINT32_(1) << 7)
502 
503 #define PIN_PB12B_ADC0_X26                         _UINT32_(44)
504 #define MUX_PB12B_ADC0_X26                         _UINT32_(1)
505 #define PINMUX_PB12B_ADC0_X26                      ((PIN_PB12B_ADC0_X26 << 16) | MUX_PB12B_ADC0_X26)
506 #define PORT_PB12B_ADC0_X26                        (_UINT32_(1) << 12)
507 
508 #define PIN_PB13B_ADC0_X27                         _UINT32_(45)
509 #define MUX_PB13B_ADC0_X27                         _UINT32_(1)
510 #define PINMUX_PB13B_ADC0_X27                      ((PIN_PB13B_ADC0_X27 << 16) | MUX_PB13B_ADC0_X27)
511 #define PORT_PB13B_ADC0_X27                        (_UINT32_(1) << 13)
512 
513 #define PIN_PB14B_ADC0_X28                         _UINT32_(46)
514 #define MUX_PB14B_ADC0_X28                         _UINT32_(1)
515 #define PINMUX_PB14B_ADC0_X28                      ((PIN_PB14B_ADC0_X28 << 16) | MUX_PB14B_ADC0_X28)
516 #define PORT_PB14B_ADC0_X28                        (_UINT32_(1) << 14)
517 
518 #define PIN_PB15B_ADC0_X29                         _UINT32_(47)
519 #define MUX_PB15B_ADC0_X29                         _UINT32_(1)
520 #define PINMUX_PB15B_ADC0_X29                      ((PIN_PB15B_ADC0_X29 << 16) | MUX_PB15B_ADC0_X29)
521 #define PORT_PB15B_ADC0_X29                        (_UINT32_(1) << 15)
522 
523 #define PIN_PB00B_ADC0_X30                         _UINT32_(32)
524 #define MUX_PB00B_ADC0_X30                         _UINT32_(1)
525 #define PINMUX_PB00B_ADC0_X30                      ((PIN_PB00B_ADC0_X30 << 16) | MUX_PB00B_ADC0_X30)
526 #define PORT_PB00B_ADC0_X30                        (_UINT32_(1) << 0)
527 
528 #define PIN_PB01B_ADC0_X31                         _UINT32_(33)
529 #define MUX_PB01B_ADC0_X31                         _UINT32_(1)
530 #define PINMUX_PB01B_ADC0_X31                      ((PIN_PB01B_ADC0_X31 << 16) | MUX_PB01B_ADC0_X31)
531 #define PORT_PB01B_ADC0_X31                        (_UINT32_(1) << 1)
532 
533 #define PIN_PA03B_ADC0_Y0                          _UINT32_(3)
534 #define MUX_PA03B_ADC0_Y0                          _UINT32_(1)
535 #define PINMUX_PA03B_ADC0_Y0                       ((PIN_PA03B_ADC0_Y0 << 16) | MUX_PA03B_ADC0_Y0)
536 #define PORT_PA03B_ADC0_Y0                         (_UINT32_(1) << 3)
537 
538 #define PIN_PB08B_ADC0_Y1                          _UINT32_(40)
539 #define MUX_PB08B_ADC0_Y1                          _UINT32_(1)
540 #define PINMUX_PB08B_ADC0_Y1                       ((PIN_PB08B_ADC0_Y1 << 16) | MUX_PB08B_ADC0_Y1)
541 #define PORT_PB08B_ADC0_Y1                         (_UINT32_(1) << 8)
542 
543 #define PIN_PB09B_ADC0_Y2                          _UINT32_(41)
544 #define MUX_PB09B_ADC0_Y2                          _UINT32_(1)
545 #define PINMUX_PB09B_ADC0_Y2                       ((PIN_PB09B_ADC0_Y2 << 16) | MUX_PB09B_ADC0_Y2)
546 #define PORT_PB09B_ADC0_Y2                         (_UINT32_(1) << 9)
547 
548 #define PIN_PA04B_ADC0_Y3                          _UINT32_(4)
549 #define MUX_PA04B_ADC0_Y3                          _UINT32_(1)
550 #define PINMUX_PA04B_ADC0_Y3                       ((PIN_PA04B_ADC0_Y3 << 16) | MUX_PA04B_ADC0_Y3)
551 #define PORT_PA04B_ADC0_Y3                         (_UINT32_(1) << 4)
552 
553 #define PIN_PA06B_ADC0_Y4                          _UINT32_(6)
554 #define MUX_PA06B_ADC0_Y4                          _UINT32_(1)
555 #define PINMUX_PA06B_ADC0_Y4                       ((PIN_PA06B_ADC0_Y4 << 16) | MUX_PA06B_ADC0_Y4)
556 #define PORT_PA06B_ADC0_Y4                         (_UINT32_(1) << 6)
557 
558 #define PIN_PA07B_ADC0_Y5                          _UINT32_(7)
559 #define MUX_PA07B_ADC0_Y5                          _UINT32_(1)
560 #define PINMUX_PA07B_ADC0_Y5                       ((PIN_PA07B_ADC0_Y5 << 16) | MUX_PA07B_ADC0_Y5)
561 #define PORT_PA07B_ADC0_Y5                         (_UINT32_(1) << 7)
562 
563 #define PIN_PA08B_ADC0_Y6                          _UINT32_(8)
564 #define MUX_PA08B_ADC0_Y6                          _UINT32_(1)
565 #define PINMUX_PA08B_ADC0_Y6                       ((PIN_PA08B_ADC0_Y6 << 16) | MUX_PA08B_ADC0_Y6)
566 #define PORT_PA08B_ADC0_Y6                         (_UINT32_(1) << 8)
567 
568 #define PIN_PA09B_ADC0_Y7                          _UINT32_(9)
569 #define MUX_PA09B_ADC0_Y7                          _UINT32_(1)
570 #define PINMUX_PA09B_ADC0_Y7                       ((PIN_PA09B_ADC0_Y7 << 16) | MUX_PA09B_ADC0_Y7)
571 #define PORT_PA09B_ADC0_Y7                         (_UINT32_(1) << 9)
572 
573 #define PIN_PA10B_ADC0_Y8                          _UINT32_(10)
574 #define MUX_PA10B_ADC0_Y8                          _UINT32_(1)
575 #define PINMUX_PA10B_ADC0_Y8                       ((PIN_PA10B_ADC0_Y8 << 16) | MUX_PA10B_ADC0_Y8)
576 #define PORT_PA10B_ADC0_Y8                         (_UINT32_(1) << 10)
577 
578 #define PIN_PA11B_ADC0_Y9                          _UINT32_(11)
579 #define MUX_PA11B_ADC0_Y9                          _UINT32_(1)
580 #define PINMUX_PA11B_ADC0_Y9                       ((PIN_PA11B_ADC0_Y9 << 16) | MUX_PA11B_ADC0_Y9)
581 #define PORT_PA11B_ADC0_Y9                         (_UINT32_(1) << 11)
582 
583 #define PIN_PA16B_ADC0_Y10                         _UINT32_(16)
584 #define MUX_PA16B_ADC0_Y10                         _UINT32_(1)
585 #define PINMUX_PA16B_ADC0_Y10                      ((PIN_PA16B_ADC0_Y10 << 16) | MUX_PA16B_ADC0_Y10)
586 #define PORT_PA16B_ADC0_Y10                        (_UINT32_(1) << 16)
587 
588 #define PIN_PA17B_ADC0_Y11                         _UINT32_(17)
589 #define MUX_PA17B_ADC0_Y11                         _UINT32_(1)
590 #define PINMUX_PA17B_ADC0_Y11                      ((PIN_PA17B_ADC0_Y11 << 16) | MUX_PA17B_ADC0_Y11)
591 #define PORT_PA17B_ADC0_Y11                        (_UINT32_(1) << 17)
592 
593 #define PIN_PA18B_ADC0_Y12                         _UINT32_(18)
594 #define MUX_PA18B_ADC0_Y12                         _UINT32_(1)
595 #define PINMUX_PA18B_ADC0_Y12                      ((PIN_PA18B_ADC0_Y12 << 16) | MUX_PA18B_ADC0_Y12)
596 #define PORT_PA18B_ADC0_Y12                        (_UINT32_(1) << 18)
597 
598 #define PIN_PA19B_ADC0_Y13                         _UINT32_(19)
599 #define MUX_PA19B_ADC0_Y13                         _UINT32_(1)
600 #define PINMUX_PA19B_ADC0_Y13                      ((PIN_PA19B_ADC0_Y13 << 16) | MUX_PA19B_ADC0_Y13)
601 #define PORT_PA19B_ADC0_Y13                        (_UINT32_(1) << 19)
602 
603 #define PIN_PA20B_ADC0_Y14                         _UINT32_(20)
604 #define MUX_PA20B_ADC0_Y14                         _UINT32_(1)
605 #define PINMUX_PA20B_ADC0_Y14                      ((PIN_PA20B_ADC0_Y14 << 16) | MUX_PA20B_ADC0_Y14)
606 #define PORT_PA20B_ADC0_Y14                        (_UINT32_(1) << 20)
607 
608 #define PIN_PA21B_ADC0_Y15                         _UINT32_(21)
609 #define MUX_PA21B_ADC0_Y15                         _UINT32_(1)
610 #define PINMUX_PA21B_ADC0_Y15                      ((PIN_PA21B_ADC0_Y15 << 16) | MUX_PA21B_ADC0_Y15)
611 #define PORT_PA21B_ADC0_Y15                        (_UINT32_(1) << 21)
612 
613 #define PIN_PA22B_ADC0_Y16                         _UINT32_(22)
614 #define MUX_PA22B_ADC0_Y16                         _UINT32_(1)
615 #define PINMUX_PA22B_ADC0_Y16                      ((PIN_PA22B_ADC0_Y16 << 16) | MUX_PA22B_ADC0_Y16)
616 #define PORT_PA22B_ADC0_Y16                        (_UINT32_(1) << 22)
617 
618 #define PIN_PA23B_ADC0_Y17                         _UINT32_(23)
619 #define MUX_PA23B_ADC0_Y17                         _UINT32_(1)
620 #define PINMUX_PA23B_ADC0_Y17                      ((PIN_PA23B_ADC0_Y17 << 16) | MUX_PA23B_ADC0_Y17)
621 #define PORT_PA23B_ADC0_Y17                        (_UINT32_(1) << 23)
622 
623 #define PIN_PA27B_ADC0_Y18                         _UINT32_(27)
624 #define MUX_PA27B_ADC0_Y18                         _UINT32_(1)
625 #define PINMUX_PA27B_ADC0_Y18                      ((PIN_PA27B_ADC0_Y18 << 16) | MUX_PA27B_ADC0_Y18)
626 #define PORT_PA27B_ADC0_Y18                        (_UINT32_(1) << 27)
627 
628 #define PIN_PA30B_ADC0_Y19                         _UINT32_(30)
629 #define MUX_PA30B_ADC0_Y19                         _UINT32_(1)
630 #define PINMUX_PA30B_ADC0_Y19                      ((PIN_PA30B_ADC0_Y19 << 16) | MUX_PA30B_ADC0_Y19)
631 #define PORT_PA30B_ADC0_Y19                        (_UINT32_(1) << 30)
632 
633 #define PIN_PB02B_ADC0_Y20                         _UINT32_(34)
634 #define MUX_PB02B_ADC0_Y20                         _UINT32_(1)
635 #define PINMUX_PB02B_ADC0_Y20                      ((PIN_PB02B_ADC0_Y20 << 16) | MUX_PB02B_ADC0_Y20)
636 #define PORT_PB02B_ADC0_Y20                        (_UINT32_(1) << 2)
637 
638 #define PIN_PB03B_ADC0_Y21                         _UINT32_(35)
639 #define MUX_PB03B_ADC0_Y21                         _UINT32_(1)
640 #define PINMUX_PB03B_ADC0_Y21                      ((PIN_PB03B_ADC0_Y21 << 16) | MUX_PB03B_ADC0_Y21)
641 #define PORT_PB03B_ADC0_Y21                        (_UINT32_(1) << 3)
642 
643 #define PIN_PB04B_ADC0_Y22                         _UINT32_(36)
644 #define MUX_PB04B_ADC0_Y22                         _UINT32_(1)
645 #define PINMUX_PB04B_ADC0_Y22                      ((PIN_PB04B_ADC0_Y22 << 16) | MUX_PB04B_ADC0_Y22)
646 #define PORT_PB04B_ADC0_Y22                        (_UINT32_(1) << 4)
647 
648 #define PIN_PB05B_ADC0_Y23                         _UINT32_(37)
649 #define MUX_PB05B_ADC0_Y23                         _UINT32_(1)
650 #define PINMUX_PB05B_ADC0_Y23                      ((PIN_PB05B_ADC0_Y23 << 16) | MUX_PB05B_ADC0_Y23)
651 #define PORT_PB05B_ADC0_Y23                        (_UINT32_(1) << 5)
652 
653 #define PIN_PB06B_ADC0_Y24                         _UINT32_(38)
654 #define MUX_PB06B_ADC0_Y24                         _UINT32_(1)
655 #define PINMUX_PB06B_ADC0_Y24                      ((PIN_PB06B_ADC0_Y24 << 16) | MUX_PB06B_ADC0_Y24)
656 #define PORT_PB06B_ADC0_Y24                        (_UINT32_(1) << 6)
657 
658 #define PIN_PB07B_ADC0_Y25                         _UINT32_(39)
659 #define MUX_PB07B_ADC0_Y25                         _UINT32_(1)
660 #define PINMUX_PB07B_ADC0_Y25                      ((PIN_PB07B_ADC0_Y25 << 16) | MUX_PB07B_ADC0_Y25)
661 #define PORT_PB07B_ADC0_Y25                        (_UINT32_(1) << 7)
662 
663 #define PIN_PB12B_ADC0_Y26                         _UINT32_(44)
664 #define MUX_PB12B_ADC0_Y26                         _UINT32_(1)
665 #define PINMUX_PB12B_ADC0_Y26                      ((PIN_PB12B_ADC0_Y26 << 16) | MUX_PB12B_ADC0_Y26)
666 #define PORT_PB12B_ADC0_Y26                        (_UINT32_(1) << 12)
667 
668 #define PIN_PB13B_ADC0_Y27                         _UINT32_(45)
669 #define MUX_PB13B_ADC0_Y27                         _UINT32_(1)
670 #define PINMUX_PB13B_ADC0_Y27                      ((PIN_PB13B_ADC0_Y27 << 16) | MUX_PB13B_ADC0_Y27)
671 #define PORT_PB13B_ADC0_Y27                        (_UINT32_(1) << 13)
672 
673 #define PIN_PB14B_ADC0_Y28                         _UINT32_(46)
674 #define MUX_PB14B_ADC0_Y28                         _UINT32_(1)
675 #define PINMUX_PB14B_ADC0_Y28                      ((PIN_PB14B_ADC0_Y28 << 16) | MUX_PB14B_ADC0_Y28)
676 #define PORT_PB14B_ADC0_Y28                        (_UINT32_(1) << 14)
677 
678 #define PIN_PB15B_ADC0_Y29                         _UINT32_(47)
679 #define MUX_PB15B_ADC0_Y29                         _UINT32_(1)
680 #define PINMUX_PB15B_ADC0_Y29                      ((PIN_PB15B_ADC0_Y29 << 16) | MUX_PB15B_ADC0_Y29)
681 #define PORT_PB15B_ADC0_Y29                        (_UINT32_(1) << 15)
682 
683 #define PIN_PB00B_ADC0_Y30                         _UINT32_(32)
684 #define MUX_PB00B_ADC0_Y30                         _UINT32_(1)
685 #define PINMUX_PB00B_ADC0_Y30                      ((PIN_PB00B_ADC0_Y30 << 16) | MUX_PB00B_ADC0_Y30)
686 #define PORT_PB00B_ADC0_Y30                        (_UINT32_(1) << 0)
687 
688 #define PIN_PB01B_ADC0_Y31                         _UINT32_(33)
689 #define MUX_PB01B_ADC0_Y31                         _UINT32_(1)
690 #define PINMUX_PB01B_ADC0_Y31                      ((PIN_PB01B_ADC0_Y31 << 16) | MUX_PB01B_ADC0_Y31)
691 #define PORT_PB01B_ADC0_Y31                        (_UINT32_(1) << 1)
692 
693 /* ================== PORT definition for ADC1 peripheral =================== */
694 #define PIN_PB08B_ADC1_AIN0                        _UINT32_(40)
695 #define MUX_PB08B_ADC1_AIN0                        _UINT32_(1)
696 #define PINMUX_PB08B_ADC1_AIN0                     ((PIN_PB08B_ADC1_AIN0 << 16) | MUX_PB08B_ADC1_AIN0)
697 #define PORT_PB08B_ADC1_AIN0                       (_UINT32_(1) << 8)
698 
699 #define PIN_PB09B_ADC1_AIN1                        _UINT32_(41)
700 #define MUX_PB09B_ADC1_AIN1                        _UINT32_(1)
701 #define PINMUX_PB09B_ADC1_AIN1                     ((PIN_PB09B_ADC1_AIN1 << 16) | MUX_PB09B_ADC1_AIN1)
702 #define PORT_PB09B_ADC1_AIN1                       (_UINT32_(1) << 9)
703 
704 #define PIN_PA08B_ADC1_AIN2                        _UINT32_(8)
705 #define MUX_PA08B_ADC1_AIN2                        _UINT32_(1)
706 #define PINMUX_PA08B_ADC1_AIN2                     ((PIN_PA08B_ADC1_AIN2 << 16) | MUX_PA08B_ADC1_AIN2)
707 #define PORT_PA08B_ADC1_AIN2                       (_UINT32_(1) << 8)
708 
709 #define PIN_PA09B_ADC1_AIN3                        _UINT32_(9)
710 #define MUX_PA09B_ADC1_AIN3                        _UINT32_(1)
711 #define PINMUX_PA09B_ADC1_AIN3                     ((PIN_PA09B_ADC1_AIN3 << 16) | MUX_PA09B_ADC1_AIN3)
712 #define PORT_PA09B_ADC1_AIN3                       (_UINT32_(1) << 9)
713 
714 #define PIN_PC02B_ADC1_AIN4                        _UINT32_(66)
715 #define MUX_PC02B_ADC1_AIN4                        _UINT32_(1)
716 #define PINMUX_PC02B_ADC1_AIN4                     ((PIN_PC02B_ADC1_AIN4 << 16) | MUX_PC02B_ADC1_AIN4)
717 #define PORT_PC02B_ADC1_AIN4                       (_UINT32_(1) << 2)
718 
719 #define PIN_PC03B_ADC1_AIN5                        _UINT32_(67)
720 #define MUX_PC03B_ADC1_AIN5                        _UINT32_(1)
721 #define PINMUX_PC03B_ADC1_AIN5                     ((PIN_PC03B_ADC1_AIN5 << 16) | MUX_PC03B_ADC1_AIN5)
722 #define PORT_PC03B_ADC1_AIN5                       (_UINT32_(1) << 3)
723 
724 #define PIN_PB04B_ADC1_AIN6                        _UINT32_(36)
725 #define MUX_PB04B_ADC1_AIN6                        _UINT32_(1)
726 #define PINMUX_PB04B_ADC1_AIN6                     ((PIN_PB04B_ADC1_AIN6 << 16) | MUX_PB04B_ADC1_AIN6)
727 #define PORT_PB04B_ADC1_AIN6                       (_UINT32_(1) << 4)
728 
729 #define PIN_PB05B_ADC1_AIN7                        _UINT32_(37)
730 #define MUX_PB05B_ADC1_AIN7                        _UINT32_(1)
731 #define PINMUX_PB05B_ADC1_AIN7                     ((PIN_PB05B_ADC1_AIN7 << 16) | MUX_PB05B_ADC1_AIN7)
732 #define PORT_PB05B_ADC1_AIN7                       (_UINT32_(1) << 5)
733 
734 #define PIN_PB06B_ADC1_AIN8                        _UINT32_(38)
735 #define MUX_PB06B_ADC1_AIN8                        _UINT32_(1)
736 #define PINMUX_PB06B_ADC1_AIN8                     ((PIN_PB06B_ADC1_AIN8 << 16) | MUX_PB06B_ADC1_AIN8)
737 #define PORT_PB06B_ADC1_AIN8                       (_UINT32_(1) << 6)
738 
739 #define PIN_PB07B_ADC1_AIN9                        _UINT32_(39)
740 #define MUX_PB07B_ADC1_AIN9                        _UINT32_(1)
741 #define PINMUX_PB07B_ADC1_AIN9                     ((PIN_PB07B_ADC1_AIN9 << 16) | MUX_PB07B_ADC1_AIN9)
742 #define PORT_PB07B_ADC1_AIN9                       (_UINT32_(1) << 7)
743 
744 #define PIN_PC00B_ADC1_AIN10                       _UINT32_(64)
745 #define MUX_PC00B_ADC1_AIN10                       _UINT32_(1)
746 #define PINMUX_PC00B_ADC1_AIN10                    ((PIN_PC00B_ADC1_AIN10 << 16) | MUX_PC00B_ADC1_AIN10)
747 #define PORT_PC00B_ADC1_AIN10                      (_UINT32_(1) << 0)
748 
749 #define PIN_PC01B_ADC1_AIN11                       _UINT32_(65)
750 #define MUX_PC01B_ADC1_AIN11                       _UINT32_(1)
751 #define PINMUX_PC01B_ADC1_AIN11                    ((PIN_PC01B_ADC1_AIN11 << 16) | MUX_PC01B_ADC1_AIN11)
752 #define PORT_PC01B_ADC1_AIN11                      (_UINT32_(1) << 1)
753 
754 #define PIN_PC30B_ADC1_AIN12                       _UINT32_(94)
755 #define MUX_PC30B_ADC1_AIN12                       _UINT32_(1)
756 #define PINMUX_PC30B_ADC1_AIN12                    ((PIN_PC30B_ADC1_AIN12 << 16) | MUX_PC30B_ADC1_AIN12)
757 #define PORT_PC30B_ADC1_AIN12                      (_UINT32_(1) << 30)
758 
759 #define PIN_PC31B_ADC1_AIN13                       _UINT32_(95)
760 #define MUX_PC31B_ADC1_AIN13                       _UINT32_(1)
761 #define PINMUX_PC31B_ADC1_AIN13                    ((PIN_PC31B_ADC1_AIN13 << 16) | MUX_PC31B_ADC1_AIN13)
762 #define PORT_PC31B_ADC1_AIN13                      (_UINT32_(1) << 31)
763 
764 #define PIN_PD00B_ADC1_AIN14                       _UINT32_(96)
765 #define MUX_PD00B_ADC1_AIN14                       _UINT32_(1)
766 #define PINMUX_PD00B_ADC1_AIN14                    ((PIN_PD00B_ADC1_AIN14 << 16) | MUX_PD00B_ADC1_AIN14)
767 #define PORT_PD00B_ADC1_AIN14                      (_UINT32_(1) << 0)
768 
769 #define PIN_PD01B_ADC1_AIN15                       _UINT32_(97)
770 #define MUX_PD01B_ADC1_AIN15                       _UINT32_(1)
771 #define PINMUX_PD01B_ADC1_AIN15                    ((PIN_PD01B_ADC1_AIN15 << 16) | MUX_PD01B_ADC1_AIN15)
772 #define PORT_PD01B_ADC1_AIN15                      (_UINT32_(1) << 1)
773 
774 /* ================== PORT definition for CAN0 peripheral =================== */
775 #define PIN_PA23I_CAN0_RX                          _UINT32_(23)
776 #define MUX_PA23I_CAN0_RX                          _UINT32_(8)
777 #define PINMUX_PA23I_CAN0_RX                       ((PIN_PA23I_CAN0_RX << 16) | MUX_PA23I_CAN0_RX)
778 #define PORT_PA23I_CAN0_RX                         (_UINT32_(1) << 23)
779 
780 #define PIN_PA25I_CAN0_RX                          _UINT32_(25)
781 #define MUX_PA25I_CAN0_RX                          _UINT32_(8)
782 #define PINMUX_PA25I_CAN0_RX                       ((PIN_PA25I_CAN0_RX << 16) | MUX_PA25I_CAN0_RX)
783 #define PORT_PA25I_CAN0_RX                         (_UINT32_(1) << 25)
784 
785 #define PIN_PA22I_CAN0_TX                          _UINT32_(22)
786 #define MUX_PA22I_CAN0_TX                          _UINT32_(8)
787 #define PINMUX_PA22I_CAN0_TX                       ((PIN_PA22I_CAN0_TX << 16) | MUX_PA22I_CAN0_TX)
788 #define PORT_PA22I_CAN0_TX                         (_UINT32_(1) << 22)
789 
790 #define PIN_PA24I_CAN0_TX                          _UINT32_(24)
791 #define MUX_PA24I_CAN0_TX                          _UINT32_(8)
792 #define PINMUX_PA24I_CAN0_TX                       ((PIN_PA24I_CAN0_TX << 16) | MUX_PA24I_CAN0_TX)
793 #define PORT_PA24I_CAN0_TX                         (_UINT32_(1) << 24)
794 
795 /* ================== PORT definition for CAN1 peripheral =================== */
796 #define PIN_PB13H_CAN1_RX                          _UINT32_(45)
797 #define MUX_PB13H_CAN1_RX                          _UINT32_(7)
798 #define PINMUX_PB13H_CAN1_RX                       ((PIN_PB13H_CAN1_RX << 16) | MUX_PB13H_CAN1_RX)
799 #define PORT_PB13H_CAN1_RX                         (_UINT32_(1) << 13)
800 
801 #define PIN_PB15H_CAN1_RX                          _UINT32_(47)
802 #define MUX_PB15H_CAN1_RX                          _UINT32_(7)
803 #define PINMUX_PB15H_CAN1_RX                       ((PIN_PB15H_CAN1_RX << 16) | MUX_PB15H_CAN1_RX)
804 #define PORT_PB15H_CAN1_RX                         (_UINT32_(1) << 15)
805 
806 #define PIN_PB12H_CAN1_TX                          _UINT32_(44)
807 #define MUX_PB12H_CAN1_TX                          _UINT32_(7)
808 #define PINMUX_PB12H_CAN1_TX                       ((PIN_PB12H_CAN1_TX << 16) | MUX_PB12H_CAN1_TX)
809 #define PORT_PB12H_CAN1_TX                         (_UINT32_(1) << 12)
810 
811 #define PIN_PB14H_CAN1_TX                          _UINT32_(46)
812 #define MUX_PB14H_CAN1_TX                          _UINT32_(7)
813 #define PINMUX_PB14H_CAN1_TX                       ((PIN_PB14H_CAN1_TX << 16) | MUX_PB14H_CAN1_TX)
814 #define PORT_PB14H_CAN1_TX                         (_UINT32_(1) << 14)
815 
816 /* =================== PORT definition for CCL peripheral =================== */
817 #define PIN_PA04N_CCL_IN0                          _UINT32_(4)
818 #define MUX_PA04N_CCL_IN0                          _UINT32_(13)
819 #define PINMUX_PA04N_CCL_IN0                       ((PIN_PA04N_CCL_IN0 << 16) | MUX_PA04N_CCL_IN0)
820 #define PORT_PA04N_CCL_IN0                         (_UINT32_(1) << 4)
821 
822 #define PIN_PA16N_CCL_IN0                          _UINT32_(16)
823 #define MUX_PA16N_CCL_IN0                          _UINT32_(13)
824 #define PINMUX_PA16N_CCL_IN0                       ((PIN_PA16N_CCL_IN0 << 16) | MUX_PA16N_CCL_IN0)
825 #define PORT_PA16N_CCL_IN0                         (_UINT32_(1) << 16)
826 
827 #define PIN_PB22N_CCL_IN0                          _UINT32_(54)
828 #define MUX_PB22N_CCL_IN0                          _UINT32_(13)
829 #define PINMUX_PB22N_CCL_IN0                       ((PIN_PB22N_CCL_IN0 << 16) | MUX_PB22N_CCL_IN0)
830 #define PORT_PB22N_CCL_IN0                         (_UINT32_(1) << 22)
831 
832 #define PIN_PA05N_CCL_IN1                          _UINT32_(5)
833 #define MUX_PA05N_CCL_IN1                          _UINT32_(13)
834 #define PINMUX_PA05N_CCL_IN1                       ((PIN_PA05N_CCL_IN1 << 16) | MUX_PA05N_CCL_IN1)
835 #define PORT_PA05N_CCL_IN1                         (_UINT32_(1) << 5)
836 
837 #define PIN_PA17N_CCL_IN1                          _UINT32_(17)
838 #define MUX_PA17N_CCL_IN1                          _UINT32_(13)
839 #define PINMUX_PA17N_CCL_IN1                       ((PIN_PA17N_CCL_IN1 << 16) | MUX_PA17N_CCL_IN1)
840 #define PORT_PA17N_CCL_IN1                         (_UINT32_(1) << 17)
841 
842 #define PIN_PB00N_CCL_IN1                          _UINT32_(32)
843 #define MUX_PB00N_CCL_IN1                          _UINT32_(13)
844 #define PINMUX_PB00N_CCL_IN1                       ((PIN_PB00N_CCL_IN1 << 16) | MUX_PB00N_CCL_IN1)
845 #define PORT_PB00N_CCL_IN1                         (_UINT32_(1) << 0)
846 
847 #define PIN_PA06N_CCL_IN2                          _UINT32_(6)
848 #define MUX_PA06N_CCL_IN2                          _UINT32_(13)
849 #define PINMUX_PA06N_CCL_IN2                       ((PIN_PA06N_CCL_IN2 << 16) | MUX_PA06N_CCL_IN2)
850 #define PORT_PA06N_CCL_IN2                         (_UINT32_(1) << 6)
851 
852 #define PIN_PA18N_CCL_IN2                          _UINT32_(18)
853 #define MUX_PA18N_CCL_IN2                          _UINT32_(13)
854 #define PINMUX_PA18N_CCL_IN2                       ((PIN_PA18N_CCL_IN2 << 16) | MUX_PA18N_CCL_IN2)
855 #define PORT_PA18N_CCL_IN2                         (_UINT32_(1) << 18)
856 
857 #define PIN_PB01N_CCL_IN2                          _UINT32_(33)
858 #define MUX_PB01N_CCL_IN2                          _UINT32_(13)
859 #define PINMUX_PB01N_CCL_IN2                       ((PIN_PB01N_CCL_IN2 << 16) | MUX_PB01N_CCL_IN2)
860 #define PORT_PB01N_CCL_IN2                         (_UINT32_(1) << 1)
861 
862 #define PIN_PA08N_CCL_IN3                          _UINT32_(8)
863 #define MUX_PA08N_CCL_IN3                          _UINT32_(13)
864 #define PINMUX_PA08N_CCL_IN3                       ((PIN_PA08N_CCL_IN3 << 16) | MUX_PA08N_CCL_IN3)
865 #define PORT_PA08N_CCL_IN3                         (_UINT32_(1) << 8)
866 
867 #define PIN_PA30N_CCL_IN3                          _UINT32_(30)
868 #define MUX_PA30N_CCL_IN3                          _UINT32_(13)
869 #define PINMUX_PA30N_CCL_IN3                       ((PIN_PA30N_CCL_IN3 << 16) | MUX_PA30N_CCL_IN3)
870 #define PORT_PA30N_CCL_IN3                         (_UINT32_(1) << 30)
871 
872 #define PIN_PA09N_CCL_IN4                          _UINT32_(9)
873 #define MUX_PA09N_CCL_IN4                          _UINT32_(13)
874 #define PINMUX_PA09N_CCL_IN4                       ((PIN_PA09N_CCL_IN4 << 16) | MUX_PA09N_CCL_IN4)
875 #define PORT_PA09N_CCL_IN4                         (_UINT32_(1) << 9)
876 
877 #define PIN_PC27N_CCL_IN4                          _UINT32_(91)
878 #define MUX_PC27N_CCL_IN4                          _UINT32_(13)
879 #define PINMUX_PC27N_CCL_IN4                       ((PIN_PC27N_CCL_IN4 << 16) | MUX_PC27N_CCL_IN4)
880 #define PORT_PC27N_CCL_IN4                         (_UINT32_(1) << 27)
881 
882 #define PIN_PA10N_CCL_IN5                          _UINT32_(10)
883 #define MUX_PA10N_CCL_IN5                          _UINT32_(13)
884 #define PINMUX_PA10N_CCL_IN5                       ((PIN_PA10N_CCL_IN5 << 16) | MUX_PA10N_CCL_IN5)
885 #define PORT_PA10N_CCL_IN5                         (_UINT32_(1) << 10)
886 
887 #define PIN_PC28N_CCL_IN5                          _UINT32_(92)
888 #define MUX_PC28N_CCL_IN5                          _UINT32_(13)
889 #define PINMUX_PC28N_CCL_IN5                       ((PIN_PC28N_CCL_IN5 << 16) | MUX_PC28N_CCL_IN5)
890 #define PORT_PC28N_CCL_IN5                         (_UINT32_(1) << 28)
891 
892 #define PIN_PA22N_CCL_IN6                          _UINT32_(22)
893 #define MUX_PA22N_CCL_IN6                          _UINT32_(13)
894 #define PINMUX_PA22N_CCL_IN6                       ((PIN_PA22N_CCL_IN6 << 16) | MUX_PA22N_CCL_IN6)
895 #define PORT_PA22N_CCL_IN6                         (_UINT32_(1) << 22)
896 
897 #define PIN_PB06N_CCL_IN6                          _UINT32_(38)
898 #define MUX_PB06N_CCL_IN6                          _UINT32_(13)
899 #define PINMUX_PB06N_CCL_IN6                       ((PIN_PB06N_CCL_IN6 << 16) | MUX_PB06N_CCL_IN6)
900 #define PORT_PB06N_CCL_IN6                         (_UINT32_(1) << 6)
901 
902 #define PIN_PA23N_CCL_IN7                          _UINT32_(23)
903 #define MUX_PA23N_CCL_IN7                          _UINT32_(13)
904 #define PINMUX_PA23N_CCL_IN7                       ((PIN_PA23N_CCL_IN7 << 16) | MUX_PA23N_CCL_IN7)
905 #define PORT_PA23N_CCL_IN7                         (_UINT32_(1) << 23)
906 
907 #define PIN_PB07N_CCL_IN7                          _UINT32_(39)
908 #define MUX_PB07N_CCL_IN7                          _UINT32_(13)
909 #define PINMUX_PB07N_CCL_IN7                       ((PIN_PB07N_CCL_IN7 << 16) | MUX_PB07N_CCL_IN7)
910 #define PORT_PB07N_CCL_IN7                         (_UINT32_(1) << 7)
911 
912 #define PIN_PA24N_CCL_IN8                          _UINT32_(24)
913 #define MUX_PA24N_CCL_IN8                          _UINT32_(13)
914 #define PINMUX_PA24N_CCL_IN8                       ((PIN_PA24N_CCL_IN8 << 16) | MUX_PA24N_CCL_IN8)
915 #define PORT_PA24N_CCL_IN8                         (_UINT32_(1) << 24)
916 
917 #define PIN_PB08N_CCL_IN8                          _UINT32_(40)
918 #define MUX_PB08N_CCL_IN8                          _UINT32_(13)
919 #define PINMUX_PB08N_CCL_IN8                       ((PIN_PB08N_CCL_IN8 << 16) | MUX_PB08N_CCL_IN8)
920 #define PORT_PB08N_CCL_IN8                         (_UINT32_(1) << 8)
921 
922 #define PIN_PB14N_CCL_IN9                          _UINT32_(46)
923 #define MUX_PB14N_CCL_IN9                          _UINT32_(13)
924 #define PINMUX_PB14N_CCL_IN9                       ((PIN_PB14N_CCL_IN9 << 16) | MUX_PB14N_CCL_IN9)
925 #define PORT_PB14N_CCL_IN9                         (_UINT32_(1) << 14)
926 
927 #define PIN_PC20N_CCL_IN9                          _UINT32_(84)
928 #define MUX_PC20N_CCL_IN9                          _UINT32_(13)
929 #define PINMUX_PC20N_CCL_IN9                       ((PIN_PC20N_CCL_IN9 << 16) | MUX_PC20N_CCL_IN9)
930 #define PORT_PC20N_CCL_IN9                         (_UINT32_(1) << 20)
931 
932 #define PIN_PB15N_CCL_IN10                         _UINT32_(47)
933 #define MUX_PB15N_CCL_IN10                         _UINT32_(13)
934 #define PINMUX_PB15N_CCL_IN10                      ((PIN_PB15N_CCL_IN10 << 16) | MUX_PB15N_CCL_IN10)
935 #define PORT_PB15N_CCL_IN10                        (_UINT32_(1) << 15)
936 
937 #define PIN_PC21N_CCL_IN10                         _UINT32_(85)
938 #define MUX_PC21N_CCL_IN10                         _UINT32_(13)
939 #define PINMUX_PC21N_CCL_IN10                      ((PIN_PC21N_CCL_IN10 << 16) | MUX_PC21N_CCL_IN10)
940 #define PORT_PC21N_CCL_IN10                        (_UINT32_(1) << 21)
941 
942 #define PIN_PB10N_CCL_IN11                         _UINT32_(42)
943 #define MUX_PB10N_CCL_IN11                         _UINT32_(13)
944 #define PINMUX_PB10N_CCL_IN11                      ((PIN_PB10N_CCL_IN11 << 16) | MUX_PB10N_CCL_IN11)
945 #define PORT_PB10N_CCL_IN11                        (_UINT32_(1) << 10)
946 
947 #define PIN_PB16N_CCL_IN11                         _UINT32_(48)
948 #define MUX_PB16N_CCL_IN11                         _UINT32_(13)
949 #define PINMUX_PB16N_CCL_IN11                      ((PIN_PB16N_CCL_IN11 << 16) | MUX_PB16N_CCL_IN11)
950 #define PORT_PB16N_CCL_IN11                        (_UINT32_(1) << 16)
951 
952 #define PIN_PA07N_CCL_OUT0                         _UINT32_(7)
953 #define MUX_PA07N_CCL_OUT0                         _UINT32_(13)
954 #define PINMUX_PA07N_CCL_OUT0                      ((PIN_PA07N_CCL_OUT0 << 16) | MUX_PA07N_CCL_OUT0)
955 #define PORT_PA07N_CCL_OUT0                        (_UINT32_(1) << 7)
956 
957 #define PIN_PA19N_CCL_OUT0                         _UINT32_(19)
958 #define MUX_PA19N_CCL_OUT0                         _UINT32_(13)
959 #define PINMUX_PA19N_CCL_OUT0                      ((PIN_PA19N_CCL_OUT0 << 16) | MUX_PA19N_CCL_OUT0)
960 #define PORT_PA19N_CCL_OUT0                        (_UINT32_(1) << 19)
961 
962 #define PIN_PB02N_CCL_OUT0                         _UINT32_(34)
963 #define MUX_PB02N_CCL_OUT0                         _UINT32_(13)
964 #define PINMUX_PB02N_CCL_OUT0                      ((PIN_PB02N_CCL_OUT0 << 16) | MUX_PB02N_CCL_OUT0)
965 #define PORT_PB02N_CCL_OUT0                        (_UINT32_(1) << 2)
966 
967 #define PIN_PB23N_CCL_OUT0                         _UINT32_(55)
968 #define MUX_PB23N_CCL_OUT0                         _UINT32_(13)
969 #define PINMUX_PB23N_CCL_OUT0                      ((PIN_PB23N_CCL_OUT0 << 16) | MUX_PB23N_CCL_OUT0)
970 #define PORT_PB23N_CCL_OUT0                        (_UINT32_(1) << 23)
971 
972 #define PIN_PA11N_CCL_OUT1                         _UINT32_(11)
973 #define MUX_PA11N_CCL_OUT1                         _UINT32_(13)
974 #define PINMUX_PA11N_CCL_OUT1                      ((PIN_PA11N_CCL_OUT1 << 16) | MUX_PA11N_CCL_OUT1)
975 #define PORT_PA11N_CCL_OUT1                        (_UINT32_(1) << 11)
976 
977 #define PIN_PA31N_CCL_OUT1                         _UINT32_(31)
978 #define MUX_PA31N_CCL_OUT1                         _UINT32_(13)
979 #define PINMUX_PA31N_CCL_OUT1                      ((PIN_PA31N_CCL_OUT1 << 16) | MUX_PA31N_CCL_OUT1)
980 #define PORT_PA31N_CCL_OUT1                        (_UINT32_(1) << 31)
981 
982 #define PIN_PB11N_CCL_OUT1                         _UINT32_(43)
983 #define MUX_PB11N_CCL_OUT1                         _UINT32_(13)
984 #define PINMUX_PB11N_CCL_OUT1                      ((PIN_PB11N_CCL_OUT1 << 16) | MUX_PB11N_CCL_OUT1)
985 #define PORT_PB11N_CCL_OUT1                        (_UINT32_(1) << 11)
986 
987 #define PIN_PA25N_CCL_OUT2                         _UINT32_(25)
988 #define MUX_PA25N_CCL_OUT2                         _UINT32_(13)
989 #define PINMUX_PA25N_CCL_OUT2                      ((PIN_PA25N_CCL_OUT2 << 16) | MUX_PA25N_CCL_OUT2)
990 #define PORT_PA25N_CCL_OUT2                        (_UINT32_(1) << 25)
991 
992 #define PIN_PB09N_CCL_OUT2                         _UINT32_(41)
993 #define MUX_PB09N_CCL_OUT2                         _UINT32_(13)
994 #define PINMUX_PB09N_CCL_OUT2                      ((PIN_PB09N_CCL_OUT2 << 16) | MUX_PB09N_CCL_OUT2)
995 #define PORT_PB09N_CCL_OUT2                        (_UINT32_(1) << 9)
996 
997 #define PIN_PB17N_CCL_OUT3                         _UINT32_(49)
998 #define MUX_PB17N_CCL_OUT3                         _UINT32_(13)
999 #define PINMUX_PB17N_CCL_OUT3                      ((PIN_PB17N_CCL_OUT3 << 16) | MUX_PB17N_CCL_OUT3)
1000 #define PORT_PB17N_CCL_OUT3                        (_UINT32_(1) << 17)
1001 
1002 /* =================== PORT definition for DAC peripheral =================== */
1003 #define PIN_PA02B_DAC_VOUT0                        _UINT32_(2)
1004 #define MUX_PA02B_DAC_VOUT0                        _UINT32_(1)
1005 #define PINMUX_PA02B_DAC_VOUT0                     ((PIN_PA02B_DAC_VOUT0 << 16) | MUX_PA02B_DAC_VOUT0)
1006 #define PORT_PA02B_DAC_VOUT0                       (_UINT32_(1) << 2)
1007 
1008 #define PIN_PA05B_DAC_VOUT1                        _UINT32_(5)
1009 #define MUX_PA05B_DAC_VOUT1                        _UINT32_(1)
1010 #define PINMUX_PA05B_DAC_VOUT1                     ((PIN_PA05B_DAC_VOUT1 << 16) | MUX_PA05B_DAC_VOUT1)
1011 #define PORT_PA05B_DAC_VOUT1                       (_UINT32_(1) << 5)
1012 
1013 /* =================== PORT definition for EIC peripheral =================== */
1014 #define PIN_PA00A_EIC_EXTINT0                      _UINT32_(0)
1015 #define MUX_PA00A_EIC_EXTINT0                      _UINT32_(0)
1016 #define PINMUX_PA00A_EIC_EXTINT0                   ((PIN_PA00A_EIC_EXTINT0 << 16) | MUX_PA00A_EIC_EXTINT0)
1017 #define PORT_PA00A_EIC_EXTINT0                     (_UINT32_(1) << 0)
1018 #define PIN_PA00A_EIC_EXTINT_NUM                   _UINT32_(0)  /* EIC signal: PIN_PA00 External Interrupt Line */
1019 
1020 #define PIN_PA16A_EIC_EXTINT0                      _UINT32_(16)
1021 #define MUX_PA16A_EIC_EXTINT0                      _UINT32_(0)
1022 #define PINMUX_PA16A_EIC_EXTINT0                   ((PIN_PA16A_EIC_EXTINT0 << 16) | MUX_PA16A_EIC_EXTINT0)
1023 #define PORT_PA16A_EIC_EXTINT0                     (_UINT32_(1) << 16)
1024 #define PIN_PA16A_EIC_EXTINT_NUM                   _UINT32_(0)  /* EIC signal: PIN_PA16 External Interrupt Line */
1025 
1026 #define PIN_PB00A_EIC_EXTINT0                      _UINT32_(32)
1027 #define MUX_PB00A_EIC_EXTINT0                      _UINT32_(0)
1028 #define PINMUX_PB00A_EIC_EXTINT0                   ((PIN_PB00A_EIC_EXTINT0 << 16) | MUX_PB00A_EIC_EXTINT0)
1029 #define PORT_PB00A_EIC_EXTINT0                     (_UINT32_(1) << 0)
1030 #define PIN_PB00A_EIC_EXTINT_NUM                   _UINT32_(0)  /* EIC signal: PIN_PB00 External Interrupt Line */
1031 
1032 #define PIN_PB16A_EIC_EXTINT0                      _UINT32_(48)
1033 #define MUX_PB16A_EIC_EXTINT0                      _UINT32_(0)
1034 #define PINMUX_PB16A_EIC_EXTINT0                   ((PIN_PB16A_EIC_EXTINT0 << 16) | MUX_PB16A_EIC_EXTINT0)
1035 #define PORT_PB16A_EIC_EXTINT0                     (_UINT32_(1) << 16)
1036 #define PIN_PB16A_EIC_EXTINT_NUM                   _UINT32_(0)  /* EIC signal: PIN_PB16 External Interrupt Line */
1037 
1038 #define PIN_PC00A_EIC_EXTINT0                      _UINT32_(64)
1039 #define MUX_PC00A_EIC_EXTINT0                      _UINT32_(0)
1040 #define PINMUX_PC00A_EIC_EXTINT0                   ((PIN_PC00A_EIC_EXTINT0 << 16) | MUX_PC00A_EIC_EXTINT0)
1041 #define PORT_PC00A_EIC_EXTINT0                     (_UINT32_(1) << 0)
1042 #define PIN_PC00A_EIC_EXTINT_NUM                   _UINT32_(0)  /* EIC signal: PIN_PC00 External Interrupt Line */
1043 
1044 #define PIN_PC16A_EIC_EXTINT0                      _UINT32_(80)
1045 #define MUX_PC16A_EIC_EXTINT0                      _UINT32_(0)
1046 #define PINMUX_PC16A_EIC_EXTINT0                   ((PIN_PC16A_EIC_EXTINT0 << 16) | MUX_PC16A_EIC_EXTINT0)
1047 #define PORT_PC16A_EIC_EXTINT0                     (_UINT32_(1) << 16)
1048 #define PIN_PC16A_EIC_EXTINT_NUM                   _UINT32_(0)  /* EIC signal: PIN_PC16 External Interrupt Line */
1049 
1050 #define PIN_PD00A_EIC_EXTINT0                      _UINT32_(96)
1051 #define MUX_PD00A_EIC_EXTINT0                      _UINT32_(0)
1052 #define PINMUX_PD00A_EIC_EXTINT0                   ((PIN_PD00A_EIC_EXTINT0 << 16) | MUX_PD00A_EIC_EXTINT0)
1053 #define PORT_PD00A_EIC_EXTINT0                     (_UINT32_(1) << 0)
1054 #define PIN_PD00A_EIC_EXTINT_NUM                   _UINT32_(0)  /* EIC signal: PIN_PD00 External Interrupt Line */
1055 
1056 #define PIN_PA01A_EIC_EXTINT1                      _UINT32_(1)
1057 #define MUX_PA01A_EIC_EXTINT1                      _UINT32_(0)
1058 #define PINMUX_PA01A_EIC_EXTINT1                   ((PIN_PA01A_EIC_EXTINT1 << 16) | MUX_PA01A_EIC_EXTINT1)
1059 #define PORT_PA01A_EIC_EXTINT1                     (_UINT32_(1) << 1)
1060 #define PIN_PA01A_EIC_EXTINT_NUM                   _UINT32_(1)  /* EIC signal: PIN_PA01 External Interrupt Line */
1061 
1062 #define PIN_PA17A_EIC_EXTINT1                      _UINT32_(17)
1063 #define MUX_PA17A_EIC_EXTINT1                      _UINT32_(0)
1064 #define PINMUX_PA17A_EIC_EXTINT1                   ((PIN_PA17A_EIC_EXTINT1 << 16) | MUX_PA17A_EIC_EXTINT1)
1065 #define PORT_PA17A_EIC_EXTINT1                     (_UINT32_(1) << 17)
1066 #define PIN_PA17A_EIC_EXTINT_NUM                   _UINT32_(1)  /* EIC signal: PIN_PA17 External Interrupt Line */
1067 
1068 #define PIN_PB01A_EIC_EXTINT1                      _UINT32_(33)
1069 #define MUX_PB01A_EIC_EXTINT1                      _UINT32_(0)
1070 #define PINMUX_PB01A_EIC_EXTINT1                   ((PIN_PB01A_EIC_EXTINT1 << 16) | MUX_PB01A_EIC_EXTINT1)
1071 #define PORT_PB01A_EIC_EXTINT1                     (_UINT32_(1) << 1)
1072 #define PIN_PB01A_EIC_EXTINT_NUM                   _UINT32_(1)  /* EIC signal: PIN_PB01 External Interrupt Line */
1073 
1074 #define PIN_PB17A_EIC_EXTINT1                      _UINT32_(49)
1075 #define MUX_PB17A_EIC_EXTINT1                      _UINT32_(0)
1076 #define PINMUX_PB17A_EIC_EXTINT1                   ((PIN_PB17A_EIC_EXTINT1 << 16) | MUX_PB17A_EIC_EXTINT1)
1077 #define PORT_PB17A_EIC_EXTINT1                     (_UINT32_(1) << 17)
1078 #define PIN_PB17A_EIC_EXTINT_NUM                   _UINT32_(1)  /* EIC signal: PIN_PB17 External Interrupt Line */
1079 
1080 #define PIN_PC01A_EIC_EXTINT1                      _UINT32_(65)
1081 #define MUX_PC01A_EIC_EXTINT1                      _UINT32_(0)
1082 #define PINMUX_PC01A_EIC_EXTINT1                   ((PIN_PC01A_EIC_EXTINT1 << 16) | MUX_PC01A_EIC_EXTINT1)
1083 #define PORT_PC01A_EIC_EXTINT1                     (_UINT32_(1) << 1)
1084 #define PIN_PC01A_EIC_EXTINT_NUM                   _UINT32_(1)  /* EIC signal: PIN_PC01 External Interrupt Line */
1085 
1086 #define PIN_PC17A_EIC_EXTINT1                      _UINT32_(81)
1087 #define MUX_PC17A_EIC_EXTINT1                      _UINT32_(0)
1088 #define PINMUX_PC17A_EIC_EXTINT1                   ((PIN_PC17A_EIC_EXTINT1 << 16) | MUX_PC17A_EIC_EXTINT1)
1089 #define PORT_PC17A_EIC_EXTINT1                     (_UINT32_(1) << 17)
1090 #define PIN_PC17A_EIC_EXTINT_NUM                   _UINT32_(1)  /* EIC signal: PIN_PC17 External Interrupt Line */
1091 
1092 #define PIN_PD01A_EIC_EXTINT1                      _UINT32_(97)
1093 #define MUX_PD01A_EIC_EXTINT1                      _UINT32_(0)
1094 #define PINMUX_PD01A_EIC_EXTINT1                   ((PIN_PD01A_EIC_EXTINT1 << 16) | MUX_PD01A_EIC_EXTINT1)
1095 #define PORT_PD01A_EIC_EXTINT1                     (_UINT32_(1) << 1)
1096 #define PIN_PD01A_EIC_EXTINT_NUM                   _UINT32_(1)  /* EIC signal: PIN_PD01 External Interrupt Line */
1097 
1098 #define PIN_PA02A_EIC_EXTINT2                      _UINT32_(2)
1099 #define MUX_PA02A_EIC_EXTINT2                      _UINT32_(0)
1100 #define PINMUX_PA02A_EIC_EXTINT2                   ((PIN_PA02A_EIC_EXTINT2 << 16) | MUX_PA02A_EIC_EXTINT2)
1101 #define PORT_PA02A_EIC_EXTINT2                     (_UINT32_(1) << 2)
1102 #define PIN_PA02A_EIC_EXTINT_NUM                   _UINT32_(2)  /* EIC signal: PIN_PA02 External Interrupt Line */
1103 
1104 #define PIN_PA18A_EIC_EXTINT2                      _UINT32_(18)
1105 #define MUX_PA18A_EIC_EXTINT2                      _UINT32_(0)
1106 #define PINMUX_PA18A_EIC_EXTINT2                   ((PIN_PA18A_EIC_EXTINT2 << 16) | MUX_PA18A_EIC_EXTINT2)
1107 #define PORT_PA18A_EIC_EXTINT2                     (_UINT32_(1) << 18)
1108 #define PIN_PA18A_EIC_EXTINT_NUM                   _UINT32_(2)  /* EIC signal: PIN_PA18 External Interrupt Line */
1109 
1110 #define PIN_PB02A_EIC_EXTINT2                      _UINT32_(34)
1111 #define MUX_PB02A_EIC_EXTINT2                      _UINT32_(0)
1112 #define PINMUX_PB02A_EIC_EXTINT2                   ((PIN_PB02A_EIC_EXTINT2 << 16) | MUX_PB02A_EIC_EXTINT2)
1113 #define PORT_PB02A_EIC_EXTINT2                     (_UINT32_(1) << 2)
1114 #define PIN_PB02A_EIC_EXTINT_NUM                   _UINT32_(2)  /* EIC signal: PIN_PB02 External Interrupt Line */
1115 
1116 #define PIN_PB18A_EIC_EXTINT2                      _UINT32_(50)
1117 #define MUX_PB18A_EIC_EXTINT2                      _UINT32_(0)
1118 #define PINMUX_PB18A_EIC_EXTINT2                   ((PIN_PB18A_EIC_EXTINT2 << 16) | MUX_PB18A_EIC_EXTINT2)
1119 #define PORT_PB18A_EIC_EXTINT2                     (_UINT32_(1) << 18)
1120 #define PIN_PB18A_EIC_EXTINT_NUM                   _UINT32_(2)  /* EIC signal: PIN_PB18 External Interrupt Line */
1121 
1122 #define PIN_PC02A_EIC_EXTINT2                      _UINT32_(66)
1123 #define MUX_PC02A_EIC_EXTINT2                      _UINT32_(0)
1124 #define PINMUX_PC02A_EIC_EXTINT2                   ((PIN_PC02A_EIC_EXTINT2 << 16) | MUX_PC02A_EIC_EXTINT2)
1125 #define PORT_PC02A_EIC_EXTINT2                     (_UINT32_(1) << 2)
1126 #define PIN_PC02A_EIC_EXTINT_NUM                   _UINT32_(2)  /* EIC signal: PIN_PC02 External Interrupt Line */
1127 
1128 #define PIN_PC18A_EIC_EXTINT2                      _UINT32_(82)
1129 #define MUX_PC18A_EIC_EXTINT2                      _UINT32_(0)
1130 #define PINMUX_PC18A_EIC_EXTINT2                   ((PIN_PC18A_EIC_EXTINT2 << 16) | MUX_PC18A_EIC_EXTINT2)
1131 #define PORT_PC18A_EIC_EXTINT2                     (_UINT32_(1) << 18)
1132 #define PIN_PC18A_EIC_EXTINT_NUM                   _UINT32_(2)  /* EIC signal: PIN_PC18 External Interrupt Line */
1133 
1134 #define PIN_PA03A_EIC_EXTINT3                      _UINT32_(3)
1135 #define MUX_PA03A_EIC_EXTINT3                      _UINT32_(0)
1136 #define PINMUX_PA03A_EIC_EXTINT3                   ((PIN_PA03A_EIC_EXTINT3 << 16) | MUX_PA03A_EIC_EXTINT3)
1137 #define PORT_PA03A_EIC_EXTINT3                     (_UINT32_(1) << 3)
1138 #define PIN_PA03A_EIC_EXTINT_NUM                   _UINT32_(3)  /* EIC signal: PIN_PA03 External Interrupt Line */
1139 
1140 #define PIN_PA19A_EIC_EXTINT3                      _UINT32_(19)
1141 #define MUX_PA19A_EIC_EXTINT3                      _UINT32_(0)
1142 #define PINMUX_PA19A_EIC_EXTINT3                   ((PIN_PA19A_EIC_EXTINT3 << 16) | MUX_PA19A_EIC_EXTINT3)
1143 #define PORT_PA19A_EIC_EXTINT3                     (_UINT32_(1) << 19)
1144 #define PIN_PA19A_EIC_EXTINT_NUM                   _UINT32_(3)  /* EIC signal: PIN_PA19 External Interrupt Line */
1145 
1146 #define PIN_PB03A_EIC_EXTINT3                      _UINT32_(35)
1147 #define MUX_PB03A_EIC_EXTINT3                      _UINT32_(0)
1148 #define PINMUX_PB03A_EIC_EXTINT3                   ((PIN_PB03A_EIC_EXTINT3 << 16) | MUX_PB03A_EIC_EXTINT3)
1149 #define PORT_PB03A_EIC_EXTINT3                     (_UINT32_(1) << 3)
1150 #define PIN_PB03A_EIC_EXTINT_NUM                   _UINT32_(3)  /* EIC signal: PIN_PB03 External Interrupt Line */
1151 
1152 #define PIN_PB19A_EIC_EXTINT3                      _UINT32_(51)
1153 #define MUX_PB19A_EIC_EXTINT3                      _UINT32_(0)
1154 #define PINMUX_PB19A_EIC_EXTINT3                   ((PIN_PB19A_EIC_EXTINT3 << 16) | MUX_PB19A_EIC_EXTINT3)
1155 #define PORT_PB19A_EIC_EXTINT3                     (_UINT32_(1) << 19)
1156 #define PIN_PB19A_EIC_EXTINT_NUM                   _UINT32_(3)  /* EIC signal: PIN_PB19 External Interrupt Line */
1157 
1158 #define PIN_PC03A_EIC_EXTINT3                      _UINT32_(67)
1159 #define MUX_PC03A_EIC_EXTINT3                      _UINT32_(0)
1160 #define PINMUX_PC03A_EIC_EXTINT3                   ((PIN_PC03A_EIC_EXTINT3 << 16) | MUX_PC03A_EIC_EXTINT3)
1161 #define PORT_PC03A_EIC_EXTINT3                     (_UINT32_(1) << 3)
1162 #define PIN_PC03A_EIC_EXTINT_NUM                   _UINT32_(3)  /* EIC signal: PIN_PC03 External Interrupt Line */
1163 
1164 #define PIN_PC19A_EIC_EXTINT3                      _UINT32_(83)
1165 #define MUX_PC19A_EIC_EXTINT3                      _UINT32_(0)
1166 #define PINMUX_PC19A_EIC_EXTINT3                   ((PIN_PC19A_EIC_EXTINT3 << 16) | MUX_PC19A_EIC_EXTINT3)
1167 #define PORT_PC19A_EIC_EXTINT3                     (_UINT32_(1) << 19)
1168 #define PIN_PC19A_EIC_EXTINT_NUM                   _UINT32_(3)  /* EIC signal: PIN_PC19 External Interrupt Line */
1169 
1170 #define PIN_PD08A_EIC_EXTINT3                      _UINT32_(104)
1171 #define MUX_PD08A_EIC_EXTINT3                      _UINT32_(0)
1172 #define PINMUX_PD08A_EIC_EXTINT3                   ((PIN_PD08A_EIC_EXTINT3 << 16) | MUX_PD08A_EIC_EXTINT3)
1173 #define PORT_PD08A_EIC_EXTINT3                     (_UINT32_(1) << 8)
1174 #define PIN_PD08A_EIC_EXTINT_NUM                   _UINT32_(3)  /* EIC signal: PIN_PD08 External Interrupt Line */
1175 
1176 #define PIN_PA04A_EIC_EXTINT4                      _UINT32_(4)
1177 #define MUX_PA04A_EIC_EXTINT4                      _UINT32_(0)
1178 #define PINMUX_PA04A_EIC_EXTINT4                   ((PIN_PA04A_EIC_EXTINT4 << 16) | MUX_PA04A_EIC_EXTINT4)
1179 #define PORT_PA04A_EIC_EXTINT4                     (_UINT32_(1) << 4)
1180 #define PIN_PA04A_EIC_EXTINT_NUM                   _UINT32_(4)  /* EIC signal: PIN_PA04 External Interrupt Line */
1181 
1182 #define PIN_PA20A_EIC_EXTINT4                      _UINT32_(20)
1183 #define MUX_PA20A_EIC_EXTINT4                      _UINT32_(0)
1184 #define PINMUX_PA20A_EIC_EXTINT4                   ((PIN_PA20A_EIC_EXTINT4 << 16) | MUX_PA20A_EIC_EXTINT4)
1185 #define PORT_PA20A_EIC_EXTINT4                     (_UINT32_(1) << 20)
1186 #define PIN_PA20A_EIC_EXTINT_NUM                   _UINT32_(4)  /* EIC signal: PIN_PA20 External Interrupt Line */
1187 
1188 #define PIN_PB04A_EIC_EXTINT4                      _UINT32_(36)
1189 #define MUX_PB04A_EIC_EXTINT4                      _UINT32_(0)
1190 #define PINMUX_PB04A_EIC_EXTINT4                   ((PIN_PB04A_EIC_EXTINT4 << 16) | MUX_PB04A_EIC_EXTINT4)
1191 #define PORT_PB04A_EIC_EXTINT4                     (_UINT32_(1) << 4)
1192 #define PIN_PB04A_EIC_EXTINT_NUM                   _UINT32_(4)  /* EIC signal: PIN_PB04 External Interrupt Line */
1193 
1194 #define PIN_PB20A_EIC_EXTINT4                      _UINT32_(52)
1195 #define MUX_PB20A_EIC_EXTINT4                      _UINT32_(0)
1196 #define PINMUX_PB20A_EIC_EXTINT4                   ((PIN_PB20A_EIC_EXTINT4 << 16) | MUX_PB20A_EIC_EXTINT4)
1197 #define PORT_PB20A_EIC_EXTINT4                     (_UINT32_(1) << 20)
1198 #define PIN_PB20A_EIC_EXTINT_NUM                   _UINT32_(4)  /* EIC signal: PIN_PB20 External Interrupt Line */
1199 
1200 #define PIN_PC04A_EIC_EXTINT4                      _UINT32_(68)
1201 #define MUX_PC04A_EIC_EXTINT4                      _UINT32_(0)
1202 #define PINMUX_PC04A_EIC_EXTINT4                   ((PIN_PC04A_EIC_EXTINT4 << 16) | MUX_PC04A_EIC_EXTINT4)
1203 #define PORT_PC04A_EIC_EXTINT4                     (_UINT32_(1) << 4)
1204 #define PIN_PC04A_EIC_EXTINT_NUM                   _UINT32_(4)  /* EIC signal: PIN_PC04 External Interrupt Line */
1205 
1206 #define PIN_PC20A_EIC_EXTINT4                      _UINT32_(84)
1207 #define MUX_PC20A_EIC_EXTINT4                      _UINT32_(0)
1208 #define PINMUX_PC20A_EIC_EXTINT4                   ((PIN_PC20A_EIC_EXTINT4 << 16) | MUX_PC20A_EIC_EXTINT4)
1209 #define PORT_PC20A_EIC_EXTINT4                     (_UINT32_(1) << 20)
1210 #define PIN_PC20A_EIC_EXTINT_NUM                   _UINT32_(4)  /* EIC signal: PIN_PC20 External Interrupt Line */
1211 
1212 #define PIN_PD09A_EIC_EXTINT4                      _UINT32_(105)
1213 #define MUX_PD09A_EIC_EXTINT4                      _UINT32_(0)
1214 #define PINMUX_PD09A_EIC_EXTINT4                   ((PIN_PD09A_EIC_EXTINT4 << 16) | MUX_PD09A_EIC_EXTINT4)
1215 #define PORT_PD09A_EIC_EXTINT4                     (_UINT32_(1) << 9)
1216 #define PIN_PD09A_EIC_EXTINT_NUM                   _UINT32_(4)  /* EIC signal: PIN_PD09 External Interrupt Line */
1217 
1218 #define PIN_PA05A_EIC_EXTINT5                      _UINT32_(5)
1219 #define MUX_PA05A_EIC_EXTINT5                      _UINT32_(0)
1220 #define PINMUX_PA05A_EIC_EXTINT5                   ((PIN_PA05A_EIC_EXTINT5 << 16) | MUX_PA05A_EIC_EXTINT5)
1221 #define PORT_PA05A_EIC_EXTINT5                     (_UINT32_(1) << 5)
1222 #define PIN_PA05A_EIC_EXTINT_NUM                   _UINT32_(5)  /* EIC signal: PIN_PA05 External Interrupt Line */
1223 
1224 #define PIN_PA21A_EIC_EXTINT5                      _UINT32_(21)
1225 #define MUX_PA21A_EIC_EXTINT5                      _UINT32_(0)
1226 #define PINMUX_PA21A_EIC_EXTINT5                   ((PIN_PA21A_EIC_EXTINT5 << 16) | MUX_PA21A_EIC_EXTINT5)
1227 #define PORT_PA21A_EIC_EXTINT5                     (_UINT32_(1) << 21)
1228 #define PIN_PA21A_EIC_EXTINT_NUM                   _UINT32_(5)  /* EIC signal: PIN_PA21 External Interrupt Line */
1229 
1230 #define PIN_PB05A_EIC_EXTINT5                      _UINT32_(37)
1231 #define MUX_PB05A_EIC_EXTINT5                      _UINT32_(0)
1232 #define PINMUX_PB05A_EIC_EXTINT5                   ((PIN_PB05A_EIC_EXTINT5 << 16) | MUX_PB05A_EIC_EXTINT5)
1233 #define PORT_PB05A_EIC_EXTINT5                     (_UINT32_(1) << 5)
1234 #define PIN_PB05A_EIC_EXTINT_NUM                   _UINT32_(5)  /* EIC signal: PIN_PB05 External Interrupt Line */
1235 
1236 #define PIN_PB21A_EIC_EXTINT5                      _UINT32_(53)
1237 #define MUX_PB21A_EIC_EXTINT5                      _UINT32_(0)
1238 #define PINMUX_PB21A_EIC_EXTINT5                   ((PIN_PB21A_EIC_EXTINT5 << 16) | MUX_PB21A_EIC_EXTINT5)
1239 #define PORT_PB21A_EIC_EXTINT5                     (_UINT32_(1) << 21)
1240 #define PIN_PB21A_EIC_EXTINT_NUM                   _UINT32_(5)  /* EIC signal: PIN_PB21 External Interrupt Line */
1241 
1242 #define PIN_PC05A_EIC_EXTINT5                      _UINT32_(69)
1243 #define MUX_PC05A_EIC_EXTINT5                      _UINT32_(0)
1244 #define PINMUX_PC05A_EIC_EXTINT5                   ((PIN_PC05A_EIC_EXTINT5 << 16) | MUX_PC05A_EIC_EXTINT5)
1245 #define PORT_PC05A_EIC_EXTINT5                     (_UINT32_(1) << 5)
1246 #define PIN_PC05A_EIC_EXTINT_NUM                   _UINT32_(5)  /* EIC signal: PIN_PC05 External Interrupt Line */
1247 
1248 #define PIN_PC21A_EIC_EXTINT5                      _UINT32_(85)
1249 #define MUX_PC21A_EIC_EXTINT5                      _UINT32_(0)
1250 #define PINMUX_PC21A_EIC_EXTINT5                   ((PIN_PC21A_EIC_EXTINT5 << 16) | MUX_PC21A_EIC_EXTINT5)
1251 #define PORT_PC21A_EIC_EXTINT5                     (_UINT32_(1) << 21)
1252 #define PIN_PC21A_EIC_EXTINT_NUM                   _UINT32_(5)  /* EIC signal: PIN_PC21 External Interrupt Line */
1253 
1254 #define PIN_PD10A_EIC_EXTINT5                      _UINT32_(106)
1255 #define MUX_PD10A_EIC_EXTINT5                      _UINT32_(0)
1256 #define PINMUX_PD10A_EIC_EXTINT5                   ((PIN_PD10A_EIC_EXTINT5 << 16) | MUX_PD10A_EIC_EXTINT5)
1257 #define PORT_PD10A_EIC_EXTINT5                     (_UINT32_(1) << 10)
1258 #define PIN_PD10A_EIC_EXTINT_NUM                   _UINT32_(5)  /* EIC signal: PIN_PD10 External Interrupt Line */
1259 
1260 #define PIN_PA06A_EIC_EXTINT6                      _UINT32_(6)
1261 #define MUX_PA06A_EIC_EXTINT6                      _UINT32_(0)
1262 #define PINMUX_PA06A_EIC_EXTINT6                   ((PIN_PA06A_EIC_EXTINT6 << 16) | MUX_PA06A_EIC_EXTINT6)
1263 #define PORT_PA06A_EIC_EXTINT6                     (_UINT32_(1) << 6)
1264 #define PIN_PA06A_EIC_EXTINT_NUM                   _UINT32_(6)  /* EIC signal: PIN_PA06 External Interrupt Line */
1265 
1266 #define PIN_PA22A_EIC_EXTINT6                      _UINT32_(22)
1267 #define MUX_PA22A_EIC_EXTINT6                      _UINT32_(0)
1268 #define PINMUX_PA22A_EIC_EXTINT6                   ((PIN_PA22A_EIC_EXTINT6 << 16) | MUX_PA22A_EIC_EXTINT6)
1269 #define PORT_PA22A_EIC_EXTINT6                     (_UINT32_(1) << 22)
1270 #define PIN_PA22A_EIC_EXTINT_NUM                   _UINT32_(6)  /* EIC signal: PIN_PA22 External Interrupt Line */
1271 
1272 #define PIN_PB06A_EIC_EXTINT6                      _UINT32_(38)
1273 #define MUX_PB06A_EIC_EXTINT6                      _UINT32_(0)
1274 #define PINMUX_PB06A_EIC_EXTINT6                   ((PIN_PB06A_EIC_EXTINT6 << 16) | MUX_PB06A_EIC_EXTINT6)
1275 #define PORT_PB06A_EIC_EXTINT6                     (_UINT32_(1) << 6)
1276 #define PIN_PB06A_EIC_EXTINT_NUM                   _UINT32_(6)  /* EIC signal: PIN_PB06 External Interrupt Line */
1277 
1278 #define PIN_PB22A_EIC_EXTINT6                      _UINT32_(54)
1279 #define MUX_PB22A_EIC_EXTINT6                      _UINT32_(0)
1280 #define PINMUX_PB22A_EIC_EXTINT6                   ((PIN_PB22A_EIC_EXTINT6 << 16) | MUX_PB22A_EIC_EXTINT6)
1281 #define PORT_PB22A_EIC_EXTINT6                     (_UINT32_(1) << 22)
1282 #define PIN_PB22A_EIC_EXTINT_NUM                   _UINT32_(6)  /* EIC signal: PIN_PB22 External Interrupt Line */
1283 
1284 #define PIN_PC06A_EIC_EXTINT6                      _UINT32_(70)
1285 #define MUX_PC06A_EIC_EXTINT6                      _UINT32_(0)
1286 #define PINMUX_PC06A_EIC_EXTINT6                   ((PIN_PC06A_EIC_EXTINT6 << 16) | MUX_PC06A_EIC_EXTINT6)
1287 #define PORT_PC06A_EIC_EXTINT6                     (_UINT32_(1) << 6)
1288 #define PIN_PC06A_EIC_EXTINT_NUM                   _UINT32_(6)  /* EIC signal: PIN_PC06 External Interrupt Line */
1289 
1290 #define PIN_PC22A_EIC_EXTINT6                      _UINT32_(86)
1291 #define MUX_PC22A_EIC_EXTINT6                      _UINT32_(0)
1292 #define PINMUX_PC22A_EIC_EXTINT6                   ((PIN_PC22A_EIC_EXTINT6 << 16) | MUX_PC22A_EIC_EXTINT6)
1293 #define PORT_PC22A_EIC_EXTINT6                     (_UINT32_(1) << 22)
1294 #define PIN_PC22A_EIC_EXTINT_NUM                   _UINT32_(6)  /* EIC signal: PIN_PC22 External Interrupt Line */
1295 
1296 #define PIN_PD11A_EIC_EXTINT6                      _UINT32_(107)
1297 #define MUX_PD11A_EIC_EXTINT6                      _UINT32_(0)
1298 #define PINMUX_PD11A_EIC_EXTINT6                   ((PIN_PD11A_EIC_EXTINT6 << 16) | MUX_PD11A_EIC_EXTINT6)
1299 #define PORT_PD11A_EIC_EXTINT6                     (_UINT32_(1) << 11)
1300 #define PIN_PD11A_EIC_EXTINT_NUM                   _UINT32_(6)  /* EIC signal: PIN_PD11 External Interrupt Line */
1301 
1302 #define PIN_PA07A_EIC_EXTINT7                      _UINT32_(7)
1303 #define MUX_PA07A_EIC_EXTINT7                      _UINT32_(0)
1304 #define PINMUX_PA07A_EIC_EXTINT7                   ((PIN_PA07A_EIC_EXTINT7 << 16) | MUX_PA07A_EIC_EXTINT7)
1305 #define PORT_PA07A_EIC_EXTINT7                     (_UINT32_(1) << 7)
1306 #define PIN_PA07A_EIC_EXTINT_NUM                   _UINT32_(7)  /* EIC signal: PIN_PA07 External Interrupt Line */
1307 
1308 #define PIN_PA23A_EIC_EXTINT7                      _UINT32_(23)
1309 #define MUX_PA23A_EIC_EXTINT7                      _UINT32_(0)
1310 #define PINMUX_PA23A_EIC_EXTINT7                   ((PIN_PA23A_EIC_EXTINT7 << 16) | MUX_PA23A_EIC_EXTINT7)
1311 #define PORT_PA23A_EIC_EXTINT7                     (_UINT32_(1) << 23)
1312 #define PIN_PA23A_EIC_EXTINT_NUM                   _UINT32_(7)  /* EIC signal: PIN_PA23 External Interrupt Line */
1313 
1314 #define PIN_PB07A_EIC_EXTINT7                      _UINT32_(39)
1315 #define MUX_PB07A_EIC_EXTINT7                      _UINT32_(0)
1316 #define PINMUX_PB07A_EIC_EXTINT7                   ((PIN_PB07A_EIC_EXTINT7 << 16) | MUX_PB07A_EIC_EXTINT7)
1317 #define PORT_PB07A_EIC_EXTINT7                     (_UINT32_(1) << 7)
1318 #define PIN_PB07A_EIC_EXTINT_NUM                   _UINT32_(7)  /* EIC signal: PIN_PB07 External Interrupt Line */
1319 
1320 #define PIN_PB23A_EIC_EXTINT7                      _UINT32_(55)
1321 #define MUX_PB23A_EIC_EXTINT7                      _UINT32_(0)
1322 #define PINMUX_PB23A_EIC_EXTINT7                   ((PIN_PB23A_EIC_EXTINT7 << 16) | MUX_PB23A_EIC_EXTINT7)
1323 #define PORT_PB23A_EIC_EXTINT7                     (_UINT32_(1) << 23)
1324 #define PIN_PB23A_EIC_EXTINT_NUM                   _UINT32_(7)  /* EIC signal: PIN_PB23 External Interrupt Line */
1325 
1326 #define PIN_PC23A_EIC_EXTINT7                      _UINT32_(87)
1327 #define MUX_PC23A_EIC_EXTINT7                      _UINT32_(0)
1328 #define PINMUX_PC23A_EIC_EXTINT7                   ((PIN_PC23A_EIC_EXTINT7 << 16) | MUX_PC23A_EIC_EXTINT7)
1329 #define PORT_PC23A_EIC_EXTINT7                     (_UINT32_(1) << 23)
1330 #define PIN_PC23A_EIC_EXTINT_NUM                   _UINT32_(7)  /* EIC signal: PIN_PC23 External Interrupt Line */
1331 
1332 #define PIN_PD12A_EIC_EXTINT7                      _UINT32_(108)
1333 #define MUX_PD12A_EIC_EXTINT7                      _UINT32_(0)
1334 #define PINMUX_PD12A_EIC_EXTINT7                   ((PIN_PD12A_EIC_EXTINT7 << 16) | MUX_PD12A_EIC_EXTINT7)
1335 #define PORT_PD12A_EIC_EXTINT7                     (_UINT32_(1) << 12)
1336 #define PIN_PD12A_EIC_EXTINT_NUM                   _UINT32_(7)  /* EIC signal: PIN_PD12 External Interrupt Line */
1337 
1338 #define PIN_PA24A_EIC_EXTINT8                      _UINT32_(24)
1339 #define MUX_PA24A_EIC_EXTINT8                      _UINT32_(0)
1340 #define PINMUX_PA24A_EIC_EXTINT8                   ((PIN_PA24A_EIC_EXTINT8 << 16) | MUX_PA24A_EIC_EXTINT8)
1341 #define PORT_PA24A_EIC_EXTINT8                     (_UINT32_(1) << 24)
1342 #define PIN_PA24A_EIC_EXTINT_NUM                   _UINT32_(8)  /* EIC signal: PIN_PA24 External Interrupt Line */
1343 
1344 #define PIN_PB08A_EIC_EXTINT8                      _UINT32_(40)
1345 #define MUX_PB08A_EIC_EXTINT8                      _UINT32_(0)
1346 #define PINMUX_PB08A_EIC_EXTINT8                   ((PIN_PB08A_EIC_EXTINT8 << 16) | MUX_PB08A_EIC_EXTINT8)
1347 #define PORT_PB08A_EIC_EXTINT8                     (_UINT32_(1) << 8)
1348 #define PIN_PB08A_EIC_EXTINT_NUM                   _UINT32_(8)  /* EIC signal: PIN_PB08 External Interrupt Line */
1349 
1350 #define PIN_PB24A_EIC_EXTINT8                      _UINT32_(56)
1351 #define MUX_PB24A_EIC_EXTINT8                      _UINT32_(0)
1352 #define PINMUX_PB24A_EIC_EXTINT8                   ((PIN_PB24A_EIC_EXTINT8 << 16) | MUX_PB24A_EIC_EXTINT8)
1353 #define PORT_PB24A_EIC_EXTINT8                     (_UINT32_(1) << 24)
1354 #define PIN_PB24A_EIC_EXTINT_NUM                   _UINT32_(8)  /* EIC signal: PIN_PB24 External Interrupt Line */
1355 
1356 #define PIN_PC24A_EIC_EXTINT8                      _UINT32_(88)
1357 #define MUX_PC24A_EIC_EXTINT8                      _UINT32_(0)
1358 #define PINMUX_PC24A_EIC_EXTINT8                   ((PIN_PC24A_EIC_EXTINT8 << 16) | MUX_PC24A_EIC_EXTINT8)
1359 #define PORT_PC24A_EIC_EXTINT8                     (_UINT32_(1) << 24)
1360 #define PIN_PC24A_EIC_EXTINT_NUM                   _UINT32_(8)  /* EIC signal: PIN_PC24 External Interrupt Line */
1361 
1362 #define PIN_PA09A_EIC_EXTINT9                      _UINT32_(9)
1363 #define MUX_PA09A_EIC_EXTINT9                      _UINT32_(0)
1364 #define PINMUX_PA09A_EIC_EXTINT9                   ((PIN_PA09A_EIC_EXTINT9 << 16) | MUX_PA09A_EIC_EXTINT9)
1365 #define PORT_PA09A_EIC_EXTINT9                     (_UINT32_(1) << 9)
1366 #define PIN_PA09A_EIC_EXTINT_NUM                   _UINT32_(9)  /* EIC signal: PIN_PA09 External Interrupt Line */
1367 
1368 #define PIN_PA25A_EIC_EXTINT9                      _UINT32_(25)
1369 #define MUX_PA25A_EIC_EXTINT9                      _UINT32_(0)
1370 #define PINMUX_PA25A_EIC_EXTINT9                   ((PIN_PA25A_EIC_EXTINT9 << 16) | MUX_PA25A_EIC_EXTINT9)
1371 #define PORT_PA25A_EIC_EXTINT9                     (_UINT32_(1) << 25)
1372 #define PIN_PA25A_EIC_EXTINT_NUM                   _UINT32_(9)  /* EIC signal: PIN_PA25 External Interrupt Line */
1373 
1374 #define PIN_PB09A_EIC_EXTINT9                      _UINT32_(41)
1375 #define MUX_PB09A_EIC_EXTINT9                      _UINT32_(0)
1376 #define PINMUX_PB09A_EIC_EXTINT9                   ((PIN_PB09A_EIC_EXTINT9 << 16) | MUX_PB09A_EIC_EXTINT9)
1377 #define PORT_PB09A_EIC_EXTINT9                     (_UINT32_(1) << 9)
1378 #define PIN_PB09A_EIC_EXTINT_NUM                   _UINT32_(9)  /* EIC signal: PIN_PB09 External Interrupt Line */
1379 
1380 #define PIN_PB25A_EIC_EXTINT9                      _UINT32_(57)
1381 #define MUX_PB25A_EIC_EXTINT9                      _UINT32_(0)
1382 #define PINMUX_PB25A_EIC_EXTINT9                   ((PIN_PB25A_EIC_EXTINT9 << 16) | MUX_PB25A_EIC_EXTINT9)
1383 #define PORT_PB25A_EIC_EXTINT9                     (_UINT32_(1) << 25)
1384 #define PIN_PB25A_EIC_EXTINT_NUM                   _UINT32_(9)  /* EIC signal: PIN_PB25 External Interrupt Line */
1385 
1386 #define PIN_PC07A_EIC_EXTINT9                      _UINT32_(71)
1387 #define MUX_PC07A_EIC_EXTINT9                      _UINT32_(0)
1388 #define PINMUX_PC07A_EIC_EXTINT9                   ((PIN_PC07A_EIC_EXTINT9 << 16) | MUX_PC07A_EIC_EXTINT9)
1389 #define PORT_PC07A_EIC_EXTINT9                     (_UINT32_(1) << 7)
1390 #define PIN_PC07A_EIC_EXTINT_NUM                   _UINT32_(9)  /* EIC signal: PIN_PC07 External Interrupt Line */
1391 
1392 #define PIN_PC25A_EIC_EXTINT9                      _UINT32_(89)
1393 #define MUX_PC25A_EIC_EXTINT9                      _UINT32_(0)
1394 #define PINMUX_PC25A_EIC_EXTINT9                   ((PIN_PC25A_EIC_EXTINT9 << 16) | MUX_PC25A_EIC_EXTINT9)
1395 #define PORT_PC25A_EIC_EXTINT9                     (_UINT32_(1) << 25)
1396 #define PIN_PC25A_EIC_EXTINT_NUM                   _UINT32_(9)  /* EIC signal: PIN_PC25 External Interrupt Line */
1397 
1398 #define PIN_PA10A_EIC_EXTINT10                     _UINT32_(10)
1399 #define MUX_PA10A_EIC_EXTINT10                     _UINT32_(0)
1400 #define PINMUX_PA10A_EIC_EXTINT10                  ((PIN_PA10A_EIC_EXTINT10 << 16) | MUX_PA10A_EIC_EXTINT10)
1401 #define PORT_PA10A_EIC_EXTINT10                    (_UINT32_(1) << 10)
1402 #define PIN_PA10A_EIC_EXTINT_NUM                   _UINT32_(10) /* EIC signal: PIN_PA10 External Interrupt Line */
1403 
1404 #define PIN_PB10A_EIC_EXTINT10                     _UINT32_(42)
1405 #define MUX_PB10A_EIC_EXTINT10                     _UINT32_(0)
1406 #define PINMUX_PB10A_EIC_EXTINT10                  ((PIN_PB10A_EIC_EXTINT10 << 16) | MUX_PB10A_EIC_EXTINT10)
1407 #define PORT_PB10A_EIC_EXTINT10                    (_UINT32_(1) << 10)
1408 #define PIN_PB10A_EIC_EXTINT_NUM                   _UINT32_(10) /* EIC signal: PIN_PB10 External Interrupt Line */
1409 
1410 #define PIN_PC10A_EIC_EXTINT10                     _UINT32_(74)
1411 #define MUX_PC10A_EIC_EXTINT10                     _UINT32_(0)
1412 #define PINMUX_PC10A_EIC_EXTINT10                  ((PIN_PC10A_EIC_EXTINT10 << 16) | MUX_PC10A_EIC_EXTINT10)
1413 #define PORT_PC10A_EIC_EXTINT10                    (_UINT32_(1) << 10)
1414 #define PIN_PC10A_EIC_EXTINT_NUM                   _UINT32_(10) /* EIC signal: PIN_PC10 External Interrupt Line */
1415 
1416 #define PIN_PC26A_EIC_EXTINT10                     _UINT32_(90)
1417 #define MUX_PC26A_EIC_EXTINT10                     _UINT32_(0)
1418 #define PINMUX_PC26A_EIC_EXTINT10                  ((PIN_PC26A_EIC_EXTINT10 << 16) | MUX_PC26A_EIC_EXTINT10)
1419 #define PORT_PC26A_EIC_EXTINT10                    (_UINT32_(1) << 26)
1420 #define PIN_PC26A_EIC_EXTINT_NUM                   _UINT32_(10) /* EIC signal: PIN_PC26 External Interrupt Line */
1421 
1422 #define PIN_PD20A_EIC_EXTINT10                     _UINT32_(116)
1423 #define MUX_PD20A_EIC_EXTINT10                     _UINT32_(0)
1424 #define PINMUX_PD20A_EIC_EXTINT10                  ((PIN_PD20A_EIC_EXTINT10 << 16) | MUX_PD20A_EIC_EXTINT10)
1425 #define PORT_PD20A_EIC_EXTINT10                    (_UINT32_(1) << 20)
1426 #define PIN_PD20A_EIC_EXTINT_NUM                   _UINT32_(10) /* EIC signal: PIN_PD20 External Interrupt Line */
1427 
1428 #define PIN_PA11A_EIC_EXTINT11                     _UINT32_(11)
1429 #define MUX_PA11A_EIC_EXTINT11                     _UINT32_(0)
1430 #define PINMUX_PA11A_EIC_EXTINT11                  ((PIN_PA11A_EIC_EXTINT11 << 16) | MUX_PA11A_EIC_EXTINT11)
1431 #define PORT_PA11A_EIC_EXTINT11                    (_UINT32_(1) << 11)
1432 #define PIN_PA11A_EIC_EXTINT_NUM                   _UINT32_(11) /* EIC signal: PIN_PA11 External Interrupt Line */
1433 
1434 #define PIN_PA27A_EIC_EXTINT11                     _UINT32_(27)
1435 #define MUX_PA27A_EIC_EXTINT11                     _UINT32_(0)
1436 #define PINMUX_PA27A_EIC_EXTINT11                  ((PIN_PA27A_EIC_EXTINT11 << 16) | MUX_PA27A_EIC_EXTINT11)
1437 #define PORT_PA27A_EIC_EXTINT11                    (_UINT32_(1) << 27)
1438 #define PIN_PA27A_EIC_EXTINT_NUM                   _UINT32_(11) /* EIC signal: PIN_PA27 External Interrupt Line */
1439 
1440 #define PIN_PB11A_EIC_EXTINT11                     _UINT32_(43)
1441 #define MUX_PB11A_EIC_EXTINT11                     _UINT32_(0)
1442 #define PINMUX_PB11A_EIC_EXTINT11                  ((PIN_PB11A_EIC_EXTINT11 << 16) | MUX_PB11A_EIC_EXTINT11)
1443 #define PORT_PB11A_EIC_EXTINT11                    (_UINT32_(1) << 11)
1444 #define PIN_PB11A_EIC_EXTINT_NUM                   _UINT32_(11) /* EIC signal: PIN_PB11 External Interrupt Line */
1445 
1446 #define PIN_PC11A_EIC_EXTINT11                     _UINT32_(75)
1447 #define MUX_PC11A_EIC_EXTINT11                     _UINT32_(0)
1448 #define PINMUX_PC11A_EIC_EXTINT11                  ((PIN_PC11A_EIC_EXTINT11 << 16) | MUX_PC11A_EIC_EXTINT11)
1449 #define PORT_PC11A_EIC_EXTINT11                    (_UINT32_(1) << 11)
1450 #define PIN_PC11A_EIC_EXTINT_NUM                   _UINT32_(11) /* EIC signal: PIN_PC11 External Interrupt Line */
1451 
1452 #define PIN_PC27A_EIC_EXTINT11                     _UINT32_(91)
1453 #define MUX_PC27A_EIC_EXTINT11                     _UINT32_(0)
1454 #define PINMUX_PC27A_EIC_EXTINT11                  ((PIN_PC27A_EIC_EXTINT11 << 16) | MUX_PC27A_EIC_EXTINT11)
1455 #define PORT_PC27A_EIC_EXTINT11                    (_UINT32_(1) << 27)
1456 #define PIN_PC27A_EIC_EXTINT_NUM                   _UINT32_(11) /* EIC signal: PIN_PC27 External Interrupt Line */
1457 
1458 #define PIN_PD21A_EIC_EXTINT11                     _UINT32_(117)
1459 #define MUX_PD21A_EIC_EXTINT11                     _UINT32_(0)
1460 #define PINMUX_PD21A_EIC_EXTINT11                  ((PIN_PD21A_EIC_EXTINT11 << 16) | MUX_PD21A_EIC_EXTINT11)
1461 #define PORT_PD21A_EIC_EXTINT11                    (_UINT32_(1) << 21)
1462 #define PIN_PD21A_EIC_EXTINT_NUM                   _UINT32_(11) /* EIC signal: PIN_PD21 External Interrupt Line */
1463 
1464 #define PIN_PA12A_EIC_EXTINT12                     _UINT32_(12)
1465 #define MUX_PA12A_EIC_EXTINT12                     _UINT32_(0)
1466 #define PINMUX_PA12A_EIC_EXTINT12                  ((PIN_PA12A_EIC_EXTINT12 << 16) | MUX_PA12A_EIC_EXTINT12)
1467 #define PORT_PA12A_EIC_EXTINT12                    (_UINT32_(1) << 12)
1468 #define PIN_PA12A_EIC_EXTINT_NUM                   _UINT32_(12) /* EIC signal: PIN_PA12 External Interrupt Line */
1469 
1470 #define PIN_PB12A_EIC_EXTINT12                     _UINT32_(44)
1471 #define MUX_PB12A_EIC_EXTINT12                     _UINT32_(0)
1472 #define PINMUX_PB12A_EIC_EXTINT12                  ((PIN_PB12A_EIC_EXTINT12 << 16) | MUX_PB12A_EIC_EXTINT12)
1473 #define PORT_PB12A_EIC_EXTINT12                    (_UINT32_(1) << 12)
1474 #define PIN_PB12A_EIC_EXTINT_NUM                   _UINT32_(12) /* EIC signal: PIN_PB12 External Interrupt Line */
1475 
1476 #define PIN_PB26A_EIC_EXTINT12                     _UINT32_(58)
1477 #define MUX_PB26A_EIC_EXTINT12                     _UINT32_(0)
1478 #define PINMUX_PB26A_EIC_EXTINT12                  ((PIN_PB26A_EIC_EXTINT12 << 16) | MUX_PB26A_EIC_EXTINT12)
1479 #define PORT_PB26A_EIC_EXTINT12                    (_UINT32_(1) << 26)
1480 #define PIN_PB26A_EIC_EXTINT_NUM                   _UINT32_(12) /* EIC signal: PIN_PB26 External Interrupt Line */
1481 
1482 #define PIN_PC12A_EIC_EXTINT12                     _UINT32_(76)
1483 #define MUX_PC12A_EIC_EXTINT12                     _UINT32_(0)
1484 #define PINMUX_PC12A_EIC_EXTINT12                  ((PIN_PC12A_EIC_EXTINT12 << 16) | MUX_PC12A_EIC_EXTINT12)
1485 #define PORT_PC12A_EIC_EXTINT12                    (_UINT32_(1) << 12)
1486 #define PIN_PC12A_EIC_EXTINT_NUM                   _UINT32_(12) /* EIC signal: PIN_PC12 External Interrupt Line */
1487 
1488 #define PIN_PC28A_EIC_EXTINT12                     _UINT32_(92)
1489 #define MUX_PC28A_EIC_EXTINT12                     _UINT32_(0)
1490 #define PINMUX_PC28A_EIC_EXTINT12                  ((PIN_PC28A_EIC_EXTINT12 << 16) | MUX_PC28A_EIC_EXTINT12)
1491 #define PORT_PC28A_EIC_EXTINT12                    (_UINT32_(1) << 28)
1492 #define PIN_PC28A_EIC_EXTINT_NUM                   _UINT32_(12) /* EIC signal: PIN_PC28 External Interrupt Line */
1493 
1494 #define PIN_PA13A_EIC_EXTINT13                     _UINT32_(13)
1495 #define MUX_PA13A_EIC_EXTINT13                     _UINT32_(0)
1496 #define PINMUX_PA13A_EIC_EXTINT13                  ((PIN_PA13A_EIC_EXTINT13 << 16) | MUX_PA13A_EIC_EXTINT13)
1497 #define PORT_PA13A_EIC_EXTINT13                    (_UINT32_(1) << 13)
1498 #define PIN_PA13A_EIC_EXTINT_NUM                   _UINT32_(13) /* EIC signal: PIN_PA13 External Interrupt Line */
1499 
1500 #define PIN_PB13A_EIC_EXTINT13                     _UINT32_(45)
1501 #define MUX_PB13A_EIC_EXTINT13                     _UINT32_(0)
1502 #define PINMUX_PB13A_EIC_EXTINT13                  ((PIN_PB13A_EIC_EXTINT13 << 16) | MUX_PB13A_EIC_EXTINT13)
1503 #define PORT_PB13A_EIC_EXTINT13                    (_UINT32_(1) << 13)
1504 #define PIN_PB13A_EIC_EXTINT_NUM                   _UINT32_(13) /* EIC signal: PIN_PB13 External Interrupt Line */
1505 
1506 #define PIN_PB27A_EIC_EXTINT13                     _UINT32_(59)
1507 #define MUX_PB27A_EIC_EXTINT13                     _UINT32_(0)
1508 #define PINMUX_PB27A_EIC_EXTINT13                  ((PIN_PB27A_EIC_EXTINT13 << 16) | MUX_PB27A_EIC_EXTINT13)
1509 #define PORT_PB27A_EIC_EXTINT13                    (_UINT32_(1) << 27)
1510 #define PIN_PB27A_EIC_EXTINT_NUM                   _UINT32_(13) /* EIC signal: PIN_PB27 External Interrupt Line */
1511 
1512 #define PIN_PC13A_EIC_EXTINT13                     _UINT32_(77)
1513 #define MUX_PC13A_EIC_EXTINT13                     _UINT32_(0)
1514 #define PINMUX_PC13A_EIC_EXTINT13                  ((PIN_PC13A_EIC_EXTINT13 << 16) | MUX_PC13A_EIC_EXTINT13)
1515 #define PORT_PC13A_EIC_EXTINT13                    (_UINT32_(1) << 13)
1516 #define PIN_PC13A_EIC_EXTINT_NUM                   _UINT32_(13) /* EIC signal: PIN_PC13 External Interrupt Line */
1517 
1518 #define PIN_PA30A_EIC_EXTINT14                     _UINT32_(30)
1519 #define MUX_PA30A_EIC_EXTINT14                     _UINT32_(0)
1520 #define PINMUX_PA30A_EIC_EXTINT14                  ((PIN_PA30A_EIC_EXTINT14 << 16) | MUX_PA30A_EIC_EXTINT14)
1521 #define PORT_PA30A_EIC_EXTINT14                    (_UINT32_(1) << 30)
1522 #define PIN_PA30A_EIC_EXTINT_NUM                   _UINT32_(14) /* EIC signal: PIN_PA30 External Interrupt Line */
1523 
1524 #define PIN_PB14A_EIC_EXTINT14                     _UINT32_(46)
1525 #define MUX_PB14A_EIC_EXTINT14                     _UINT32_(0)
1526 #define PINMUX_PB14A_EIC_EXTINT14                  ((PIN_PB14A_EIC_EXTINT14 << 16) | MUX_PB14A_EIC_EXTINT14)
1527 #define PORT_PB14A_EIC_EXTINT14                    (_UINT32_(1) << 14)
1528 #define PIN_PB14A_EIC_EXTINT_NUM                   _UINT32_(14) /* EIC signal: PIN_PB14 External Interrupt Line */
1529 
1530 #define PIN_PB28A_EIC_EXTINT14                     _UINT32_(60)
1531 #define MUX_PB28A_EIC_EXTINT14                     _UINT32_(0)
1532 #define PINMUX_PB28A_EIC_EXTINT14                  ((PIN_PB28A_EIC_EXTINT14 << 16) | MUX_PB28A_EIC_EXTINT14)
1533 #define PORT_PB28A_EIC_EXTINT14                    (_UINT32_(1) << 28)
1534 #define PIN_PB28A_EIC_EXTINT_NUM                   _UINT32_(14) /* EIC signal: PIN_PB28 External Interrupt Line */
1535 
1536 #define PIN_PB30A_EIC_EXTINT14                     _UINT32_(62)
1537 #define MUX_PB30A_EIC_EXTINT14                     _UINT32_(0)
1538 #define PINMUX_PB30A_EIC_EXTINT14                  ((PIN_PB30A_EIC_EXTINT14 << 16) | MUX_PB30A_EIC_EXTINT14)
1539 #define PORT_PB30A_EIC_EXTINT14                    (_UINT32_(1) << 30)
1540 #define PIN_PB30A_EIC_EXTINT_NUM                   _UINT32_(14) /* EIC signal: PIN_PB30 External Interrupt Line */
1541 
1542 #define PIN_PC14A_EIC_EXTINT14                     _UINT32_(78)
1543 #define MUX_PC14A_EIC_EXTINT14                     _UINT32_(0)
1544 #define PINMUX_PC14A_EIC_EXTINT14                  ((PIN_PC14A_EIC_EXTINT14 << 16) | MUX_PC14A_EIC_EXTINT14)
1545 #define PORT_PC14A_EIC_EXTINT14                    (_UINT32_(1) << 14)
1546 #define PIN_PC14A_EIC_EXTINT_NUM                   _UINT32_(14) /* EIC signal: PIN_PC14 External Interrupt Line */
1547 
1548 #define PIN_PC30A_EIC_EXTINT14                     _UINT32_(94)
1549 #define MUX_PC30A_EIC_EXTINT14                     _UINT32_(0)
1550 #define PINMUX_PC30A_EIC_EXTINT14                  ((PIN_PC30A_EIC_EXTINT14 << 16) | MUX_PC30A_EIC_EXTINT14)
1551 #define PORT_PC30A_EIC_EXTINT14                    (_UINT32_(1) << 30)
1552 #define PIN_PC30A_EIC_EXTINT_NUM                   _UINT32_(14) /* EIC signal: PIN_PC30 External Interrupt Line */
1553 
1554 #define PIN_PA14A_EIC_EXTINT14                     _UINT32_(14)
1555 #define MUX_PA14A_EIC_EXTINT14                     _UINT32_(0)
1556 #define PINMUX_PA14A_EIC_EXTINT14                  ((PIN_PA14A_EIC_EXTINT14 << 16) | MUX_PA14A_EIC_EXTINT14)
1557 #define PORT_PA14A_EIC_EXTINT14                    (_UINT32_(1) << 14)
1558 #define PIN_PA14A_EIC_EXTINT_NUM                   _UINT32_(14) /* EIC signal: PIN_PA14 External Interrupt Line */
1559 
1560 #define PIN_PA15A_EIC_EXTINT15                     _UINT32_(15)
1561 #define MUX_PA15A_EIC_EXTINT15                     _UINT32_(0)
1562 #define PINMUX_PA15A_EIC_EXTINT15                  ((PIN_PA15A_EIC_EXTINT15 << 16) | MUX_PA15A_EIC_EXTINT15)
1563 #define PORT_PA15A_EIC_EXTINT15                    (_UINT32_(1) << 15)
1564 #define PIN_PA15A_EIC_EXTINT_NUM                   _UINT32_(15) /* EIC signal: PIN_PA15 External Interrupt Line */
1565 
1566 #define PIN_PA31A_EIC_EXTINT15                     _UINT32_(31)
1567 #define MUX_PA31A_EIC_EXTINT15                     _UINT32_(0)
1568 #define PINMUX_PA31A_EIC_EXTINT15                  ((PIN_PA31A_EIC_EXTINT15 << 16) | MUX_PA31A_EIC_EXTINT15)
1569 #define PORT_PA31A_EIC_EXTINT15                    (_UINT32_(1) << 31)
1570 #define PIN_PA31A_EIC_EXTINT_NUM                   _UINT32_(15) /* EIC signal: PIN_PA31 External Interrupt Line */
1571 
1572 #define PIN_PB15A_EIC_EXTINT15                     _UINT32_(47)
1573 #define MUX_PB15A_EIC_EXTINT15                     _UINT32_(0)
1574 #define PINMUX_PB15A_EIC_EXTINT15                  ((PIN_PB15A_EIC_EXTINT15 << 16) | MUX_PB15A_EIC_EXTINT15)
1575 #define PORT_PB15A_EIC_EXTINT15                    (_UINT32_(1) << 15)
1576 #define PIN_PB15A_EIC_EXTINT_NUM                   _UINT32_(15) /* EIC signal: PIN_PB15 External Interrupt Line */
1577 
1578 #define PIN_PB29A_EIC_EXTINT15                     _UINT32_(61)
1579 #define MUX_PB29A_EIC_EXTINT15                     _UINT32_(0)
1580 #define PINMUX_PB29A_EIC_EXTINT15                  ((PIN_PB29A_EIC_EXTINT15 << 16) | MUX_PB29A_EIC_EXTINT15)
1581 #define PORT_PB29A_EIC_EXTINT15                    (_UINT32_(1) << 29)
1582 #define PIN_PB29A_EIC_EXTINT_NUM                   _UINT32_(15) /* EIC signal: PIN_PB29 External Interrupt Line */
1583 
1584 #define PIN_PB31A_EIC_EXTINT15                     _UINT32_(63)
1585 #define MUX_PB31A_EIC_EXTINT15                     _UINT32_(0)
1586 #define PINMUX_PB31A_EIC_EXTINT15                  ((PIN_PB31A_EIC_EXTINT15 << 16) | MUX_PB31A_EIC_EXTINT15)
1587 #define PORT_PB31A_EIC_EXTINT15                    (_UINT32_(1) << 31)
1588 #define PIN_PB31A_EIC_EXTINT_NUM                   _UINT32_(15) /* EIC signal: PIN_PB31 External Interrupt Line */
1589 
1590 #define PIN_PC15A_EIC_EXTINT15                     _UINT32_(79)
1591 #define MUX_PC15A_EIC_EXTINT15                     _UINT32_(0)
1592 #define PINMUX_PC15A_EIC_EXTINT15                  ((PIN_PC15A_EIC_EXTINT15 << 16) | MUX_PC15A_EIC_EXTINT15)
1593 #define PORT_PC15A_EIC_EXTINT15                    (_UINT32_(1) << 15)
1594 #define PIN_PC15A_EIC_EXTINT_NUM                   _UINT32_(15) /* EIC signal: PIN_PC15 External Interrupt Line */
1595 
1596 #define PIN_PC31A_EIC_EXTINT15                     _UINT32_(95)
1597 #define MUX_PC31A_EIC_EXTINT15                     _UINT32_(0)
1598 #define PINMUX_PC31A_EIC_EXTINT15                  ((PIN_PC31A_EIC_EXTINT15 << 16) | MUX_PC31A_EIC_EXTINT15)
1599 #define PORT_PC31A_EIC_EXTINT15                    (_UINT32_(1) << 31)
1600 #define PIN_PC31A_EIC_EXTINT_NUM                   _UINT32_(15) /* EIC signal: PIN_PC31 External Interrupt Line */
1601 
1602 #define PIN_PA08A_EIC_NMI                          _UINT32_(8)
1603 #define MUX_PA08A_EIC_NMI                          _UINT32_(0)
1604 #define PINMUX_PA08A_EIC_NMI                       ((PIN_PA08A_EIC_NMI << 16) | MUX_PA08A_EIC_NMI)
1605 #define PORT_PA08A_EIC_NMI                         (_UINT32_(1) << 8)
1606 
1607 /* ================== PORT definition for GCLK peripheral =================== */
1608 #define PIN_PA30M_GCLK_IO0                         _UINT32_(30)
1609 #define MUX_PA30M_GCLK_IO0                         _UINT32_(12)
1610 #define PINMUX_PA30M_GCLK_IO0                      ((PIN_PA30M_GCLK_IO0 << 16) | MUX_PA30M_GCLK_IO0)
1611 #define PORT_PA30M_GCLK_IO0                        (_UINT32_(1) << 30)
1612 
1613 #define PIN_PB14M_GCLK_IO0                         _UINT32_(46)
1614 #define MUX_PB14M_GCLK_IO0                         _UINT32_(12)
1615 #define PINMUX_PB14M_GCLK_IO0                      ((PIN_PB14M_GCLK_IO0 << 16) | MUX_PB14M_GCLK_IO0)
1616 #define PORT_PB14M_GCLK_IO0                        (_UINT32_(1) << 14)
1617 
1618 #define PIN_PA14M_GCLK_IO0                         _UINT32_(14)
1619 #define MUX_PA14M_GCLK_IO0                         _UINT32_(12)
1620 #define PINMUX_PA14M_GCLK_IO0                      ((PIN_PA14M_GCLK_IO0 << 16) | MUX_PA14M_GCLK_IO0)
1621 #define PORT_PA14M_GCLK_IO0                        (_UINT32_(1) << 14)
1622 
1623 #define PIN_PB22M_GCLK_IO0                         _UINT32_(54)
1624 #define MUX_PB22M_GCLK_IO0                         _UINT32_(12)
1625 #define PINMUX_PB22M_GCLK_IO0                      ((PIN_PB22M_GCLK_IO0 << 16) | MUX_PB22M_GCLK_IO0)
1626 #define PORT_PB22M_GCLK_IO0                        (_UINT32_(1) << 22)
1627 
1628 #define PIN_PB15M_GCLK_IO1                         _UINT32_(47)
1629 #define MUX_PB15M_GCLK_IO1                         _UINT32_(12)
1630 #define PINMUX_PB15M_GCLK_IO1                      ((PIN_PB15M_GCLK_IO1 << 16) | MUX_PB15M_GCLK_IO1)
1631 #define PORT_PB15M_GCLK_IO1                        (_UINT32_(1) << 15)
1632 
1633 #define PIN_PA15M_GCLK_IO1                         _UINT32_(15)
1634 #define MUX_PA15M_GCLK_IO1                         _UINT32_(12)
1635 #define PINMUX_PA15M_GCLK_IO1                      ((PIN_PA15M_GCLK_IO1 << 16) | MUX_PA15M_GCLK_IO1)
1636 #define PORT_PA15M_GCLK_IO1                        (_UINT32_(1) << 15)
1637 
1638 #define PIN_PB23M_GCLK_IO1                         _UINT32_(55)
1639 #define MUX_PB23M_GCLK_IO1                         _UINT32_(12)
1640 #define PINMUX_PB23M_GCLK_IO1                      ((PIN_PB23M_GCLK_IO1 << 16) | MUX_PB23M_GCLK_IO1)
1641 #define PORT_PB23M_GCLK_IO1                        (_UINT32_(1) << 23)
1642 
1643 #define PIN_PA27M_GCLK_IO1                         _UINT32_(27)
1644 #define MUX_PA27M_GCLK_IO1                         _UINT32_(12)
1645 #define PINMUX_PA27M_GCLK_IO1                      ((PIN_PA27M_GCLK_IO1 << 16) | MUX_PA27M_GCLK_IO1)
1646 #define PORT_PA27M_GCLK_IO1                        (_UINT32_(1) << 27)
1647 
1648 #define PIN_PA16M_GCLK_IO2                         _UINT32_(16)
1649 #define MUX_PA16M_GCLK_IO2                         _UINT32_(12)
1650 #define PINMUX_PA16M_GCLK_IO2                      ((PIN_PA16M_GCLK_IO2 << 16) | MUX_PA16M_GCLK_IO2)
1651 #define PORT_PA16M_GCLK_IO2                        (_UINT32_(1) << 16)
1652 
1653 #define PIN_PB16M_GCLK_IO2                         _UINT32_(48)
1654 #define MUX_PB16M_GCLK_IO2                         _UINT32_(12)
1655 #define PINMUX_PB16M_GCLK_IO2                      ((PIN_PB16M_GCLK_IO2 << 16) | MUX_PB16M_GCLK_IO2)
1656 #define PORT_PB16M_GCLK_IO2                        (_UINT32_(1) << 16)
1657 
1658 #define PIN_PA17M_GCLK_IO3                         _UINT32_(17)
1659 #define MUX_PA17M_GCLK_IO3                         _UINT32_(12)
1660 #define PINMUX_PA17M_GCLK_IO3                      ((PIN_PA17M_GCLK_IO3 << 16) | MUX_PA17M_GCLK_IO3)
1661 #define PORT_PA17M_GCLK_IO3                        (_UINT32_(1) << 17)
1662 
1663 #define PIN_PB17M_GCLK_IO3                         _UINT32_(49)
1664 #define MUX_PB17M_GCLK_IO3                         _UINT32_(12)
1665 #define PINMUX_PB17M_GCLK_IO3                      ((PIN_PB17M_GCLK_IO3 << 16) | MUX_PB17M_GCLK_IO3)
1666 #define PORT_PB17M_GCLK_IO3                        (_UINT32_(1) << 17)
1667 
1668 #define PIN_PA10M_GCLK_IO4                         _UINT32_(10)
1669 #define MUX_PA10M_GCLK_IO4                         _UINT32_(12)
1670 #define PINMUX_PA10M_GCLK_IO4                      ((PIN_PA10M_GCLK_IO4 << 16) | MUX_PA10M_GCLK_IO4)
1671 #define PORT_PA10M_GCLK_IO4                        (_UINT32_(1) << 10)
1672 
1673 #define PIN_PB10M_GCLK_IO4                         _UINT32_(42)
1674 #define MUX_PB10M_GCLK_IO4                         _UINT32_(12)
1675 #define PINMUX_PB10M_GCLK_IO4                      ((PIN_PB10M_GCLK_IO4 << 16) | MUX_PB10M_GCLK_IO4)
1676 #define PORT_PB10M_GCLK_IO4                        (_UINT32_(1) << 10)
1677 
1678 #define PIN_PB18M_GCLK_IO4                         _UINT32_(50)
1679 #define MUX_PB18M_GCLK_IO4                         _UINT32_(12)
1680 #define PINMUX_PB18M_GCLK_IO4                      ((PIN_PB18M_GCLK_IO4 << 16) | MUX_PB18M_GCLK_IO4)
1681 #define PORT_PB18M_GCLK_IO4                        (_UINT32_(1) << 18)
1682 
1683 #define PIN_PA11M_GCLK_IO5                         _UINT32_(11)
1684 #define MUX_PA11M_GCLK_IO5                         _UINT32_(12)
1685 #define PINMUX_PA11M_GCLK_IO5                      ((PIN_PA11M_GCLK_IO5 << 16) | MUX_PA11M_GCLK_IO5)
1686 #define PORT_PA11M_GCLK_IO5                        (_UINT32_(1) << 11)
1687 
1688 #define PIN_PB11M_GCLK_IO5                         _UINT32_(43)
1689 #define MUX_PB11M_GCLK_IO5                         _UINT32_(12)
1690 #define PINMUX_PB11M_GCLK_IO5                      ((PIN_PB11M_GCLK_IO5 << 16) | MUX_PB11M_GCLK_IO5)
1691 #define PORT_PB11M_GCLK_IO5                        (_UINT32_(1) << 11)
1692 
1693 #define PIN_PB19M_GCLK_IO5                         _UINT32_(51)
1694 #define MUX_PB19M_GCLK_IO5                         _UINT32_(12)
1695 #define PINMUX_PB19M_GCLK_IO5                      ((PIN_PB19M_GCLK_IO5 << 16) | MUX_PB19M_GCLK_IO5)
1696 #define PORT_PB19M_GCLK_IO5                        (_UINT32_(1) << 19)
1697 
1698 #define PIN_PB12M_GCLK_IO6                         _UINT32_(44)
1699 #define MUX_PB12M_GCLK_IO6                         _UINT32_(12)
1700 #define PINMUX_PB12M_GCLK_IO6                      ((PIN_PB12M_GCLK_IO6 << 16) | MUX_PB12M_GCLK_IO6)
1701 #define PORT_PB12M_GCLK_IO6                        (_UINT32_(1) << 12)
1702 
1703 #define PIN_PB20M_GCLK_IO6                         _UINT32_(52)
1704 #define MUX_PB20M_GCLK_IO6                         _UINT32_(12)
1705 #define PINMUX_PB20M_GCLK_IO6                      ((PIN_PB20M_GCLK_IO6 << 16) | MUX_PB20M_GCLK_IO6)
1706 #define PORT_PB20M_GCLK_IO6                        (_UINT32_(1) << 20)
1707 
1708 #define PIN_PB13M_GCLK_IO7                         _UINT32_(45)
1709 #define MUX_PB13M_GCLK_IO7                         _UINT32_(12)
1710 #define PINMUX_PB13M_GCLK_IO7                      ((PIN_PB13M_GCLK_IO7 << 16) | MUX_PB13M_GCLK_IO7)
1711 #define PORT_PB13M_GCLK_IO7                        (_UINT32_(1) << 13)
1712 
1713 #define PIN_PB21M_GCLK_IO7                         _UINT32_(53)
1714 #define MUX_PB21M_GCLK_IO7                         _UINT32_(12)
1715 #define PINMUX_PB21M_GCLK_IO7                      ((PIN_PB21M_GCLK_IO7 << 16) | MUX_PB21M_GCLK_IO7)
1716 #define PORT_PB21M_GCLK_IO7                        (_UINT32_(1) << 21)
1717 
1718 /* ================== PORT definition for GMAC peripheral =================== */
1719 #define PIN_PC21L_GMAC_GCOL                        _UINT32_(85)
1720 #define MUX_PC21L_GMAC_GCOL                        _UINT32_(11)
1721 #define PINMUX_PC21L_GMAC_GCOL                     ((PIN_PC21L_GMAC_GCOL << 16) | MUX_PC21L_GMAC_GCOL)
1722 #define PORT_PC21L_GMAC_GCOL                       (_UINT32_(1) << 21)
1723 
1724 #define PIN_PA16L_GMAC_GCRS                        _UINT32_(16)
1725 #define MUX_PA16L_GMAC_GCRS                        _UINT32_(11)
1726 #define PINMUX_PA16L_GMAC_GCRS                     ((PIN_PA16L_GMAC_GCRS << 16) | MUX_PA16L_GMAC_GCRS)
1727 #define PORT_PA16L_GMAC_GCRS                       (_UINT32_(1) << 16)
1728 
1729 #define PIN_PA20L_GMAC_GMDC                        _UINT32_(20)
1730 #define MUX_PA20L_GMAC_GMDC                        _UINT32_(11)
1731 #define PINMUX_PA20L_GMAC_GMDC                     ((PIN_PA20L_GMAC_GMDC << 16) | MUX_PA20L_GMAC_GMDC)
1732 #define PORT_PA20L_GMAC_GMDC                       (_UINT32_(1) << 20)
1733 
1734 #define PIN_PB14L_GMAC_GMDC                        _UINT32_(46)
1735 #define MUX_PB14L_GMAC_GMDC                        _UINT32_(11)
1736 #define PINMUX_PB14L_GMAC_GMDC                     ((PIN_PB14L_GMAC_GMDC << 16) | MUX_PB14L_GMAC_GMDC)
1737 #define PORT_PB14L_GMAC_GMDC                       (_UINT32_(1) << 14)
1738 
1739 #define PIN_PC11L_GMAC_GMDC                        _UINT32_(75)
1740 #define MUX_PC11L_GMAC_GMDC                        _UINT32_(11)
1741 #define PINMUX_PC11L_GMAC_GMDC                     ((PIN_PC11L_GMAC_GMDC << 16) | MUX_PC11L_GMAC_GMDC)
1742 #define PORT_PC11L_GMAC_GMDC                       (_UINT32_(1) << 11)
1743 
1744 #define PIN_PC22L_GMAC_GMDC                        _UINT32_(86)
1745 #define MUX_PC22L_GMAC_GMDC                        _UINT32_(11)
1746 #define PINMUX_PC22L_GMAC_GMDC                     ((PIN_PC22L_GMAC_GMDC << 16) | MUX_PC22L_GMAC_GMDC)
1747 #define PORT_PC22L_GMAC_GMDC                       (_UINT32_(1) << 22)
1748 
1749 #define PIN_PA21L_GMAC_GMDIO                       _UINT32_(21)
1750 #define MUX_PA21L_GMAC_GMDIO                       _UINT32_(11)
1751 #define PINMUX_PA21L_GMAC_GMDIO                    ((PIN_PA21L_GMAC_GMDIO << 16) | MUX_PA21L_GMAC_GMDIO)
1752 #define PORT_PA21L_GMAC_GMDIO                      (_UINT32_(1) << 21)
1753 
1754 #define PIN_PB15L_GMAC_GMDIO                       _UINT32_(47)
1755 #define MUX_PB15L_GMAC_GMDIO                       _UINT32_(11)
1756 #define PINMUX_PB15L_GMAC_GMDIO                    ((PIN_PB15L_GMAC_GMDIO << 16) | MUX_PB15L_GMAC_GMDIO)
1757 #define PORT_PB15L_GMAC_GMDIO                      (_UINT32_(1) << 15)
1758 
1759 #define PIN_PC12L_GMAC_GMDIO                       _UINT32_(76)
1760 #define MUX_PC12L_GMAC_GMDIO                       _UINT32_(11)
1761 #define PINMUX_PC12L_GMAC_GMDIO                    ((PIN_PC12L_GMAC_GMDIO << 16) | MUX_PC12L_GMAC_GMDIO)
1762 #define PORT_PC12L_GMAC_GMDIO                      (_UINT32_(1) << 12)
1763 
1764 #define PIN_PC23L_GMAC_GMDIO                       _UINT32_(87)
1765 #define MUX_PC23L_GMAC_GMDIO                       _UINT32_(11)
1766 #define PINMUX_PC23L_GMAC_GMDIO                    ((PIN_PC23L_GMAC_GMDIO << 16) | MUX_PC23L_GMAC_GMDIO)
1767 #define PORT_PC23L_GMAC_GMDIO                      (_UINT32_(1) << 23)
1768 
1769 #define PIN_PA13L_GMAC_GRX0                        _UINT32_(13)
1770 #define MUX_PA13L_GMAC_GRX0                        _UINT32_(11)
1771 #define PINMUX_PA13L_GMAC_GRX0                     ((PIN_PA13L_GMAC_GRX0 << 16) | MUX_PA13L_GMAC_GRX0)
1772 #define PORT_PA13L_GMAC_GRX0                       (_UINT32_(1) << 13)
1773 
1774 #define PIN_PA12L_GMAC_GRX1                        _UINT32_(12)
1775 #define MUX_PA12L_GMAC_GRX1                        _UINT32_(11)
1776 #define PINMUX_PA12L_GMAC_GRX1                     ((PIN_PA12L_GMAC_GRX1 << 16) | MUX_PA12L_GMAC_GRX1)
1777 #define PORT_PA12L_GMAC_GRX1                       (_UINT32_(1) << 12)
1778 
1779 #define PIN_PC15L_GMAC_GRX2                        _UINT32_(79)
1780 #define MUX_PC15L_GMAC_GRX2                        _UINT32_(11)
1781 #define PINMUX_PC15L_GMAC_GRX2                     ((PIN_PC15L_GMAC_GRX2 << 16) | MUX_PC15L_GMAC_GRX2)
1782 #define PORT_PC15L_GMAC_GRX2                       (_UINT32_(1) << 15)
1783 
1784 #define PIN_PC14L_GMAC_GRX3                        _UINT32_(78)
1785 #define MUX_PC14L_GMAC_GRX3                        _UINT32_(11)
1786 #define PINMUX_PC14L_GMAC_GRX3                     ((PIN_PC14L_GMAC_GRX3 << 16) | MUX_PC14L_GMAC_GRX3)
1787 #define PORT_PC14L_GMAC_GRX3                       (_UINT32_(1) << 14)
1788 
1789 #define PIN_PC18L_GMAC_GRXCK                       _UINT32_(82)
1790 #define MUX_PC18L_GMAC_GRXCK                       _UINT32_(11)
1791 #define PINMUX_PC18L_GMAC_GRXCK                    ((PIN_PC18L_GMAC_GRXCK << 16) | MUX_PC18L_GMAC_GRXCK)
1792 #define PORT_PC18L_GMAC_GRXCK                      (_UINT32_(1) << 18)
1793 
1794 #define PIN_PC20L_GMAC_GRXDV                       _UINT32_(84)
1795 #define MUX_PC20L_GMAC_GRXDV                       _UINT32_(11)
1796 #define PINMUX_PC20L_GMAC_GRXDV                    ((PIN_PC20L_GMAC_GRXDV << 16) | MUX_PC20L_GMAC_GRXDV)
1797 #define PORT_PC20L_GMAC_GRXDV                      (_UINT32_(1) << 20)
1798 
1799 #define PIN_PA15L_GMAC_GRXER                       _UINT32_(15)
1800 #define MUX_PA15L_GMAC_GRXER                       _UINT32_(11)
1801 #define PINMUX_PA15L_GMAC_GRXER                    ((PIN_PA15L_GMAC_GRXER << 16) | MUX_PA15L_GMAC_GRXER)
1802 #define PORT_PA15L_GMAC_GRXER                      (_UINT32_(1) << 15)
1803 
1804 #define PIN_PA18L_GMAC_GTX0                        _UINT32_(18)
1805 #define MUX_PA18L_GMAC_GTX0                        _UINT32_(11)
1806 #define PINMUX_PA18L_GMAC_GTX0                     ((PIN_PA18L_GMAC_GTX0 << 16) | MUX_PA18L_GMAC_GTX0)
1807 #define PORT_PA18L_GMAC_GTX0                       (_UINT32_(1) << 18)
1808 
1809 #define PIN_PA19L_GMAC_GTX1                        _UINT32_(19)
1810 #define MUX_PA19L_GMAC_GTX1                        _UINT32_(11)
1811 #define PINMUX_PA19L_GMAC_GTX1                     ((PIN_PA19L_GMAC_GTX1 << 16) | MUX_PA19L_GMAC_GTX1)
1812 #define PORT_PA19L_GMAC_GTX1                       (_UINT32_(1) << 19)
1813 
1814 #define PIN_PC16L_GMAC_GTX2                        _UINT32_(80)
1815 #define MUX_PC16L_GMAC_GTX2                        _UINT32_(11)
1816 #define PINMUX_PC16L_GMAC_GTX2                     ((PIN_PC16L_GMAC_GTX2 << 16) | MUX_PC16L_GMAC_GTX2)
1817 #define PORT_PC16L_GMAC_GTX2                       (_UINT32_(1) << 16)
1818 
1819 #define PIN_PC17L_GMAC_GTX3                        _UINT32_(81)
1820 #define MUX_PC17L_GMAC_GTX3                        _UINT32_(11)
1821 #define PINMUX_PC17L_GMAC_GTX3                     ((PIN_PC17L_GMAC_GTX3 << 16) | MUX_PC17L_GMAC_GTX3)
1822 #define PORT_PC17L_GMAC_GTX3                       (_UINT32_(1) << 17)
1823 
1824 #define PIN_PA14L_GMAC_GTXCK                       _UINT32_(14)
1825 #define MUX_PA14L_GMAC_GTXCK                       _UINT32_(11)
1826 #define PINMUX_PA14L_GMAC_GTXCK                    ((PIN_PA14L_GMAC_GTXCK << 16) | MUX_PA14L_GMAC_GTXCK)
1827 #define PORT_PA14L_GMAC_GTXCK                      (_UINT32_(1) << 14)
1828 
1829 #define PIN_PA17L_GMAC_GTXEN                       _UINT32_(17)
1830 #define MUX_PA17L_GMAC_GTXEN                       _UINT32_(11)
1831 #define PINMUX_PA17L_GMAC_GTXEN                    ((PIN_PA17L_GMAC_GTXEN << 16) | MUX_PA17L_GMAC_GTXEN)
1832 #define PORT_PA17L_GMAC_GTXEN                      (_UINT32_(1) << 17)
1833 
1834 #define PIN_PC19L_GMAC_GTXER                       _UINT32_(83)
1835 #define MUX_PC19L_GMAC_GTXER                       _UINT32_(11)
1836 #define PINMUX_PC19L_GMAC_GTXER                    ((PIN_PC19L_GMAC_GTXER << 16) | MUX_PC19L_GMAC_GTXER)
1837 #define PORT_PC19L_GMAC_GTXER                      (_UINT32_(1) << 19)
1838 
1839 /* =================== PORT definition for I2S peripheral =================== */
1840 #define PIN_PA09J_I2S_FS0                          _UINT32_(9)
1841 #define MUX_PA09J_I2S_FS0                          _UINT32_(9)
1842 #define PINMUX_PA09J_I2S_FS0                       ((PIN_PA09J_I2S_FS0 << 16) | MUX_PA09J_I2S_FS0)
1843 #define PORT_PA09J_I2S_FS0                         (_UINT32_(1) << 9)
1844 
1845 #define PIN_PA20J_I2S_FS0                          _UINT32_(20)
1846 #define MUX_PA20J_I2S_FS0                          _UINT32_(9)
1847 #define PINMUX_PA20J_I2S_FS0                       ((PIN_PA20J_I2S_FS0 << 16) | MUX_PA20J_I2S_FS0)
1848 #define PORT_PA20J_I2S_FS0                         (_UINT32_(1) << 20)
1849 
1850 #define PIN_PA23J_I2S_FS1                          _UINT32_(23)
1851 #define MUX_PA23J_I2S_FS1                          _UINT32_(9)
1852 #define PINMUX_PA23J_I2S_FS1                       ((PIN_PA23J_I2S_FS1 << 16) | MUX_PA23J_I2S_FS1)
1853 #define PORT_PA23J_I2S_FS1                         (_UINT32_(1) << 23)
1854 
1855 #define PIN_PB11J_I2S_FS1                          _UINT32_(43)
1856 #define MUX_PB11J_I2S_FS1                          _UINT32_(9)
1857 #define PINMUX_PB11J_I2S_FS1                       ((PIN_PB11J_I2S_FS1 << 16) | MUX_PB11J_I2S_FS1)
1858 #define PORT_PB11J_I2S_FS1                         (_UINT32_(1) << 11)
1859 
1860 #define PIN_PA08J_I2S_MCK0                         _UINT32_(8)
1861 #define MUX_PA08J_I2S_MCK0                         _UINT32_(9)
1862 #define PINMUX_PA08J_I2S_MCK0                      ((PIN_PA08J_I2S_MCK0 << 16) | MUX_PA08J_I2S_MCK0)
1863 #define PORT_PA08J_I2S_MCK0                        (_UINT32_(1) << 8)
1864 
1865 #define PIN_PB17J_I2S_MCK0                         _UINT32_(49)
1866 #define MUX_PB17J_I2S_MCK0                         _UINT32_(9)
1867 #define PINMUX_PB17J_I2S_MCK0                      ((PIN_PB17J_I2S_MCK0 << 16) | MUX_PB17J_I2S_MCK0)
1868 #define PORT_PB17J_I2S_MCK0                        (_UINT32_(1) << 17)
1869 
1870 #define PIN_PB29J_I2S_MCK1                         _UINT32_(61)
1871 #define MUX_PB29J_I2S_MCK1                         _UINT32_(9)
1872 #define PINMUX_PB29J_I2S_MCK1                      ((PIN_PB29J_I2S_MCK1 << 16) | MUX_PB29J_I2S_MCK1)
1873 #define PORT_PB29J_I2S_MCK1                        (_UINT32_(1) << 29)
1874 
1875 #define PIN_PB13J_I2S_MCK1                         _UINT32_(45)
1876 #define MUX_PB13J_I2S_MCK1                         _UINT32_(9)
1877 #define PINMUX_PB13J_I2S_MCK1                      ((PIN_PB13J_I2S_MCK1 << 16) | MUX_PB13J_I2S_MCK1)
1878 #define PORT_PB13J_I2S_MCK1                        (_UINT32_(1) << 13)
1879 
1880 #define PIN_PA10J_I2S_SCK0                         _UINT32_(10)
1881 #define MUX_PA10J_I2S_SCK0                         _UINT32_(9)
1882 #define PINMUX_PA10J_I2S_SCK0                      ((PIN_PA10J_I2S_SCK0 << 16) | MUX_PA10J_I2S_SCK0)
1883 #define PORT_PA10J_I2S_SCK0                        (_UINT32_(1) << 10)
1884 
1885 #define PIN_PB16J_I2S_SCK0                         _UINT32_(48)
1886 #define MUX_PB16J_I2S_SCK0                         _UINT32_(9)
1887 #define PINMUX_PB16J_I2S_SCK0                      ((PIN_PB16J_I2S_SCK0 << 16) | MUX_PB16J_I2S_SCK0)
1888 #define PORT_PB16J_I2S_SCK0                        (_UINT32_(1) << 16)
1889 
1890 #define PIN_PB28J_I2S_SCK1                         _UINT32_(60)
1891 #define MUX_PB28J_I2S_SCK1                         _UINT32_(9)
1892 #define PINMUX_PB28J_I2S_SCK1                      ((PIN_PB28J_I2S_SCK1 << 16) | MUX_PB28J_I2S_SCK1)
1893 #define PORT_PB28J_I2S_SCK1                        (_UINT32_(1) << 28)
1894 
1895 #define PIN_PB12J_I2S_SCK1                         _UINT32_(44)
1896 #define MUX_PB12J_I2S_SCK1                         _UINT32_(9)
1897 #define PINMUX_PB12J_I2S_SCK1                      ((PIN_PB12J_I2S_SCK1 << 16) | MUX_PB12J_I2S_SCK1)
1898 #define PORT_PB12J_I2S_SCK1                        (_UINT32_(1) << 12)
1899 
1900 #define PIN_PA22J_I2S_SDI                          _UINT32_(22)
1901 #define MUX_PA22J_I2S_SDI                          _UINT32_(9)
1902 #define PINMUX_PA22J_I2S_SDI                       ((PIN_PA22J_I2S_SDI << 16) | MUX_PA22J_I2S_SDI)
1903 #define PORT_PA22J_I2S_SDI                         (_UINT32_(1) << 22)
1904 
1905 #define PIN_PB10J_I2S_SDI                          _UINT32_(42)
1906 #define MUX_PB10J_I2S_SDI                          _UINT32_(9)
1907 #define PINMUX_PB10J_I2S_SDI                       ((PIN_PB10J_I2S_SDI << 16) | MUX_PB10J_I2S_SDI)
1908 #define PORT_PB10J_I2S_SDI                         (_UINT32_(1) << 10)
1909 
1910 #define PIN_PA11J_I2S_SDO                          _UINT32_(11)
1911 #define MUX_PA11J_I2S_SDO                          _UINT32_(9)
1912 #define PINMUX_PA11J_I2S_SDO                       ((PIN_PA11J_I2S_SDO << 16) | MUX_PA11J_I2S_SDO)
1913 #define PORT_PA11J_I2S_SDO                         (_UINT32_(1) << 11)
1914 
1915 #define PIN_PA21J_I2S_SDO                          _UINT32_(21)
1916 #define MUX_PA21J_I2S_SDO                          _UINT32_(9)
1917 #define PINMUX_PA21J_I2S_SDO                       ((PIN_PA21J_I2S_SDO << 16) | MUX_PA21J_I2S_SDO)
1918 #define PORT_PA21J_I2S_SDO                         (_UINT32_(1) << 21)
1919 
1920 /* =================== PORT definition for PCC peripheral =================== */
1921 #define PIN_PA14K_PCC_CLK                          _UINT32_(14)
1922 #define MUX_PA14K_PCC_CLK                          _UINT32_(10)
1923 #define PINMUX_PA14K_PCC_CLK                       ((PIN_PA14K_PCC_CLK << 16) | MUX_PA14K_PCC_CLK)
1924 #define PORT_PA14K_PCC_CLK                         (_UINT32_(1) << 14)
1925 
1926 #define PIN_PA16K_PCC_DATA0                        _UINT32_(16)
1927 #define MUX_PA16K_PCC_DATA0                        _UINT32_(10)
1928 #define PINMUX_PA16K_PCC_DATA0                     ((PIN_PA16K_PCC_DATA0 << 16) | MUX_PA16K_PCC_DATA0)
1929 #define PORT_PA16K_PCC_DATA0                       (_UINT32_(1) << 16)
1930 
1931 #define PIN_PA17K_PCC_DATA1                        _UINT32_(17)
1932 #define MUX_PA17K_PCC_DATA1                        _UINT32_(10)
1933 #define PINMUX_PA17K_PCC_DATA1                     ((PIN_PA17K_PCC_DATA1 << 16) | MUX_PA17K_PCC_DATA1)
1934 #define PORT_PA17K_PCC_DATA1                       (_UINT32_(1) << 17)
1935 
1936 #define PIN_PA18K_PCC_DATA2                        _UINT32_(18)
1937 #define MUX_PA18K_PCC_DATA2                        _UINT32_(10)
1938 #define PINMUX_PA18K_PCC_DATA2                     ((PIN_PA18K_PCC_DATA2 << 16) | MUX_PA18K_PCC_DATA2)
1939 #define PORT_PA18K_PCC_DATA2                       (_UINT32_(1) << 18)
1940 
1941 #define PIN_PA19K_PCC_DATA3                        _UINT32_(19)
1942 #define MUX_PA19K_PCC_DATA3                        _UINT32_(10)
1943 #define PINMUX_PA19K_PCC_DATA3                     ((PIN_PA19K_PCC_DATA3 << 16) | MUX_PA19K_PCC_DATA3)
1944 #define PORT_PA19K_PCC_DATA3                       (_UINT32_(1) << 19)
1945 
1946 #define PIN_PA20K_PCC_DATA4                        _UINT32_(20)
1947 #define MUX_PA20K_PCC_DATA4                        _UINT32_(10)
1948 #define PINMUX_PA20K_PCC_DATA4                     ((PIN_PA20K_PCC_DATA4 << 16) | MUX_PA20K_PCC_DATA4)
1949 #define PORT_PA20K_PCC_DATA4                       (_UINT32_(1) << 20)
1950 
1951 #define PIN_PA21K_PCC_DATA5                        _UINT32_(21)
1952 #define MUX_PA21K_PCC_DATA5                        _UINT32_(10)
1953 #define PINMUX_PA21K_PCC_DATA5                     ((PIN_PA21K_PCC_DATA5 << 16) | MUX_PA21K_PCC_DATA5)
1954 #define PORT_PA21K_PCC_DATA5                       (_UINT32_(1) << 21)
1955 
1956 #define PIN_PA22K_PCC_DATA6                        _UINT32_(22)
1957 #define MUX_PA22K_PCC_DATA6                        _UINT32_(10)
1958 #define PINMUX_PA22K_PCC_DATA6                     ((PIN_PA22K_PCC_DATA6 << 16) | MUX_PA22K_PCC_DATA6)
1959 #define PORT_PA22K_PCC_DATA6                       (_UINT32_(1) << 22)
1960 
1961 #define PIN_PA23K_PCC_DATA7                        _UINT32_(23)
1962 #define MUX_PA23K_PCC_DATA7                        _UINT32_(10)
1963 #define PINMUX_PA23K_PCC_DATA7                     ((PIN_PA23K_PCC_DATA7 << 16) | MUX_PA23K_PCC_DATA7)
1964 #define PORT_PA23K_PCC_DATA7                       (_UINT32_(1) << 23)
1965 
1966 #define PIN_PB14K_PCC_DATA8                        _UINT32_(46)
1967 #define MUX_PB14K_PCC_DATA8                        _UINT32_(10)
1968 #define PINMUX_PB14K_PCC_DATA8                     ((PIN_PB14K_PCC_DATA8 << 16) | MUX_PB14K_PCC_DATA8)
1969 #define PORT_PB14K_PCC_DATA8                       (_UINT32_(1) << 14)
1970 
1971 #define PIN_PB15K_PCC_DATA9                        _UINT32_(47)
1972 #define MUX_PB15K_PCC_DATA9                        _UINT32_(10)
1973 #define PINMUX_PB15K_PCC_DATA9                     ((PIN_PB15K_PCC_DATA9 << 16) | MUX_PB15K_PCC_DATA9)
1974 #define PORT_PB15K_PCC_DATA9                       (_UINT32_(1) << 15)
1975 
1976 #define PIN_PC12K_PCC_DATA10                       _UINT32_(76)
1977 #define MUX_PC12K_PCC_DATA10                       _UINT32_(10)
1978 #define PINMUX_PC12K_PCC_DATA10                    ((PIN_PC12K_PCC_DATA10 << 16) | MUX_PC12K_PCC_DATA10)
1979 #define PORT_PC12K_PCC_DATA10                      (_UINT32_(1) << 12)
1980 
1981 #define PIN_PC13K_PCC_DATA11                       _UINT32_(77)
1982 #define MUX_PC13K_PCC_DATA11                       _UINT32_(10)
1983 #define PINMUX_PC13K_PCC_DATA11                    ((PIN_PC13K_PCC_DATA11 << 16) | MUX_PC13K_PCC_DATA11)
1984 #define PORT_PC13K_PCC_DATA11                      (_UINT32_(1) << 13)
1985 
1986 #define PIN_PC14K_PCC_DATA12                       _UINT32_(78)
1987 #define MUX_PC14K_PCC_DATA12                       _UINT32_(10)
1988 #define PINMUX_PC14K_PCC_DATA12                    ((PIN_PC14K_PCC_DATA12 << 16) | MUX_PC14K_PCC_DATA12)
1989 #define PORT_PC14K_PCC_DATA12                      (_UINT32_(1) << 14)
1990 
1991 #define PIN_PC15K_PCC_DATA13                       _UINT32_(79)
1992 #define MUX_PC15K_PCC_DATA13                       _UINT32_(10)
1993 #define PINMUX_PC15K_PCC_DATA13                    ((PIN_PC15K_PCC_DATA13 << 16) | MUX_PC15K_PCC_DATA13)
1994 #define PORT_PC15K_PCC_DATA13                      (_UINT32_(1) << 15)
1995 
1996 #define PIN_PA12K_PCC_DEN1                         _UINT32_(12)
1997 #define MUX_PA12K_PCC_DEN1                         _UINT32_(10)
1998 #define PINMUX_PA12K_PCC_DEN1                      ((PIN_PA12K_PCC_DEN1 << 16) | MUX_PA12K_PCC_DEN1)
1999 #define PORT_PA12K_PCC_DEN1                        (_UINT32_(1) << 12)
2000 
2001 #define PIN_PA13K_PCC_DEN2                         _UINT32_(13)
2002 #define MUX_PA13K_PCC_DEN2                         _UINT32_(10)
2003 #define PINMUX_PA13K_PCC_DEN2                      ((PIN_PA13K_PCC_DEN2 << 16) | MUX_PA13K_PCC_DEN2)
2004 #define PORT_PA13K_PCC_DEN2                        (_UINT32_(1) << 13)
2005 
2006 /* ================== PORT definition for PDEC peripheral =================== */
2007 #define PIN_PB18G_PDEC_QDI0                        _UINT32_(50)
2008 #define MUX_PB18G_PDEC_QDI0                        _UINT32_(6)
2009 #define PINMUX_PB18G_PDEC_QDI0                     ((PIN_PB18G_PDEC_QDI0 << 16) | MUX_PB18G_PDEC_QDI0)
2010 #define PORT_PB18G_PDEC_QDI0                       (_UINT32_(1) << 18)
2011 
2012 #define PIN_PB23G_PDEC_QDI0                        _UINT32_(55)
2013 #define MUX_PB23G_PDEC_QDI0                        _UINT32_(6)
2014 #define PINMUX_PB23G_PDEC_QDI0                     ((PIN_PB23G_PDEC_QDI0 << 16) | MUX_PB23G_PDEC_QDI0)
2015 #define PORT_PB23G_PDEC_QDI0                       (_UINT32_(1) << 23)
2016 
2017 #define PIN_PC16G_PDEC_QDI0                        _UINT32_(80)
2018 #define MUX_PC16G_PDEC_QDI0                        _UINT32_(6)
2019 #define PINMUX_PC16G_PDEC_QDI0                     ((PIN_PC16G_PDEC_QDI0 << 16) | MUX_PC16G_PDEC_QDI0)
2020 #define PORT_PC16G_PDEC_QDI0                       (_UINT32_(1) << 16)
2021 
2022 #define PIN_PA24G_PDEC_QDI0                        _UINT32_(24)
2023 #define MUX_PA24G_PDEC_QDI0                        _UINT32_(6)
2024 #define PINMUX_PA24G_PDEC_QDI0                     ((PIN_PA24G_PDEC_QDI0 << 16) | MUX_PA24G_PDEC_QDI0)
2025 #define PORT_PA24G_PDEC_QDI0                       (_UINT32_(1) << 24)
2026 
2027 #define PIN_PB19G_PDEC_QDI1                        _UINT32_(51)
2028 #define MUX_PB19G_PDEC_QDI1                        _UINT32_(6)
2029 #define PINMUX_PB19G_PDEC_QDI1                     ((PIN_PB19G_PDEC_QDI1 << 16) | MUX_PB19G_PDEC_QDI1)
2030 #define PORT_PB19G_PDEC_QDI1                       (_UINT32_(1) << 19)
2031 
2032 #define PIN_PB24G_PDEC_QDI1                        _UINT32_(56)
2033 #define MUX_PB24G_PDEC_QDI1                        _UINT32_(6)
2034 #define PINMUX_PB24G_PDEC_QDI1                     ((PIN_PB24G_PDEC_QDI1 << 16) | MUX_PB24G_PDEC_QDI1)
2035 #define PORT_PB24G_PDEC_QDI1                       (_UINT32_(1) << 24)
2036 
2037 #define PIN_PC17G_PDEC_QDI1                        _UINT32_(81)
2038 #define MUX_PC17G_PDEC_QDI1                        _UINT32_(6)
2039 #define PINMUX_PC17G_PDEC_QDI1                     ((PIN_PC17G_PDEC_QDI1 << 16) | MUX_PC17G_PDEC_QDI1)
2040 #define PORT_PC17G_PDEC_QDI1                       (_UINT32_(1) << 17)
2041 
2042 #define PIN_PA25G_PDEC_QDI1                        _UINT32_(25)
2043 #define MUX_PA25G_PDEC_QDI1                        _UINT32_(6)
2044 #define PINMUX_PA25G_PDEC_QDI1                     ((PIN_PA25G_PDEC_QDI1 << 16) | MUX_PA25G_PDEC_QDI1)
2045 #define PORT_PA25G_PDEC_QDI1                       (_UINT32_(1) << 25)
2046 
2047 #define PIN_PB20G_PDEC_QDI2                        _UINT32_(52)
2048 #define MUX_PB20G_PDEC_QDI2                        _UINT32_(6)
2049 #define PINMUX_PB20G_PDEC_QDI2                     ((PIN_PB20G_PDEC_QDI2 << 16) | MUX_PB20G_PDEC_QDI2)
2050 #define PORT_PB20G_PDEC_QDI2                       (_UINT32_(1) << 20)
2051 
2052 #define PIN_PB25G_PDEC_QDI2                        _UINT32_(57)
2053 #define MUX_PB25G_PDEC_QDI2                        _UINT32_(6)
2054 #define PINMUX_PB25G_PDEC_QDI2                     ((PIN_PB25G_PDEC_QDI2 << 16) | MUX_PB25G_PDEC_QDI2)
2055 #define PORT_PB25G_PDEC_QDI2                       (_UINT32_(1) << 25)
2056 
2057 #define PIN_PC18G_PDEC_QDI2                        _UINT32_(82)
2058 #define MUX_PC18G_PDEC_QDI2                        _UINT32_(6)
2059 #define PINMUX_PC18G_PDEC_QDI2                     ((PIN_PC18G_PDEC_QDI2 << 16) | MUX_PC18G_PDEC_QDI2)
2060 #define PORT_PC18G_PDEC_QDI2                       (_UINT32_(1) << 18)
2061 
2062 #define PIN_PB22G_PDEC_QDI2                        _UINT32_(54)
2063 #define MUX_PB22G_PDEC_QDI2                        _UINT32_(6)
2064 #define PINMUX_PB22G_PDEC_QDI2                     ((PIN_PB22G_PDEC_QDI2 << 16) | MUX_PB22G_PDEC_QDI2)
2065 #define PORT_PB22G_PDEC_QDI2                       (_UINT32_(1) << 22)
2066 
2067 /* ================== PORT definition for QSPI peripheral =================== */
2068 #define PIN_PB11H_QSPI_CS                          _UINT32_(43)
2069 #define MUX_PB11H_QSPI_CS                          _UINT32_(7)
2070 #define PINMUX_PB11H_QSPI_CS                       ((PIN_PB11H_QSPI_CS << 16) | MUX_PB11H_QSPI_CS)
2071 #define PORT_PB11H_QSPI_CS                         (_UINT32_(1) << 11)
2072 
2073 #define PIN_PA08H_QSPI_DATA0                       _UINT32_(8)
2074 #define MUX_PA08H_QSPI_DATA0                       _UINT32_(7)
2075 #define PINMUX_PA08H_QSPI_DATA0                    ((PIN_PA08H_QSPI_DATA0 << 16) | MUX_PA08H_QSPI_DATA0)
2076 #define PORT_PA08H_QSPI_DATA0                      (_UINT32_(1) << 8)
2077 
2078 #define PIN_PA09H_QSPI_DATA1                       _UINT32_(9)
2079 #define MUX_PA09H_QSPI_DATA1                       _UINT32_(7)
2080 #define PINMUX_PA09H_QSPI_DATA1                    ((PIN_PA09H_QSPI_DATA1 << 16) | MUX_PA09H_QSPI_DATA1)
2081 #define PORT_PA09H_QSPI_DATA1                      (_UINT32_(1) << 9)
2082 
2083 #define PIN_PA10H_QSPI_DATA2                       _UINT32_(10)
2084 #define MUX_PA10H_QSPI_DATA2                       _UINT32_(7)
2085 #define PINMUX_PA10H_QSPI_DATA2                    ((PIN_PA10H_QSPI_DATA2 << 16) | MUX_PA10H_QSPI_DATA2)
2086 #define PORT_PA10H_QSPI_DATA2                      (_UINT32_(1) << 10)
2087 
2088 #define PIN_PA11H_QSPI_DATA3                       _UINT32_(11)
2089 #define MUX_PA11H_QSPI_DATA3                       _UINT32_(7)
2090 #define PINMUX_PA11H_QSPI_DATA3                    ((PIN_PA11H_QSPI_DATA3 << 16) | MUX_PA11H_QSPI_DATA3)
2091 #define PORT_PA11H_QSPI_DATA3                      (_UINT32_(1) << 11)
2092 
2093 #define PIN_PB10H_QSPI_SCK                         _UINT32_(42)
2094 #define MUX_PB10H_QSPI_SCK                         _UINT32_(7)
2095 #define PINMUX_PB10H_QSPI_SCK                      ((PIN_PB10H_QSPI_SCK << 16) | MUX_PB10H_QSPI_SCK)
2096 #define PORT_PB10H_QSPI_SCK                        (_UINT32_(1) << 10)
2097 
2098 /* ================== PORT definition for SDHC0 peripheral ================== */
2099 #define PIN_PA06I_SDHC0_SDCD                       _UINT32_(6)
2100 #define MUX_PA06I_SDHC0_SDCD                       _UINT32_(8)
2101 #define PINMUX_PA06I_SDHC0_SDCD                    ((PIN_PA06I_SDHC0_SDCD << 16) | MUX_PA06I_SDHC0_SDCD)
2102 #define PORT_PA06I_SDHC0_SDCD                      (_UINT32_(1) << 6)
2103 
2104 #define PIN_PA12I_SDHC0_SDCD                       _UINT32_(12)
2105 #define MUX_PA12I_SDHC0_SDCD                       _UINT32_(8)
2106 #define PINMUX_PA12I_SDHC0_SDCD                    ((PIN_PA12I_SDHC0_SDCD << 16) | MUX_PA12I_SDHC0_SDCD)
2107 #define PORT_PA12I_SDHC0_SDCD                      (_UINT32_(1) << 12)
2108 
2109 #define PIN_PB12I_SDHC0_SDCD                       _UINT32_(44)
2110 #define MUX_PB12I_SDHC0_SDCD                       _UINT32_(8)
2111 #define PINMUX_PB12I_SDHC0_SDCD                    ((PIN_PB12I_SDHC0_SDCD << 16) | MUX_PB12I_SDHC0_SDCD)
2112 #define PORT_PB12I_SDHC0_SDCD                      (_UINT32_(1) << 12)
2113 
2114 #define PIN_PC06I_SDHC0_SDCD                       _UINT32_(70)
2115 #define MUX_PC06I_SDHC0_SDCD                       _UINT32_(8)
2116 #define PINMUX_PC06I_SDHC0_SDCD                    ((PIN_PC06I_SDHC0_SDCD << 16) | MUX_PC06I_SDHC0_SDCD)
2117 #define PORT_PC06I_SDHC0_SDCD                      (_UINT32_(1) << 6)
2118 
2119 #define PIN_PB11I_SDHC0_SDCK                       _UINT32_(43)
2120 #define MUX_PB11I_SDHC0_SDCK                       _UINT32_(8)
2121 #define PINMUX_PB11I_SDHC0_SDCK                    ((PIN_PB11I_SDHC0_SDCK << 16) | MUX_PB11I_SDHC0_SDCK)
2122 #define PORT_PB11I_SDHC0_SDCK                      (_UINT32_(1) << 11)
2123 
2124 #define PIN_PA08I_SDHC0_SDCMD                      _UINT32_(8)
2125 #define MUX_PA08I_SDHC0_SDCMD                      _UINT32_(8)
2126 #define PINMUX_PA08I_SDHC0_SDCMD                   ((PIN_PA08I_SDHC0_SDCMD << 16) | MUX_PA08I_SDHC0_SDCMD)
2127 #define PORT_PA08I_SDHC0_SDCMD                     (_UINT32_(1) << 8)
2128 
2129 #define PIN_PA09I_SDHC0_SDDAT0                     _UINT32_(9)
2130 #define MUX_PA09I_SDHC0_SDDAT0                     _UINT32_(8)
2131 #define PINMUX_PA09I_SDHC0_SDDAT0                  ((PIN_PA09I_SDHC0_SDDAT0 << 16) | MUX_PA09I_SDHC0_SDDAT0)
2132 #define PORT_PA09I_SDHC0_SDDAT0                    (_UINT32_(1) << 9)
2133 
2134 #define PIN_PA10I_SDHC0_SDDAT1                     _UINT32_(10)
2135 #define MUX_PA10I_SDHC0_SDDAT1                     _UINT32_(8)
2136 #define PINMUX_PA10I_SDHC0_SDDAT1                  ((PIN_PA10I_SDHC0_SDDAT1 << 16) | MUX_PA10I_SDHC0_SDDAT1)
2137 #define PORT_PA10I_SDHC0_SDDAT1                    (_UINT32_(1) << 10)
2138 
2139 #define PIN_PA11I_SDHC0_SDDAT2                     _UINT32_(11)
2140 #define MUX_PA11I_SDHC0_SDDAT2                     _UINT32_(8)
2141 #define PINMUX_PA11I_SDHC0_SDDAT2                  ((PIN_PA11I_SDHC0_SDDAT2 << 16) | MUX_PA11I_SDHC0_SDDAT2)
2142 #define PORT_PA11I_SDHC0_SDDAT2                    (_UINT32_(1) << 11)
2143 
2144 #define PIN_PB10I_SDHC0_SDDAT3                     _UINT32_(42)
2145 #define MUX_PB10I_SDHC0_SDDAT3                     _UINT32_(8)
2146 #define PINMUX_PB10I_SDHC0_SDDAT3                  ((PIN_PB10I_SDHC0_SDDAT3 << 16) | MUX_PB10I_SDHC0_SDDAT3)
2147 #define PORT_PB10I_SDHC0_SDDAT3                    (_UINT32_(1) << 10)
2148 
2149 #define PIN_PA07I_SDHC0_SDWP                       _UINT32_(7)
2150 #define MUX_PA07I_SDHC0_SDWP                       _UINT32_(8)
2151 #define PINMUX_PA07I_SDHC0_SDWP                    ((PIN_PA07I_SDHC0_SDWP << 16) | MUX_PA07I_SDHC0_SDWP)
2152 #define PORT_PA07I_SDHC0_SDWP                      (_UINT32_(1) << 7)
2153 
2154 #define PIN_PA13I_SDHC0_SDWP                       _UINT32_(13)
2155 #define MUX_PA13I_SDHC0_SDWP                       _UINT32_(8)
2156 #define PINMUX_PA13I_SDHC0_SDWP                    ((PIN_PA13I_SDHC0_SDWP << 16) | MUX_PA13I_SDHC0_SDWP)
2157 #define PORT_PA13I_SDHC0_SDWP                      (_UINT32_(1) << 13)
2158 
2159 #define PIN_PB13I_SDHC0_SDWP                       _UINT32_(45)
2160 #define MUX_PB13I_SDHC0_SDWP                       _UINT32_(8)
2161 #define PINMUX_PB13I_SDHC0_SDWP                    ((PIN_PB13I_SDHC0_SDWP << 16) | MUX_PB13I_SDHC0_SDWP)
2162 #define PORT_PB13I_SDHC0_SDWP                      (_UINT32_(1) << 13)
2163 
2164 #define PIN_PC07I_SDHC0_SDWP                       _UINT32_(71)
2165 #define MUX_PC07I_SDHC0_SDWP                       _UINT32_(8)
2166 #define PINMUX_PC07I_SDHC0_SDWP                    ((PIN_PC07I_SDHC0_SDWP << 16) | MUX_PC07I_SDHC0_SDWP)
2167 #define PORT_PC07I_SDHC0_SDWP                      (_UINT32_(1) << 7)
2168 
2169 /* ================== PORT definition for SDHC1 peripheral ================== */
2170 #define PIN_PB16I_SDHC1_SDCD                       _UINT32_(48)
2171 #define MUX_PB16I_SDHC1_SDCD                       _UINT32_(8)
2172 #define PINMUX_PB16I_SDHC1_SDCD                    ((PIN_PB16I_SDHC1_SDCD << 16) | MUX_PB16I_SDHC1_SDCD)
2173 #define PORT_PB16I_SDHC1_SDCD                      (_UINT32_(1) << 16)
2174 
2175 #define PIN_PC20I_SDHC1_SDCD                       _UINT32_(84)
2176 #define MUX_PC20I_SDHC1_SDCD                       _UINT32_(8)
2177 #define PINMUX_PC20I_SDHC1_SDCD                    ((PIN_PC20I_SDHC1_SDCD << 16) | MUX_PC20I_SDHC1_SDCD)
2178 #define PORT_PC20I_SDHC1_SDCD                      (_UINT32_(1) << 20)
2179 
2180 #define PIN_PD20I_SDHC1_SDCD                       _UINT32_(116)
2181 #define MUX_PD20I_SDHC1_SDCD                       _UINT32_(8)
2182 #define PINMUX_PD20I_SDHC1_SDCD                    ((PIN_PD20I_SDHC1_SDCD << 16) | MUX_PD20I_SDHC1_SDCD)
2183 #define PORT_PD20I_SDHC1_SDCD                      (_UINT32_(1) << 20)
2184 
2185 #define PIN_PA21I_SDHC1_SDCK                       _UINT32_(21)
2186 #define MUX_PA21I_SDHC1_SDCK                       _UINT32_(8)
2187 #define PINMUX_PA21I_SDHC1_SDCK                    ((PIN_PA21I_SDHC1_SDCK << 16) | MUX_PA21I_SDHC1_SDCK)
2188 #define PORT_PA21I_SDHC1_SDCK                      (_UINT32_(1) << 21)
2189 
2190 #define PIN_PA20I_SDHC1_SDCMD                      _UINT32_(20)
2191 #define MUX_PA20I_SDHC1_SDCMD                      _UINT32_(8)
2192 #define PINMUX_PA20I_SDHC1_SDCMD                   ((PIN_PA20I_SDHC1_SDCMD << 16) | MUX_PA20I_SDHC1_SDCMD)
2193 #define PORT_PA20I_SDHC1_SDCMD                     (_UINT32_(1) << 20)
2194 
2195 #define PIN_PB18I_SDHC1_SDDAT0                     _UINT32_(50)
2196 #define MUX_PB18I_SDHC1_SDDAT0                     _UINT32_(8)
2197 #define PINMUX_PB18I_SDHC1_SDDAT0                  ((PIN_PB18I_SDHC1_SDDAT0 << 16) | MUX_PB18I_SDHC1_SDDAT0)
2198 #define PORT_PB18I_SDHC1_SDDAT0                    (_UINT32_(1) << 18)
2199 
2200 #define PIN_PB19I_SDHC1_SDDAT1                     _UINT32_(51)
2201 #define MUX_PB19I_SDHC1_SDDAT1                     _UINT32_(8)
2202 #define PINMUX_PB19I_SDHC1_SDDAT1                  ((PIN_PB19I_SDHC1_SDDAT1 << 16) | MUX_PB19I_SDHC1_SDDAT1)
2203 #define PORT_PB19I_SDHC1_SDDAT1                    (_UINT32_(1) << 19)
2204 
2205 #define PIN_PB20I_SDHC1_SDDAT2                     _UINT32_(52)
2206 #define MUX_PB20I_SDHC1_SDDAT2                     _UINT32_(8)
2207 #define PINMUX_PB20I_SDHC1_SDDAT2                  ((PIN_PB20I_SDHC1_SDDAT2 << 16) | MUX_PB20I_SDHC1_SDDAT2)
2208 #define PORT_PB20I_SDHC1_SDDAT2                    (_UINT32_(1) << 20)
2209 
2210 #define PIN_PB21I_SDHC1_SDDAT3                     _UINT32_(53)
2211 #define MUX_PB21I_SDHC1_SDDAT3                     _UINT32_(8)
2212 #define PINMUX_PB21I_SDHC1_SDDAT3                  ((PIN_PB21I_SDHC1_SDDAT3 << 16) | MUX_PB21I_SDHC1_SDDAT3)
2213 #define PORT_PB21I_SDHC1_SDDAT3                    (_UINT32_(1) << 21)
2214 
2215 #define PIN_PB17I_SDHC1_SDWP                       _UINT32_(49)
2216 #define MUX_PB17I_SDHC1_SDWP                       _UINT32_(8)
2217 #define PINMUX_PB17I_SDHC1_SDWP                    ((PIN_PB17I_SDHC1_SDWP << 16) | MUX_PB17I_SDHC1_SDWP)
2218 #define PORT_PB17I_SDHC1_SDWP                      (_UINT32_(1) << 17)
2219 
2220 #define PIN_PC21I_SDHC1_SDWP                       _UINT32_(85)
2221 #define MUX_PC21I_SDHC1_SDWP                       _UINT32_(8)
2222 #define PINMUX_PC21I_SDHC1_SDWP                    ((PIN_PC21I_SDHC1_SDWP << 16) | MUX_PC21I_SDHC1_SDWP)
2223 #define PORT_PC21I_SDHC1_SDWP                      (_UINT32_(1) << 21)
2224 
2225 #define PIN_PD21I_SDHC1_SDWP                       _UINT32_(117)
2226 #define MUX_PD21I_SDHC1_SDWP                       _UINT32_(8)
2227 #define PINMUX_PD21I_SDHC1_SDWP                    ((PIN_PD21I_SDHC1_SDWP << 16) | MUX_PD21I_SDHC1_SDWP)
2228 #define PORT_PD21I_SDHC1_SDWP                      (_UINT32_(1) << 21)
2229 
2230 /* ================= PORT definition for SERCOM0 peripheral ================= */
2231 #define PIN_PA04D_SERCOM0_PAD0                     _UINT32_(4)
2232 #define MUX_PA04D_SERCOM0_PAD0                     _UINT32_(3)
2233 #define PINMUX_PA04D_SERCOM0_PAD0                  ((PIN_PA04D_SERCOM0_PAD0 << 16) | MUX_PA04D_SERCOM0_PAD0)
2234 #define PORT_PA04D_SERCOM0_PAD0                    (_UINT32_(1) << 4)
2235 
2236 #define PIN_PC17D_SERCOM0_PAD0                     _UINT32_(81)
2237 #define MUX_PC17D_SERCOM0_PAD0                     _UINT32_(3)
2238 #define PINMUX_PC17D_SERCOM0_PAD0                  ((PIN_PC17D_SERCOM0_PAD0 << 16) | MUX_PC17D_SERCOM0_PAD0)
2239 #define PORT_PC17D_SERCOM0_PAD0                    (_UINT32_(1) << 17)
2240 
2241 #define PIN_PA08C_SERCOM0_PAD0                     _UINT32_(8)
2242 #define MUX_PA08C_SERCOM0_PAD0                     _UINT32_(2)
2243 #define PINMUX_PA08C_SERCOM0_PAD0                  ((PIN_PA08C_SERCOM0_PAD0 << 16) | MUX_PA08C_SERCOM0_PAD0)
2244 #define PORT_PA08C_SERCOM0_PAD0                    (_UINT32_(1) << 8)
2245 
2246 #define PIN_PB24C_SERCOM0_PAD0                     _UINT32_(56)
2247 #define MUX_PB24C_SERCOM0_PAD0                     _UINT32_(2)
2248 #define PINMUX_PB24C_SERCOM0_PAD0                  ((PIN_PB24C_SERCOM0_PAD0 << 16) | MUX_PB24C_SERCOM0_PAD0)
2249 #define PORT_PB24C_SERCOM0_PAD0                    (_UINT32_(1) << 24)
2250 
2251 #define PIN_PA05D_SERCOM0_PAD1                     _UINT32_(5)
2252 #define MUX_PA05D_SERCOM0_PAD1                     _UINT32_(3)
2253 #define PINMUX_PA05D_SERCOM0_PAD1                  ((PIN_PA05D_SERCOM0_PAD1 << 16) | MUX_PA05D_SERCOM0_PAD1)
2254 #define PORT_PA05D_SERCOM0_PAD1                    (_UINT32_(1) << 5)
2255 
2256 #define PIN_PC16D_SERCOM0_PAD1                     _UINT32_(80)
2257 #define MUX_PC16D_SERCOM0_PAD1                     _UINT32_(3)
2258 #define PINMUX_PC16D_SERCOM0_PAD1                  ((PIN_PC16D_SERCOM0_PAD1 << 16) | MUX_PC16D_SERCOM0_PAD1)
2259 #define PORT_PC16D_SERCOM0_PAD1                    (_UINT32_(1) << 16)
2260 
2261 #define PIN_PA09C_SERCOM0_PAD1                     _UINT32_(9)
2262 #define MUX_PA09C_SERCOM0_PAD1                     _UINT32_(2)
2263 #define PINMUX_PA09C_SERCOM0_PAD1                  ((PIN_PA09C_SERCOM0_PAD1 << 16) | MUX_PA09C_SERCOM0_PAD1)
2264 #define PORT_PA09C_SERCOM0_PAD1                    (_UINT32_(1) << 9)
2265 
2266 #define PIN_PB25C_SERCOM0_PAD1                     _UINT32_(57)
2267 #define MUX_PB25C_SERCOM0_PAD1                     _UINT32_(2)
2268 #define PINMUX_PB25C_SERCOM0_PAD1                  ((PIN_PB25C_SERCOM0_PAD1 << 16) | MUX_PB25C_SERCOM0_PAD1)
2269 #define PORT_PB25C_SERCOM0_PAD1                    (_UINT32_(1) << 25)
2270 
2271 #define PIN_PA06D_SERCOM0_PAD2                     _UINT32_(6)
2272 #define MUX_PA06D_SERCOM0_PAD2                     _UINT32_(3)
2273 #define PINMUX_PA06D_SERCOM0_PAD2                  ((PIN_PA06D_SERCOM0_PAD2 << 16) | MUX_PA06D_SERCOM0_PAD2)
2274 #define PORT_PA06D_SERCOM0_PAD2                    (_UINT32_(1) << 6)
2275 
2276 #define PIN_PC18D_SERCOM0_PAD2                     _UINT32_(82)
2277 #define MUX_PC18D_SERCOM0_PAD2                     _UINT32_(3)
2278 #define PINMUX_PC18D_SERCOM0_PAD2                  ((PIN_PC18D_SERCOM0_PAD2 << 16) | MUX_PC18D_SERCOM0_PAD2)
2279 #define PORT_PC18D_SERCOM0_PAD2                    (_UINT32_(1) << 18)
2280 
2281 #define PIN_PA10C_SERCOM0_PAD2                     _UINT32_(10)
2282 #define MUX_PA10C_SERCOM0_PAD2                     _UINT32_(2)
2283 #define PINMUX_PA10C_SERCOM0_PAD2                  ((PIN_PA10C_SERCOM0_PAD2 << 16) | MUX_PA10C_SERCOM0_PAD2)
2284 #define PORT_PA10C_SERCOM0_PAD2                    (_UINT32_(1) << 10)
2285 
2286 #define PIN_PC24C_SERCOM0_PAD2                     _UINT32_(88)
2287 #define MUX_PC24C_SERCOM0_PAD2                     _UINT32_(2)
2288 #define PINMUX_PC24C_SERCOM0_PAD2                  ((PIN_PC24C_SERCOM0_PAD2 << 16) | MUX_PC24C_SERCOM0_PAD2)
2289 #define PORT_PC24C_SERCOM0_PAD2                    (_UINT32_(1) << 24)
2290 
2291 #define PIN_PA07D_SERCOM0_PAD3                     _UINT32_(7)
2292 #define MUX_PA07D_SERCOM0_PAD3                     _UINT32_(3)
2293 #define PINMUX_PA07D_SERCOM0_PAD3                  ((PIN_PA07D_SERCOM0_PAD3 << 16) | MUX_PA07D_SERCOM0_PAD3)
2294 #define PORT_PA07D_SERCOM0_PAD3                    (_UINT32_(1) << 7)
2295 
2296 #define PIN_PC19D_SERCOM0_PAD3                     _UINT32_(83)
2297 #define MUX_PC19D_SERCOM0_PAD3                     _UINT32_(3)
2298 #define PINMUX_PC19D_SERCOM0_PAD3                  ((PIN_PC19D_SERCOM0_PAD3 << 16) | MUX_PC19D_SERCOM0_PAD3)
2299 #define PORT_PC19D_SERCOM0_PAD3                    (_UINT32_(1) << 19)
2300 
2301 #define PIN_PA11C_SERCOM0_PAD3                     _UINT32_(11)
2302 #define MUX_PA11C_SERCOM0_PAD3                     _UINT32_(2)
2303 #define PINMUX_PA11C_SERCOM0_PAD3                  ((PIN_PA11C_SERCOM0_PAD3 << 16) | MUX_PA11C_SERCOM0_PAD3)
2304 #define PORT_PA11C_SERCOM0_PAD3                    (_UINT32_(1) << 11)
2305 
2306 #define PIN_PC25C_SERCOM0_PAD3                     _UINT32_(89)
2307 #define MUX_PC25C_SERCOM0_PAD3                     _UINT32_(2)
2308 #define PINMUX_PC25C_SERCOM0_PAD3                  ((PIN_PC25C_SERCOM0_PAD3 << 16) | MUX_PC25C_SERCOM0_PAD3)
2309 #define PORT_PC25C_SERCOM0_PAD3                    (_UINT32_(1) << 25)
2310 
2311 /* ================= PORT definition for SERCOM1 peripheral ================= */
2312 #define PIN_PA00D_SERCOM1_PAD0                     _UINT32_(0)
2313 #define MUX_PA00D_SERCOM1_PAD0                     _UINT32_(3)
2314 #define PINMUX_PA00D_SERCOM1_PAD0                  ((PIN_PA00D_SERCOM1_PAD0 << 16) | MUX_PA00D_SERCOM1_PAD0)
2315 #define PORT_PA00D_SERCOM1_PAD0                    (_UINT32_(1) << 0)
2316 
2317 #define PIN_PA16C_SERCOM1_PAD0                     _UINT32_(16)
2318 #define MUX_PA16C_SERCOM1_PAD0                     _UINT32_(2)
2319 #define PINMUX_PA16C_SERCOM1_PAD0                  ((PIN_PA16C_SERCOM1_PAD0 << 16) | MUX_PA16C_SERCOM1_PAD0)
2320 #define PORT_PA16C_SERCOM1_PAD0                    (_UINT32_(1) << 16)
2321 
2322 #define PIN_PC22C_SERCOM1_PAD0                     _UINT32_(86)
2323 #define MUX_PC22C_SERCOM1_PAD0                     _UINT32_(2)
2324 #define PINMUX_PC22C_SERCOM1_PAD0                  ((PIN_PC22C_SERCOM1_PAD0 << 16) | MUX_PC22C_SERCOM1_PAD0)
2325 #define PORT_PC22C_SERCOM1_PAD0                    (_UINT32_(1) << 22)
2326 
2327 #define PIN_PC27C_SERCOM1_PAD0                     _UINT32_(91)
2328 #define MUX_PC27C_SERCOM1_PAD0                     _UINT32_(2)
2329 #define PINMUX_PC27C_SERCOM1_PAD0                  ((PIN_PC27C_SERCOM1_PAD0 << 16) | MUX_PC27C_SERCOM1_PAD0)
2330 #define PORT_PC27C_SERCOM1_PAD0                    (_UINT32_(1) << 27)
2331 
2332 #define PIN_PA01D_SERCOM1_PAD1                     _UINT32_(1)
2333 #define MUX_PA01D_SERCOM1_PAD1                     _UINT32_(3)
2334 #define PINMUX_PA01D_SERCOM1_PAD1                  ((PIN_PA01D_SERCOM1_PAD1 << 16) | MUX_PA01D_SERCOM1_PAD1)
2335 #define PORT_PA01D_SERCOM1_PAD1                    (_UINT32_(1) << 1)
2336 
2337 #define PIN_PA17C_SERCOM1_PAD1                     _UINT32_(17)
2338 #define MUX_PA17C_SERCOM1_PAD1                     _UINT32_(2)
2339 #define PINMUX_PA17C_SERCOM1_PAD1                  ((PIN_PA17C_SERCOM1_PAD1 << 16) | MUX_PA17C_SERCOM1_PAD1)
2340 #define PORT_PA17C_SERCOM1_PAD1                    (_UINT32_(1) << 17)
2341 
2342 #define PIN_PC23C_SERCOM1_PAD1                     _UINT32_(87)
2343 #define MUX_PC23C_SERCOM1_PAD1                     _UINT32_(2)
2344 #define PINMUX_PC23C_SERCOM1_PAD1                  ((PIN_PC23C_SERCOM1_PAD1 << 16) | MUX_PC23C_SERCOM1_PAD1)
2345 #define PORT_PC23C_SERCOM1_PAD1                    (_UINT32_(1) << 23)
2346 
2347 #define PIN_PC28C_SERCOM1_PAD1                     _UINT32_(92)
2348 #define MUX_PC28C_SERCOM1_PAD1                     _UINT32_(2)
2349 #define PINMUX_PC28C_SERCOM1_PAD1                  ((PIN_PC28C_SERCOM1_PAD1 << 16) | MUX_PC28C_SERCOM1_PAD1)
2350 #define PORT_PC28C_SERCOM1_PAD1                    (_UINT32_(1) << 28)
2351 
2352 #define PIN_PA30D_SERCOM1_PAD2                     _UINT32_(30)
2353 #define MUX_PA30D_SERCOM1_PAD2                     _UINT32_(3)
2354 #define PINMUX_PA30D_SERCOM1_PAD2                  ((PIN_PA30D_SERCOM1_PAD2 << 16) | MUX_PA30D_SERCOM1_PAD2)
2355 #define PORT_PA30D_SERCOM1_PAD2                    (_UINT32_(1) << 30)
2356 
2357 #define PIN_PA18C_SERCOM1_PAD2                     _UINT32_(18)
2358 #define MUX_PA18C_SERCOM1_PAD2                     _UINT32_(2)
2359 #define PINMUX_PA18C_SERCOM1_PAD2                  ((PIN_PA18C_SERCOM1_PAD2 << 16) | MUX_PA18C_SERCOM1_PAD2)
2360 #define PORT_PA18C_SERCOM1_PAD2                    (_UINT32_(1) << 18)
2361 
2362 #define PIN_PB22C_SERCOM1_PAD2                     _UINT32_(54)
2363 #define MUX_PB22C_SERCOM1_PAD2                     _UINT32_(2)
2364 #define PINMUX_PB22C_SERCOM1_PAD2                  ((PIN_PB22C_SERCOM1_PAD2 << 16) | MUX_PB22C_SERCOM1_PAD2)
2365 #define PORT_PB22C_SERCOM1_PAD2                    (_UINT32_(1) << 22)
2366 
2367 #define PIN_PD20C_SERCOM1_PAD2                     _UINT32_(116)
2368 #define MUX_PD20C_SERCOM1_PAD2                     _UINT32_(2)
2369 #define PINMUX_PD20C_SERCOM1_PAD2                  ((PIN_PD20C_SERCOM1_PAD2 << 16) | MUX_PD20C_SERCOM1_PAD2)
2370 #define PORT_PD20C_SERCOM1_PAD2                    (_UINT32_(1) << 20)
2371 
2372 #define PIN_PA31D_SERCOM1_PAD3                     _UINT32_(31)
2373 #define MUX_PA31D_SERCOM1_PAD3                     _UINT32_(3)
2374 #define PINMUX_PA31D_SERCOM1_PAD3                  ((PIN_PA31D_SERCOM1_PAD3 << 16) | MUX_PA31D_SERCOM1_PAD3)
2375 #define PORT_PA31D_SERCOM1_PAD3                    (_UINT32_(1) << 31)
2376 
2377 #define PIN_PA19C_SERCOM1_PAD3                     _UINT32_(19)
2378 #define MUX_PA19C_SERCOM1_PAD3                     _UINT32_(2)
2379 #define PINMUX_PA19C_SERCOM1_PAD3                  ((PIN_PA19C_SERCOM1_PAD3 << 16) | MUX_PA19C_SERCOM1_PAD3)
2380 #define PORT_PA19C_SERCOM1_PAD3                    (_UINT32_(1) << 19)
2381 
2382 #define PIN_PB23C_SERCOM1_PAD3                     _UINT32_(55)
2383 #define MUX_PB23C_SERCOM1_PAD3                     _UINT32_(2)
2384 #define PINMUX_PB23C_SERCOM1_PAD3                  ((PIN_PB23C_SERCOM1_PAD3 << 16) | MUX_PB23C_SERCOM1_PAD3)
2385 #define PORT_PB23C_SERCOM1_PAD3                    (_UINT32_(1) << 23)
2386 
2387 #define PIN_PD21C_SERCOM1_PAD3                     _UINT32_(117)
2388 #define MUX_PD21C_SERCOM1_PAD3                     _UINT32_(2)
2389 #define PINMUX_PD21C_SERCOM1_PAD3                  ((PIN_PD21C_SERCOM1_PAD3 << 16) | MUX_PD21C_SERCOM1_PAD3)
2390 #define PORT_PD21C_SERCOM1_PAD3                    (_UINT32_(1) << 21)
2391 
2392 /* ================= PORT definition for SERCOM2 peripheral ================= */
2393 #define PIN_PA09D_SERCOM2_PAD0                     _UINT32_(9)
2394 #define MUX_PA09D_SERCOM2_PAD0                     _UINT32_(3)
2395 #define PINMUX_PA09D_SERCOM2_PAD0                  ((PIN_PA09D_SERCOM2_PAD0 << 16) | MUX_PA09D_SERCOM2_PAD0)
2396 #define PORT_PA09D_SERCOM2_PAD0                    (_UINT32_(1) << 9)
2397 
2398 #define PIN_PB25D_SERCOM2_PAD0                     _UINT32_(57)
2399 #define MUX_PB25D_SERCOM2_PAD0                     _UINT32_(3)
2400 #define PINMUX_PB25D_SERCOM2_PAD0                  ((PIN_PB25D_SERCOM2_PAD0 << 16) | MUX_PB25D_SERCOM2_PAD0)
2401 #define PORT_PB25D_SERCOM2_PAD0                    (_UINT32_(1) << 25)
2402 
2403 #define PIN_PA12C_SERCOM2_PAD0                     _UINT32_(12)
2404 #define MUX_PA12C_SERCOM2_PAD0                     _UINT32_(2)
2405 #define PINMUX_PA12C_SERCOM2_PAD0                  ((PIN_PA12C_SERCOM2_PAD0 << 16) | MUX_PA12C_SERCOM2_PAD0)
2406 #define PORT_PA12C_SERCOM2_PAD0                    (_UINT32_(1) << 12)
2407 
2408 #define PIN_PB26C_SERCOM2_PAD0                     _UINT32_(58)
2409 #define MUX_PB26C_SERCOM2_PAD0                     _UINT32_(2)
2410 #define PINMUX_PB26C_SERCOM2_PAD0                  ((PIN_PB26C_SERCOM2_PAD0 << 16) | MUX_PB26C_SERCOM2_PAD0)
2411 #define PORT_PB26C_SERCOM2_PAD0                    (_UINT32_(1) << 26)
2412 
2413 #define PIN_PA08D_SERCOM2_PAD1                     _UINT32_(8)
2414 #define MUX_PA08D_SERCOM2_PAD1                     _UINT32_(3)
2415 #define PINMUX_PA08D_SERCOM2_PAD1                  ((PIN_PA08D_SERCOM2_PAD1 << 16) | MUX_PA08D_SERCOM2_PAD1)
2416 #define PORT_PA08D_SERCOM2_PAD1                    (_UINT32_(1) << 8)
2417 
2418 #define PIN_PB24D_SERCOM2_PAD1                     _UINT32_(56)
2419 #define MUX_PB24D_SERCOM2_PAD1                     _UINT32_(3)
2420 #define PINMUX_PB24D_SERCOM2_PAD1                  ((PIN_PB24D_SERCOM2_PAD1 << 16) | MUX_PB24D_SERCOM2_PAD1)
2421 #define PORT_PB24D_SERCOM2_PAD1                    (_UINT32_(1) << 24)
2422 
2423 #define PIN_PA13C_SERCOM2_PAD1                     _UINT32_(13)
2424 #define MUX_PA13C_SERCOM2_PAD1                     _UINT32_(2)
2425 #define PINMUX_PA13C_SERCOM2_PAD1                  ((PIN_PA13C_SERCOM2_PAD1 << 16) | MUX_PA13C_SERCOM2_PAD1)
2426 #define PORT_PA13C_SERCOM2_PAD1                    (_UINT32_(1) << 13)
2427 
2428 #define PIN_PB27C_SERCOM2_PAD1                     _UINT32_(59)
2429 #define MUX_PB27C_SERCOM2_PAD1                     _UINT32_(2)
2430 #define PINMUX_PB27C_SERCOM2_PAD1                  ((PIN_PB27C_SERCOM2_PAD1 << 16) | MUX_PB27C_SERCOM2_PAD1)
2431 #define PORT_PB27C_SERCOM2_PAD1                    (_UINT32_(1) << 27)
2432 
2433 #define PIN_PA10D_SERCOM2_PAD2                     _UINT32_(10)
2434 #define MUX_PA10D_SERCOM2_PAD2                     _UINT32_(3)
2435 #define PINMUX_PA10D_SERCOM2_PAD2                  ((PIN_PA10D_SERCOM2_PAD2 << 16) | MUX_PA10D_SERCOM2_PAD2)
2436 #define PORT_PA10D_SERCOM2_PAD2                    (_UINT32_(1) << 10)
2437 
2438 #define PIN_PC24D_SERCOM2_PAD2                     _UINT32_(88)
2439 #define MUX_PC24D_SERCOM2_PAD2                     _UINT32_(3)
2440 #define PINMUX_PC24D_SERCOM2_PAD2                  ((PIN_PC24D_SERCOM2_PAD2 << 16) | MUX_PC24D_SERCOM2_PAD2)
2441 #define PORT_PC24D_SERCOM2_PAD2                    (_UINT32_(1) << 24)
2442 
2443 #define PIN_PB28C_SERCOM2_PAD2                     _UINT32_(60)
2444 #define MUX_PB28C_SERCOM2_PAD2                     _UINT32_(2)
2445 #define PINMUX_PB28C_SERCOM2_PAD2                  ((PIN_PB28C_SERCOM2_PAD2 << 16) | MUX_PB28C_SERCOM2_PAD2)
2446 #define PORT_PB28C_SERCOM2_PAD2                    (_UINT32_(1) << 28)
2447 
2448 #define PIN_PA14C_SERCOM2_PAD2                     _UINT32_(14)
2449 #define MUX_PA14C_SERCOM2_PAD2                     _UINT32_(2)
2450 #define PINMUX_PA14C_SERCOM2_PAD2                  ((PIN_PA14C_SERCOM2_PAD2 << 16) | MUX_PA14C_SERCOM2_PAD2)
2451 #define PORT_PA14C_SERCOM2_PAD2                    (_UINT32_(1) << 14)
2452 
2453 #define PIN_PA11D_SERCOM2_PAD3                     _UINT32_(11)
2454 #define MUX_PA11D_SERCOM2_PAD3                     _UINT32_(3)
2455 #define PINMUX_PA11D_SERCOM2_PAD3                  ((PIN_PA11D_SERCOM2_PAD3 << 16) | MUX_PA11D_SERCOM2_PAD3)
2456 #define PORT_PA11D_SERCOM2_PAD3                    (_UINT32_(1) << 11)
2457 
2458 #define PIN_PC25D_SERCOM2_PAD3                     _UINT32_(89)
2459 #define MUX_PC25D_SERCOM2_PAD3                     _UINT32_(3)
2460 #define PINMUX_PC25D_SERCOM2_PAD3                  ((PIN_PC25D_SERCOM2_PAD3 << 16) | MUX_PC25D_SERCOM2_PAD3)
2461 #define PORT_PC25D_SERCOM2_PAD3                    (_UINT32_(1) << 25)
2462 
2463 #define PIN_PB29C_SERCOM2_PAD3                     _UINT32_(61)
2464 #define MUX_PB29C_SERCOM2_PAD3                     _UINT32_(2)
2465 #define PINMUX_PB29C_SERCOM2_PAD3                  ((PIN_PB29C_SERCOM2_PAD3 << 16) | MUX_PB29C_SERCOM2_PAD3)
2466 #define PORT_PB29C_SERCOM2_PAD3                    (_UINT32_(1) << 29)
2467 
2468 #define PIN_PA15C_SERCOM2_PAD3                     _UINT32_(15)
2469 #define MUX_PA15C_SERCOM2_PAD3                     _UINT32_(2)
2470 #define PINMUX_PA15C_SERCOM2_PAD3                  ((PIN_PA15C_SERCOM2_PAD3 << 16) | MUX_PA15C_SERCOM2_PAD3)
2471 #define PORT_PA15C_SERCOM2_PAD3                    (_UINT32_(1) << 15)
2472 
2473 /* ================= PORT definition for SERCOM3 peripheral ================= */
2474 #define PIN_PA17D_SERCOM3_PAD0                     _UINT32_(17)
2475 #define MUX_PA17D_SERCOM3_PAD0                     _UINT32_(3)
2476 #define PINMUX_PA17D_SERCOM3_PAD0                  ((PIN_PA17D_SERCOM3_PAD0 << 16) | MUX_PA17D_SERCOM3_PAD0)
2477 #define PORT_PA17D_SERCOM3_PAD0                    (_UINT32_(1) << 17)
2478 
2479 #define PIN_PC23D_SERCOM3_PAD0                     _UINT32_(87)
2480 #define MUX_PC23D_SERCOM3_PAD0                     _UINT32_(3)
2481 #define PINMUX_PC23D_SERCOM3_PAD0                  ((PIN_PC23D_SERCOM3_PAD0 << 16) | MUX_PC23D_SERCOM3_PAD0)
2482 #define PORT_PC23D_SERCOM3_PAD0                    (_UINT32_(1) << 23)
2483 
2484 #define PIN_PA22C_SERCOM3_PAD0                     _UINT32_(22)
2485 #define MUX_PA22C_SERCOM3_PAD0                     _UINT32_(2)
2486 #define PINMUX_PA22C_SERCOM3_PAD0                  ((PIN_PA22C_SERCOM3_PAD0 << 16) | MUX_PA22C_SERCOM3_PAD0)
2487 #define PORT_PA22C_SERCOM3_PAD0                    (_UINT32_(1) << 22)
2488 
2489 #define PIN_PB20C_SERCOM3_PAD0                     _UINT32_(52)
2490 #define MUX_PB20C_SERCOM3_PAD0                     _UINT32_(2)
2491 #define PINMUX_PB20C_SERCOM3_PAD0                  ((PIN_PB20C_SERCOM3_PAD0 << 16) | MUX_PB20C_SERCOM3_PAD0)
2492 #define PORT_PB20C_SERCOM3_PAD0                    (_UINT32_(1) << 20)
2493 
2494 #define PIN_PA16D_SERCOM3_PAD1                     _UINT32_(16)
2495 #define MUX_PA16D_SERCOM3_PAD1                     _UINT32_(3)
2496 #define PINMUX_PA16D_SERCOM3_PAD1                  ((PIN_PA16D_SERCOM3_PAD1 << 16) | MUX_PA16D_SERCOM3_PAD1)
2497 #define PORT_PA16D_SERCOM3_PAD1                    (_UINT32_(1) << 16)
2498 
2499 #define PIN_PC22D_SERCOM3_PAD1                     _UINT32_(86)
2500 #define MUX_PC22D_SERCOM3_PAD1                     _UINT32_(3)
2501 #define PINMUX_PC22D_SERCOM3_PAD1                  ((PIN_PC22D_SERCOM3_PAD1 << 16) | MUX_PC22D_SERCOM3_PAD1)
2502 #define PORT_PC22D_SERCOM3_PAD1                    (_UINT32_(1) << 22)
2503 
2504 #define PIN_PA23C_SERCOM3_PAD1                     _UINT32_(23)
2505 #define MUX_PA23C_SERCOM3_PAD1                     _UINT32_(2)
2506 #define PINMUX_PA23C_SERCOM3_PAD1                  ((PIN_PA23C_SERCOM3_PAD1 << 16) | MUX_PA23C_SERCOM3_PAD1)
2507 #define PORT_PA23C_SERCOM3_PAD1                    (_UINT32_(1) << 23)
2508 
2509 #define PIN_PB21C_SERCOM3_PAD1                     _UINT32_(53)
2510 #define MUX_PB21C_SERCOM3_PAD1                     _UINT32_(2)
2511 #define PINMUX_PB21C_SERCOM3_PAD1                  ((PIN_PB21C_SERCOM3_PAD1 << 16) | MUX_PB21C_SERCOM3_PAD1)
2512 #define PORT_PB21C_SERCOM3_PAD1                    (_UINT32_(1) << 21)
2513 
2514 #define PIN_PA18D_SERCOM3_PAD2                     _UINT32_(18)
2515 #define MUX_PA18D_SERCOM3_PAD2                     _UINT32_(3)
2516 #define PINMUX_PA18D_SERCOM3_PAD2                  ((PIN_PA18D_SERCOM3_PAD2 << 16) | MUX_PA18D_SERCOM3_PAD2)
2517 #define PORT_PA18D_SERCOM3_PAD2                    (_UINT32_(1) << 18)
2518 
2519 #define PIN_PA20D_SERCOM3_PAD2                     _UINT32_(20)
2520 #define MUX_PA20D_SERCOM3_PAD2                     _UINT32_(3)
2521 #define PINMUX_PA20D_SERCOM3_PAD2                  ((PIN_PA20D_SERCOM3_PAD2 << 16) | MUX_PA20D_SERCOM3_PAD2)
2522 #define PORT_PA20D_SERCOM3_PAD2                    (_UINT32_(1) << 20)
2523 
2524 #define PIN_PD20D_SERCOM3_PAD2                     _UINT32_(116)
2525 #define MUX_PD20D_SERCOM3_PAD2                     _UINT32_(3)
2526 #define PINMUX_PD20D_SERCOM3_PAD2                  ((PIN_PD20D_SERCOM3_PAD2 << 16) | MUX_PD20D_SERCOM3_PAD2)
2527 #define PORT_PD20D_SERCOM3_PAD2                    (_UINT32_(1) << 20)
2528 
2529 #define PIN_PA24C_SERCOM3_PAD2                     _UINT32_(24)
2530 #define MUX_PA24C_SERCOM3_PAD2                     _UINT32_(2)
2531 #define PINMUX_PA24C_SERCOM3_PAD2                  ((PIN_PA24C_SERCOM3_PAD2 << 16) | MUX_PA24C_SERCOM3_PAD2)
2532 #define PORT_PA24C_SERCOM3_PAD2                    (_UINT32_(1) << 24)
2533 
2534 #define PIN_PA19D_SERCOM3_PAD3                     _UINT32_(19)
2535 #define MUX_PA19D_SERCOM3_PAD3                     _UINT32_(3)
2536 #define PINMUX_PA19D_SERCOM3_PAD3                  ((PIN_PA19D_SERCOM3_PAD3 << 16) | MUX_PA19D_SERCOM3_PAD3)
2537 #define PORT_PA19D_SERCOM3_PAD3                    (_UINT32_(1) << 19)
2538 
2539 #define PIN_PA21D_SERCOM3_PAD3                     _UINT32_(21)
2540 #define MUX_PA21D_SERCOM3_PAD3                     _UINT32_(3)
2541 #define PINMUX_PA21D_SERCOM3_PAD3                  ((PIN_PA21D_SERCOM3_PAD3 << 16) | MUX_PA21D_SERCOM3_PAD3)
2542 #define PORT_PA21D_SERCOM3_PAD3                    (_UINT32_(1) << 21)
2543 
2544 #define PIN_PD21D_SERCOM3_PAD3                     _UINT32_(117)
2545 #define MUX_PD21D_SERCOM3_PAD3                     _UINT32_(3)
2546 #define PINMUX_PD21D_SERCOM3_PAD3                  ((PIN_PD21D_SERCOM3_PAD3 << 16) | MUX_PD21D_SERCOM3_PAD3)
2547 #define PORT_PD21D_SERCOM3_PAD3                    (_UINT32_(1) << 21)
2548 
2549 #define PIN_PA25C_SERCOM3_PAD3                     _UINT32_(25)
2550 #define MUX_PA25C_SERCOM3_PAD3                     _UINT32_(2)
2551 #define PINMUX_PA25C_SERCOM3_PAD3                  ((PIN_PA25C_SERCOM3_PAD3 << 16) | MUX_PA25C_SERCOM3_PAD3)
2552 #define PORT_PA25C_SERCOM3_PAD3                    (_UINT32_(1) << 25)
2553 
2554 /* ================= PORT definition for SERCOM4 peripheral ================= */
2555 #define PIN_PA13D_SERCOM4_PAD0                     _UINT32_(13)
2556 #define MUX_PA13D_SERCOM4_PAD0                     _UINT32_(3)
2557 #define PINMUX_PA13D_SERCOM4_PAD0                  ((PIN_PA13D_SERCOM4_PAD0 << 16) | MUX_PA13D_SERCOM4_PAD0)
2558 #define PORT_PA13D_SERCOM4_PAD0                    (_UINT32_(1) << 13)
2559 
2560 #define PIN_PB08D_SERCOM4_PAD0                     _UINT32_(40)
2561 #define MUX_PB08D_SERCOM4_PAD0                     _UINT32_(3)
2562 #define PINMUX_PB08D_SERCOM4_PAD0                  ((PIN_PB08D_SERCOM4_PAD0 << 16) | MUX_PB08D_SERCOM4_PAD0)
2563 #define PORT_PB08D_SERCOM4_PAD0                    (_UINT32_(1) << 8)
2564 
2565 #define PIN_PB27D_SERCOM4_PAD0                     _UINT32_(59)
2566 #define MUX_PB27D_SERCOM4_PAD0                     _UINT32_(3)
2567 #define PINMUX_PB27D_SERCOM4_PAD0                  ((PIN_PB27D_SERCOM4_PAD0 << 16) | MUX_PB27D_SERCOM4_PAD0)
2568 #define PORT_PB27D_SERCOM4_PAD0                    (_UINT32_(1) << 27)
2569 
2570 #define PIN_PB12C_SERCOM4_PAD0                     _UINT32_(44)
2571 #define MUX_PB12C_SERCOM4_PAD0                     _UINT32_(2)
2572 #define PINMUX_PB12C_SERCOM4_PAD0                  ((PIN_PB12C_SERCOM4_PAD0 << 16) | MUX_PB12C_SERCOM4_PAD0)
2573 #define PORT_PB12C_SERCOM4_PAD0                    (_UINT32_(1) << 12)
2574 
2575 #define PIN_PA12D_SERCOM4_PAD1                     _UINT32_(12)
2576 #define MUX_PA12D_SERCOM4_PAD1                     _UINT32_(3)
2577 #define PINMUX_PA12D_SERCOM4_PAD1                  ((PIN_PA12D_SERCOM4_PAD1 << 16) | MUX_PA12D_SERCOM4_PAD1)
2578 #define PORT_PA12D_SERCOM4_PAD1                    (_UINT32_(1) << 12)
2579 
2580 #define PIN_PB09D_SERCOM4_PAD1                     _UINT32_(41)
2581 #define MUX_PB09D_SERCOM4_PAD1                     _UINT32_(3)
2582 #define PINMUX_PB09D_SERCOM4_PAD1                  ((PIN_PB09D_SERCOM4_PAD1 << 16) | MUX_PB09D_SERCOM4_PAD1)
2583 #define PORT_PB09D_SERCOM4_PAD1                    (_UINT32_(1) << 9)
2584 
2585 #define PIN_PB26D_SERCOM4_PAD1                     _UINT32_(58)
2586 #define MUX_PB26D_SERCOM4_PAD1                     _UINT32_(3)
2587 #define PINMUX_PB26D_SERCOM4_PAD1                  ((PIN_PB26D_SERCOM4_PAD1 << 16) | MUX_PB26D_SERCOM4_PAD1)
2588 #define PORT_PB26D_SERCOM4_PAD1                    (_UINT32_(1) << 26)
2589 
2590 #define PIN_PB13C_SERCOM4_PAD1                     _UINT32_(45)
2591 #define MUX_PB13C_SERCOM4_PAD1                     _UINT32_(2)
2592 #define PINMUX_PB13C_SERCOM4_PAD1                  ((PIN_PB13C_SERCOM4_PAD1 << 16) | MUX_PB13C_SERCOM4_PAD1)
2593 #define PORT_PB13C_SERCOM4_PAD1                    (_UINT32_(1) << 13)
2594 
2595 #define PIN_PA14D_SERCOM4_PAD2                     _UINT32_(14)
2596 #define MUX_PA14D_SERCOM4_PAD2                     _UINT32_(3)
2597 #define PINMUX_PA14D_SERCOM4_PAD2                  ((PIN_PA14D_SERCOM4_PAD2 << 16) | MUX_PA14D_SERCOM4_PAD2)
2598 #define PORT_PA14D_SERCOM4_PAD2                    (_UINT32_(1) << 14)
2599 
2600 #define PIN_PB10D_SERCOM4_PAD2                     _UINT32_(42)
2601 #define MUX_PB10D_SERCOM4_PAD2                     _UINT32_(3)
2602 #define PINMUX_PB10D_SERCOM4_PAD2                  ((PIN_PB10D_SERCOM4_PAD2 << 16) | MUX_PB10D_SERCOM4_PAD2)
2603 #define PORT_PB10D_SERCOM4_PAD2                    (_UINT32_(1) << 10)
2604 
2605 #define PIN_PB28D_SERCOM4_PAD2                     _UINT32_(60)
2606 #define MUX_PB28D_SERCOM4_PAD2                     _UINT32_(3)
2607 #define PINMUX_PB28D_SERCOM4_PAD2                  ((PIN_PB28D_SERCOM4_PAD2 << 16) | MUX_PB28D_SERCOM4_PAD2)
2608 #define PORT_PB28D_SERCOM4_PAD2                    (_UINT32_(1) << 28)
2609 
2610 #define PIN_PB14C_SERCOM4_PAD2                     _UINT32_(46)
2611 #define MUX_PB14C_SERCOM4_PAD2                     _UINT32_(2)
2612 #define PINMUX_PB14C_SERCOM4_PAD2                  ((PIN_PB14C_SERCOM4_PAD2 << 16) | MUX_PB14C_SERCOM4_PAD2)
2613 #define PORT_PB14C_SERCOM4_PAD2                    (_UINT32_(1) << 14)
2614 
2615 #define PIN_PB11D_SERCOM4_PAD3                     _UINT32_(43)
2616 #define MUX_PB11D_SERCOM4_PAD3                     _UINT32_(3)
2617 #define PINMUX_PB11D_SERCOM4_PAD3                  ((PIN_PB11D_SERCOM4_PAD3 << 16) | MUX_PB11D_SERCOM4_PAD3)
2618 #define PORT_PB11D_SERCOM4_PAD3                    (_UINT32_(1) << 11)
2619 
2620 #define PIN_PB29D_SERCOM4_PAD3                     _UINT32_(61)
2621 #define MUX_PB29D_SERCOM4_PAD3                     _UINT32_(3)
2622 #define PINMUX_PB29D_SERCOM4_PAD3                  ((PIN_PB29D_SERCOM4_PAD3 << 16) | MUX_PB29D_SERCOM4_PAD3)
2623 #define PORT_PB29D_SERCOM4_PAD3                    (_UINT32_(1) << 29)
2624 
2625 #define PIN_PA15D_SERCOM4_PAD3                     _UINT32_(15)
2626 #define MUX_PA15D_SERCOM4_PAD3                     _UINT32_(3)
2627 #define PINMUX_PA15D_SERCOM4_PAD3                  ((PIN_PA15D_SERCOM4_PAD3 << 16) | MUX_PA15D_SERCOM4_PAD3)
2628 #define PORT_PA15D_SERCOM4_PAD3                    (_UINT32_(1) << 15)
2629 
2630 #define PIN_PB15C_SERCOM4_PAD3                     _UINT32_(47)
2631 #define MUX_PB15C_SERCOM4_PAD3                     _UINT32_(2)
2632 #define PINMUX_PB15C_SERCOM4_PAD3                  ((PIN_PB15C_SERCOM4_PAD3 << 16) | MUX_PB15C_SERCOM4_PAD3)
2633 #define PORT_PB15C_SERCOM4_PAD3                    (_UINT32_(1) << 15)
2634 
2635 /* ================= PORT definition for SERCOM5 peripheral ================= */
2636 #define PIN_PA23D_SERCOM5_PAD0                     _UINT32_(23)
2637 #define MUX_PA23D_SERCOM5_PAD0                     _UINT32_(3)
2638 #define PINMUX_PA23D_SERCOM5_PAD0                  ((PIN_PA23D_SERCOM5_PAD0 << 16) | MUX_PA23D_SERCOM5_PAD0)
2639 #define PORT_PA23D_SERCOM5_PAD0                    (_UINT32_(1) << 23)
2640 
2641 #define PIN_PB02D_SERCOM5_PAD0                     _UINT32_(34)
2642 #define MUX_PB02D_SERCOM5_PAD0                     _UINT32_(3)
2643 #define PINMUX_PB02D_SERCOM5_PAD0                  ((PIN_PB02D_SERCOM5_PAD0 << 16) | MUX_PB02D_SERCOM5_PAD0)
2644 #define PORT_PB02D_SERCOM5_PAD0                    (_UINT32_(1) << 2)
2645 
2646 #define PIN_PB31D_SERCOM5_PAD0                     _UINT32_(63)
2647 #define MUX_PB31D_SERCOM5_PAD0                     _UINT32_(3)
2648 #define PINMUX_PB31D_SERCOM5_PAD0                  ((PIN_PB31D_SERCOM5_PAD0 << 16) | MUX_PB31D_SERCOM5_PAD0)
2649 #define PORT_PB31D_SERCOM5_PAD0                    (_UINT32_(1) << 31)
2650 
2651 #define PIN_PB16C_SERCOM5_PAD0                     _UINT32_(48)
2652 #define MUX_PB16C_SERCOM5_PAD0                     _UINT32_(2)
2653 #define PINMUX_PB16C_SERCOM5_PAD0                  ((PIN_PB16C_SERCOM5_PAD0 << 16) | MUX_PB16C_SERCOM5_PAD0)
2654 #define PORT_PB16C_SERCOM5_PAD0                    (_UINT32_(1) << 16)
2655 
2656 #define PIN_PA22D_SERCOM5_PAD1                     _UINT32_(22)
2657 #define MUX_PA22D_SERCOM5_PAD1                     _UINT32_(3)
2658 #define PINMUX_PA22D_SERCOM5_PAD1                  ((PIN_PA22D_SERCOM5_PAD1 << 16) | MUX_PA22D_SERCOM5_PAD1)
2659 #define PORT_PA22D_SERCOM5_PAD1                    (_UINT32_(1) << 22)
2660 
2661 #define PIN_PB03D_SERCOM5_PAD1                     _UINT32_(35)
2662 #define MUX_PB03D_SERCOM5_PAD1                     _UINT32_(3)
2663 #define PINMUX_PB03D_SERCOM5_PAD1                  ((PIN_PB03D_SERCOM5_PAD1 << 16) | MUX_PB03D_SERCOM5_PAD1)
2664 #define PORT_PB03D_SERCOM5_PAD1                    (_UINT32_(1) << 3)
2665 
2666 #define PIN_PB30D_SERCOM5_PAD1                     _UINT32_(62)
2667 #define MUX_PB30D_SERCOM5_PAD1                     _UINT32_(3)
2668 #define PINMUX_PB30D_SERCOM5_PAD1                  ((PIN_PB30D_SERCOM5_PAD1 << 16) | MUX_PB30D_SERCOM5_PAD1)
2669 #define PORT_PB30D_SERCOM5_PAD1                    (_UINT32_(1) << 30)
2670 
2671 #define PIN_PB17C_SERCOM5_PAD1                     _UINT32_(49)
2672 #define MUX_PB17C_SERCOM5_PAD1                     _UINT32_(2)
2673 #define PINMUX_PB17C_SERCOM5_PAD1                  ((PIN_PB17C_SERCOM5_PAD1 << 16) | MUX_PB17C_SERCOM5_PAD1)
2674 #define PORT_PB17C_SERCOM5_PAD1                    (_UINT32_(1) << 17)
2675 
2676 #define PIN_PA24D_SERCOM5_PAD2                     _UINT32_(24)
2677 #define MUX_PA24D_SERCOM5_PAD2                     _UINT32_(3)
2678 #define PINMUX_PA24D_SERCOM5_PAD2                  ((PIN_PA24D_SERCOM5_PAD2 << 16) | MUX_PA24D_SERCOM5_PAD2)
2679 #define PORT_PA24D_SERCOM5_PAD2                    (_UINT32_(1) << 24)
2680 
2681 #define PIN_PB00D_SERCOM5_PAD2                     _UINT32_(32)
2682 #define MUX_PB00D_SERCOM5_PAD2                     _UINT32_(3)
2683 #define PINMUX_PB00D_SERCOM5_PAD2                  ((PIN_PB00D_SERCOM5_PAD2 << 16) | MUX_PB00D_SERCOM5_PAD2)
2684 #define PORT_PB00D_SERCOM5_PAD2                    (_UINT32_(1) << 0)
2685 
2686 #define PIN_PB22D_SERCOM5_PAD2                     _UINT32_(54)
2687 #define MUX_PB22D_SERCOM5_PAD2                     _UINT32_(3)
2688 #define PINMUX_PB22D_SERCOM5_PAD2                  ((PIN_PB22D_SERCOM5_PAD2 << 16) | MUX_PB22D_SERCOM5_PAD2)
2689 #define PORT_PB22D_SERCOM5_PAD2                    (_UINT32_(1) << 22)
2690 
2691 #define PIN_PA20C_SERCOM5_PAD2                     _UINT32_(20)
2692 #define MUX_PA20C_SERCOM5_PAD2                     _UINT32_(2)
2693 #define PINMUX_PA20C_SERCOM5_PAD2                  ((PIN_PA20C_SERCOM5_PAD2 << 16) | MUX_PA20C_SERCOM5_PAD2)
2694 #define PORT_PA20C_SERCOM5_PAD2                    (_UINT32_(1) << 20)
2695 
2696 #define PIN_PB18C_SERCOM5_PAD2                     _UINT32_(50)
2697 #define MUX_PB18C_SERCOM5_PAD2                     _UINT32_(2)
2698 #define PINMUX_PB18C_SERCOM5_PAD2                  ((PIN_PB18C_SERCOM5_PAD2 << 16) | MUX_PB18C_SERCOM5_PAD2)
2699 #define PORT_PB18C_SERCOM5_PAD2                    (_UINT32_(1) << 18)
2700 
2701 #define PIN_PA25D_SERCOM5_PAD3                     _UINT32_(25)
2702 #define MUX_PA25D_SERCOM5_PAD3                     _UINT32_(3)
2703 #define PINMUX_PA25D_SERCOM5_PAD3                  ((PIN_PA25D_SERCOM5_PAD3 << 16) | MUX_PA25D_SERCOM5_PAD3)
2704 #define PORT_PA25D_SERCOM5_PAD3                    (_UINT32_(1) << 25)
2705 
2706 #define PIN_PB01D_SERCOM5_PAD3                     _UINT32_(33)
2707 #define MUX_PB01D_SERCOM5_PAD3                     _UINT32_(3)
2708 #define PINMUX_PB01D_SERCOM5_PAD3                  ((PIN_PB01D_SERCOM5_PAD3 << 16) | MUX_PB01D_SERCOM5_PAD3)
2709 #define PORT_PB01D_SERCOM5_PAD3                    (_UINT32_(1) << 1)
2710 
2711 #define PIN_PB23D_SERCOM5_PAD3                     _UINT32_(55)
2712 #define MUX_PB23D_SERCOM5_PAD3                     _UINT32_(3)
2713 #define PINMUX_PB23D_SERCOM5_PAD3                  ((PIN_PB23D_SERCOM5_PAD3 << 16) | MUX_PB23D_SERCOM5_PAD3)
2714 #define PORT_PB23D_SERCOM5_PAD3                    (_UINT32_(1) << 23)
2715 
2716 #define PIN_PA21C_SERCOM5_PAD3                     _UINT32_(21)
2717 #define MUX_PA21C_SERCOM5_PAD3                     _UINT32_(2)
2718 #define PINMUX_PA21C_SERCOM5_PAD3                  ((PIN_PA21C_SERCOM5_PAD3 << 16) | MUX_PA21C_SERCOM5_PAD3)
2719 #define PORT_PA21C_SERCOM5_PAD3                    (_UINT32_(1) << 21)
2720 
2721 #define PIN_PB19C_SERCOM5_PAD3                     _UINT32_(51)
2722 #define MUX_PB19C_SERCOM5_PAD3                     _UINT32_(2)
2723 #define PINMUX_PB19C_SERCOM5_PAD3                  ((PIN_PB19C_SERCOM5_PAD3 << 16) | MUX_PB19C_SERCOM5_PAD3)
2724 #define PORT_PB19C_SERCOM5_PAD3                    (_UINT32_(1) << 19)
2725 
2726 /* ================= PORT definition for SERCOM6 peripheral ================= */
2727 #define PIN_PD09D_SERCOM6_PAD0                     _UINT32_(105)
2728 #define MUX_PD09D_SERCOM6_PAD0                     _UINT32_(3)
2729 #define PINMUX_PD09D_SERCOM6_PAD0                  ((PIN_PD09D_SERCOM6_PAD0 << 16) | MUX_PD09D_SERCOM6_PAD0)
2730 #define PORT_PD09D_SERCOM6_PAD0                    (_UINT32_(1) << 9)
2731 
2732 #define PIN_PC13D_SERCOM6_PAD0                     _UINT32_(77)
2733 #define MUX_PC13D_SERCOM6_PAD0                     _UINT32_(3)
2734 #define PINMUX_PC13D_SERCOM6_PAD0                  ((PIN_PC13D_SERCOM6_PAD0 << 16) | MUX_PC13D_SERCOM6_PAD0)
2735 #define PORT_PC13D_SERCOM6_PAD0                    (_UINT32_(1) << 13)
2736 
2737 #define PIN_PC04C_SERCOM6_PAD0                     _UINT32_(68)
2738 #define MUX_PC04C_SERCOM6_PAD0                     _UINT32_(2)
2739 #define PINMUX_PC04C_SERCOM6_PAD0                  ((PIN_PC04C_SERCOM6_PAD0 << 16) | MUX_PC04C_SERCOM6_PAD0)
2740 #define PORT_PC04C_SERCOM6_PAD0                    (_UINT32_(1) << 4)
2741 
2742 #define PIN_PC16C_SERCOM6_PAD0                     _UINT32_(80)
2743 #define MUX_PC16C_SERCOM6_PAD0                     _UINT32_(2)
2744 #define PINMUX_PC16C_SERCOM6_PAD0                  ((PIN_PC16C_SERCOM6_PAD0 << 16) | MUX_PC16C_SERCOM6_PAD0)
2745 #define PORT_PC16C_SERCOM6_PAD0                    (_UINT32_(1) << 16)
2746 
2747 #define PIN_PD08D_SERCOM6_PAD1                     _UINT32_(104)
2748 #define MUX_PD08D_SERCOM6_PAD1                     _UINT32_(3)
2749 #define PINMUX_PD08D_SERCOM6_PAD1                  ((PIN_PD08D_SERCOM6_PAD1 << 16) | MUX_PD08D_SERCOM6_PAD1)
2750 #define PORT_PD08D_SERCOM6_PAD1                    (_UINT32_(1) << 8)
2751 
2752 #define PIN_PC12D_SERCOM6_PAD1                     _UINT32_(76)
2753 #define MUX_PC12D_SERCOM6_PAD1                     _UINT32_(3)
2754 #define PINMUX_PC12D_SERCOM6_PAD1                  ((PIN_PC12D_SERCOM6_PAD1 << 16) | MUX_PC12D_SERCOM6_PAD1)
2755 #define PORT_PC12D_SERCOM6_PAD1                    (_UINT32_(1) << 12)
2756 
2757 #define PIN_PC05C_SERCOM6_PAD1                     _UINT32_(69)
2758 #define MUX_PC05C_SERCOM6_PAD1                     _UINT32_(2)
2759 #define PINMUX_PC05C_SERCOM6_PAD1                  ((PIN_PC05C_SERCOM6_PAD1 << 16) | MUX_PC05C_SERCOM6_PAD1)
2760 #define PORT_PC05C_SERCOM6_PAD1                    (_UINT32_(1) << 5)
2761 
2762 #define PIN_PC17C_SERCOM6_PAD1                     _UINT32_(81)
2763 #define MUX_PC17C_SERCOM6_PAD1                     _UINT32_(2)
2764 #define PINMUX_PC17C_SERCOM6_PAD1                  ((PIN_PC17C_SERCOM6_PAD1 << 16) | MUX_PC17C_SERCOM6_PAD1)
2765 #define PORT_PC17C_SERCOM6_PAD1                    (_UINT32_(1) << 17)
2766 
2767 #define PIN_PC14D_SERCOM6_PAD2                     _UINT32_(78)
2768 #define MUX_PC14D_SERCOM6_PAD2                     _UINT32_(3)
2769 #define PINMUX_PC14D_SERCOM6_PAD2                  ((PIN_PC14D_SERCOM6_PAD2 << 16) | MUX_PC14D_SERCOM6_PAD2)
2770 #define PORT_PC14D_SERCOM6_PAD2                    (_UINT32_(1) << 14)
2771 
2772 #define PIN_PD10D_SERCOM6_PAD2                     _UINT32_(106)
2773 #define MUX_PD10D_SERCOM6_PAD2                     _UINT32_(3)
2774 #define PINMUX_PD10D_SERCOM6_PAD2                  ((PIN_PD10D_SERCOM6_PAD2 << 16) | MUX_PD10D_SERCOM6_PAD2)
2775 #define PORT_PD10D_SERCOM6_PAD2                    (_UINT32_(1) << 10)
2776 
2777 #define PIN_PC06C_SERCOM6_PAD2                     _UINT32_(70)
2778 #define MUX_PC06C_SERCOM6_PAD2                     _UINT32_(2)
2779 #define PINMUX_PC06C_SERCOM6_PAD2                  ((PIN_PC06C_SERCOM6_PAD2 << 16) | MUX_PC06C_SERCOM6_PAD2)
2780 #define PORT_PC06C_SERCOM6_PAD2                    (_UINT32_(1) << 6)
2781 
2782 #define PIN_PC10C_SERCOM6_PAD2                     _UINT32_(74)
2783 #define MUX_PC10C_SERCOM6_PAD2                     _UINT32_(2)
2784 #define PINMUX_PC10C_SERCOM6_PAD2                  ((PIN_PC10C_SERCOM6_PAD2 << 16) | MUX_PC10C_SERCOM6_PAD2)
2785 #define PORT_PC10C_SERCOM6_PAD2                    (_UINT32_(1) << 10)
2786 
2787 #define PIN_PC18C_SERCOM6_PAD2                     _UINT32_(82)
2788 #define MUX_PC18C_SERCOM6_PAD2                     _UINT32_(2)
2789 #define PINMUX_PC18C_SERCOM6_PAD2                  ((PIN_PC18C_SERCOM6_PAD2 << 16) | MUX_PC18C_SERCOM6_PAD2)
2790 #define PORT_PC18C_SERCOM6_PAD2                    (_UINT32_(1) << 18)
2791 
2792 #define PIN_PC15D_SERCOM6_PAD3                     _UINT32_(79)
2793 #define MUX_PC15D_SERCOM6_PAD3                     _UINT32_(3)
2794 #define PINMUX_PC15D_SERCOM6_PAD3                  ((PIN_PC15D_SERCOM6_PAD3 << 16) | MUX_PC15D_SERCOM6_PAD3)
2795 #define PORT_PC15D_SERCOM6_PAD3                    (_UINT32_(1) << 15)
2796 
2797 #define PIN_PD11D_SERCOM6_PAD3                     _UINT32_(107)
2798 #define MUX_PD11D_SERCOM6_PAD3                     _UINT32_(3)
2799 #define PINMUX_PD11D_SERCOM6_PAD3                  ((PIN_PD11D_SERCOM6_PAD3 << 16) | MUX_PD11D_SERCOM6_PAD3)
2800 #define PORT_PD11D_SERCOM6_PAD3                    (_UINT32_(1) << 11)
2801 
2802 #define PIN_PC07C_SERCOM6_PAD3                     _UINT32_(71)
2803 #define MUX_PC07C_SERCOM6_PAD3                     _UINT32_(2)
2804 #define PINMUX_PC07C_SERCOM6_PAD3                  ((PIN_PC07C_SERCOM6_PAD3 << 16) | MUX_PC07C_SERCOM6_PAD3)
2805 #define PORT_PC07C_SERCOM6_PAD3                    (_UINT32_(1) << 7)
2806 
2807 #define PIN_PC11C_SERCOM6_PAD3                     _UINT32_(75)
2808 #define MUX_PC11C_SERCOM6_PAD3                     _UINT32_(2)
2809 #define PINMUX_PC11C_SERCOM6_PAD3                  ((PIN_PC11C_SERCOM6_PAD3 << 16) | MUX_PC11C_SERCOM6_PAD3)
2810 #define PORT_PC11C_SERCOM6_PAD3                    (_UINT32_(1) << 11)
2811 
2812 #define PIN_PC19C_SERCOM6_PAD3                     _UINT32_(83)
2813 #define MUX_PC19C_SERCOM6_PAD3                     _UINT32_(2)
2814 #define PINMUX_PC19C_SERCOM6_PAD3                  ((PIN_PC19C_SERCOM6_PAD3 << 16) | MUX_PC19C_SERCOM6_PAD3)
2815 #define PORT_PC19C_SERCOM6_PAD3                    (_UINT32_(1) << 19)
2816 
2817 /* ================= PORT definition for SERCOM7 peripheral ================= */
2818 #define PIN_PB21D_SERCOM7_PAD0                     _UINT32_(53)
2819 #define MUX_PB21D_SERCOM7_PAD0                     _UINT32_(3)
2820 #define PINMUX_PB21D_SERCOM7_PAD0                  ((PIN_PB21D_SERCOM7_PAD0 << 16) | MUX_PB21D_SERCOM7_PAD0)
2821 #define PORT_PB21D_SERCOM7_PAD0                    (_UINT32_(1) << 21)
2822 
2823 #define PIN_PD08C_SERCOM7_PAD0                     _UINT32_(104)
2824 #define MUX_PD08C_SERCOM7_PAD0                     _UINT32_(2)
2825 #define PINMUX_PD08C_SERCOM7_PAD0                  ((PIN_PD08C_SERCOM7_PAD0 << 16) | MUX_PD08C_SERCOM7_PAD0)
2826 #define PORT_PD08C_SERCOM7_PAD0                    (_UINT32_(1) << 8)
2827 
2828 #define PIN_PB30C_SERCOM7_PAD0                     _UINT32_(62)
2829 #define MUX_PB30C_SERCOM7_PAD0                     _UINT32_(2)
2830 #define PINMUX_PB30C_SERCOM7_PAD0                  ((PIN_PB30C_SERCOM7_PAD0 << 16) | MUX_PB30C_SERCOM7_PAD0)
2831 #define PORT_PB30C_SERCOM7_PAD0                    (_UINT32_(1) << 30)
2832 
2833 #define PIN_PC12C_SERCOM7_PAD0                     _UINT32_(76)
2834 #define MUX_PC12C_SERCOM7_PAD0                     _UINT32_(2)
2835 #define PINMUX_PC12C_SERCOM7_PAD0                  ((PIN_PC12C_SERCOM7_PAD0 << 16) | MUX_PC12C_SERCOM7_PAD0)
2836 #define PORT_PC12C_SERCOM7_PAD0                    (_UINT32_(1) << 12)
2837 
2838 #define PIN_PB20D_SERCOM7_PAD1                     _UINT32_(52)
2839 #define MUX_PB20D_SERCOM7_PAD1                     _UINT32_(3)
2840 #define PINMUX_PB20D_SERCOM7_PAD1                  ((PIN_PB20D_SERCOM7_PAD1 << 16) | MUX_PB20D_SERCOM7_PAD1)
2841 #define PORT_PB20D_SERCOM7_PAD1                    (_UINT32_(1) << 20)
2842 
2843 #define PIN_PD09C_SERCOM7_PAD1                     _UINT32_(105)
2844 #define MUX_PD09C_SERCOM7_PAD1                     _UINT32_(2)
2845 #define PINMUX_PD09C_SERCOM7_PAD1                  ((PIN_PD09C_SERCOM7_PAD1 << 16) | MUX_PD09C_SERCOM7_PAD1)
2846 #define PORT_PD09C_SERCOM7_PAD1                    (_UINT32_(1) << 9)
2847 
2848 #define PIN_PB31C_SERCOM7_PAD1                     _UINT32_(63)
2849 #define MUX_PB31C_SERCOM7_PAD1                     _UINT32_(2)
2850 #define PINMUX_PB31C_SERCOM7_PAD1                  ((PIN_PB31C_SERCOM7_PAD1 << 16) | MUX_PB31C_SERCOM7_PAD1)
2851 #define PORT_PB31C_SERCOM7_PAD1                    (_UINT32_(1) << 31)
2852 
2853 #define PIN_PC13C_SERCOM7_PAD1                     _UINT32_(77)
2854 #define MUX_PC13C_SERCOM7_PAD1                     _UINT32_(2)
2855 #define PINMUX_PC13C_SERCOM7_PAD1                  ((PIN_PC13C_SERCOM7_PAD1 << 16) | MUX_PC13C_SERCOM7_PAD1)
2856 #define PORT_PC13C_SERCOM7_PAD1                    (_UINT32_(1) << 13)
2857 
2858 #define PIN_PB18D_SERCOM7_PAD2                     _UINT32_(50)
2859 #define MUX_PB18D_SERCOM7_PAD2                     _UINT32_(3)
2860 #define PINMUX_PB18D_SERCOM7_PAD2                  ((PIN_PB18D_SERCOM7_PAD2 << 16) | MUX_PB18D_SERCOM7_PAD2)
2861 #define PORT_PB18D_SERCOM7_PAD2                    (_UINT32_(1) << 18)
2862 
2863 #define PIN_PC10D_SERCOM7_PAD2                     _UINT32_(74)
2864 #define MUX_PC10D_SERCOM7_PAD2                     _UINT32_(3)
2865 #define PINMUX_PC10D_SERCOM7_PAD2                  ((PIN_PC10D_SERCOM7_PAD2 << 16) | MUX_PC10D_SERCOM7_PAD2)
2866 #define PORT_PC10D_SERCOM7_PAD2                    (_UINT32_(1) << 10)
2867 
2868 #define PIN_PC14C_SERCOM7_PAD2                     _UINT32_(78)
2869 #define MUX_PC14C_SERCOM7_PAD2                     _UINT32_(2)
2870 #define PINMUX_PC14C_SERCOM7_PAD2                  ((PIN_PC14C_SERCOM7_PAD2 << 16) | MUX_PC14C_SERCOM7_PAD2)
2871 #define PORT_PC14C_SERCOM7_PAD2                    (_UINT32_(1) << 14)
2872 
2873 #define PIN_PD10C_SERCOM7_PAD2                     _UINT32_(106)
2874 #define MUX_PD10C_SERCOM7_PAD2                     _UINT32_(2)
2875 #define PINMUX_PD10C_SERCOM7_PAD2                  ((PIN_PD10C_SERCOM7_PAD2 << 16) | MUX_PD10C_SERCOM7_PAD2)
2876 #define PORT_PD10C_SERCOM7_PAD2                    (_UINT32_(1) << 10)
2877 
2878 #define PIN_PA30C_SERCOM7_PAD2                     _UINT32_(30)
2879 #define MUX_PA30C_SERCOM7_PAD2                     _UINT32_(2)
2880 #define PINMUX_PA30C_SERCOM7_PAD2                  ((PIN_PA30C_SERCOM7_PAD2 << 16) | MUX_PA30C_SERCOM7_PAD2)
2881 #define PORT_PA30C_SERCOM7_PAD2                    (_UINT32_(1) << 30)
2882 
2883 #define PIN_PB19D_SERCOM7_PAD3                     _UINT32_(51)
2884 #define MUX_PB19D_SERCOM7_PAD3                     _UINT32_(3)
2885 #define PINMUX_PB19D_SERCOM7_PAD3                  ((PIN_PB19D_SERCOM7_PAD3 << 16) | MUX_PB19D_SERCOM7_PAD3)
2886 #define PORT_PB19D_SERCOM7_PAD3                    (_UINT32_(1) << 19)
2887 
2888 #define PIN_PC11D_SERCOM7_PAD3                     _UINT32_(75)
2889 #define MUX_PC11D_SERCOM7_PAD3                     _UINT32_(3)
2890 #define PINMUX_PC11D_SERCOM7_PAD3                  ((PIN_PC11D_SERCOM7_PAD3 << 16) | MUX_PC11D_SERCOM7_PAD3)
2891 #define PORT_PC11D_SERCOM7_PAD3                    (_UINT32_(1) << 11)
2892 
2893 #define PIN_PC15C_SERCOM7_PAD3                     _UINT32_(79)
2894 #define MUX_PC15C_SERCOM7_PAD3                     _UINT32_(2)
2895 #define PINMUX_PC15C_SERCOM7_PAD3                  ((PIN_PC15C_SERCOM7_PAD3 << 16) | MUX_PC15C_SERCOM7_PAD3)
2896 #define PORT_PC15C_SERCOM7_PAD3                    (_UINT32_(1) << 15)
2897 
2898 #define PIN_PD11C_SERCOM7_PAD3                     _UINT32_(107)
2899 #define MUX_PD11C_SERCOM7_PAD3                     _UINT32_(2)
2900 #define PINMUX_PD11C_SERCOM7_PAD3                  ((PIN_PD11C_SERCOM7_PAD3 << 16) | MUX_PD11C_SERCOM7_PAD3)
2901 #define PORT_PD11C_SERCOM7_PAD3                    (_UINT32_(1) << 11)
2902 
2903 #define PIN_PA31C_SERCOM7_PAD3                     _UINT32_(31)
2904 #define MUX_PA31C_SERCOM7_PAD3                     _UINT32_(2)
2905 #define PINMUX_PA31C_SERCOM7_PAD3                  ((PIN_PA31C_SERCOM7_PAD3 << 16) | MUX_PA31C_SERCOM7_PAD3)
2906 #define PORT_PA31C_SERCOM7_PAD3                    (_UINT32_(1) << 31)
2907 
2908 /* =================== PORT definition for TC0 peripheral =================== */
2909 #define PIN_PA04E_TC0_WO0                          _UINT32_(4)
2910 #define MUX_PA04E_TC0_WO0                          _UINT32_(4)
2911 #define PINMUX_PA04E_TC0_WO0                       ((PIN_PA04E_TC0_WO0 << 16) | MUX_PA04E_TC0_WO0)
2912 #define PORT_PA04E_TC0_WO0                         (_UINT32_(1) << 4)
2913 
2914 #define PIN_PA08E_TC0_WO0                          _UINT32_(8)
2915 #define MUX_PA08E_TC0_WO0                          _UINT32_(4)
2916 #define PINMUX_PA08E_TC0_WO0                       ((PIN_PA08E_TC0_WO0 << 16) | MUX_PA08E_TC0_WO0)
2917 #define PORT_PA08E_TC0_WO0                         (_UINT32_(1) << 8)
2918 
2919 #define PIN_PB30E_TC0_WO0                          _UINT32_(62)
2920 #define MUX_PB30E_TC0_WO0                          _UINT32_(4)
2921 #define PINMUX_PB30E_TC0_WO0                       ((PIN_PB30E_TC0_WO0 << 16) | MUX_PB30E_TC0_WO0)
2922 #define PORT_PB30E_TC0_WO0                         (_UINT32_(1) << 30)
2923 
2924 #define PIN_PA05E_TC0_WO1                          _UINT32_(5)
2925 #define MUX_PA05E_TC0_WO1                          _UINT32_(4)
2926 #define PINMUX_PA05E_TC0_WO1                       ((PIN_PA05E_TC0_WO1 << 16) | MUX_PA05E_TC0_WO1)
2927 #define PORT_PA05E_TC0_WO1                         (_UINT32_(1) << 5)
2928 
2929 #define PIN_PA09E_TC0_WO1                          _UINT32_(9)
2930 #define MUX_PA09E_TC0_WO1                          _UINT32_(4)
2931 #define PINMUX_PA09E_TC0_WO1                       ((PIN_PA09E_TC0_WO1 << 16) | MUX_PA09E_TC0_WO1)
2932 #define PORT_PA09E_TC0_WO1                         (_UINT32_(1) << 9)
2933 
2934 #define PIN_PB31E_TC0_WO1                          _UINT32_(63)
2935 #define MUX_PB31E_TC0_WO1                          _UINT32_(4)
2936 #define PINMUX_PB31E_TC0_WO1                       ((PIN_PB31E_TC0_WO1 << 16) | MUX_PB31E_TC0_WO1)
2937 #define PORT_PB31E_TC0_WO1                         (_UINT32_(1) << 31)
2938 
2939 /* =================== PORT definition for TC1 peripheral =================== */
2940 #define PIN_PA06E_TC1_WO0                          _UINT32_(6)
2941 #define MUX_PA06E_TC1_WO0                          _UINT32_(4)
2942 #define PINMUX_PA06E_TC1_WO0                       ((PIN_PA06E_TC1_WO0 << 16) | MUX_PA06E_TC1_WO0)
2943 #define PORT_PA06E_TC1_WO0                         (_UINT32_(1) << 6)
2944 
2945 #define PIN_PA10E_TC1_WO0                          _UINT32_(10)
2946 #define MUX_PA10E_TC1_WO0                          _UINT32_(4)
2947 #define PINMUX_PA10E_TC1_WO0                       ((PIN_PA10E_TC1_WO0 << 16) | MUX_PA10E_TC1_WO0)
2948 #define PORT_PA10E_TC1_WO0                         (_UINT32_(1) << 10)
2949 
2950 #define PIN_PA07E_TC1_WO1                          _UINT32_(7)
2951 #define MUX_PA07E_TC1_WO1                          _UINT32_(4)
2952 #define PINMUX_PA07E_TC1_WO1                       ((PIN_PA07E_TC1_WO1 << 16) | MUX_PA07E_TC1_WO1)
2953 #define PORT_PA07E_TC1_WO1                         (_UINT32_(1) << 7)
2954 
2955 #define PIN_PA11E_TC1_WO1                          _UINT32_(11)
2956 #define MUX_PA11E_TC1_WO1                          _UINT32_(4)
2957 #define PINMUX_PA11E_TC1_WO1                       ((PIN_PA11E_TC1_WO1 << 16) | MUX_PA11E_TC1_WO1)
2958 #define PORT_PA11E_TC1_WO1                         (_UINT32_(1) << 11)
2959 
2960 /* =================== PORT definition for TC2 peripheral =================== */
2961 #define PIN_PA12E_TC2_WO0                          _UINT32_(12)
2962 #define MUX_PA12E_TC2_WO0                          _UINT32_(4)
2963 #define PINMUX_PA12E_TC2_WO0                       ((PIN_PA12E_TC2_WO0 << 16) | MUX_PA12E_TC2_WO0)
2964 #define PORT_PA12E_TC2_WO0                         (_UINT32_(1) << 12)
2965 
2966 #define PIN_PA16E_TC2_WO0                          _UINT32_(16)
2967 #define MUX_PA16E_TC2_WO0                          _UINT32_(4)
2968 #define PINMUX_PA16E_TC2_WO0                       ((PIN_PA16E_TC2_WO0 << 16) | MUX_PA16E_TC2_WO0)
2969 #define PORT_PA16E_TC2_WO0                         (_UINT32_(1) << 16)
2970 
2971 #define PIN_PA00E_TC2_WO0                          _UINT32_(0)
2972 #define MUX_PA00E_TC2_WO0                          _UINT32_(4)
2973 #define PINMUX_PA00E_TC2_WO0                       ((PIN_PA00E_TC2_WO0 << 16) | MUX_PA00E_TC2_WO0)
2974 #define PORT_PA00E_TC2_WO0                         (_UINT32_(1) << 0)
2975 
2976 #define PIN_PA01E_TC2_WO1                          _UINT32_(1)
2977 #define MUX_PA01E_TC2_WO1                          _UINT32_(4)
2978 #define PINMUX_PA01E_TC2_WO1                       ((PIN_PA01E_TC2_WO1 << 16) | MUX_PA01E_TC2_WO1)
2979 #define PORT_PA01E_TC2_WO1                         (_UINT32_(1) << 1)
2980 
2981 #define PIN_PA13E_TC2_WO1                          _UINT32_(13)
2982 #define MUX_PA13E_TC2_WO1                          _UINT32_(4)
2983 #define PINMUX_PA13E_TC2_WO1                       ((PIN_PA13E_TC2_WO1 << 16) | MUX_PA13E_TC2_WO1)
2984 #define PORT_PA13E_TC2_WO1                         (_UINT32_(1) << 13)
2985 
2986 #define PIN_PA17E_TC2_WO1                          _UINT32_(17)
2987 #define MUX_PA17E_TC2_WO1                          _UINT32_(4)
2988 #define PINMUX_PA17E_TC2_WO1                       ((PIN_PA17E_TC2_WO1 << 16) | MUX_PA17E_TC2_WO1)
2989 #define PORT_PA17E_TC2_WO1                         (_UINT32_(1) << 17)
2990 
2991 /* =================== PORT definition for TC3 peripheral =================== */
2992 #define PIN_PA18E_TC3_WO0                          _UINT32_(18)
2993 #define MUX_PA18E_TC3_WO0                          _UINT32_(4)
2994 #define PINMUX_PA18E_TC3_WO0                       ((PIN_PA18E_TC3_WO0 << 16) | MUX_PA18E_TC3_WO0)
2995 #define PORT_PA18E_TC3_WO0                         (_UINT32_(1) << 18)
2996 
2997 #define PIN_PA14E_TC3_WO0                          _UINT32_(14)
2998 #define MUX_PA14E_TC3_WO0                          _UINT32_(4)
2999 #define PINMUX_PA14E_TC3_WO0                       ((PIN_PA14E_TC3_WO0 << 16) | MUX_PA14E_TC3_WO0)
3000 #define PORT_PA14E_TC3_WO0                         (_UINT32_(1) << 14)
3001 
3002 #define PIN_PA15E_TC3_WO1                          _UINT32_(15)
3003 #define MUX_PA15E_TC3_WO1                          _UINT32_(4)
3004 #define PINMUX_PA15E_TC3_WO1                       ((PIN_PA15E_TC3_WO1 << 16) | MUX_PA15E_TC3_WO1)
3005 #define PORT_PA15E_TC3_WO1                         (_UINT32_(1) << 15)
3006 
3007 #define PIN_PA19E_TC3_WO1                          _UINT32_(19)
3008 #define MUX_PA19E_TC3_WO1                          _UINT32_(4)
3009 #define PINMUX_PA19E_TC3_WO1                       ((PIN_PA19E_TC3_WO1 << 16) | MUX_PA19E_TC3_WO1)
3010 #define PORT_PA19E_TC3_WO1                         (_UINT32_(1) << 19)
3011 
3012 /* =================== PORT definition for TC4 peripheral =================== */
3013 #define PIN_PA22E_TC4_WO0                          _UINT32_(22)
3014 #define MUX_PA22E_TC4_WO0                          _UINT32_(4)
3015 #define PINMUX_PA22E_TC4_WO0                       ((PIN_PA22E_TC4_WO0 << 16) | MUX_PA22E_TC4_WO0)
3016 #define PORT_PA22E_TC4_WO0                         (_UINT32_(1) << 22)
3017 
3018 #define PIN_PB08E_TC4_WO0                          _UINT32_(40)
3019 #define MUX_PB08E_TC4_WO0                          _UINT32_(4)
3020 #define PINMUX_PB08E_TC4_WO0                       ((PIN_PB08E_TC4_WO0 << 16) | MUX_PB08E_TC4_WO0)
3021 #define PORT_PB08E_TC4_WO0                         (_UINT32_(1) << 8)
3022 
3023 #define PIN_PB12E_TC4_WO0                          _UINT32_(44)
3024 #define MUX_PB12E_TC4_WO0                          _UINT32_(4)
3025 #define PINMUX_PB12E_TC4_WO0                       ((PIN_PB12E_TC4_WO0 << 16) | MUX_PB12E_TC4_WO0)
3026 #define PORT_PB12E_TC4_WO0                         (_UINT32_(1) << 12)
3027 
3028 #define PIN_PA23E_TC4_WO1                          _UINT32_(23)
3029 #define MUX_PA23E_TC4_WO1                          _UINT32_(4)
3030 #define PINMUX_PA23E_TC4_WO1                       ((PIN_PA23E_TC4_WO1 << 16) | MUX_PA23E_TC4_WO1)
3031 #define PORT_PA23E_TC4_WO1                         (_UINT32_(1) << 23)
3032 
3033 #define PIN_PB09E_TC4_WO1                          _UINT32_(41)
3034 #define MUX_PB09E_TC4_WO1                          _UINT32_(4)
3035 #define PINMUX_PB09E_TC4_WO1                       ((PIN_PB09E_TC4_WO1 << 16) | MUX_PB09E_TC4_WO1)
3036 #define PORT_PB09E_TC4_WO1                         (_UINT32_(1) << 9)
3037 
3038 #define PIN_PB13E_TC4_WO1                          _UINT32_(45)
3039 #define MUX_PB13E_TC4_WO1                          _UINT32_(4)
3040 #define PINMUX_PB13E_TC4_WO1                       ((PIN_PB13E_TC4_WO1 << 16) | MUX_PB13E_TC4_WO1)
3041 #define PORT_PB13E_TC4_WO1                         (_UINT32_(1) << 13)
3042 
3043 /* =================== PORT definition for TC5 peripheral =================== */
3044 #define PIN_PA24E_TC5_WO0                          _UINT32_(24)
3045 #define MUX_PA24E_TC5_WO0                          _UINT32_(4)
3046 #define PINMUX_PA24E_TC5_WO0                       ((PIN_PA24E_TC5_WO0 << 16) | MUX_PA24E_TC5_WO0)
3047 #define PORT_PA24E_TC5_WO0                         (_UINT32_(1) << 24)
3048 
3049 #define PIN_PB10E_TC5_WO0                          _UINT32_(42)
3050 #define MUX_PB10E_TC5_WO0                          _UINT32_(4)
3051 #define PINMUX_PB10E_TC5_WO0                       ((PIN_PB10E_TC5_WO0 << 16) | MUX_PB10E_TC5_WO0)
3052 #define PORT_PB10E_TC5_WO0                         (_UINT32_(1) << 10)
3053 
3054 #define PIN_PB14E_TC5_WO0                          _UINT32_(46)
3055 #define MUX_PB14E_TC5_WO0                          _UINT32_(4)
3056 #define PINMUX_PB14E_TC5_WO0                       ((PIN_PB14E_TC5_WO0 << 16) | MUX_PB14E_TC5_WO0)
3057 #define PORT_PB14E_TC5_WO0                         (_UINT32_(1) << 14)
3058 
3059 #define PIN_PA25E_TC5_WO1                          _UINT32_(25)
3060 #define MUX_PA25E_TC5_WO1                          _UINT32_(4)
3061 #define PINMUX_PA25E_TC5_WO1                       ((PIN_PA25E_TC5_WO1 << 16) | MUX_PA25E_TC5_WO1)
3062 #define PORT_PA25E_TC5_WO1                         (_UINT32_(1) << 25)
3063 
3064 #define PIN_PB11E_TC5_WO1                          _UINT32_(43)
3065 #define MUX_PB11E_TC5_WO1                          _UINT32_(4)
3066 #define PINMUX_PB11E_TC5_WO1                       ((PIN_PB11E_TC5_WO1 << 16) | MUX_PB11E_TC5_WO1)
3067 #define PORT_PB11E_TC5_WO1                         (_UINT32_(1) << 11)
3068 
3069 #define PIN_PB15E_TC5_WO1                          _UINT32_(47)
3070 #define MUX_PB15E_TC5_WO1                          _UINT32_(4)
3071 #define PINMUX_PB15E_TC5_WO1                       ((PIN_PB15E_TC5_WO1 << 16) | MUX_PB15E_TC5_WO1)
3072 #define PORT_PB15E_TC5_WO1                         (_UINT32_(1) << 15)
3073 
3074 /* =================== PORT definition for TC6 peripheral =================== */
3075 #define PIN_PA30E_TC6_WO0                          _UINT32_(30)
3076 #define MUX_PA30E_TC6_WO0                          _UINT32_(4)
3077 #define PINMUX_PA30E_TC6_WO0                       ((PIN_PA30E_TC6_WO0 << 16) | MUX_PA30E_TC6_WO0)
3078 #define PORT_PA30E_TC6_WO0                         (_UINT32_(1) << 30)
3079 
3080 #define PIN_PB02E_TC6_WO0                          _UINT32_(34)
3081 #define MUX_PB02E_TC6_WO0                          _UINT32_(4)
3082 #define PINMUX_PB02E_TC6_WO0                       ((PIN_PB02E_TC6_WO0 << 16) | MUX_PB02E_TC6_WO0)
3083 #define PORT_PB02E_TC6_WO0                         (_UINT32_(1) << 2)
3084 
3085 #define PIN_PB16E_TC6_WO0                          _UINT32_(48)
3086 #define MUX_PB16E_TC6_WO0                          _UINT32_(4)
3087 #define PINMUX_PB16E_TC6_WO0                       ((PIN_PB16E_TC6_WO0 << 16) | MUX_PB16E_TC6_WO0)
3088 #define PORT_PB16E_TC6_WO0                         (_UINT32_(1) << 16)
3089 
3090 #define PIN_PA31E_TC6_WO1                          _UINT32_(31)
3091 #define MUX_PA31E_TC6_WO1                          _UINT32_(4)
3092 #define PINMUX_PA31E_TC6_WO1                       ((PIN_PA31E_TC6_WO1 << 16) | MUX_PA31E_TC6_WO1)
3093 #define PORT_PA31E_TC6_WO1                         (_UINT32_(1) << 31)
3094 
3095 #define PIN_PB03E_TC6_WO1                          _UINT32_(35)
3096 #define MUX_PB03E_TC6_WO1                          _UINT32_(4)
3097 #define PINMUX_PB03E_TC6_WO1                       ((PIN_PB03E_TC6_WO1 << 16) | MUX_PB03E_TC6_WO1)
3098 #define PORT_PB03E_TC6_WO1                         (_UINT32_(1) << 3)
3099 
3100 #define PIN_PB17E_TC6_WO1                          _UINT32_(49)
3101 #define MUX_PB17E_TC6_WO1                          _UINT32_(4)
3102 #define PINMUX_PB17E_TC6_WO1                       ((PIN_PB17E_TC6_WO1 << 16) | MUX_PB17E_TC6_WO1)
3103 #define PORT_PB17E_TC6_WO1                         (_UINT32_(1) << 17)
3104 
3105 /* =================== PORT definition for TC7 peripheral =================== */
3106 #define PIN_PA20E_TC7_WO0                          _UINT32_(20)
3107 #define MUX_PA20E_TC7_WO0                          _UINT32_(4)
3108 #define PINMUX_PA20E_TC7_WO0                       ((PIN_PA20E_TC7_WO0 << 16) | MUX_PA20E_TC7_WO0)
3109 #define PORT_PA20E_TC7_WO0                         (_UINT32_(1) << 20)
3110 
3111 #define PIN_PB00E_TC7_WO0                          _UINT32_(32)
3112 #define MUX_PB00E_TC7_WO0                          _UINT32_(4)
3113 #define PINMUX_PB00E_TC7_WO0                       ((PIN_PB00E_TC7_WO0 << 16) | MUX_PB00E_TC7_WO0)
3114 #define PORT_PB00E_TC7_WO0                         (_UINT32_(1) << 0)
3115 
3116 #define PIN_PB22E_TC7_WO0                          _UINT32_(54)
3117 #define MUX_PB22E_TC7_WO0                          _UINT32_(4)
3118 #define PINMUX_PB22E_TC7_WO0                       ((PIN_PB22E_TC7_WO0 << 16) | MUX_PB22E_TC7_WO0)
3119 #define PORT_PB22E_TC7_WO0                         (_UINT32_(1) << 22)
3120 
3121 #define PIN_PA21E_TC7_WO1                          _UINT32_(21)
3122 #define MUX_PA21E_TC7_WO1                          _UINT32_(4)
3123 #define PINMUX_PA21E_TC7_WO1                       ((PIN_PA21E_TC7_WO1 << 16) | MUX_PA21E_TC7_WO1)
3124 #define PORT_PA21E_TC7_WO1                         (_UINT32_(1) << 21)
3125 
3126 #define PIN_PB01E_TC7_WO1                          _UINT32_(33)
3127 #define MUX_PB01E_TC7_WO1                          _UINT32_(4)
3128 #define PINMUX_PB01E_TC7_WO1                       ((PIN_PB01E_TC7_WO1 << 16) | MUX_PB01E_TC7_WO1)
3129 #define PORT_PB01E_TC7_WO1                         (_UINT32_(1) << 1)
3130 
3131 #define PIN_PB23E_TC7_WO1                          _UINT32_(55)
3132 #define MUX_PB23E_TC7_WO1                          _UINT32_(4)
3133 #define PINMUX_PB23E_TC7_WO1                       ((PIN_PB23E_TC7_WO1 << 16) | MUX_PB23E_TC7_WO1)
3134 #define PORT_PB23E_TC7_WO1                         (_UINT32_(1) << 23)
3135 
3136 /* ================== PORT definition for TCC0 peripheral =================== */
3137 #define PIN_PA20G_TCC0_WO0                         _UINT32_(20)
3138 #define MUX_PA20G_TCC0_WO0                         _UINT32_(6)
3139 #define PINMUX_PA20G_TCC0_WO0                      ((PIN_PA20G_TCC0_WO0 << 16) | MUX_PA20G_TCC0_WO0)
3140 #define PORT_PA20G_TCC0_WO0                        (_UINT32_(1) << 20)
3141 
3142 #define PIN_PB12G_TCC0_WO0                         _UINT32_(44)
3143 #define MUX_PB12G_TCC0_WO0                         _UINT32_(6)
3144 #define PINMUX_PB12G_TCC0_WO0                      ((PIN_PB12G_TCC0_WO0 << 16) | MUX_PB12G_TCC0_WO0)
3145 #define PORT_PB12G_TCC0_WO0                        (_UINT32_(1) << 12)
3146 
3147 #define PIN_PA08F_TCC0_WO0                         _UINT32_(8)
3148 #define MUX_PA08F_TCC0_WO0                         _UINT32_(5)
3149 #define PINMUX_PA08F_TCC0_WO0                      ((PIN_PA08F_TCC0_WO0 << 16) | MUX_PA08F_TCC0_WO0)
3150 #define PORT_PA08F_TCC0_WO0                        (_UINT32_(1) << 8)
3151 
3152 #define PIN_PC04F_TCC0_WO0                         _UINT32_(68)
3153 #define MUX_PC04F_TCC0_WO0                         _UINT32_(5)
3154 #define PINMUX_PC04F_TCC0_WO0                      ((PIN_PC04F_TCC0_WO0 << 16) | MUX_PC04F_TCC0_WO0)
3155 #define PORT_PC04F_TCC0_WO0                        (_UINT32_(1) << 4)
3156 
3157 #define PIN_PC10F_TCC0_WO0                         _UINT32_(74)
3158 #define MUX_PC10F_TCC0_WO0                         _UINT32_(5)
3159 #define PINMUX_PC10F_TCC0_WO0                      ((PIN_PC10F_TCC0_WO0 << 16) | MUX_PC10F_TCC0_WO0)
3160 #define PORT_PC10F_TCC0_WO0                        (_UINT32_(1) << 10)
3161 
3162 #define PIN_PC16F_TCC0_WO0                         _UINT32_(80)
3163 #define MUX_PC16F_TCC0_WO0                         _UINT32_(5)
3164 #define PINMUX_PC16F_TCC0_WO0                      ((PIN_PC16F_TCC0_WO0 << 16) | MUX_PC16F_TCC0_WO0)
3165 #define PORT_PC16F_TCC0_WO0                        (_UINT32_(1) << 16)
3166 
3167 #define PIN_PA21G_TCC0_WO1                         _UINT32_(21)
3168 #define MUX_PA21G_TCC0_WO1                         _UINT32_(6)
3169 #define PINMUX_PA21G_TCC0_WO1                      ((PIN_PA21G_TCC0_WO1 << 16) | MUX_PA21G_TCC0_WO1)
3170 #define PORT_PA21G_TCC0_WO1                        (_UINT32_(1) << 21)
3171 
3172 #define PIN_PB13G_TCC0_WO1                         _UINT32_(45)
3173 #define MUX_PB13G_TCC0_WO1                         _UINT32_(6)
3174 #define PINMUX_PB13G_TCC0_WO1                      ((PIN_PB13G_TCC0_WO1 << 16) | MUX_PB13G_TCC0_WO1)
3175 #define PORT_PB13G_TCC0_WO1                        (_UINT32_(1) << 13)
3176 
3177 #define PIN_PA09F_TCC0_WO1                         _UINT32_(9)
3178 #define MUX_PA09F_TCC0_WO1                         _UINT32_(5)
3179 #define PINMUX_PA09F_TCC0_WO1                      ((PIN_PA09F_TCC0_WO1 << 16) | MUX_PA09F_TCC0_WO1)
3180 #define PORT_PA09F_TCC0_WO1                        (_UINT32_(1) << 9)
3181 
3182 #define PIN_PC11F_TCC0_WO1                         _UINT32_(75)
3183 #define MUX_PC11F_TCC0_WO1                         _UINT32_(5)
3184 #define PINMUX_PC11F_TCC0_WO1                      ((PIN_PC11F_TCC0_WO1 << 16) | MUX_PC11F_TCC0_WO1)
3185 #define PORT_PC11F_TCC0_WO1                        (_UINT32_(1) << 11)
3186 
3187 #define PIN_PC17F_TCC0_WO1                         _UINT32_(81)
3188 #define MUX_PC17F_TCC0_WO1                         _UINT32_(5)
3189 #define PINMUX_PC17F_TCC0_WO1                      ((PIN_PC17F_TCC0_WO1 << 16) | MUX_PC17F_TCC0_WO1)
3190 #define PORT_PC17F_TCC0_WO1                        (_UINT32_(1) << 17)
3191 
3192 #define PIN_PD08F_TCC0_WO1                         _UINT32_(104)
3193 #define MUX_PD08F_TCC0_WO1                         _UINT32_(5)
3194 #define PINMUX_PD08F_TCC0_WO1                      ((PIN_PD08F_TCC0_WO1 << 16) | MUX_PD08F_TCC0_WO1)
3195 #define PORT_PD08F_TCC0_WO1                        (_UINT32_(1) << 8)
3196 
3197 #define PIN_PA22G_TCC0_WO2                         _UINT32_(22)
3198 #define MUX_PA22G_TCC0_WO2                         _UINT32_(6)
3199 #define PINMUX_PA22G_TCC0_WO2                      ((PIN_PA22G_TCC0_WO2 << 16) | MUX_PA22G_TCC0_WO2)
3200 #define PORT_PA22G_TCC0_WO2                        (_UINT32_(1) << 22)
3201 
3202 #define PIN_PB14G_TCC0_WO2                         _UINT32_(46)
3203 #define MUX_PB14G_TCC0_WO2                         _UINT32_(6)
3204 #define PINMUX_PB14G_TCC0_WO2                      ((PIN_PB14G_TCC0_WO2 << 16) | MUX_PB14G_TCC0_WO2)
3205 #define PORT_PB14G_TCC0_WO2                        (_UINT32_(1) << 14)
3206 
3207 #define PIN_PA10F_TCC0_WO2                         _UINT32_(10)
3208 #define MUX_PA10F_TCC0_WO2                         _UINT32_(5)
3209 #define PINMUX_PA10F_TCC0_WO2                      ((PIN_PA10F_TCC0_WO2 << 16) | MUX_PA10F_TCC0_WO2)
3210 #define PORT_PA10F_TCC0_WO2                        (_UINT32_(1) << 10)
3211 
3212 #define PIN_PC12F_TCC0_WO2                         _UINT32_(76)
3213 #define MUX_PC12F_TCC0_WO2                         _UINT32_(5)
3214 #define PINMUX_PC12F_TCC0_WO2                      ((PIN_PC12F_TCC0_WO2 << 16) | MUX_PC12F_TCC0_WO2)
3215 #define PORT_PC12F_TCC0_WO2                        (_UINT32_(1) << 12)
3216 
3217 #define PIN_PC18F_TCC0_WO2                         _UINT32_(82)
3218 #define MUX_PC18F_TCC0_WO2                         _UINT32_(5)
3219 #define PINMUX_PC18F_TCC0_WO2                      ((PIN_PC18F_TCC0_WO2 << 16) | MUX_PC18F_TCC0_WO2)
3220 #define PORT_PC18F_TCC0_WO2                        (_UINT32_(1) << 18)
3221 
3222 #define PIN_PD09F_TCC0_WO2                         _UINT32_(105)
3223 #define MUX_PD09F_TCC0_WO2                         _UINT32_(5)
3224 #define PINMUX_PD09F_TCC0_WO2                      ((PIN_PD09F_TCC0_WO2 << 16) | MUX_PD09F_TCC0_WO2)
3225 #define PORT_PD09F_TCC0_WO2                        (_UINT32_(1) << 9)
3226 
3227 #define PIN_PA23G_TCC0_WO3                         _UINT32_(23)
3228 #define MUX_PA23G_TCC0_WO3                         _UINT32_(6)
3229 #define PINMUX_PA23G_TCC0_WO3                      ((PIN_PA23G_TCC0_WO3 << 16) | MUX_PA23G_TCC0_WO3)
3230 #define PORT_PA23G_TCC0_WO3                        (_UINT32_(1) << 23)
3231 
3232 #define PIN_PB15G_TCC0_WO3                         _UINT32_(47)
3233 #define MUX_PB15G_TCC0_WO3                         _UINT32_(6)
3234 #define PINMUX_PB15G_TCC0_WO3                      ((PIN_PB15G_TCC0_WO3 << 16) | MUX_PB15G_TCC0_WO3)
3235 #define PORT_PB15G_TCC0_WO3                        (_UINT32_(1) << 15)
3236 
3237 #define PIN_PA11F_TCC0_WO3                         _UINT32_(11)
3238 #define MUX_PA11F_TCC0_WO3                         _UINT32_(5)
3239 #define PINMUX_PA11F_TCC0_WO3                      ((PIN_PA11F_TCC0_WO3 << 16) | MUX_PA11F_TCC0_WO3)
3240 #define PORT_PA11F_TCC0_WO3                        (_UINT32_(1) << 11)
3241 
3242 #define PIN_PC13F_TCC0_WO3                         _UINT32_(77)
3243 #define MUX_PC13F_TCC0_WO3                         _UINT32_(5)
3244 #define PINMUX_PC13F_TCC0_WO3                      ((PIN_PC13F_TCC0_WO3 << 16) | MUX_PC13F_TCC0_WO3)
3245 #define PORT_PC13F_TCC0_WO3                        (_UINT32_(1) << 13)
3246 
3247 #define PIN_PC19F_TCC0_WO3                         _UINT32_(83)
3248 #define MUX_PC19F_TCC0_WO3                         _UINT32_(5)
3249 #define PINMUX_PC19F_TCC0_WO3                      ((PIN_PC19F_TCC0_WO3 << 16) | MUX_PC19F_TCC0_WO3)
3250 #define PORT_PC19F_TCC0_WO3                        (_UINT32_(1) << 19)
3251 
3252 #define PIN_PD10F_TCC0_WO3                         _UINT32_(106)
3253 #define MUX_PD10F_TCC0_WO3                         _UINT32_(5)
3254 #define PINMUX_PD10F_TCC0_WO3                      ((PIN_PD10F_TCC0_WO3 << 16) | MUX_PD10F_TCC0_WO3)
3255 #define PORT_PD10F_TCC0_WO3                        (_UINT32_(1) << 10)
3256 
3257 #define PIN_PA16G_TCC0_WO4                         _UINT32_(16)
3258 #define MUX_PA16G_TCC0_WO4                         _UINT32_(6)
3259 #define PINMUX_PA16G_TCC0_WO4                      ((PIN_PA16G_TCC0_WO4 << 16) | MUX_PA16G_TCC0_WO4)
3260 #define PORT_PA16G_TCC0_WO4                        (_UINT32_(1) << 16)
3261 
3262 #define PIN_PB16G_TCC0_WO4                         _UINT32_(48)
3263 #define MUX_PB16G_TCC0_WO4                         _UINT32_(6)
3264 #define PINMUX_PB16G_TCC0_WO4                      ((PIN_PB16G_TCC0_WO4 << 16) | MUX_PB16G_TCC0_WO4)
3265 #define PORT_PB16G_TCC0_WO4                        (_UINT32_(1) << 16)
3266 
3267 #define PIN_PB10F_TCC0_WO4                         _UINT32_(42)
3268 #define MUX_PB10F_TCC0_WO4                         _UINT32_(5)
3269 #define PINMUX_PB10F_TCC0_WO4                      ((PIN_PB10F_TCC0_WO4 << 16) | MUX_PB10F_TCC0_WO4)
3270 #define PORT_PB10F_TCC0_WO4                        (_UINT32_(1) << 10)
3271 
3272 #define PIN_PC14F_TCC0_WO4                         _UINT32_(78)
3273 #define MUX_PC14F_TCC0_WO4                         _UINT32_(5)
3274 #define PINMUX_PC14F_TCC0_WO4                      ((PIN_PC14F_TCC0_WO4 << 16) | MUX_PC14F_TCC0_WO4)
3275 #define PORT_PC14F_TCC0_WO4                        (_UINT32_(1) << 14)
3276 
3277 #define PIN_PC20F_TCC0_WO4                         _UINT32_(84)
3278 #define MUX_PC20F_TCC0_WO4                         _UINT32_(5)
3279 #define PINMUX_PC20F_TCC0_WO4                      ((PIN_PC20F_TCC0_WO4 << 16) | MUX_PC20F_TCC0_WO4)
3280 #define PORT_PC20F_TCC0_WO4                        (_UINT32_(1) << 20)
3281 
3282 #define PIN_PD11F_TCC0_WO4                         _UINT32_(107)
3283 #define MUX_PD11F_TCC0_WO4                         _UINT32_(5)
3284 #define PINMUX_PD11F_TCC0_WO4                      ((PIN_PD11F_TCC0_WO4 << 16) | MUX_PD11F_TCC0_WO4)
3285 #define PORT_PD11F_TCC0_WO4                        (_UINT32_(1) << 11)
3286 
3287 #define PIN_PA17G_TCC0_WO5                         _UINT32_(17)
3288 #define MUX_PA17G_TCC0_WO5                         _UINT32_(6)
3289 #define PINMUX_PA17G_TCC0_WO5                      ((PIN_PA17G_TCC0_WO5 << 16) | MUX_PA17G_TCC0_WO5)
3290 #define PORT_PA17G_TCC0_WO5                        (_UINT32_(1) << 17)
3291 
3292 #define PIN_PB17G_TCC0_WO5                         _UINT32_(49)
3293 #define MUX_PB17G_TCC0_WO5                         _UINT32_(6)
3294 #define PINMUX_PB17G_TCC0_WO5                      ((PIN_PB17G_TCC0_WO5 << 16) | MUX_PB17G_TCC0_WO5)
3295 #define PORT_PB17G_TCC0_WO5                        (_UINT32_(1) << 17)
3296 
3297 #define PIN_PB11F_TCC0_WO5                         _UINT32_(43)
3298 #define MUX_PB11F_TCC0_WO5                         _UINT32_(5)
3299 #define PINMUX_PB11F_TCC0_WO5                      ((PIN_PB11F_TCC0_WO5 << 16) | MUX_PB11F_TCC0_WO5)
3300 #define PORT_PB11F_TCC0_WO5                        (_UINT32_(1) << 11)
3301 
3302 #define PIN_PC15F_TCC0_WO5                         _UINT32_(79)
3303 #define MUX_PC15F_TCC0_WO5                         _UINT32_(5)
3304 #define PINMUX_PC15F_TCC0_WO5                      ((PIN_PC15F_TCC0_WO5 << 16) | MUX_PC15F_TCC0_WO5)
3305 #define PORT_PC15F_TCC0_WO5                        (_UINT32_(1) << 15)
3306 
3307 #define PIN_PC21F_TCC0_WO5                         _UINT32_(85)
3308 #define MUX_PC21F_TCC0_WO5                         _UINT32_(5)
3309 #define PINMUX_PC21F_TCC0_WO5                      ((PIN_PC21F_TCC0_WO5 << 16) | MUX_PC21F_TCC0_WO5)
3310 #define PORT_PC21F_TCC0_WO5                        (_UINT32_(1) << 21)
3311 
3312 #define PIN_PD12F_TCC0_WO5                         _UINT32_(108)
3313 #define MUX_PD12F_TCC0_WO5                         _UINT32_(5)
3314 #define PINMUX_PD12F_TCC0_WO5                      ((PIN_PD12F_TCC0_WO5 << 16) | MUX_PD12F_TCC0_WO5)
3315 #define PORT_PD12F_TCC0_WO5                        (_UINT32_(1) << 12)
3316 
3317 #define PIN_PA18G_TCC0_WO6                         _UINT32_(18)
3318 #define MUX_PA18G_TCC0_WO6                         _UINT32_(6)
3319 #define PINMUX_PA18G_TCC0_WO6                      ((PIN_PA18G_TCC0_WO6 << 16) | MUX_PA18G_TCC0_WO6)
3320 #define PORT_PA18G_TCC0_WO6                        (_UINT32_(1) << 18)
3321 
3322 #define PIN_PB30G_TCC0_WO6                         _UINT32_(62)
3323 #define MUX_PB30G_TCC0_WO6                         _UINT32_(6)
3324 #define PINMUX_PB30G_TCC0_WO6                      ((PIN_PB30G_TCC0_WO6 << 16) | MUX_PB30G_TCC0_WO6)
3325 #define PORT_PB30G_TCC0_WO6                        (_UINT32_(1) << 30)
3326 
3327 #define PIN_PA12F_TCC0_WO6                         _UINT32_(12)
3328 #define MUX_PA12F_TCC0_WO6                         _UINT32_(5)
3329 #define PINMUX_PA12F_TCC0_WO6                      ((PIN_PA12F_TCC0_WO6 << 16) | MUX_PA12F_TCC0_WO6)
3330 #define PORT_PA12F_TCC0_WO6                        (_UINT32_(1) << 12)
3331 
3332 #define PIN_PC22F_TCC0_WO6                         _UINT32_(86)
3333 #define MUX_PC22F_TCC0_WO6                         _UINT32_(5)
3334 #define PINMUX_PC22F_TCC0_WO6                      ((PIN_PC22F_TCC0_WO6 << 16) | MUX_PC22F_TCC0_WO6)
3335 #define PORT_PC22F_TCC0_WO6                        (_UINT32_(1) << 22)
3336 
3337 #define PIN_PA19G_TCC0_WO7                         _UINT32_(19)
3338 #define MUX_PA19G_TCC0_WO7                         _UINT32_(6)
3339 #define PINMUX_PA19G_TCC0_WO7                      ((PIN_PA19G_TCC0_WO7 << 16) | MUX_PA19G_TCC0_WO7)
3340 #define PORT_PA19G_TCC0_WO7                        (_UINT32_(1) << 19)
3341 
3342 #define PIN_PB31G_TCC0_WO7                         _UINT32_(63)
3343 #define MUX_PB31G_TCC0_WO7                         _UINT32_(6)
3344 #define PINMUX_PB31G_TCC0_WO7                      ((PIN_PB31G_TCC0_WO7 << 16) | MUX_PB31G_TCC0_WO7)
3345 #define PORT_PB31G_TCC0_WO7                        (_UINT32_(1) << 31)
3346 
3347 #define PIN_PA13F_TCC0_WO7                         _UINT32_(13)
3348 #define MUX_PA13F_TCC0_WO7                         _UINT32_(5)
3349 #define PINMUX_PA13F_TCC0_WO7                      ((PIN_PA13F_TCC0_WO7 << 16) | MUX_PA13F_TCC0_WO7)
3350 #define PORT_PA13F_TCC0_WO7                        (_UINT32_(1) << 13)
3351 
3352 #define PIN_PC23F_TCC0_WO7                         _UINT32_(87)
3353 #define MUX_PC23F_TCC0_WO7                         _UINT32_(5)
3354 #define PINMUX_PC23F_TCC0_WO7                      ((PIN_PC23F_TCC0_WO7 << 16) | MUX_PC23F_TCC0_WO7)
3355 #define PORT_PC23F_TCC0_WO7                        (_UINT32_(1) << 23)
3356 
3357 /* ================== PORT definition for TCC1 peripheral =================== */
3358 #define PIN_PB10G_TCC1_WO0                         _UINT32_(42)
3359 #define MUX_PB10G_TCC1_WO0                         _UINT32_(6)
3360 #define PINMUX_PB10G_TCC1_WO0                      ((PIN_PB10G_TCC1_WO0 << 16) | MUX_PB10G_TCC1_WO0)
3361 #define PORT_PB10G_TCC1_WO0                        (_UINT32_(1) << 10)
3362 
3363 #define PIN_PC14G_TCC1_WO0                         _UINT32_(78)
3364 #define MUX_PC14G_TCC1_WO0                         _UINT32_(6)
3365 #define PINMUX_PC14G_TCC1_WO0                      ((PIN_PC14G_TCC1_WO0 << 16) | MUX_PC14G_TCC1_WO0)
3366 #define PORT_PC14G_TCC1_WO0                        (_UINT32_(1) << 14)
3367 
3368 #define PIN_PA16F_TCC1_WO0                         _UINT32_(16)
3369 #define MUX_PA16F_TCC1_WO0                         _UINT32_(5)
3370 #define PINMUX_PA16F_TCC1_WO0                      ((PIN_PA16F_TCC1_WO0 << 16) | MUX_PA16F_TCC1_WO0)
3371 #define PORT_PA16F_TCC1_WO0                        (_UINT32_(1) << 16)
3372 
3373 #define PIN_PB18F_TCC1_WO0                         _UINT32_(50)
3374 #define MUX_PB18F_TCC1_WO0                         _UINT32_(5)
3375 #define PINMUX_PB18F_TCC1_WO0                      ((PIN_PB18F_TCC1_WO0 << 16) | MUX_PB18F_TCC1_WO0)
3376 #define PORT_PB18F_TCC1_WO0                        (_UINT32_(1) << 18)
3377 
3378 #define PIN_PD20F_TCC1_WO0                         _UINT32_(116)
3379 #define MUX_PD20F_TCC1_WO0                         _UINT32_(5)
3380 #define PINMUX_PD20F_TCC1_WO0                      ((PIN_PD20F_TCC1_WO0 << 16) | MUX_PD20F_TCC1_WO0)
3381 #define PORT_PD20F_TCC1_WO0                        (_UINT32_(1) << 20)
3382 
3383 #define PIN_PB11G_TCC1_WO1                         _UINT32_(43)
3384 #define MUX_PB11G_TCC1_WO1                         _UINT32_(6)
3385 #define PINMUX_PB11G_TCC1_WO1                      ((PIN_PB11G_TCC1_WO1 << 16) | MUX_PB11G_TCC1_WO1)
3386 #define PORT_PB11G_TCC1_WO1                        (_UINT32_(1) << 11)
3387 
3388 #define PIN_PC15G_TCC1_WO1                         _UINT32_(79)
3389 #define MUX_PC15G_TCC1_WO1                         _UINT32_(6)
3390 #define PINMUX_PC15G_TCC1_WO1                      ((PIN_PC15G_TCC1_WO1 << 16) | MUX_PC15G_TCC1_WO1)
3391 #define PORT_PC15G_TCC1_WO1                        (_UINT32_(1) << 15)
3392 
3393 #define PIN_PA17F_TCC1_WO1                         _UINT32_(17)
3394 #define MUX_PA17F_TCC1_WO1                         _UINT32_(5)
3395 #define PINMUX_PA17F_TCC1_WO1                      ((PIN_PA17F_TCC1_WO1 << 16) | MUX_PA17F_TCC1_WO1)
3396 #define PORT_PA17F_TCC1_WO1                        (_UINT32_(1) << 17)
3397 
3398 #define PIN_PB19F_TCC1_WO1                         _UINT32_(51)
3399 #define MUX_PB19F_TCC1_WO1                         _UINT32_(5)
3400 #define PINMUX_PB19F_TCC1_WO1                      ((PIN_PB19F_TCC1_WO1 << 16) | MUX_PB19F_TCC1_WO1)
3401 #define PORT_PB19F_TCC1_WO1                        (_UINT32_(1) << 19)
3402 
3403 #define PIN_PD21F_TCC1_WO1                         _UINT32_(117)
3404 #define MUX_PD21F_TCC1_WO1                         _UINT32_(5)
3405 #define PINMUX_PD21F_TCC1_WO1                      ((PIN_PD21F_TCC1_WO1 << 16) | MUX_PD21F_TCC1_WO1)
3406 #define PORT_PD21F_TCC1_WO1                        (_UINT32_(1) << 21)
3407 
3408 #define PIN_PA12G_TCC1_WO2                         _UINT32_(12)
3409 #define MUX_PA12G_TCC1_WO2                         _UINT32_(6)
3410 #define PINMUX_PA12G_TCC1_WO2                      ((PIN_PA12G_TCC1_WO2 << 16) | MUX_PA12G_TCC1_WO2)
3411 #define PORT_PA12G_TCC1_WO2                        (_UINT32_(1) << 12)
3412 
3413 #define PIN_PA14G_TCC1_WO2                         _UINT32_(14)
3414 #define MUX_PA14G_TCC1_WO2                         _UINT32_(6)
3415 #define PINMUX_PA14G_TCC1_WO2                      ((PIN_PA14G_TCC1_WO2 << 16) | MUX_PA14G_TCC1_WO2)
3416 #define PORT_PA14G_TCC1_WO2                        (_UINT32_(1) << 14)
3417 
3418 #define PIN_PA18F_TCC1_WO2                         _UINT32_(18)
3419 #define MUX_PA18F_TCC1_WO2                         _UINT32_(5)
3420 #define PINMUX_PA18F_TCC1_WO2                      ((PIN_PA18F_TCC1_WO2 << 16) | MUX_PA18F_TCC1_WO2)
3421 #define PORT_PA18F_TCC1_WO2                        (_UINT32_(1) << 18)
3422 
3423 #define PIN_PB20F_TCC1_WO2                         _UINT32_(52)
3424 #define MUX_PB20F_TCC1_WO2                         _UINT32_(5)
3425 #define PINMUX_PB20F_TCC1_WO2                      ((PIN_PB20F_TCC1_WO2 << 16) | MUX_PB20F_TCC1_WO2)
3426 #define PORT_PB20F_TCC1_WO2                        (_UINT32_(1) << 20)
3427 
3428 #define PIN_PB26F_TCC1_WO2                         _UINT32_(58)
3429 #define MUX_PB26F_TCC1_WO2                         _UINT32_(5)
3430 #define PINMUX_PB26F_TCC1_WO2                      ((PIN_PB26F_TCC1_WO2 << 16) | MUX_PB26F_TCC1_WO2)
3431 #define PORT_PB26F_TCC1_WO2                        (_UINT32_(1) << 26)
3432 
3433 #define PIN_PA13G_TCC1_WO3                         _UINT32_(13)
3434 #define MUX_PA13G_TCC1_WO3                         _UINT32_(6)
3435 #define PINMUX_PA13G_TCC1_WO3                      ((PIN_PA13G_TCC1_WO3 << 16) | MUX_PA13G_TCC1_WO3)
3436 #define PORT_PA13G_TCC1_WO3                        (_UINT32_(1) << 13)
3437 
3438 #define PIN_PA15G_TCC1_WO3                         _UINT32_(15)
3439 #define MUX_PA15G_TCC1_WO3                         _UINT32_(6)
3440 #define PINMUX_PA15G_TCC1_WO3                      ((PIN_PA15G_TCC1_WO3 << 16) | MUX_PA15G_TCC1_WO3)
3441 #define PORT_PA15G_TCC1_WO3                        (_UINT32_(1) << 15)
3442 
3443 #define PIN_PA19F_TCC1_WO3                         _UINT32_(19)
3444 #define MUX_PA19F_TCC1_WO3                         _UINT32_(5)
3445 #define PINMUX_PA19F_TCC1_WO3                      ((PIN_PA19F_TCC1_WO3 << 16) | MUX_PA19F_TCC1_WO3)
3446 #define PORT_PA19F_TCC1_WO3                        (_UINT32_(1) << 19)
3447 
3448 #define PIN_PB21F_TCC1_WO3                         _UINT32_(53)
3449 #define MUX_PB21F_TCC1_WO3                         _UINT32_(5)
3450 #define PINMUX_PB21F_TCC1_WO3                      ((PIN_PB21F_TCC1_WO3 << 16) | MUX_PB21F_TCC1_WO3)
3451 #define PORT_PB21F_TCC1_WO3                        (_UINT32_(1) << 21)
3452 
3453 #define PIN_PB27F_TCC1_WO3                         _UINT32_(59)
3454 #define MUX_PB27F_TCC1_WO3                         _UINT32_(5)
3455 #define PINMUX_PB27F_TCC1_WO3                      ((PIN_PB27F_TCC1_WO3 << 16) | MUX_PB27F_TCC1_WO3)
3456 #define PORT_PB27F_TCC1_WO3                        (_UINT32_(1) << 27)
3457 
3458 #define PIN_PA08G_TCC1_WO4                         _UINT32_(8)
3459 #define MUX_PA08G_TCC1_WO4                         _UINT32_(6)
3460 #define PINMUX_PA08G_TCC1_WO4                      ((PIN_PA08G_TCC1_WO4 << 16) | MUX_PA08G_TCC1_WO4)
3461 #define PORT_PA08G_TCC1_WO4                        (_UINT32_(1) << 8)
3462 
3463 #define PIN_PC10G_TCC1_WO4                         _UINT32_(74)
3464 #define MUX_PC10G_TCC1_WO4                         _UINT32_(6)
3465 #define PINMUX_PC10G_TCC1_WO4                      ((PIN_PC10G_TCC1_WO4 << 16) | MUX_PC10G_TCC1_WO4)
3466 #define PORT_PC10G_TCC1_WO4                        (_UINT32_(1) << 10)
3467 
3468 #define PIN_PA20F_TCC1_WO4                         _UINT32_(20)
3469 #define MUX_PA20F_TCC1_WO4                         _UINT32_(5)
3470 #define PINMUX_PA20F_TCC1_WO4                      ((PIN_PA20F_TCC1_WO4 << 16) | MUX_PA20F_TCC1_WO4)
3471 #define PORT_PA20F_TCC1_WO4                        (_UINT32_(1) << 20)
3472 
3473 #define PIN_PB28F_TCC1_WO4                         _UINT32_(60)
3474 #define MUX_PB28F_TCC1_WO4                         _UINT32_(5)
3475 #define PINMUX_PB28F_TCC1_WO4                      ((PIN_PB28F_TCC1_WO4 << 16) | MUX_PB28F_TCC1_WO4)
3476 #define PORT_PB28F_TCC1_WO4                        (_UINT32_(1) << 28)
3477 
3478 #define PIN_PA09G_TCC1_WO5                         _UINT32_(9)
3479 #define MUX_PA09G_TCC1_WO5                         _UINT32_(6)
3480 #define PINMUX_PA09G_TCC1_WO5                      ((PIN_PA09G_TCC1_WO5 << 16) | MUX_PA09G_TCC1_WO5)
3481 #define PORT_PA09G_TCC1_WO5                        (_UINT32_(1) << 9)
3482 
3483 #define PIN_PC11G_TCC1_WO5                         _UINT32_(75)
3484 #define MUX_PC11G_TCC1_WO5                         _UINT32_(6)
3485 #define PINMUX_PC11G_TCC1_WO5                      ((PIN_PC11G_TCC1_WO5 << 16) | MUX_PC11G_TCC1_WO5)
3486 #define PORT_PC11G_TCC1_WO5                        (_UINT32_(1) << 11)
3487 
3488 #define PIN_PA21F_TCC1_WO5                         _UINT32_(21)
3489 #define MUX_PA21F_TCC1_WO5                         _UINT32_(5)
3490 #define PINMUX_PA21F_TCC1_WO5                      ((PIN_PA21F_TCC1_WO5 << 16) | MUX_PA21F_TCC1_WO5)
3491 #define PORT_PA21F_TCC1_WO5                        (_UINT32_(1) << 21)
3492 
3493 #define PIN_PB29F_TCC1_WO5                         _UINT32_(61)
3494 #define MUX_PB29F_TCC1_WO5                         _UINT32_(5)
3495 #define PINMUX_PB29F_TCC1_WO5                      ((PIN_PB29F_TCC1_WO5 << 16) | MUX_PB29F_TCC1_WO5)
3496 #define PORT_PB29F_TCC1_WO5                        (_UINT32_(1) << 29)
3497 
3498 #define PIN_PA10G_TCC1_WO6                         _UINT32_(10)
3499 #define MUX_PA10G_TCC1_WO6                         _UINT32_(6)
3500 #define PINMUX_PA10G_TCC1_WO6                      ((PIN_PA10G_TCC1_WO6 << 16) | MUX_PA10G_TCC1_WO6)
3501 #define PORT_PA10G_TCC1_WO6                        (_UINT32_(1) << 10)
3502 
3503 #define PIN_PC12G_TCC1_WO6                         _UINT32_(76)
3504 #define MUX_PC12G_TCC1_WO6                         _UINT32_(6)
3505 #define PINMUX_PC12G_TCC1_WO6                      ((PIN_PC12G_TCC1_WO6 << 16) | MUX_PC12G_TCC1_WO6)
3506 #define PORT_PC12G_TCC1_WO6                        (_UINT32_(1) << 12)
3507 
3508 #define PIN_PA22F_TCC1_WO6                         _UINT32_(22)
3509 #define MUX_PA22F_TCC1_WO6                         _UINT32_(5)
3510 #define PINMUX_PA22F_TCC1_WO6                      ((PIN_PA22F_TCC1_WO6 << 16) | MUX_PA22F_TCC1_WO6)
3511 #define PORT_PA22F_TCC1_WO6                        (_UINT32_(1) << 22)
3512 
3513 #define PIN_PA11G_TCC1_WO7                         _UINT32_(11)
3514 #define MUX_PA11G_TCC1_WO7                         _UINT32_(6)
3515 #define PINMUX_PA11G_TCC1_WO7                      ((PIN_PA11G_TCC1_WO7 << 16) | MUX_PA11G_TCC1_WO7)
3516 #define PORT_PA11G_TCC1_WO7                        (_UINT32_(1) << 11)
3517 
3518 #define PIN_PC13G_TCC1_WO7                         _UINT32_(77)
3519 #define MUX_PC13G_TCC1_WO7                         _UINT32_(6)
3520 #define PINMUX_PC13G_TCC1_WO7                      ((PIN_PC13G_TCC1_WO7 << 16) | MUX_PC13G_TCC1_WO7)
3521 #define PORT_PC13G_TCC1_WO7                        (_UINT32_(1) << 13)
3522 
3523 #define PIN_PA23F_TCC1_WO7                         _UINT32_(23)
3524 #define MUX_PA23F_TCC1_WO7                         _UINT32_(5)
3525 #define PINMUX_PA23F_TCC1_WO7                      ((PIN_PA23F_TCC1_WO7 << 16) | MUX_PA23F_TCC1_WO7)
3526 #define PORT_PA23F_TCC1_WO7                        (_UINT32_(1) << 23)
3527 
3528 /* ================== PORT definition for TCC2 peripheral =================== */
3529 #define PIN_PA14F_TCC2_WO0                         _UINT32_(14)
3530 #define MUX_PA14F_TCC2_WO0                         _UINT32_(5)
3531 #define PINMUX_PA14F_TCC2_WO0                      ((PIN_PA14F_TCC2_WO0 << 16) | MUX_PA14F_TCC2_WO0)
3532 #define PORT_PA14F_TCC2_WO0                        (_UINT32_(1) << 14)
3533 
3534 #define PIN_PA30F_TCC2_WO0                         _UINT32_(30)
3535 #define MUX_PA30F_TCC2_WO0                         _UINT32_(5)
3536 #define PINMUX_PA30F_TCC2_WO0                      ((PIN_PA30F_TCC2_WO0 << 16) | MUX_PA30F_TCC2_WO0)
3537 #define PORT_PA30F_TCC2_WO0                        (_UINT32_(1) << 30)
3538 
3539 #define PIN_PA15F_TCC2_WO1                         _UINT32_(15)
3540 #define MUX_PA15F_TCC2_WO1                         _UINT32_(5)
3541 #define PINMUX_PA15F_TCC2_WO1                      ((PIN_PA15F_TCC2_WO1 << 16) | MUX_PA15F_TCC2_WO1)
3542 #define PORT_PA15F_TCC2_WO1                        (_UINT32_(1) << 15)
3543 
3544 #define PIN_PA31F_TCC2_WO1                         _UINT32_(31)
3545 #define MUX_PA31F_TCC2_WO1                         _UINT32_(5)
3546 #define PINMUX_PA31F_TCC2_WO1                      ((PIN_PA31F_TCC2_WO1 << 16) | MUX_PA31F_TCC2_WO1)
3547 #define PORT_PA31F_TCC2_WO1                        (_UINT32_(1) << 31)
3548 
3549 #define PIN_PA24F_TCC2_WO2                         _UINT32_(24)
3550 #define MUX_PA24F_TCC2_WO2                         _UINT32_(5)
3551 #define PINMUX_PA24F_TCC2_WO2                      ((PIN_PA24F_TCC2_WO2 << 16) | MUX_PA24F_TCC2_WO2)
3552 #define PORT_PA24F_TCC2_WO2                        (_UINT32_(1) << 24)
3553 
3554 #define PIN_PB02F_TCC2_WO2                         _UINT32_(34)
3555 #define MUX_PB02F_TCC2_WO2                         _UINT32_(5)
3556 #define PINMUX_PB02F_TCC2_WO2                      ((PIN_PB02F_TCC2_WO2 << 16) | MUX_PB02F_TCC2_WO2)
3557 #define PORT_PB02F_TCC2_WO2                        (_UINT32_(1) << 2)
3558 
3559 /* ================== PORT definition for TCC3 peripheral =================== */
3560 #define PIN_PB12F_TCC3_WO0                         _UINT32_(44)
3561 #define MUX_PB12F_TCC3_WO0                         _UINT32_(5)
3562 #define PINMUX_PB12F_TCC3_WO0                      ((PIN_PB12F_TCC3_WO0 << 16) | MUX_PB12F_TCC3_WO0)
3563 #define PORT_PB12F_TCC3_WO0                        (_UINT32_(1) << 12)
3564 
3565 #define PIN_PB16F_TCC3_WO0                         _UINT32_(48)
3566 #define MUX_PB16F_TCC3_WO0                         _UINT32_(5)
3567 #define PINMUX_PB16F_TCC3_WO0                      ((PIN_PB16F_TCC3_WO0 << 16) | MUX_PB16F_TCC3_WO0)
3568 #define PORT_PB16F_TCC3_WO0                        (_UINT32_(1) << 16)
3569 
3570 #define PIN_PB13F_TCC3_WO1                         _UINT32_(45)
3571 #define MUX_PB13F_TCC3_WO1                         _UINT32_(5)
3572 #define PINMUX_PB13F_TCC3_WO1                      ((PIN_PB13F_TCC3_WO1 << 16) | MUX_PB13F_TCC3_WO1)
3573 #define PORT_PB13F_TCC3_WO1                        (_UINT32_(1) << 13)
3574 
3575 #define PIN_PB17F_TCC3_WO1                         _UINT32_(49)
3576 #define MUX_PB17F_TCC3_WO1                         _UINT32_(5)
3577 #define PINMUX_PB17F_TCC3_WO1                      ((PIN_PB17F_TCC3_WO1 << 16) | MUX_PB17F_TCC3_WO1)
3578 #define PORT_PB17F_TCC3_WO1                        (_UINT32_(1) << 17)
3579 
3580 /* ================== PORT definition for TCC4 peripheral =================== */
3581 #define PIN_PB14F_TCC4_WO0                         _UINT32_(46)
3582 #define MUX_PB14F_TCC4_WO0                         _UINT32_(5)
3583 #define PINMUX_PB14F_TCC4_WO0                      ((PIN_PB14F_TCC4_WO0 << 16) | MUX_PB14F_TCC4_WO0)
3584 #define PORT_PB14F_TCC4_WO0                        (_UINT32_(1) << 14)
3585 
3586 #define PIN_PB30F_TCC4_WO0                         _UINT32_(62)
3587 #define MUX_PB30F_TCC4_WO0                         _UINT32_(5)
3588 #define PINMUX_PB30F_TCC4_WO0                      ((PIN_PB30F_TCC4_WO0 << 16) | MUX_PB30F_TCC4_WO0)
3589 #define PORT_PB30F_TCC4_WO0                        (_UINT32_(1) << 30)
3590 
3591 #define PIN_PB15F_TCC4_WO1                         _UINT32_(47)
3592 #define MUX_PB15F_TCC4_WO1                         _UINT32_(5)
3593 #define PINMUX_PB15F_TCC4_WO1                      ((PIN_PB15F_TCC4_WO1 << 16) | MUX_PB15F_TCC4_WO1)
3594 #define PORT_PB15F_TCC4_WO1                        (_UINT32_(1) << 15)
3595 
3596 #define PIN_PB31F_TCC4_WO1                         _UINT32_(63)
3597 #define MUX_PB31F_TCC4_WO1                         _UINT32_(5)
3598 #define PINMUX_PB31F_TCC4_WO1                      ((PIN_PB31F_TCC4_WO1 << 16) | MUX_PB31F_TCC4_WO1)
3599 #define PORT_PB31F_TCC4_WO1                        (_UINT32_(1) << 31)
3600 
3601 /* =================== PORT definition for USB peripheral =================== */
3602 #define PIN_PA24H_USB_DM                           _UINT32_(24)
3603 #define MUX_PA24H_USB_DM                           _UINT32_(7)
3604 #define PINMUX_PA24H_USB_DM                        ((PIN_PA24H_USB_DM << 16) | MUX_PA24H_USB_DM)
3605 #define PORT_PA24H_USB_DM                          (_UINT32_(1) << 24)
3606 
3607 #define PIN_PA25H_USB_DP                           _UINT32_(25)
3608 #define MUX_PA25H_USB_DP                           _UINT32_(7)
3609 #define PINMUX_PA25H_USB_DP                        ((PIN_PA25H_USB_DP << 16) | MUX_PA25H_USB_DP)
3610 #define PORT_PA25H_USB_DP                          (_UINT32_(1) << 25)
3611 
3612 #define PIN_PA23H_USB_SOF_1KHZ                     _UINT32_(23)
3613 #define MUX_PA23H_USB_SOF_1KHZ                     _UINT32_(7)
3614 #define PINMUX_PA23H_USB_SOF_1KHZ                  ((PIN_PA23H_USB_SOF_1KHZ << 16) | MUX_PA23H_USB_SOF_1KHZ)
3615 #define PORT_PA23H_USB_SOF_1KHZ                    (_UINT32_(1) << 23)
3616 
3617 #define PIN_PB22H_USB_SOF_1KHZ                     _UINT32_(54)
3618 #define MUX_PB22H_USB_SOF_1KHZ                     _UINT32_(7)
3619 #define PINMUX_PB22H_USB_SOF_1KHZ                  ((PIN_PB22H_USB_SOF_1KHZ << 16) | MUX_PB22H_USB_SOF_1KHZ)
3620 #define PORT_PB22H_USB_SOF_1KHZ                    (_UINT32_(1) << 22)
3621 
3622 /* ================== PORT definition for TPIU peripheral =================== */
3623 #define PIN_PC27H_TPIU_TRACECLK                    _UINT32_(91)
3624 #define MUX_PC27H_TPIU_TRACECLK                    _UINT32_(7)
3625 #define PINMUX_PC27H_TPIU_TRACECLK                 ((PIN_PC27H_TPIU_TRACECLK << 16) | MUX_PC27H_TPIU_TRACECLK)
3626 #define PORT_PC27H_TPIU_TRACECLK                   (_UINT32_(1) << 27)
3627 
3628 #define PIN_PC28H_TPIU_TRACED0                     _UINT32_(92)
3629 #define MUX_PC28H_TPIU_TRACED0                     _UINT32_(7)
3630 #define PINMUX_PC28H_TPIU_TRACED0                  ((PIN_PC28H_TPIU_TRACED0 << 16) | MUX_PC28H_TPIU_TRACED0)
3631 #define PORT_PC28H_TPIU_TRACED0                    (_UINT32_(1) << 28)
3632 
3633 #define PIN_PC26H_TPIU_TRACED1                     _UINT32_(90)
3634 #define MUX_PC26H_TPIU_TRACED1                     _UINT32_(7)
3635 #define PINMUX_PC26H_TPIU_TRACED1                  ((PIN_PC26H_TPIU_TRACED1 << 16) | MUX_PC26H_TPIU_TRACED1)
3636 #define PORT_PC26H_TPIU_TRACED1                    (_UINT32_(1) << 26)
3637 
3638 #define PIN_PC25H_TPIU_TRACED2                     _UINT32_(89)
3639 #define MUX_PC25H_TPIU_TRACED2                     _UINT32_(7)
3640 #define PINMUX_PC25H_TPIU_TRACED2                  ((PIN_PC25H_TPIU_TRACED2 << 16) | MUX_PC25H_TPIU_TRACED2)
3641 #define PORT_PC25H_TPIU_TRACED2                    (_UINT32_(1) << 25)
3642 
3643 #define PIN_PC24H_TPIU_TRACED3                     _UINT32_(88)
3644 #define MUX_PC24H_TPIU_TRACED3                     _UINT32_(7)
3645 #define PINMUX_PC24H_TPIU_TRACED3                  ((PIN_PC24H_TPIU_TRACED3 << 16) | MUX_PC24H_TPIU_TRACED3)
3646 #define PORT_PC24H_TPIU_TRACED3                    (_UINT32_(1) << 24)
3647 
3648 
3649 
3650 #endif /* _PIC32CX1025SG41128_GPIO_H_ */
3651 
3652