1 /***************************************************************************//**
2 * \file cy_dmac.h
3 * \version 1.40
4 *
5 * \brief
6 * The header file of the DMAC driver.
7 *
8 ********************************************************************************
9 * \copyright
10 * Copyright 2018-2022 Cypress Semiconductor Corporation
11 * SPDX-License-Identifier: Apache-2.0
12 *
13 * Licensed under the Apache License, Version 2.0 (the "License");
14 * you may not use this file except in compliance with the License.
15 * You may obtain a copy of the License at
16 *
17 * http://www.apache.org/licenses/LICENSE-2.0
18 *
19 * Unless required by applicable law or agreed to in writing, software
20 * distributed under the License is distributed on an "AS IS" BASIS,
21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 * See the License for the specific language governing permissions and
23 * limitations under the License.
24 *******************************************************************************/
25
26 /**
27 * \addtogroup group_dmac
28 * \{
29 * Configures the DMA Controller block, channels and descriptors.
30 *
31 * The functions and other declarations used in this driver are in cy_dmac.h.
32 * You can include cy_pdl.h to get access to all functions
33 * and declarations in the PDL.
34 *
35 * The DMA Controller channel can be used in any project to transfer data
36 * without CPU intervention basing on a hardware trigger signal from another component.
37 *
38 * The DMA Controller block has a set of registers, a base hardware address,
39 * and supports multiple channels. Many API functions for the DMAC driver require
40 * a base hardware address and channel number.
41 * Ensure that you use the correct hardware address for the DMA Controller block in use.
42 *
43 * Features:
44 * * Multiple channels (device specific).
45 * * Four priority levels for each channel.
46 * * Descriptor chaining.
47 * * Configurable data transfer width/masking: byte, half-word (2-byte), and word (4-byte).
48 * * Configurable source and destination addresses.
49 * * Single transfer, 1D, 2D, memory copy and scatter transfer descriptor types are supported.
50 * * Configurable input/output triggers and interrupts.
51 *
52 * \section group_dmac_configuration Configuration Considerations
53 *
54 * To set up a DMAC driver, initialize a descriptor,
55 * initialize and enable a channel, and enable the DMAC block.
56 *
57 * To set up a descriptor, provide the configuration parameters for the
58 * descriptor in the \ref cy_stc_dmac_descriptor_config_t structure. Then call the
59 * \ref Cy_DMAC_Descriptor_Init function to initialize the descriptor in SRAM. You can
60 * modify the source and destination addresses dynamically by calling
61 * \ref Cy_DMAC_Descriptor_SetSrcAddress and \ref Cy_DMAC_Descriptor_SetDstAddress.
62 *
63 * To set up a DMAC channel, provide a filled \ref cy_stc_dmac_channel_config_t
64 * structure. Call the \ref Cy_DMAC_Channel_Init function, specifying the channel
65 * number. Use \ref Cy_DMAC_Channel_Enable to enable the configured DMAC channel.
66 *
67 * Call \ref Cy_DMAC_Channel_Enable for each DMAC channel in use.
68 *
69 * When configured, another peripheral typically triggers the DMAC channel. The trigger is
70 * connected to the DMAC channel using the trigger multiplexer. The trigger multiplexer
71 * driver has a software trigger you can use in firmware to trigger the DMAC channel. See the
72 * <a href="group__group__trigmux.html">Trigger Multiplexer</a> documentation.
73 *
74 * The following is a simplified structure of the DMAC driver API interdependencies
75 * in a typical user application:
76 * \image html dmac.png
77 *
78 * <B>NOTE:</B> DMAC will read descriptors from SRAM memory. To run DMAC on devices with Core CM7,
79 * D cache needs to be cleaned before calling \ref Cy_DMAC_Channel_Enable and should be invalidated after DMAC transfer. \n
80 * <B>NOTE:</B> Even if a DMAC channel is enabled, it is not operational until
81 * the DMAC block is enabled using function \ref Cy_DMAC_Enable.\n
82 * <B>NOTE:</B> If the DMAC descriptor is configured to generate an interrupt,
83 * the interrupt must be enabled using the \ref Cy_DMAC_Channel_SetInterruptMask
84 * function for each DMAC channel.
85 *
86 * For example:
87 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Enable
88 *
89 * CM7 cores in CAT1C devices support Data Cache. Data Cache line is 32 bytes.
90 * User needs to make sure that the source and destination buffer pointers and the config structure pointers passed
91 * to the following functions points to 32 byte aligned data.
92 * Cy_DMAC_Channel_SetDescriptor, Cy_DMAC_Descriptor_SetNextDescriptor, Cy_DMAC_Descriptor_SetSrcAddress, Cy_DMAC_Descriptor_SetDstAddress.
93 * User can use CY_ALIGN(32) macro for 32 byte alignment.
94 * User needs to clean the following data elements from the cache and invalidate before accessing them.
95 * source and destination buffers and descriptor structure.
96 * * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Cache_usage
97 *
98 * \section group_dmac_more_information More Information.
99 * See the DMAC chapter of the device technical reference manual (TRM).
100 *
101 * \section group_dmac_changelog Changelog
102 *
103 * <table class="doxtable">
104 * <tr><th>Version</th><th>Changes</th><th>Reason for Change</th></tr>
105 * <tr>
106 * <td>1.40</td>
107 * <td>Added new API \ref Cy_DMAC_Channel_IsEnabled.</td>
108 * <td>New devices support.</td>
109 * </tr>
110 * <tr>
111 * <td>1.30.1</td>
112 * <td>Minor Documentation update for cache usage on CM7.</td>
113 * <td>Documentation enhancement.</td>
114 * </tr>
115 * <tr>
116 * <td>1.30</td>
117 * <td>Update to configure DMAC on core CM7.</td>
118 * <td>Support for new product family.</td>
119 * </tr>
120 * <tr>
121 * <td>1.20</td>
122 * <td>Fixed MISRA 2012 violations.</td>
123 * <td>MISRA 2012 compliance.</td>
124 * </tr>
125 * <tr>
126 * <td>1.10.1</td>
127 * <td>Minor documentation updates.</td>
128 * <td>Documentation enhancement.</td>
129 * </tr>
130 * <tr>
131 * <td>1.10</td>
132 * <td>The \ref Cy_DMAC_Channel_ClearInterrupt is changed.</td>
133 * <td>Minor defect fixing.</td>
134 * </tr>
135 * <tr>
136 * <td>1.0</td>
137 * <td>The initial version.</td>
138 * <td></td>
139 * </tr>
140 * </table>
141 *
142 * \defgroup group_dmac_macros Macros
143 * \defgroup group_dmac_macros_interrupt_masks Interrupt Masks
144 * \defgroup group_dmac_functions Functions
145 * \{
146 * \defgroup group_dmac_block_functions Block Functions
147 * \defgroup group_dmac_channel_functions Channel Functions
148 * \defgroup group_dmac_descriptor_functions Descriptor Functions
149 * \}
150 * \defgroup group_dmac_data_structures Data Structures
151 * \defgroup group_dmac_enums Enumerated Types
152 */
153
154 #if !defined (CY_DMAC_H)
155 #define CY_DMAC_H
156
157 #include "cy_device.h"
158
159 #if defined (CY_IP_M4CPUSS_DMAC) || defined (CY_IP_MXAHBDMAC) || defined (CY_IP_M7CPUSS_DMAC)
160
161 #include "cy_syslib.h"
162 #include <stdint.h>
163 #include <stdbool.h>
164 #include <stddef.h>
165
166 #if defined(__cplusplus)
167 extern "C" {
168 #endif
169
170 CY_MISRA_DEVIATE_BLOCK_START('MISRA C-2012 Rule 10.8', 13, \
171 'Value extracted from _VAL2FLD macro will not exceed enum range.')
172
173 /******************************************************************************
174 * Macro definitions *
175 ******************************************************************************/
176
177 /**
178 * \addtogroup group_dmac_macros
179 * \{
180 */
181
182 /** The driver major version */
183 #define CY_DMAC_DRV_VERSION_MAJOR 1
184
185 /** The driver minor version */
186 #define CY_DMAC_DRV_VERSION_MINOR 40
187
188 /** The DMAC driver identifier */
189 #define CY_DMAC_ID (CY_PDL_DRV_ID(0x3FU))
190
191 /** The minimum X/Y Count API parameters */
192 #define CY_DMAC_LOOP_COUNT_MIN (1UL)
193 /** The maximum X/Y Count API parameters */
194 #define CY_DMAC_LOOP_COUNT_MAX (65536UL)
195 /** The maximum X Count API parameter for scatter transfer */
196 #define CY_DMAC_SCATTER_COUNT_MAX (32768UL)
197
198 /** The minimum X/Y Increment API parameters */
199 #define CY_DMAC_LOOP_INCREMENT_MIN (-32768L)
200 /** The maximum X/Y Increment API parameters */
201 #define CY_DMAC_LOOP_INCREMENT_MAX (32767L)
202
203 /**
204 * \addtogroup group_dmac_macros_interrupt_masks Interrupt Masks
205 * \{
206 */
207
208 /** Bit 0: Completion of data transfer(s) as specified by the descriptor's interruptType setting. */
209 #define CY_DMAC_INTR_COMPLETION (DMAC_CH_V2_INTR_COMPLETION_Msk)
210 /** Bit 1: Bus error for a load from the source. */
211 #define CY_DMAC_INTR_SRC_BUS_ERROR (DMAC_CH_V2_INTR_SRC_BUS_ERROR_Msk)
212 /** Bit 2: Bus error for a store to the destination. */
213 #define CY_DMAC_INTR_DST_BUS_ERROR (DMAC_CH_V2_INTR_DST_BUS_ERROR_Msk)
214 /** Bit 3: Misalignment of the source address. */
215 #define CY_DMAC_INTR_SRC_MISAL (DMAC_CH_V2_INTR_SRC_MISAL_Msk)
216 /** Bit 4: Misalignment of the destination address. */
217 #define CY_DMAC_INTR_DST_MISAL (DMAC_CH_V2_INTR_DST_MISAL_Msk)
218 /** Bit 5: The channel is enabled and the current descriptor pointer is "0". */
219 #define CY_DMAC_INTR_CURR_PTR_NULL (DMAC_CH_V2_INTR_CURR_PTR_NULL_Msk)
220 /** Bit 6: The channel is disabled and the data transfer engine is busy. */
221 #define CY_DMAC_INTR_ACTIVE_CH_DISABLED (DMAC_CH_V2_INTR_ACTIVE_CH_DISABLED_Msk)
222 /** Bit 7: Bus error for a load of the descriptor. */
223 #define CY_DMAC_INTR_DESCR_BUS_ERROR (DMAC_CH_V2_INTR_DESCR_BUS_ERROR_Msk)
224
225 /** \} group_dmac_macros_interrupt_masks */
226
227 /** \} group_dmac_macros */
228
229
230 /**
231 * \addtogroup group_dmac_enums
232 * \{
233 */
234
235 /** Contains the options for the descriptor type */
236 typedef enum
237 {
238 CY_DMAC_SINGLE_TRANSFER = 0U, /**< Single transfer. */
239 CY_DMAC_1D_TRANSFER = 1U, /**< 1D transfer. */
240 CY_DMAC_2D_TRANSFER = 2U, /**< 2D transfer. */
241 CY_DMAC_MEMORY_COPY = 3U, /**< Memory copy. */
242 CY_DMAC_SCATTER_TRANSFER = 4U /**< Scatter transfer. */
243 } cy_en_dmac_descriptor_type_t;
244
245 /** Contains the options for the interrupt, trig-in and trig-out type parameters of the descriptor */
246 typedef enum
247 {
248 CY_DMAC_1ELEMENT = 0U, /**< One element transfer. */
249 CY_DMAC_X_LOOP = 1U, /**< One X loop transfer. */
250 CY_DMAC_DESCR = 2U, /**< One descriptor transfer. */
251 CY_DMAC_DESCR_CHAIN = 3U /**< Entire descriptor chain transfer. */
252 } cy_en_dmac_trigger_type_t;
253
254 /** Contains the options for the data size */
255 typedef enum
256 {
257 CY_DMAC_BYTE = 0U, /**< One byte. */
258 CY_DMAC_HALFWORD = 1U, /**< Half word (two bytes). */
259 CY_DMAC_WORD = 2U /**< Full word (four bytes). */
260 } cy_en_dmac_data_size_t;
261
262 /** Contains the options for descriptor retriggering */
263 typedef enum
264 {
265 CY_DMAC_RETRIG_IM = 0U, /**< Retrigger immediately. */
266 CY_DMAC_RETRIG_4CYC = 1U, /**< Retrigger after 4 Clk_Slow cycles. */
267 CY_DMAC_RETRIG_16CYC = 2U, /**< Retrigger after 16 Clk_Slow cycles. */
268 CY_DMAC_WAIT_FOR_REACT = 3U /**< Wait for trigger reactivation. */
269 } cy_en_dmac_retrigger_t;
270
271 /** Contains the options for the transfer size */
272 typedef enum
273 {
274 CY_DMAC_TRANSFER_SIZE_DATA = 0U, /**< As specified by dataSize. */
275 CY_DMAC_TRANSFER_SIZE_WORD = 1U, /**< A full word (four bytes). */
276 } cy_en_dmac_transfer_size_t;
277
278 /** Contains the options for the state of the channel when the descriptor is completed */
279 typedef enum
280 {
281 CY_DMAC_CHANNEL_ENABLED = 0U, /**< Channel stays enabled. */
282 CY_DMAC_CHANNEL_DISABLED = 1U /**< Channel is disabled. */
283 } cy_en_dmac_channel_state_t;
284
285 /** Contains the return values of the DMAC driver */
286 typedef enum
287 {
288 CY_DMAC_SUCCESS = 0x0UL, /**< Success. */
289 CY_DMAC_BAD_PARAM = CY_DMAC_ID | CY_PDL_STATUS_ERROR | 0x1UL /**< The input parameters passed to the DMAC API are not valid. */
290 } cy_en_dmac_status_t;
291
292 /** \} group_dmac_enums */
293
294 /** \cond Macros for the conditions used by CY_ASSERT calls */
295
296 #define CY_DMAC_IS_LOOP_COUNT_VALID(count) (((count) >= CY_DMAC_LOOP_COUNT_MIN) && ((count) <= CY_DMAC_LOOP_COUNT_MAX))
297 #define CY_DMAC_IS_SCATTER_COUNT_VALID(count) (((count) >= CY_DMAC_LOOP_COUNT_MIN) && ((count) <= CY_DMAC_SCATTER_COUNT_MAX))
298 #define CY_DMAC_IS_LOOP_INCR_VALID(incr) (((incr) >= CY_DMAC_LOOP_INCREMENT_MIN) && ((incr) <= CY_DMAC_LOOP_INCREMENT_MAX))
299 #define CY_DMAC_IS_PRIORITY_VALID(prio) ((prio) <= 3UL)
300
301 #define CY_DMAC_INTR_MASK (CY_DMAC_INTR_COMPLETION | \
302 CY_DMAC_INTR_SRC_BUS_ERROR | \
303 CY_DMAC_INTR_DST_BUS_ERROR | \
304 CY_DMAC_INTR_SRC_MISAL | \
305 CY_DMAC_INTR_DST_MISAL | \
306 CY_DMAC_INTR_CURR_PTR_NULL | \
307 CY_DMAC_INTR_ACTIVE_CH_DISABLED | \
308 CY_DMAC_INTR_DESCR_BUS_ERROR)
309
310 #define CY_DMAC_IS_INTR_MASK_VALID(intr) (0UL == ((intr) & ((uint32_t) ~CY_DMAC_INTR_MASK)))
311
312 #define CY_DMAC_IS_RETRIGGER_VALID(retrigger) ((CY_DMAC_RETRIG_IM == (retrigger)) || \
313 (CY_DMAC_RETRIG_4CYC == (retrigger)) || \
314 (CY_DMAC_RETRIG_16CYC == (retrigger)) || \
315 (CY_DMAC_WAIT_FOR_REACT == (retrigger)))
316
317 #define CY_DMAC_IS_TRIG_TYPE_VALID(trigType) ((CY_DMAC_1ELEMENT == (trigType)) || \
318 (CY_DMAC_X_LOOP == (trigType)) || \
319 (CY_DMAC_DESCR == (trigType)) || \
320 (CY_DMAC_DESCR_CHAIN == (trigType)))
321
322 #define CY_DMAC_IS_XFER_SIZE_VALID(xferSize) ((CY_DMAC_TRANSFER_SIZE_DATA == (xferSize)) || \
323 (CY_DMAC_TRANSFER_SIZE_WORD == (xferSize)))
324
325 #define CY_DMAC_IS_CHANNEL_STATE_VALID(state) ((CY_DMAC_CHANNEL_ENABLED == (state)) || \
326 (CY_DMAC_CHANNEL_DISABLED == (state)))
327
328 #define CY_DMAC_IS_DATA_SIZE_VALID(dataSize) ((CY_DMAC_BYTE == (dataSize)) || \
329 (CY_DMAC_HALFWORD == (dataSize)) || \
330 (CY_DMAC_WORD == (dataSize)))
331
332 #define CY_DMAC_IS_TYPE_VALID(descrType) ((CY_DMAC_SINGLE_TRANSFER == (descrType)) || \
333 (CY_DMAC_1D_TRANSFER == (descrType)) || \
334 (CY_DMAC_2D_TRANSFER == (descrType)) || \
335 (CY_DMAC_MEMORY_COPY == (descrType)) || \
336 (CY_DMAC_SCATTER_TRANSFER == (descrType)))
337
338 #define CY_DMAC_IS_CH_NR_VALID(chNr) (CY_DMAC_CH_NR > (chNr))
339
340 /** \endcond */
341
342
343 /**
344 * \addtogroup group_dmac_data_structures
345 * \{
346 */
347
348
349 /**
350 * DMAC descriptor structure type. It is a user-declared structure
351 * allocated in RAM. The DMAC HW requires a pointer to this structure to work with it.
352 *
353 * For advanced users: the descriptor can be allocated even in flash, however the user
354 * have to predefine all the structure items with constants manually,
355 * because the descriptor "Set" API functions (including \ref Cy_DMAC_Descriptor_Init())
356 * don't work with read-only descriptors.
357 */
358 typedef struct
359 {
360 uint32_t ctl; /*!< 0x00000000 Descriptor control */
361 uint32_t src; /*!< 0x00000004 Descriptor source */
362 uint32_t dst; /*!< 0x00000008 Descriptor destination */
363 uint32_t xSize; /*!< 0x0000000C Descriptor X loop size */
364 uint32_t xIncr; /*!< 0x00000010 Descriptor X loop increment */
365 uint32_t ySize; /*!< 0x00000014 Descriptor Y loop size */
366 uint32_t yIncr; /*!< 0x00000010 Descriptor Y loop increment */
367 uint32_t nextPtr; /*!< 0x00000014 Descriptor next pointer */
368 } cy_stc_dmac_descriptor_t;
369
370 /** \cond The next type-specific descriptor types are ONLY for internal API implementation. */
371
372 typedef cy_stc_dmac_descriptor_t cy_stc_dmac_dscr_2d_t;
373
374 typedef struct
375 {
376 uint32_t ctl;
377 uint32_t src;
378 uint32_t dst;
379 uint32_t nextPtr;
380 } cy_stc_dmac_dscr_single_t;
381
382 typedef struct
383 {
384 uint32_t ctl;
385 uint32_t src;
386 uint32_t xSize;
387 uint32_t nextPtr;
388 } cy_stc_dmac_dscr_scatter_t;
389
390 typedef struct
391 {
392 uint32_t ctl;
393 uint32_t src;
394 uint32_t dst;
395 uint32_t xSize;
396 uint32_t nextPtr;
397 } cy_stc_dmac_dscr_memcpy_t;
398
399 typedef struct
400 {
401 uint32_t ctl;
402 uint32_t src;
403 uint32_t dst;
404 uint32_t xSize;
405 uint32_t xIncr;
406 uint32_t nextPtr;
407 } cy_stc_dmac_dscr_1d_t;
408
409 /** \endcond */
410
411
412 /**
413 * This structure is a configuration structure pre-initialized by user
414 * and passed as a parameter to the \ref Cy_DMAC_Descriptor_Init().
415 * It can be allocated in RAM/flash (on user's choice).
416 * In case of flash allocation there is a possibility to reinitialize the descriptor in runtime.
417 * This structure has all the parameters of the descriptor as separate parameters.
418 * Most of these parameters are represented in the \ref cy_stc_dmac_descriptor_t structure as bit fields.
419 */
420 typedef struct
421 {
422 cy_en_dmac_retrigger_t retrigger; /**< Specifies whether the DMA controller should wait for the input trigger to be deactivated. */
423 cy_en_dmac_trigger_type_t interruptType; /**< Sets the event that triggers an interrupt. See \ref cy_en_dmac_trigger_type_t. */
424 cy_en_dmac_trigger_type_t triggerOutType; /**< Sets the event that triggers an output. See \ref cy_en_dmac_trigger_type_t. */
425 cy_en_dmac_channel_state_t channelState; /**< Specifies whether the channel is enabled or disabled on completion of descriptor see \ref cy_en_dmac_channel_state_t. */
426 cy_en_dmac_trigger_type_t triggerInType; /**< Sets what type of transfer is triggered. See \ref cy_en_dmac_trigger_type_t. */
427 bool dataPrefetch; /**< Source data transfers are initiated as soon as the channel is enabled, the current descriptor pointer is NOT "0"
428 * and there is space available in the channel's data FIFO.
429 */
430 cy_en_dmac_data_size_t dataSize; /**< The size of the data bus for transfer. See \ref cy_en_dmac_data_size_t.
431 * For memory copy and scatter descriptors this setting will be ignored.
432 */
433 cy_en_dmac_transfer_size_t srcTransferSize; /**< The source transfer size.
434 * For memory copy and scatter descriptors this setting will be ignored.
435 */
436 cy_en_dmac_transfer_size_t dstTransferSize; /**< The destination transfer size.
437 * For memory copy and scatter descriptors this setting will be ignored.
438 */
439 cy_en_dmac_descriptor_type_t descriptorType; /**< The type of the descriptor. See \ref cy_en_dmac_descriptor_type_t. */
440 void * srcAddress; /**< The source address of the transfer. */
441 void * dstAddress; /**< The destination address of the transfer. */
442 int32_t srcXincrement; /**< The address increment of the source after each X-loop transfer. Valid range is -32768...32767. */
443 int32_t dstXincrement; /**< The address increment of the destination after each X-loop transfer. Valid range is -32768...32767. */
444 uint32_t xCount; /**< The number of transfers in an X-loop. Valid range (for all descriptors except scatter transfer) is 1...65536.
445 * For memory copy descriptors, the X count is a number of bytes (not a data transfer size).
446 * For scatter descriptors, the X count is a number of [address, data] pairs (two words each). Valid range is 1...32768.
447 */
448 int32_t srcYincrement; /**< The address increment of the source after each Y-loop transfer. Valid range is -32768...32767. */
449 int32_t dstYincrement; /**< The address increment of the destination after each Y-loop transfer. Valid range is -32768...32767. */
450 uint32_t yCount; /**< The number of X-loops in the Y-loop. Valid range is 1...65536. */
451 cy_stc_dmac_descriptor_t * nextDescriptor; /**< The next descriptor to chain after completion. A NULL value will signify no chaining. */
452 } cy_stc_dmac_descriptor_config_t;
453
454 /** This structure holds the initialization values for the DMAC channel */
455 typedef struct
456 {
457 cy_stc_dmac_descriptor_t * descriptor; /**< The DMAC descriptor associated with the channel being initialized. */
458 uint32_t priority; /**< This parameter specifies the channel's priority. */
459 bool enable; /**< This parameter specifies if the channel is enabled after initializing. */
460 bool bufferable; /**< This parameter specifies whether a write transaction can complete.
461 * without waiting for the destination to accept the write transaction data.
462 */
463 } cy_stc_dmac_channel_config_t;
464
465 /** \} group_dmac_data_structures */
466
467
468 /**
469 * \addtogroup group_dmac_functions
470 * \{
471 */
472
473 __STATIC_INLINE void Cy_DMAC_Enable (DMAC_Type * base);
474 __STATIC_INLINE void Cy_DMAC_Disable (DMAC_Type * base);
475 __STATIC_INLINE uint32_t Cy_DMAC_GetActiveChannel (DMAC_Type const * base);
476
477
478 /**
479 * \addtogroup group_dmac_channel_functions
480 * \{
481 */
482 cy_en_dmac_status_t Cy_DMAC_Channel_Init (DMAC_Type * base, uint32_t channel, cy_stc_dmac_channel_config_t const * config);
483 void Cy_DMAC_Channel_DeInit (DMAC_Type * base, uint32_t channel);
484 __STATIC_INLINE void Cy_DMAC_Channel_SetDescriptor (DMAC_Type * base, uint32_t channel, cy_stc_dmac_descriptor_t const * descriptor);
485 __STATIC_INLINE void Cy_DMAC_Channel_Enable (DMAC_Type * base, uint32_t channel);
486 __STATIC_INLINE void Cy_DMAC_Channel_Disable (DMAC_Type * base, uint32_t channel);
487 __STATIC_INLINE bool Cy_DMAC_Channel_IsEnabled (DMAC_Type * base, uint32_t channel);
488 __STATIC_INLINE void Cy_DMAC_Channel_SetPriority (DMAC_Type * base, uint32_t channel, uint32_t priority);
489 __STATIC_INLINE uint32_t Cy_DMAC_Channel_GetPriority (DMAC_Type const * base, uint32_t channel);
490 __STATIC_INLINE void * Cy_DMAC_Channel_GetCurrentSrcAddress (DMAC_Type const * base, uint32_t channel);
491 __STATIC_INLINE void * Cy_DMAC_Channel_GetCurrentDstAddress (DMAC_Type const * base, uint32_t channel);
492 __STATIC_INLINE uint32_t Cy_DMAC_Channel_GetCurrentXloopIndex (DMAC_Type const * base, uint32_t channel);
493 __STATIC_INLINE uint32_t Cy_DMAC_Channel_GetCurrentYloopIndex (DMAC_Type const * base, uint32_t channel);
494 __STATIC_INLINE cy_stc_dmac_descriptor_t *
495 Cy_DMAC_Channel_GetCurrentDescriptor (DMAC_Type const * base, uint32_t channel);
496 __STATIC_INLINE uint32_t Cy_DMAC_Channel_GetInterruptStatus (DMAC_Type const * base, uint32_t channel);
497 __STATIC_INLINE void Cy_DMAC_Channel_ClearInterrupt (DMAC_Type * base, uint32_t channel, uint32_t interrupt);
498 __STATIC_INLINE void Cy_DMAC_Channel_SetInterrupt (DMAC_Type * base, uint32_t channel, uint32_t interrupt);
499 __STATIC_INLINE uint32_t Cy_DMAC_Channel_GetInterruptMask (DMAC_Type const * base, uint32_t channel);
500 __STATIC_INLINE void Cy_DMAC_Channel_SetInterruptMask (DMAC_Type * base, uint32_t channel, uint32_t interrupt);
501 __STATIC_INLINE uint32_t Cy_DMAC_Channel_GetInterruptStatusMasked(DMAC_Type const * base, uint32_t channel);
502
503 /** \} group_dmac_channel_functions */
504
505
506 /**
507 * \addtogroup group_dmac_descriptor_functions
508 * \{
509 */
510
511 cy_en_dmac_status_t Cy_DMAC_Descriptor_Init (cy_stc_dmac_descriptor_t * descriptor, cy_stc_dmac_descriptor_config_t const * config);
512 void Cy_DMAC_Descriptor_DeInit(cy_stc_dmac_descriptor_t * descriptor);
513
514 void Cy_DMAC_Descriptor_SetNextDescriptor (cy_stc_dmac_descriptor_t * descriptor, cy_stc_dmac_descriptor_t const * nextDescriptor);
515 void Cy_DMAC_Descriptor_SetDescriptorType (cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_descriptor_type_t descriptorType);
516 __STATIC_INLINE void Cy_DMAC_Descriptor_SetSrcAddress (cy_stc_dmac_descriptor_t * descriptor, void const * srcAddress);
517 __STATIC_INLINE void Cy_DMAC_Descriptor_SetDstAddress (cy_stc_dmac_descriptor_t * descriptor, void const * dstAddress);
518 void Cy_DMAC_Descriptor_SetXloopDataCount (cy_stc_dmac_descriptor_t * descriptor, uint32_t xCount);
519 __STATIC_INLINE void Cy_DMAC_Descriptor_SetYloopDataCount (cy_stc_dmac_descriptor_t * descriptor, uint32_t yCount);
520 __STATIC_INLINE void Cy_DMAC_Descriptor_SetXloopSrcIncrement(cy_stc_dmac_descriptor_t * descriptor, int32_t srcXincrement);
521 __STATIC_INLINE void Cy_DMAC_Descriptor_SetXloopDstIncrement(cy_stc_dmac_descriptor_t * descriptor, int32_t dstXincrement);
522 __STATIC_INLINE void Cy_DMAC_Descriptor_SetYloopSrcIncrement(cy_stc_dmac_descriptor_t * descriptor, int32_t srcYincrement);
523 __STATIC_INLINE void Cy_DMAC_Descriptor_SetYloopDstIncrement(cy_stc_dmac_descriptor_t * descriptor, int32_t dstYincrement);
524 __STATIC_INLINE void Cy_DMAC_Descriptor_SetInterruptType (cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_trigger_type_t interruptType);
525 __STATIC_INLINE void Cy_DMAC_Descriptor_SetTriggerInType (cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_trigger_type_t triggerInType);
526 __STATIC_INLINE void Cy_DMAC_Descriptor_SetTriggerOutType (cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_trigger_type_t triggerOutType);
527 __STATIC_INLINE void Cy_DMAC_Descriptor_SetDataSize (cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_data_size_t dataSize);
528 __STATIC_INLINE void Cy_DMAC_Descriptor_SetSrcTransferSize (cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_transfer_size_t srcTransferSize);
529 __STATIC_INLINE void Cy_DMAC_Descriptor_SetDstTransferSize (cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_transfer_size_t dstTransferSize);
530 __STATIC_INLINE void Cy_DMAC_Descriptor_SetRetrigger (cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_retrigger_t retrigger);
531 __STATIC_INLINE void Cy_DMAC_Descriptor_SetChannelState (cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_channel_state_t channelState);
532
533 cy_stc_dmac_descriptor_t * Cy_DMAC_Descriptor_GetNextDescriptor (cy_stc_dmac_descriptor_t const * descriptor);
534 __STATIC_INLINE cy_en_dmac_descriptor_type_t Cy_DMAC_Descriptor_GetDescriptorType (cy_stc_dmac_descriptor_t const * descriptor);
535 __STATIC_INLINE void * Cy_DMAC_Descriptor_GetSrcAddress (cy_stc_dmac_descriptor_t const * descriptor);
536 __STATIC_INLINE void * Cy_DMAC_Descriptor_GetDstAddress (cy_stc_dmac_descriptor_t const * descriptor);
537 uint32_t Cy_DMAC_Descriptor_GetXloopDataCount (cy_stc_dmac_descriptor_t const * descriptor);
538 __STATIC_INLINE uint32_t Cy_DMAC_Descriptor_GetYloopDataCount (cy_stc_dmac_descriptor_t const * descriptor);
539 __STATIC_INLINE int32_t Cy_DMAC_Descriptor_GetXloopSrcIncrement(cy_stc_dmac_descriptor_t const * descriptor);
540 __STATIC_INLINE int32_t Cy_DMAC_Descriptor_GetXloopDstIncrement(cy_stc_dmac_descriptor_t const * descriptor);
541 __STATIC_INLINE int32_t Cy_DMAC_Descriptor_GetYloopSrcIncrement(cy_stc_dmac_descriptor_t const * descriptor);
542 __STATIC_INLINE int32_t Cy_DMAC_Descriptor_GetYloopDstIncrement(cy_stc_dmac_descriptor_t const * descriptor);
543 __STATIC_INLINE cy_en_dmac_trigger_type_t Cy_DMAC_Descriptor_GetInterruptType (cy_stc_dmac_descriptor_t const * descriptor);
544 __STATIC_INLINE cy_en_dmac_trigger_type_t Cy_DMAC_Descriptor_GetTriggerInType (cy_stc_dmac_descriptor_t const * descriptor);
545 __STATIC_INLINE cy_en_dmac_trigger_type_t Cy_DMAC_Descriptor_GetTriggerOutType (cy_stc_dmac_descriptor_t const * descriptor);
546 __STATIC_INLINE cy_en_dmac_data_size_t Cy_DMAC_Descriptor_GetDataSize (cy_stc_dmac_descriptor_t const * descriptor);
547 __STATIC_INLINE cy_en_dmac_transfer_size_t Cy_DMAC_Descriptor_GetSrcTransferSize (cy_stc_dmac_descriptor_t const * descriptor);
548 __STATIC_INLINE cy_en_dmac_transfer_size_t Cy_DMAC_Descriptor_GetDstTransferSize (cy_stc_dmac_descriptor_t const * descriptor);
549 __STATIC_INLINE cy_en_dmac_retrigger_t Cy_DMAC_Descriptor_GetRetrigger (cy_stc_dmac_descriptor_t const * descriptor);
550 __STATIC_INLINE cy_en_dmac_channel_state_t Cy_DMAC_Descriptor_GetChannelState (cy_stc_dmac_descriptor_t const * descriptor);
551
552 /** \} group_dmac_descriptor_functions */
553
554
555 /***************************************
556 * In-line Function Implementation
557 ***************************************/
558
559
560 /**
561 * \addtogroup group_dmac_block_functions
562 * \{
563 */
564
565
566 /*******************************************************************************
567 * Function Name: Cy_DMAC_Enable
568 ****************************************************************************//**
569 *
570 * Enables the DMACblock.
571 *
572 * \param base
573 * The pointer to the hardware DMAC block.
574 *
575 * \funcusage
576 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Enable
577 *
578 *******************************************************************************/
Cy_DMAC_Enable(DMAC_Type * base)579 __STATIC_INLINE void Cy_DMAC_Enable(DMAC_Type * base)
580 {
581 DMAC_CTL(base) |= DMAC_V2_CTL_ENABLED_Msk;
582 }
583
584
585 /*******************************************************************************
586 * Function Name: Cy_DMAC_Disable
587 ****************************************************************************//**
588 *
589 * Disables the DMACblock.
590 *
591 * \param base
592 * The pointer to the hardware DMAC block.
593 *
594 * \funcusage
595 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Disable
596 *
597 *******************************************************************************/
Cy_DMAC_Disable(DMAC_Type * base)598 __STATIC_INLINE void Cy_DMAC_Disable(DMAC_Type * base)
599 {
600 DMAC_CTL(base) &= (uint32_t) ~DMAC_V2_CTL_ENABLED_Msk;
601 }
602
603
604 /*******************************************************************************
605 * Function Name: Cy_DMAC_GetActiveChannel
606 ****************************************************************************//**
607 *
608 * Returns the status of the active/pending channels of the DMACblock.
609 *
610 * \param base
611 * The pointer to the hardware DMAC block.
612 *
613 * \return
614 * Returns a bit-field with all of the currently active/pending channels in the
615 * DMAC block.
616 *
617 * \funcusage
618 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Disable
619 *
620 *******************************************************************************/
Cy_DMAC_GetActiveChannel(DMAC_Type const * base)621 __STATIC_INLINE uint32_t Cy_DMAC_GetActiveChannel(DMAC_Type const * base)
622 {
623 return(_FLD2VAL(DMAC_V2_ACTIVE_ACTIVE, DMAC_ACTIVE(base)));
624 }
625
626 /** \} group_dmac_block_functions */
627
628
629 /**
630 * \addtogroup group_dmac_descriptor_functions
631 * \{
632 */
633
634
635 /*******************************************************************************
636 * Function Name: Cy_DMAC_Descriptor_SetSrcAddress
637 ****************************************************************************//**
638 *
639 * Sets the source address parameter for the specified descriptor.
640 *
641 * \param descriptor
642 * The descriptor structure instance.
643 *
644 * \param srcAddress
645 * The source address value for the descriptor.
646 * For CAT1C devices this pointer needs to point to 32 byte aligned structure.
647 *
648 * \funcusage
649 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
650 *
651 *******************************************************************************/
Cy_DMAC_Descriptor_SetSrcAddress(cy_stc_dmac_descriptor_t * descriptor,void const * srcAddress)652 __STATIC_INLINE void Cy_DMAC_Descriptor_SetSrcAddress(cy_stc_dmac_descriptor_t * descriptor, void const * srcAddress)
653 {
654 descriptor->src = (uint32_t) srcAddress;
655 }
656
657
658 /*******************************************************************************
659 * Function Name: Cy_DMAC_Descriptor_GetSrcAddress
660 ****************************************************************************//**
661 *
662 * Returns the source address of the specified descriptor.
663 *
664 * \param descriptor
665 * The descriptor structure instance.
666 *
667 * \return
668 * The source address value of the descriptor.
669 *
670 * \funcusage
671 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
672 *
673 *******************************************************************************/
Cy_DMAC_Descriptor_GetSrcAddress(cy_stc_dmac_descriptor_t const * descriptor)674 __STATIC_INLINE void * Cy_DMAC_Descriptor_GetSrcAddress(cy_stc_dmac_descriptor_t const * descriptor)
675 {
676 return ((void *) descriptor->src);
677 }
678
679
680 /*******************************************************************************
681 * Function Name: Cy_DMAC_Descriptor_SetDstAddress
682 ****************************************************************************//**
683 *
684 * Sets the destination address parameter for the specified descriptor.
685 *
686 * \param descriptor
687 * The descriptor structure instance.
688 *
689 * \param dstAddress
690 * The destination address value for the descriptor.
691 * For CAT1C devices this pointer needs to point to 32 byte aligned structure.
692 *
693 * \funcusage
694 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
695 *
696 *******************************************************************************/
Cy_DMAC_Descriptor_SetDstAddress(cy_stc_dmac_descriptor_t * descriptor,void const * dstAddress)697 __STATIC_INLINE void Cy_DMAC_Descriptor_SetDstAddress(cy_stc_dmac_descriptor_t * descriptor, void const * dstAddress)
698 {
699 CY_ASSERT_L1(CY_DMAC_SCATTER_TRANSFER != Cy_DMAC_Descriptor_GetDescriptorType(descriptor));
700
701 descriptor->dst = (uint32_t) dstAddress;
702 }
703
704
705 /*******************************************************************************
706 * Function Name: Cy_DMAC_Descriptor_GetDstAddress
707 ****************************************************************************//**
708 *
709 * Returns the destination address of the specified descriptor.
710 *
711 * \param descriptor
712 * The descriptor structure instance.
713 *
714 * \return
715 * The destination address value of the descriptor.
716 *
717 * \funcusage
718 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
719 *
720 *******************************************************************************/
Cy_DMAC_Descriptor_GetDstAddress(cy_stc_dmac_descriptor_t const * descriptor)721 __STATIC_INLINE void * Cy_DMAC_Descriptor_GetDstAddress(cy_stc_dmac_descriptor_t const * descriptor)
722 {
723 CY_ASSERT_L1(CY_DMAC_SCATTER_TRANSFER != Cy_DMAC_Descriptor_GetDescriptorType(descriptor));
724
725 return ((void *) descriptor->dst);
726 }
727
728
729 /*******************************************************************************
730 * Function Name: Cy_DMAC_Descriptor_SetInterruptType
731 ****************************************************************************//**
732 *
733 * Sets the interrupt type parameter for the specified descriptor.
734 *
735 * \param descriptor
736 * The descriptor structure instance.
737 *
738 * \param interruptType
739 * The interrupt type set for the descriptor. \ref cy_en_dmac_trigger_type_t
740 *
741 * \funcusage
742 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
743 *
744 *******************************************************************************/
Cy_DMAC_Descriptor_SetInterruptType(cy_stc_dmac_descriptor_t * descriptor,cy_en_dmac_trigger_type_t interruptType)745 __STATIC_INLINE void Cy_DMAC_Descriptor_SetInterruptType(cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_trigger_type_t interruptType)
746 {
747 CY_ASSERT_L3(CY_DMAC_IS_TRIG_TYPE_VALID(interruptType));
748
749 CY_REG32_CLR_SET(descriptor->ctl, DMAC_CH_V2_DESCR_CTL_INTR_TYPE, interruptType);
750 }
751
752
753 /*******************************************************************************
754 * Function Name: Cy_DMAC_Descriptor_GetInterruptType
755 ****************************************************************************//**
756 *
757 * Returns the Interrupt-Type of the specified descriptor.
758 *
759 * \param descriptor
760 * The descriptor structure instance.
761 *
762 * \return
763 * The Interrupt-Type \ref cy_en_dmac_trigger_type_t.
764 *
765 * \funcusage
766 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
767 *
768 *******************************************************************************/
Cy_DMAC_Descriptor_GetInterruptType(cy_stc_dmac_descriptor_t const * descriptor)769 __STATIC_INLINE cy_en_dmac_trigger_type_t Cy_DMAC_Descriptor_GetInterruptType(cy_stc_dmac_descriptor_t const * descriptor)
770 {
771 return((cy_en_dmac_trigger_type_t) _FLD2VAL(DMAC_CH_V2_DESCR_CTL_INTR_TYPE, descriptor->ctl));
772 }
773
774
775 /*******************************************************************************
776 * Function Name: Cy_DMAC_Descriptor_SetTriggerInType
777 ****************************************************************************//**
778 *
779 * Sets the Trigger In Type parameter for the specified descriptor.
780 *
781 * \param descriptor
782 * The descriptor structure instance.
783 *
784 * \param triggerInType
785 * The Trigger In Type parameter \ref cy_en_dmac_trigger_type_t
786 *
787 * \funcusage
788 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
789 *
790 *******************************************************************************/
Cy_DMAC_Descriptor_SetTriggerInType(cy_stc_dmac_descriptor_t * descriptor,cy_en_dmac_trigger_type_t triggerInType)791 __STATIC_INLINE void Cy_DMAC_Descriptor_SetTriggerInType(cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_trigger_type_t triggerInType)
792 {
793 CY_ASSERT_L3(CY_DMAC_IS_TRIG_TYPE_VALID(triggerInType));
794
795 CY_REG32_CLR_SET(descriptor->ctl, DMAC_CH_V2_DESCR_CTL_TR_IN_TYPE, triggerInType);
796 }
797
798
799 /*******************************************************************************
800 * Function Name: Cy_DMAC_Descriptor_GetTriggerInType
801 ****************************************************************************//**
802 *
803 * Returns the Trigger In Type of the specified descriptor.
804 *
805 * \param descriptor
806 * The descriptor structure instance.
807 *
808 * \return
809 * The Trigger In Type \ref cy_en_dmac_trigger_type_t
810 *
811 * \funcusage
812 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
813 *
814 *******************************************************************************/
Cy_DMAC_Descriptor_GetTriggerInType(cy_stc_dmac_descriptor_t const * descriptor)815 __STATIC_INLINE cy_en_dmac_trigger_type_t Cy_DMAC_Descriptor_GetTriggerInType(cy_stc_dmac_descriptor_t const * descriptor)
816 {
817 return((cy_en_dmac_trigger_type_t) _FLD2VAL(DMAC_CH_V2_DESCR_CTL_TR_IN_TYPE, descriptor->ctl));
818 }
819
820
821 /*******************************************************************************
822 * Function Name: Cy_DMAC_Descriptor_SetTriggerOutType
823 ****************************************************************************//**
824 *
825 * Sets the Trigger Out Type parameter for the specified descriptor.
826 *
827 * \param descriptor
828 * The descriptor structure instance.
829 *
830 * \param triggerOutType
831 * The Trigger Out Type set for the descriptor. \ref cy_en_dmac_trigger_type_t
832 *
833 * \funcusage
834 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
835 *
836 *******************************************************************************/
Cy_DMAC_Descriptor_SetTriggerOutType(cy_stc_dmac_descriptor_t * descriptor,cy_en_dmac_trigger_type_t triggerOutType)837 __STATIC_INLINE void Cy_DMAC_Descriptor_SetTriggerOutType(cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_trigger_type_t triggerOutType)
838 {
839 CY_ASSERT_L3(CY_DMAC_IS_TRIG_TYPE_VALID(triggerOutType));
840
841 CY_REG32_CLR_SET(descriptor->ctl, DMAC_CH_V2_DESCR_CTL_TR_OUT_TYPE, triggerOutType);
842 }
843
844
845 /*******************************************************************************
846 * Function Name: Cy_DMAC_Descriptor_GetTriggerOutType
847 ****************************************************************************//**
848 *
849 * Returns the Trigger Out Type of the specified descriptor.
850 *
851 * \param descriptor
852 * The descriptor structure instance.
853 *
854 * \return
855 * The Trigger Out Type parameter \ref cy_en_dmac_trigger_type_t.
856 *
857 * \funcusage
858 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
859 *
860 *******************************************************************************/
Cy_DMAC_Descriptor_GetTriggerOutType(cy_stc_dmac_descriptor_t const * descriptor)861 __STATIC_INLINE cy_en_dmac_trigger_type_t Cy_DMAC_Descriptor_GetTriggerOutType(cy_stc_dmac_descriptor_t const * descriptor)
862 {
863 return((cy_en_dmac_trigger_type_t) _FLD2VAL(DMAC_CH_V2_DESCR_CTL_TR_OUT_TYPE, descriptor->ctl));
864 }
865
866
867 /*******************************************************************************
868 * Function Name: Cy_DMAC_Descriptor_SetDataSize
869 ****************************************************************************//**
870 *
871 * Sets the Data Element Size parameter for the specified descriptor.
872 *
873 * \param descriptor
874 * The descriptor structure instance.
875 *
876 * \param dataSize
877 * The Data Element Size \ref cy_en_dmac_data_size_t
878 *
879 * \funcusage
880 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
881 *
882 *******************************************************************************/
Cy_DMAC_Descriptor_SetDataSize(cy_stc_dmac_descriptor_t * descriptor,cy_en_dmac_data_size_t dataSize)883 __STATIC_INLINE void Cy_DMAC_Descriptor_SetDataSize(cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_data_size_t dataSize)
884 {
885 CY_ASSERT_L3(CY_DMAC_IS_DATA_SIZE_VALID(dataSize));
886
887 CY_REG32_CLR_SET(descriptor->ctl, DMAC_CH_V2_DESCR_CTL_DATA_SIZE, dataSize);
888 }
889
890
891 /*******************************************************************************
892 * Function Name: Cy_DMAC_Descriptor_GetDataSize
893 ****************************************************************************//**
894 *
895 * Returns the Data Element Size of the specified descriptor.
896 *
897 * \param descriptor
898 * The descriptor structure instance.
899 *
900 * \return
901 * The Data Element Size \ref cy_en_dmac_data_size_t.
902 *
903 * \funcusage
904 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
905 *
906 *******************************************************************************/
Cy_DMAC_Descriptor_GetDataSize(cy_stc_dmac_descriptor_t const * descriptor)907 __STATIC_INLINE cy_en_dmac_data_size_t Cy_DMAC_Descriptor_GetDataSize(cy_stc_dmac_descriptor_t const * descriptor)
908 {
909 return((cy_en_dmac_data_size_t) _FLD2VAL(DMAC_CH_V2_DESCR_CTL_DATA_SIZE, descriptor->ctl));
910 }
911
912
913 /*******************************************************************************
914 * Function Name: Cy_DMAC_Descriptor_SetSrcTransferSize
915 ****************************************************************************//**
916 *
917 * Sets the Source Transfer Size parameter for the specified descriptor.
918 *
919 * \param descriptor
920 * The descriptor structure instance.
921 *
922 * \param srcTransferSize
923 * The Source Transfer Size \ref cy_en_dmac_transfer_size_t.
924 *
925 * \funcusage
926 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
927 *******************************************************************************/
Cy_DMAC_Descriptor_SetSrcTransferSize(cy_stc_dmac_descriptor_t * descriptor,cy_en_dmac_transfer_size_t srcTransferSize)928 __STATIC_INLINE void Cy_DMAC_Descriptor_SetSrcTransferSize(cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_transfer_size_t srcTransferSize)
929 {
930 CY_ASSERT_L3(CY_DMAC_IS_XFER_SIZE_VALID(srcTransferSize));
931
932 CY_REG32_CLR_SET(descriptor->ctl, DMAC_CH_V2_DESCR_CTL_SRC_TRANSFER_SIZE, srcTransferSize);
933 }
934
935
936 /*******************************************************************************
937 * Function Name: Cy_DMAC_Descriptor_GetSrcTransferSize
938 ****************************************************************************//**
939 *
940 * Returns the Source Transfer Size of the specified descriptor.
941 *
942 * \param descriptor
943 * The descriptor structure instance.
944 *
945 * \return
946 * The Source Transfer Size \ref cy_en_dmac_transfer_size_t.
947 *
948 * \funcusage
949 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
950 *
951 *******************************************************************************/
Cy_DMAC_Descriptor_GetSrcTransferSize(cy_stc_dmac_descriptor_t const * descriptor)952 __STATIC_INLINE cy_en_dmac_transfer_size_t Cy_DMAC_Descriptor_GetSrcTransferSize(cy_stc_dmac_descriptor_t const * descriptor)
953 {
954 return((cy_en_dmac_transfer_size_t) _FLD2VAL(DMAC_CH_V2_DESCR_CTL_SRC_TRANSFER_SIZE, descriptor->ctl));
955 }
956
957
958 /*******************************************************************************
959 * Function Name: Cy_DMAC_Descriptor_SetDstTransferSize
960 ****************************************************************************//**
961 *
962 * Sets the Destination Transfer Size parameter for the specified descriptor.
963 *
964 * \param descriptor
965 * The descriptor structure instance.
966 *
967 * \param dstTransferSize
968 * The Destination Transfer Size \ref cy_en_dmac_transfer_size_t.
969 *
970 * \funcusage
971 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
972 *
973 *******************************************************************************/
Cy_DMAC_Descriptor_SetDstTransferSize(cy_stc_dmac_descriptor_t * descriptor,cy_en_dmac_transfer_size_t dstTransferSize)974 __STATIC_INLINE void Cy_DMAC_Descriptor_SetDstTransferSize(cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_transfer_size_t dstTransferSize)
975 {
976 CY_ASSERT_L3(CY_DMAC_IS_XFER_SIZE_VALID(dstTransferSize));
977
978 CY_REG32_CLR_SET(descriptor->ctl, DMAC_CH_V2_DESCR_CTL_DST_TRANSFER_SIZE, dstTransferSize);
979 }
980
981
982 /*******************************************************************************
983 * Function Name: Cy_DMAC_Descriptor_GetDstTransferSize
984 ****************************************************************************//**
985 *
986 * Returns the Destination Transfer Size of the specified descriptor.
987 *
988 * \param descriptor
989 * The descriptor structure instance.
990 *
991 * \return
992 * The Destination Transfer Size \ref cy_en_dmac_transfer_size_t
993 *
994 * \funcusage
995 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
996 *
997 *******************************************************************************/
Cy_DMAC_Descriptor_GetDstTransferSize(cy_stc_dmac_descriptor_t const * descriptor)998 __STATIC_INLINE cy_en_dmac_transfer_size_t Cy_DMAC_Descriptor_GetDstTransferSize(cy_stc_dmac_descriptor_t const * descriptor)
999 {
1000 return((cy_en_dmac_transfer_size_t) _FLD2VAL(DMAC_CH_V2_DESCR_CTL_DST_TRANSFER_SIZE, descriptor->ctl));
1001 }
1002
1003
1004 /*******************************************************************************
1005 * Function Name: Cy_DMAC_Descriptor_SetRetrigger
1006 ****************************************************************************//**
1007 *
1008 * Sets the retrigger value which specifies whether the controller should
1009 * wait for the input trigger to be deactivated.
1010 *
1011 * \param descriptor
1012 * The descriptor structure instance.
1013 *
1014 * \param retrigger
1015 * The \ref cy_en_dmac_retrigger_t parameter specifies whether the controller
1016 * should wait for the input trigger to be deactivated.
1017 *
1018 * \funcusage
1019 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
1020 *
1021 *******************************************************************************/
Cy_DMAC_Descriptor_SetRetrigger(cy_stc_dmac_descriptor_t * descriptor,cy_en_dmac_retrigger_t retrigger)1022 __STATIC_INLINE void Cy_DMAC_Descriptor_SetRetrigger(cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_retrigger_t retrigger)
1023 {
1024 CY_ASSERT_L3(CY_DMAC_IS_RETRIGGER_VALID(retrigger));
1025
1026 CY_REG32_CLR_SET(descriptor->ctl, DMAC_CH_V2_DESCR_CTL_WAIT_FOR_DEACT, retrigger);
1027 }
1028
1029
1030 /*******************************************************************************
1031 * Function Name: Cy_DMAC_Descriptor_GetRetrigger
1032 ****************************************************************************//**
1033 *
1034 * Returns a value which specifies whether the controller should
1035 * wait for the input trigger to be deactivated.
1036 *
1037 * \param descriptor
1038 * The descriptor structure instance.
1039 *
1040 * \return
1041 * The Retrigger setting \ref cy_en_dmac_retrigger_t.
1042 *
1043 * \funcusage
1044 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
1045 *
1046 *******************************************************************************/
Cy_DMAC_Descriptor_GetRetrigger(cy_stc_dmac_descriptor_t const * descriptor)1047 __STATIC_INLINE cy_en_dmac_retrigger_t Cy_DMAC_Descriptor_GetRetrigger(cy_stc_dmac_descriptor_t const * descriptor)
1048 {
1049 return((cy_en_dmac_retrigger_t) _FLD2VAL(DMAC_CH_V2_DESCR_CTL_WAIT_FOR_DEACT, descriptor->ctl));
1050 }
1051
1052
1053 /*******************************************************************************
1054 * Function Name: Cy_DMAC_Descriptor_GetDescriptorType
1055 ****************************************************************************//**
1056 *
1057 * Returns the descriptor's type of the specified descriptor.
1058 *
1059 * \param descriptor
1060 * The descriptor structure instance.
1061 *
1062 * \return
1063 * The descriptor type \ref cy_en_dmac_descriptor_type_t
1064 *
1065 * \funcusage
1066 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
1067 *
1068 *******************************************************************************/
Cy_DMAC_Descriptor_GetDescriptorType(cy_stc_dmac_descriptor_t const * descriptor)1069 __STATIC_INLINE cy_en_dmac_descriptor_type_t Cy_DMAC_Descriptor_GetDescriptorType(cy_stc_dmac_descriptor_t const * descriptor)
1070 {
1071 return((cy_en_dmac_descriptor_type_t) _FLD2VAL(DMAC_CH_V2_DESCR_CTL_DESCR_TYPE, descriptor->ctl));
1072 }
1073
1074
1075 /*******************************************************************************
1076 * Function Name: Cy_DMAC_Descriptor_SetChannelState
1077 ****************************************************************************//**
1078 *
1079 * Sets the channel state on completion of the specified descriptor.
1080 *
1081 * \param descriptor
1082 * The descriptor structure instance.
1083 *
1084 * \param channelState
1085 * The channel state \ref cy_en_dmac_channel_state_t.
1086 *
1087 * \funcusage
1088 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
1089 *
1090 *******************************************************************************/
Cy_DMAC_Descriptor_SetChannelState(cy_stc_dmac_descriptor_t * descriptor,cy_en_dmac_channel_state_t channelState)1091 __STATIC_INLINE void Cy_DMAC_Descriptor_SetChannelState(cy_stc_dmac_descriptor_t * descriptor, cy_en_dmac_channel_state_t channelState)
1092 {
1093 CY_ASSERT_L3(CY_DMAC_IS_CHANNEL_STATE_VALID(channelState));
1094
1095 CY_REG32_CLR_SET(descriptor->ctl, DMAC_CH_V2_DESCR_CTL_CH_DISABLE, channelState);
1096 }
1097
1098
1099 /*******************************************************************************
1100 * Function Name: Cy_DMAC_Descriptor_GetChannelState
1101 ****************************************************************************//**
1102 *
1103 * Returns the channel state on completion of the specified descriptor.
1104 *
1105 * \param descriptor
1106 * The descriptor structure instance.
1107 *
1108 * \return
1109 * The Channel State setting \ref cy_en_dmac_channel_state_t
1110 *
1111 * \funcusage
1112 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
1113 *
1114 *******************************************************************************/
Cy_DMAC_Descriptor_GetChannelState(cy_stc_dmac_descriptor_t const * descriptor)1115 __STATIC_INLINE cy_en_dmac_channel_state_t Cy_DMAC_Descriptor_GetChannelState(cy_stc_dmac_descriptor_t const * descriptor)
1116 {
1117 return((cy_en_dmac_channel_state_t) _FLD2VAL(DMAC_CH_V2_DESCR_CTL_CH_DISABLE, descriptor->ctl));
1118 }
1119
1120
1121 /*******************************************************************************
1122 * Function Name: Cy_DMAC_Descriptor_SetXloopSrcIncrement
1123 ****************************************************************************//**
1124 *
1125 * Sets the source increment parameter for the X loop of the specified
1126 * descriptor (for 1D or 2D descriptors only).
1127 *
1128 * \param descriptor
1129 * The descriptor structure instance.
1130 *
1131 * \param srcXincrement
1132 * The value of the source increment. The valid range is -32768 ... 32767.
1133 *
1134 * \funcusage
1135 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
1136 *
1137 *******************************************************************************/
Cy_DMAC_Descriptor_SetXloopSrcIncrement(cy_stc_dmac_descriptor_t * descriptor,int32_t srcXincrement)1138 __STATIC_INLINE void Cy_DMAC_Descriptor_SetXloopSrcIncrement(cy_stc_dmac_descriptor_t * descriptor, int32_t srcXincrement)
1139 {
1140 CY_ASSERT_L1(CY_DMAC_SINGLE_TRANSFER != Cy_DMAC_Descriptor_GetDescriptorType(descriptor));
1141 CY_ASSERT_L2(CY_DMAC_IS_LOOP_INCR_VALID(srcXincrement));
1142
1143 CY_REG32_CLR_SET(descriptor->xIncr, DMAC_CH_V2_DESCR_X_INCR_SRC_X, srcXincrement);
1144 }
1145
1146
1147 /*******************************************************************************
1148 * Function Name: Cy_DMAC_Descriptor_GetXloopSrcIncrement
1149 ****************************************************************************//**
1150 *
1151 * Returns the source increment parameter for the X loop of the specified
1152 * descriptor (for 1D or 2D descriptors only).
1153 *
1154 * \param descriptor
1155 * The descriptor structure instance.
1156 *
1157 * \return
1158 * The value of the source increment. The range is -32768 ... 32767.
1159 *
1160 * \funcusage
1161 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
1162 *
1163 *******************************************************************************/
Cy_DMAC_Descriptor_GetXloopSrcIncrement(cy_stc_dmac_descriptor_t const * descriptor)1164 __STATIC_INLINE int32_t Cy_DMAC_Descriptor_GetXloopSrcIncrement(cy_stc_dmac_descriptor_t const * descriptor)
1165 {
1166 CY_ASSERT_L1(CY_DMAC_SINGLE_TRANSFER != Cy_DMAC_Descriptor_GetDescriptorType(descriptor));
1167
1168 return ((int32_t) _FLD2VAL(DMAC_CH_V2_DESCR_X_INCR_SRC_X, descriptor->xIncr));
1169 }
1170
1171
1172 /*******************************************************************************
1173 * Function Name: Cy_DMAC_Descriptor_SetXloopDstIncrement
1174 ****************************************************************************//**
1175 *
1176 * Sets the destination increment parameter for the X loop for the specified
1177 * descriptor (for 1D or 2D descriptors only).
1178 *
1179 * \param descriptor
1180 * The descriptor structure instance.
1181 *
1182 * \param dstXincrement
1183 * The value of the destination increment. The valid range is -32768 ... 32767.
1184 *
1185 * \funcusage
1186 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
1187 *
1188 *******************************************************************************/
Cy_DMAC_Descriptor_SetXloopDstIncrement(cy_stc_dmac_descriptor_t * descriptor,int32_t dstXincrement)1189 __STATIC_INLINE void Cy_DMAC_Descriptor_SetXloopDstIncrement(cy_stc_dmac_descriptor_t * descriptor, int32_t dstXincrement)
1190 {
1191 CY_ASSERT_L1(CY_DMAC_SINGLE_TRANSFER != Cy_DMAC_Descriptor_GetDescriptorType(descriptor));
1192 CY_ASSERT_L2(CY_DMAC_IS_LOOP_INCR_VALID(dstXincrement));
1193
1194 CY_REG32_CLR_SET(descriptor->xIncr, DMAC_CH_V2_DESCR_X_INCR_DST_X, dstXincrement);
1195 }
1196
1197
1198 /*******************************************************************************
1199 * Function Name: Cy_DMAC_Descriptor_GetXloopDstIncrement
1200 ****************************************************************************//**
1201 *
1202 * Returns the destination increment parameter for the X loop of the specified
1203 * descriptor (for 1D or 2D descriptors only).
1204 *
1205 * \param descriptor
1206 * The descriptor structure instance.
1207 *
1208 * \return
1209 * The value of the destination increment. The range is -32768 ... 32767.
1210 *
1211 * \funcusage
1212 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
1213 *
1214 *******************************************************************************/
Cy_DMAC_Descriptor_GetXloopDstIncrement(cy_stc_dmac_descriptor_t const * descriptor)1215 __STATIC_INLINE int32_t Cy_DMAC_Descriptor_GetXloopDstIncrement(cy_stc_dmac_descriptor_t const * descriptor)
1216 {
1217 CY_ASSERT_L1(CY_DMAC_SINGLE_TRANSFER != Cy_DMAC_Descriptor_GetDescriptorType(descriptor));
1218
1219 return ((int32_t) _FLD2VAL(DMAC_CH_V2_DESCR_X_INCR_DST_X, descriptor->xIncr));
1220 }
1221
1222
1223 /*******************************************************************************
1224 * Function Name: Cy_DMAC_Descriptor_SetYloopDataCount
1225 ****************************************************************************//**
1226 *
1227 * Sets the number of data elements for the Y loop of the specified descriptor
1228 * (for 2D descriptors only).
1229 *
1230 * \param descriptor
1231 * The descriptor structure instance.
1232 *
1233 * \param yCount
1234 * The number of X loops to execute in the Y loop. The valid range is 1 ... 65536.
1235 *
1236 * \funcusage
1237 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
1238 *
1239 *******************************************************************************/
Cy_DMAC_Descriptor_SetYloopDataCount(cy_stc_dmac_descriptor_t * descriptor,uint32_t yCount)1240 __STATIC_INLINE void Cy_DMAC_Descriptor_SetYloopDataCount(cy_stc_dmac_descriptor_t * descriptor, uint32_t yCount)
1241 {
1242 CY_ASSERT_L1(CY_DMAC_2D_TRANSFER == Cy_DMAC_Descriptor_GetDescriptorType(descriptor));
1243 CY_ASSERT_L2(CY_DMAC_IS_LOOP_COUNT_VALID(yCount));
1244 /* Convert the data count from the user's range (1-65536) into the machine range (0-65535). */
1245 CY_REG32_CLR_SET(descriptor->ySize, DMAC_CH_V2_DESCR_Y_SIZE_Y_COUNT, yCount - 1UL);
1246 }
1247
1248
1249 /*******************************************************************************
1250 * Function Name: Cy_DMAC_Descriptor_GetYloopDataCount
1251 ****************************************************************************//**
1252 *
1253 * Returns the number of X loops to execute in the Y loop of the specified
1254 * descriptor (for 2D descriptors only).
1255 *
1256 * \param descriptor
1257 * The descriptor structure instance.
1258 *
1259 * \return
1260 * The number of X loops to execute in the Y loop. The range is 1 ... 65536.
1261 *
1262 * \funcusage
1263 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
1264 *
1265 *******************************************************************************/
Cy_DMAC_Descriptor_GetYloopDataCount(cy_stc_dmac_descriptor_t const * descriptor)1266 __STATIC_INLINE uint32_t Cy_DMAC_Descriptor_GetYloopDataCount(cy_stc_dmac_descriptor_t const * descriptor)
1267 {
1268 CY_ASSERT_L1(CY_DMAC_2D_TRANSFER == Cy_DMAC_Descriptor_GetDescriptorType(descriptor));
1269 /* Convert the data count from the machine range (0-65535) into the user's range (1-65536). */
1270 return (_FLD2VAL(DMAC_CH_V2_DESCR_Y_SIZE_Y_COUNT, descriptor->ySize) + 1UL);
1271 }
1272
1273
1274 /*******************************************************************************
1275 * Function Name: Cy_DMAC_Descriptor_SetYloopSrcIncrement
1276 ****************************************************************************//**
1277 *
1278 * Sets the source increment parameter for the Y loop for the specified
1279 * descriptor (for 2D descriptors only).
1280 *
1281 * \param descriptor
1282 * The descriptor structure instance.
1283 *
1284 * \param srcYincrement
1285 * The value of the source increment. The valid range is -32768 ... 32767.
1286 *
1287 * \funcusage
1288 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
1289 *
1290 *******************************************************************************/
Cy_DMAC_Descriptor_SetYloopSrcIncrement(cy_stc_dmac_descriptor_t * descriptor,int32_t srcYincrement)1291 __STATIC_INLINE void Cy_DMAC_Descriptor_SetYloopSrcIncrement(cy_stc_dmac_descriptor_t * descriptor, int32_t srcYincrement)
1292 {
1293 CY_ASSERT_L1(CY_DMAC_2D_TRANSFER == Cy_DMAC_Descriptor_GetDescriptorType(descriptor));
1294 CY_ASSERT_L2(CY_DMAC_IS_LOOP_INCR_VALID(srcYincrement));
1295
1296 CY_REG32_CLR_SET(descriptor->yIncr, DMAC_CH_V2_DESCR_Y_INCR_SRC_Y, srcYincrement);
1297 }
1298
1299
1300 /*******************************************************************************
1301 * Function Name: Cy_DMAC_Descriptor_GetYloopSrcIncrement
1302 ****************************************************************************//**
1303 *
1304 * Returns the source increment parameter for the Y loop of the specified
1305 * descriptor (for 2D descriptors only).
1306 *
1307 * \param descriptor
1308 * The descriptor structure instance.
1309 *
1310 * \return
1311 * The value of source increment. The range is -32768 ... 32767.
1312 *
1313 * \funcusage
1314 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
1315 *
1316 *******************************************************************************/
Cy_DMAC_Descriptor_GetYloopSrcIncrement(cy_stc_dmac_descriptor_t const * descriptor)1317 __STATIC_INLINE int32_t Cy_DMAC_Descriptor_GetYloopSrcIncrement(cy_stc_dmac_descriptor_t const * descriptor)
1318 {
1319 CY_ASSERT_L1(CY_DMAC_2D_TRANSFER == Cy_DMAC_Descriptor_GetDescriptorType(descriptor));
1320
1321 return ((int32_t) _FLD2VAL(DMAC_CH_V2_DESCR_Y_INCR_SRC_Y, descriptor->yIncr));
1322 }
1323
1324
1325 /*******************************************************************************
1326 * Function Name: Cy_DMAC_Descriptor_SetYloopDstIncrement
1327 ****************************************************************************//**
1328 *
1329 * Sets the destination increment parameter for the Y loop of the specified
1330 * descriptor (for 2D descriptors only).
1331 *
1332 * \param descriptor
1333 * The descriptor structure instance.
1334 *
1335 * \param dstYincrement
1336 * The value of the destination increment. The valid range is -32768 ... 32767.
1337 *
1338 * \funcusage
1339 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_SetterFunctions
1340 *
1341 *******************************************************************************/
Cy_DMAC_Descriptor_SetYloopDstIncrement(cy_stc_dmac_descriptor_t * descriptor,int32_t dstYincrement)1342 __STATIC_INLINE void Cy_DMAC_Descriptor_SetYloopDstIncrement(cy_stc_dmac_descriptor_t * descriptor, int32_t dstYincrement)
1343 {
1344 CY_ASSERT_L1(CY_DMAC_2D_TRANSFER == Cy_DMAC_Descriptor_GetDescriptorType(descriptor));
1345 CY_ASSERT_L2(CY_DMAC_IS_LOOP_INCR_VALID(dstYincrement));
1346
1347 CY_REG32_CLR_SET(descriptor->yIncr, DMAC_CH_V2_DESCR_Y_INCR_DST_Y, dstYincrement);
1348 }
1349
1350
1351 /*******************************************************************************
1352 * Function Name: Cy_DMAC_Descriptor_GetYloopDstIncrement
1353 ****************************************************************************//**
1354 *
1355 * Returns the destination increment parameter for the Y loop of the specified
1356 * descriptor (for 2D descriptors only).
1357 *
1358 * \param descriptor
1359 * The descriptor structure instance.
1360 *
1361 * \return
1362 * The value of the destination increment. The range is -32768 ... 32767.
1363 *
1364 * \funcusage
1365 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_GetterFunctions
1366 *
1367 *******************************************************************************/
Cy_DMAC_Descriptor_GetYloopDstIncrement(cy_stc_dmac_descriptor_t const * descriptor)1368 __STATIC_INLINE int32_t Cy_DMAC_Descriptor_GetYloopDstIncrement(cy_stc_dmac_descriptor_t const * descriptor)
1369 {
1370 CY_ASSERT_L1(CY_DMAC_2D_TRANSFER == Cy_DMAC_Descriptor_GetDescriptorType(descriptor));
1371
1372 return ((int32_t) _FLD2VAL(DMAC_CH_V2_DESCR_Y_INCR_DST_Y, descriptor->yIncr));
1373 }
1374
1375 /** \} group_dmac_descriptor_functions */
1376
1377
1378 /**
1379 * \addtogroup group_dmac_channel_functions
1380 * \{
1381 */
1382
1383
1384 /*******************************************************************************
1385 * Function Name: Cy_DMAC_Channel_SetDescriptor
1386 ****************************************************************************//**
1387 *
1388 * Sets a descriptor as current for the specified DMACchannel.
1389 *
1390 * \param base
1391 * The pointer to the hardware DMAC block.
1392 *
1393 * \param channel
1394 * The channel number.
1395 *
1396 * \param descriptor
1397 * This is the descriptor to be associated with the channel.
1398 * For CAT1C devices this pointer needs to point to 32 byte aligned structure.
1399 *
1400 * \funcusage
1401 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Enable
1402 *
1403 *******************************************************************************/
Cy_DMAC_Channel_SetDescriptor(DMAC_Type * base,uint32_t channel,cy_stc_dmac_descriptor_t const * descriptor)1404 __STATIC_INLINE void Cy_DMAC_Channel_SetDescriptor(DMAC_Type * base, uint32_t channel, cy_stc_dmac_descriptor_t const * descriptor)
1405 {
1406 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1407
1408 DMAC_CH_CURR(base, channel) = (uint32_t)descriptor;
1409 }
1410
1411
1412 /*******************************************************************************
1413 * Function Name: Cy_DMAC_Channel_Enable
1414 ****************************************************************************//**
1415 *
1416 * Enables a DMAC channel.
1417 *
1418 * \param base
1419 * The pointer to the hardware DMAC block.
1420 *
1421 * \param channel
1422 * The channel number.
1423 *
1424 * \funcusage
1425 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Enable
1426 *
1427 *******************************************************************************/
Cy_DMAC_Channel_Enable(DMAC_Type * base,uint32_t channel)1428 __STATIC_INLINE void Cy_DMAC_Channel_Enable(DMAC_Type * base, uint32_t channel)
1429 {
1430 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1431
1432 DMAC_CH_CTL(base, channel) |= DMAC_CH_V2_CTL_ENABLED_Msk;
1433 }
1434
1435
1436 /*******************************************************************************
1437 * Function Name: Cy_DMAC_Channel_Disable
1438 ****************************************************************************//**
1439 *
1440 * Disables a DMACchannel.
1441 *
1442 * \param base
1443 * The pointer to the hardware DMAC block.
1444 *
1445 * \param channel
1446 * The channel number.
1447 *
1448 * \funcusage
1449 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Disable
1450 *
1451 *******************************************************************************/
Cy_DMAC_Channel_Disable(DMAC_Type * base,uint32_t channel)1452 __STATIC_INLINE void Cy_DMAC_Channel_Disable(DMAC_Type * base, uint32_t channel)
1453 {
1454 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1455
1456 DMAC_CH_CTL(base, channel) &= (uint32_t) ~DMAC_CH_V2_CTL_ENABLED_Msk;
1457 }
1458
1459
1460 /*******************************************************************************
1461 * Function Name: Cy_DMAC_Channel_IsEnabled
1462 ****************************************************************************//**
1463 *
1464 * Check whether a DMAC channel is in the enabled state.
1465 *
1466 * \param base
1467 * The pointer to the hardware DMAC block.
1468 *
1469 * \param channel
1470 * The channel number.
1471 *
1472 * \funcusage
1473 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Enable
1474 *
1475 *******************************************************************************/
Cy_DMAC_Channel_IsEnabled(DMAC_Type * base,uint32_t channel)1476 __STATIC_INLINE bool Cy_DMAC_Channel_IsEnabled(DMAC_Type * base, uint32_t channel)
1477 {
1478 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1479
1480 return((bool)((DMAC_CH_CTL(base, channel) & DMAC_CH_V2_CTL_ENABLED_Msk) != 0u));
1481 }
1482
1483
1484 /*******************************************************************************
1485 * Function Name: Cy_DMAC_Channel_SetPriority
1486 ****************************************************************************//**
1487 *
1488 * The function is used to set a priority for the DMAC channel.
1489 *
1490 * \param base
1491 * The pointer to the hardware DMAC block.
1492 *
1493 * \param channel
1494 * The channel number.
1495 *
1496 * \param priority
1497 * The priority to be set for the DMAC channel. The allowed values are 0,1,2,3.
1498 *
1499 * \funcusage
1500 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Enable
1501 *
1502 *******************************************************************************/
Cy_DMAC_Channel_SetPriority(DMAC_Type * base,uint32_t channel,uint32_t priority)1503 __STATIC_INLINE void Cy_DMAC_Channel_SetPriority(DMAC_Type * base, uint32_t channel, uint32_t priority)
1504 {
1505 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1506 CY_ASSERT_L2(CY_DMAC_IS_PRIORITY_VALID(priority));
1507
1508 CY_REG32_CLR_SET(DMAC_CH_CTL(base, channel), DMAC_CH_V2_CTL_PRIO, priority);
1509 }
1510
1511
1512 /*******************************************************************************
1513 * Function Name: Cy_DMAC_Channel_GetPriority
1514 ****************************************************************************//**
1515 *
1516 * Returns the priority of the DMAC channel.
1517 *
1518 * \param base
1519 * The pointer to the hardware DMAC block.
1520 *
1521 * \param channel
1522 * The channel number.
1523 *
1524 * \return
1525 * The priority of the channel.
1526 *
1527 * \funcusage
1528 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Disable
1529 *
1530 *******************************************************************************/
Cy_DMAC_Channel_GetPriority(DMAC_Type const * base,uint32_t channel)1531 __STATIC_INLINE uint32_t Cy_DMAC_Channel_GetPriority(DMAC_Type const * base, uint32_t channel)
1532 {
1533 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1534
1535 return ((uint32_t) _FLD2VAL(DMAC_CH_V2_CTL_PRIO, DMAC_CH_CTL(base, channel)));
1536 }
1537
1538
1539 /*******************************************************************************
1540 * Function Name: Cy_DMAC_Channel_GetCurrentSrcAddress
1541 ****************************************************************************//**
1542 *
1543 * Returns the source address being used for the current transfer.
1544 *
1545 * \param base
1546 * The pointer to the hardware DMAC block.
1547 *
1548 * \param channel
1549 * The channel number.
1550 *
1551 * \return
1552 * Returns the pointer to the source of transfer.
1553 *
1554 * \funcusage
1555 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Channel_GetCurrentSrcAddress
1556 *
1557 *******************************************************************************/
Cy_DMAC_Channel_GetCurrentSrcAddress(DMAC_Type const * base,uint32_t channel)1558 __STATIC_INLINE void * Cy_DMAC_Channel_GetCurrentSrcAddress(DMAC_Type const * base, uint32_t channel)
1559 {
1560 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1561
1562 return ((void *)(DMAC_CH_DESCR_SRC(base, channel)));
1563 }
1564
1565
1566 /*******************************************************************************
1567 * Function Name: Cy_DMAC_Channel_GetCurrentDstAddress
1568 ****************************************************************************//**
1569 *
1570 * Returns the destination address being used for the current transfer.
1571 *
1572 * \param base
1573 * The pointer to the hardware DMAC block.
1574 *
1575 * \param channel
1576 * The channel number.
1577 *
1578 * \return
1579 * Returns the pointer to the destination of transfer.
1580 *
1581 * \funcusage
1582 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Channel_GetCurrentSrcAddress
1583 *
1584 *******************************************************************************/
Cy_DMAC_Channel_GetCurrentDstAddress(DMAC_Type const * base,uint32_t channel)1585 __STATIC_INLINE void * Cy_DMAC_Channel_GetCurrentDstAddress(DMAC_Type const * base, uint32_t channel)
1586 {
1587 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1588
1589 return ((void *)(DMAC_CH_DESCR_DST(base, channel)));
1590 }
1591
1592
1593 /*******************************************************************************
1594 * Function Name: Cy_DMAC_Channel_GetCurrentXloopIndex
1595 ****************************************************************************//**
1596 *
1597 * Returns the current transfer X-loop index.
1598 *
1599 * \param base
1600 * The pointer to the hardware DMAC block.
1601 *
1602 * \param channel
1603 * The channel number.
1604 *
1605 * \return
1606 * Returns the current transfer X-loop index.
1607 *
1608 * \funcusage
1609 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Channel_GetCurrentloopIndex
1610 *
1611 *******************************************************************************/
Cy_DMAC_Channel_GetCurrentXloopIndex(DMAC_Type const * base,uint32_t channel)1612 __STATIC_INLINE uint32_t Cy_DMAC_Channel_GetCurrentXloopIndex(DMAC_Type const * base, uint32_t channel)
1613 {
1614 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1615
1616 return (_FLD2VAL(DMAC_CH_V2_IDX_X, DMAC_CH_IDX(base, channel)));
1617 }
1618
1619
1620 /*******************************************************************************
1621 * Function Name: Cy_DMAC_Channel_GetCurrentYloopIndex
1622 ****************************************************************************//**
1623 *
1624 * Returns the current transfer X-loop index.
1625 *
1626 * \param base
1627 * The pointer to the hardware DMAC block.
1628 *
1629 * \param channel
1630 * The channel number.
1631 *
1632 * \return
1633 * Returns the current transfer X-loop index.
1634 *
1635 * \funcusage
1636 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Channel_GetCurrentloopIndex
1637 *
1638 *******************************************************************************/
Cy_DMAC_Channel_GetCurrentYloopIndex(DMAC_Type const * base,uint32_t channel)1639 __STATIC_INLINE uint32_t Cy_DMAC_Channel_GetCurrentYloopIndex(DMAC_Type const * base, uint32_t channel)
1640 {
1641 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1642
1643 return (_FLD2VAL(DMAC_CH_V2_IDX_Y, DMAC_CH_IDX(base, channel)));
1644 }
1645
1646
1647 /*******************************************************************************
1648 * Function Name: Cy_DMAC_Channel_GetCurrentDescriptor
1649 ****************************************************************************//**
1650 *
1651 * Returns the descriptor that is active in the channel.
1652 *
1653 * \param base
1654 * The pointer to the hardware DMAC block.
1655 *
1656 * \param channel
1657 * The channel number.
1658 *
1659 * \return
1660 * The pointer to the descriptor associated with the channel.
1661 *
1662 * \funcusage
1663 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_Descriptor_Deinit
1664 *
1665 *******************************************************************************/
Cy_DMAC_Channel_GetCurrentDescriptor(DMAC_Type const * base,uint32_t channel)1666 __STATIC_INLINE cy_stc_dmac_descriptor_t * Cy_DMAC_Channel_GetCurrentDescriptor(DMAC_Type const * base, uint32_t channel)
1667 {
1668 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1669
1670 return ((cy_stc_dmac_descriptor_t*)(DMAC_CH_CURR(base, channel)));
1671 }
1672
1673
1674 /*******************************************************************************
1675 * Function Name: Cy_DMAC_Channel_GetInterruptStatus
1676 ****************************************************************************//**
1677 *
1678 * Returns the interrupt status of the specified channel.
1679 *
1680 * \param base
1681 * The pointer to the hardware DMAC block.
1682 *
1683 * \param channel
1684 * The channel number.
1685 *
1686 * \return
1687 * The interrupt status, see \ref group_dmac_macros_interrupt_masks.
1688 *
1689 * \funcusage
1690 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_GetInterruptStatus
1691 *
1692 *******************************************************************************/
Cy_DMAC_Channel_GetInterruptStatus(DMAC_Type const * base,uint32_t channel)1693 __STATIC_INLINE uint32_t Cy_DMAC_Channel_GetInterruptStatus(DMAC_Type const * base, uint32_t channel)
1694 {
1695 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1696
1697 return (DMAC_CH_INTR(base, channel));
1698 }
1699
1700
1701 /*******************************************************************************
1702 * Function Name: Cy_DMAC_Channel_ClearInterrupt
1703 ****************************************************************************//**
1704 *
1705 * Clears the interrupt status of the specified channel.
1706 *
1707 * \param base
1708 * The pointer to the hardware DMAC block.
1709 *
1710 * \param channel
1711 * The channel number.
1712 *
1713 * \param interrupt
1714 * The interrupt mask, see \ref group_dmac_macros_interrupt_masks.
1715 *
1716 * \funcusage
1717 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_ClearInterrupt
1718 *
1719 *******************************************************************************/
Cy_DMAC_Channel_ClearInterrupt(DMAC_Type * base,uint32_t channel,uint32_t interrupt)1720 __STATIC_INLINE void Cy_DMAC_Channel_ClearInterrupt(DMAC_Type * base, uint32_t channel, uint32_t interrupt)
1721 {
1722 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1723 CY_ASSERT_L2(CY_DMAC_IS_INTR_MASK_VALID(interrupt));
1724
1725 DMAC_CH_INTR(base, channel) = interrupt;
1726 /* This dummy reading is necessary here. It provides a guarantee that interrupt is cleared at returning from this function. */
1727 (void) DMAC_CH_INTR(base, channel);
1728 }
1729
1730
1731 /*******************************************************************************
1732 * Function Name: Cy_DMAC_Channel_SetInterrupt
1733 ****************************************************************************//**
1734 *
1735 * Sets the interrupt for the specified channel.
1736 *
1737 * \param base
1738 * The pointer to the hardware DMAC block.
1739 *
1740 * \param channel
1741 * The channel number.
1742 *
1743 * \param interrupt
1744 * The interrupt mask. See \ref group_dmac_macros_interrupt_masks.
1745 *
1746 * \funcusage
1747 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_SetInterruptMask
1748 *
1749 *******************************************************************************/
Cy_DMAC_Channel_SetInterrupt(DMAC_Type * base,uint32_t channel,uint32_t interrupt)1750 __STATIC_INLINE void Cy_DMAC_Channel_SetInterrupt(DMAC_Type * base, uint32_t channel, uint32_t interrupt)
1751 {
1752 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1753 CY_ASSERT_L2(CY_DMAC_IS_INTR_MASK_VALID(interrupt));
1754
1755 DMAC_CH_INTR_SET(base, channel) = interrupt;
1756 }
1757
1758
1759 /*******************************************************************************
1760 * Function Name: Cy_DMAC_Channel_GetInterruptMask
1761 ****************************************************************************//**
1762 *
1763 * Returns the interrupt mask value of the specified channel.
1764 *
1765 * \param base
1766 * The pointer to the hardware DMAC block.
1767 *
1768 * \param channel
1769 * The channel number.
1770 *
1771 * \return
1772 * The interrupt mask value. See \ref group_dmac_macros_interrupt_masks.
1773 *
1774 * \funcusage
1775 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_SetInterruptMask
1776 *
1777 *******************************************************************************/
Cy_DMAC_Channel_GetInterruptMask(DMAC_Type const * base,uint32_t channel)1778 __STATIC_INLINE uint32_t Cy_DMAC_Channel_GetInterruptMask(DMAC_Type const * base, uint32_t channel)
1779 {
1780 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1781
1782 return (DMAC_CH_INTR_MASK(base, channel));
1783 }
1784
1785
1786 /*******************************************************************************
1787 * Function Name: Cy_DMAC_Channel_SetInterruptMask
1788 ****************************************************************************//**
1789 *
1790 * Sets an interrupt mask value for the specified channel.
1791 *
1792 * \param base
1793 * The pointer to the hardware DMAC block.
1794 *
1795 * \param channel
1796 * The channel number.
1797 *
1798 * \param interrupt
1799 * The interrupt mask, see \ref group_dmac_macros_interrupt_masks.
1800 *
1801 * \funcusage
1802 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_SetInterruptMask
1803 *
1804 *******************************************************************************/
Cy_DMAC_Channel_SetInterruptMask(DMAC_Type * base,uint32_t channel,uint32_t interrupt)1805 __STATIC_INLINE void Cy_DMAC_Channel_SetInterruptMask(DMAC_Type * base, uint32_t channel, uint32_t interrupt)
1806 {
1807 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1808 CY_ASSERT_L2(CY_DMAC_IS_INTR_MASK_VALID(interrupt));
1809 DMAC_CH_INTR_MASK(base, channel) = interrupt;
1810 }
1811
1812
1813 /*******************************************************************************
1814 * Function Name: Cy_DMAC_Channel_GetInterruptStatusMasked
1815 ****************************************************************************//**
1816 *
1817 * Returns the logical AND of the corresponding INTR and INTR_MASK fields
1818 * in a single-load operation.
1819 *
1820 * \param base
1821 * The pointer to the hardware DMAC block.
1822 *
1823 * \param channel
1824 * The channel number.
1825 *
1826 * \return
1827 * The masked interrupt status. See \ref group_dmac_macros_interrupt_masks.
1828 *
1829 * \funcusage
1830 * \snippet dmac/snippet/main.c snippet_Cy_DMAC_ClearInterrupt
1831 *
1832 *******************************************************************************/
Cy_DMAC_Channel_GetInterruptStatusMasked(DMAC_Type const * base,uint32_t channel)1833 __STATIC_INLINE uint32_t Cy_DMAC_Channel_GetInterruptStatusMasked(DMAC_Type const * base, uint32_t channel)
1834 {
1835 CY_ASSERT_L1(CY_DMAC_IS_CH_NR_VALID(channel));
1836
1837 return (DMAC_CH_INTR_MASKED(base, channel));
1838 }
1839
1840 /** \} group_dmac_channel_functions */
1841
1842 /** \} group_dmac_functions */
1843
1844 CY_MISRA_BLOCK_END('MISRA C-2012 Rule 10.8')
1845
1846 #if defined(__cplusplus)
1847 }
1848 #endif
1849
1850 #endif /* CY_IP_M4CPUSS_DMAC, CY_IP_MXAHBDMAC */
1851
1852 #endif /* !defined (CY_DMAC_H) */
1853
1854 /** \} group_dmac */
1855
1856
1857 /* [] END OF FILE */
1858