1 /***************************************************************************//**
2 * \file cy_axidmac.h
3 * \version 1.0
4 *
5 * \brief
6 * The header file of the AXIDMAC driver.
7 *
8 ********************************************************************************
9 * \copyright
10 * Copyright 2018-2021 Cypress Semiconductor Corporation
11 * SPDX-License-Identifier: Apache-2.0
12 *
13 * Licensed under the Apache License, Version 2.0 (the "License");
14 * you may not use this file except in compliance with the License.
15 * You may obtain a copy of the License at
16 *
17 * http://www.apache.org/licenses/LICENSE-2.0
18 *
19 * Unless required by applicable law or agreed to in writing, software
20 * distributed under the License is distributed on an "AS IS" BASIS,
21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 * See the License for the specific language governing permissions and
23 * limitations under the License.
24 *******************************************************************************/
25
26 /**
27 * \addtogroup group_axidmac
28 * \{
29 * Configures the AXIDMA Controller block, channels and descriptors.
30 *
31 * The functions and other declarations used in this driver are in cy_axidmac.h.
32 * You can include cy_pdl.h to get access to all functions
33 * and declarations in the PDL.
34 *
35 * The AXIDMA Controller channel can be used in any project to transfer data
36 * without CPU intervention basing on a hardware trigger signal from another component.
37 *
38 * The AXIDMA Controller block has a set of registers, a base hardware address,
39 * and supports multiple channels. Many API functions for the AXIDMAC driver require
40 * a base hardware address and channel number.
41 * Ensure that you use the correct hardware address for the AXIDMA Controller block in use.
42 *
43 * Features:
44 * * Multiple channels (device specific).
45 * * Four priority levels for each channel.
46 * * Descriptor chaining.
47 * * Configurable source and destination addresses.
48 * * 1D memory copy, 2D memory copy, 3D memory copy descriptor types are supported.
49 * * Configurable input/output triggers and interrupts.
50 *
51 * \section group_axidmac_configuration Configuration Considerations
52 *
53 * To set up a AXIDMAC driver, initialize a descriptor,
54 * initialize and enable a channel, and enable the AXIDMAC block.
55 *
56 * To set up a descriptor, provide the configuration parameters for the
57 * descriptor in the \ref cy_stc_axidmac_descriptor_config_t structure. Then call the
58 * \ref Cy_AXIDMAC_Descriptor_Init function to initialize the descriptor in SRAM. You can
59 * modify the source and destination addresses dynamically by calling
60 * \ref Cy_AXIDMAC_Descriptor_SetSrcAddress and \ref Cy_AXIDMAC_Descriptor_SetDstAddress.
61 *
62 * To set up a AXIDMAC channel, provide a filled \ref cy_stc_axidmac_channel_config_t
63 * structure. Call the \ref Cy_AXIDMAC_Channel_Init function, specifying the channel
64 * number. Use \ref Cy_AXIDMAC_Channel_Enable to enable the configured AXIDMAC channel.
65 *
66 * Call \ref Cy_AXIDMAC_Channel_Enable for each AXIDMAC channel in use.
67 *
68 * When configured, another peripheral typically triggers the AXIDMAC channel. The trigger is
69 * connected to the AXIDMAC channel using the trigger multiplexer. The trigger multiplexer
70 * driver has a software trigger you can use in firmware to trigger the AXIDMAC channel. See the
71 * <a href="group__group__trigmux.html">Trigger Multiplexer</a> documentation.
72 *
73 * The following is a simplified structure of the AXIDMAC driver API interdependencies
74 * in a typical user application:
75 * \image html axidmac.png
76 *
77 * <B>NOTE:</B> Even if a AXIDMAC channel is enabled, it is not operational until
78 * the AXIDMAC block is enabled using function \ref Cy_AXIDMAC_Enable.\n
79 * <B>NOTE:</B> If the AXIDMAC descriptor is configured to generate an interrupt,
80 * the interrupt must be enabled using the \ref Cy_AXIDMAC_Channel_SetInterruptMask
81 * function for each AXIDMAC channel.
82 *
83 * <B>Scenario</B>: AXIDMAC with DMA descriptors, DMA config descriptors, source and destination buffer stored in memory
84 * <B>other then DTCM</B>(CM55 private MEMORY) such as SOCMEM or FLASH
85 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Enable
86 * <B>Scenario</B>: AXIDMAC with DMA descriptors, DMA config descriptors, source and destination buffer stored in <B>DTCM memory</B>
87 * (CM55 private MEMORY), in this case address need to be remap to external master mapped address
88 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Enable_DTCM_MEM
89 *
90 * \section group_axidmac_more_information More Information.
91 * See the AXIDMAC chapter of the device technical reference manual (TRM).
92 *
93 * \section group_axidmac_changelog Changelog
94 *
95 * <table class="doxtable">
96 * <tr><th>Version</th><th>Changes</th><th>Reason for Change</th></tr>
97 * <tr>
98 * <td>1.0</td>
99 * <td>The initial version.</td>
100 * <td></td>
101 * </tr>
102 * </table>
103
104 *
105 * \defgroup group_axidmac_macros Macros
106 * \defgroup group_axidmac_macros_interrupt_masks Interrupt Masks
107 * \defgroup group_axidmac_functions Functions
108 * \{
109 * \defgroup group_axidmac_block_functions Block Functions
110 * \defgroup group_axidmac_channel_functions Channel Functions
111 * \defgroup group_axidmac_descriptor_functions Descriptor Functions
112 * \}
113 * \defgroup group_axidmac_data_structures Data Structures
114 * \defgroup group_axidmac_enums Enumerated Types
115 */
116
117 #if !defined (CY_AXIDMAC_H)
118 #define CY_AXIDMAC_H
119
120 #include "cy_device.h"
121
122 #if defined (CY_IP_MXSAXIDMAC) || defined (CY_IP_MXAXIDMAC)
123
124 #include "cy_syslib.h"
125 #include <stdint.h>
126 #include <stdbool.h>
127 #include <stddef.h>
128
129 #if defined(__cplusplus)
130 extern "C" {
131 #endif
132 CY_MISRA_DEVIATE_BLOCK_START('MISRA C-2012 Rule 10.1', 5, \
133 'The operand "" to the operator "&" does not have an essentially unsigned type.')
134 CY_MISRA_DEVIATE_BLOCK_START('MISRA C-2012 Rule 10.3', 5, \
135 'Implicit conversion from essential type "unsigned 32-bit int" to different or narrower essential type "signed 16-bit int".')
136 CY_MISRA_DEVIATE_BLOCK_START('MISRA C-2012 Rule 10.4', 5, \
137 'Essential type of the left hand operand (signed) is not the same as that of the right operand (unsigned).')
138 CY_MISRA_DEVIATE_BLOCK_START('MISRA C-2012 Rule 10.8', 5, \
139 'Value extracted from _VAL2FLD macro will not exceed enum range.')
140
141 /******************************************************************************
142 * Macro definitions *
143 ******************************************************************************/
144
145 /**
146 * \addtogroup group_axidmac_macros
147 * \{
148 */
149
150 /** The driver major version */
151 #define CY_AXIDMAC_DRV_VERSION_MAJOR 1
152
153 /** The driver minor version */
154 #define CY_AXIDMAC_DRV_VERSION_MINOR 0
155
156 /** The AXIDMAC driver identifier */
157 #define CY_AXIDMAC_ID (CY_PDL_DRV_ID(0x4BU))
158
159 /** The minimum M/X/Y Count API parameters */
160 #define CY_AXIDMAC_LOOP_COUNT_MIN (1UL)
161 /** The maximum M/X/Y Count API parameters */
162 #define CY_AXIDMAC_LOOP_COUNT_MAX (65536UL)
163
164 /** The minimum M/X/Y Increment API parameters */
165 #define CY_AXIDMAC_LOOP_INCREMENT_MIN (-32768L)
166 /** The maximum M/X/Y Increment API parameters */
167 #define CY_AXIDMAC_LOOP_INCREMENT_MAX (32767L)
168
169 /**
170 * \addtogroup group_axidmac_macros_interrupt_masks Interrupt Masks
171 * \{
172 */
173
174 /** Bit 0: Completion of data transfer(s) as specified by the descriptor's interruptType setting. */
175 #define CY_AXIDMAC_INTR_COMPLETION (AXI_DMAC_CH_INTR_COMPLETION_Msk)
176 /** Bit 1: Bus error for a load from the source. */
177 #define CY_AXIDMAC_INTR_SRC_BUS_ERROR (AXI_DMAC_CH_INTR_SRC_BUS_ERROR_Msk)
178 /** Bit 2: Bus error for a store to the destination. */
179 #define CY_AXIDMAC_INTR_DST_BUS_ERROR (AXI_DMAC_CH_INTR_DST_BUS_ERROR_Msk)
180 /** Bit 3: Invalid descriptor type. */
181 #define CY_AXIDMAC_INTR_INVALID_DESCR_TYPE (AXI_DMAC_CH_INTR_INVALID_DESCR_TYPE_Msk)
182 /** Bit 5: The channel is enabled and the current descriptor pointer is "0". */
183 #define CY_AXIDMAC_INTR_CURR_PTR_NULL (AXI_DMAC_CH_INTR_CURR_PTR_NULL_Msk)
184 /** Bit 6: The channel is disabled and the data transfer engine is busy. */
185 #define CY_AXIDMAC_INTR_ACTIVE_CH_DISABLED (AXI_DMAC_CH_INTR_ACTIVE_CH_DISABLED_Msk)
186 /** Bit 7: Bus error for a load of the descriptor. */
187 #define CY_AXIDMAC_INTR_DESCR_BUS_ERROR (AXI_DMAC_CH_INTR_DESCR_BUS_ERROR_Msk)
188
189 /** \} group_axidmac_macros_interrupt_masks */
190
191 /** \} group_axidmac_macros */
192
193
194 /**
195 * \addtogroup group_axidmac_enums
196 * \{
197 */
198
199 /** Contains the options for the descriptor type */
200 typedef enum
201 {
202 CY_AXIDMAC_1D_MEMORY_COPY = 0UL, /**< 1D Memory copy */
203 CY_AXIDMAC_2D_MEMORY_COPY = 1UL, /**< 2D Memory copy */
204 CY_AXIDMAC_3D_MEMORY_COPY = 2UL, /**< 3D Memory copy */
205 } cy_en_axidmac_descriptor_type_t;
206
207 /** Contains the options for the interrupt, trig-in and trig-out type parameters of the descriptor */
208 typedef enum
209 {
210 CY_AXIDMAC_M_LOOP = 0U, /**< One M loop transfer. */
211 CY_AXIDMAC_X_LOOP = 1U, /**< One X loop transfer. */
212 CY_AXIDMAC_DESCR = 2U, /**< One descriptor transfer. */
213 CY_AXIDMAC_DESCR_CHAIN = 3U /**< Entire descriptor chain transfer. */
214 } cy_en_axidmac_trigger_type_t;
215
216 /** Contains the options for descriptor retriggering */
217 typedef enum
218 {
219 CY_AXIDMAC_RETRIG_IM = 0U, /**< Retrigger immediately. */
220 CY_AXIDMAC_RETRIG_4CYC = 1U, /**< Retrigger after 4 Clk_Slow cycles. */
221 CY_AXIDMAC_RETRIG_16CYC = 2U, /**< Retrigger after 16 Clk_Slow cycles. */
222 CY_AXIDMAC_WAIT_FOR_REACT = 3U /**< Wait for trigger reactivation. */
223 } cy_en_axidmac_retrigger_t;
224
225
226 /** Contains the options for the state of the channel when the descriptor is completed */
227 typedef enum
228 {
229 CY_AXIDMAC_CHANNEL_ENABLED = 0U, /**< Channel stays enabled. */
230 CY_AXIDMAC_CHANNEL_DISABLED = 1U /**< Channel is disabled. */
231 } cy_en_axidmac_channel_state_t;
232
233 /** Contains the return values of the AXIDMAC driver */
234 typedef enum
235 {
236 CY_AXIDMAC_SUCCESS = 0x0UL, /**< Success. */
237 CY_AXIDMAC_BAD_PARAM = CY_AXIDMAC_ID | CY_PDL_STATUS_ERROR | 0x1UL /**< The input parameters passed to the AXIDMAC API are not valid. */
238 } cy_en_axidmac_status_t;
239
240 /** \} group_axidmac_enums */
241
242 /** \cond Macros for the conditions used by CY_ASSERT calls */
243
244 #define CY_AXIDMAC_IS_LOOP_COUNT_VALID(count) (((count) >= CY_AXIDMAC_LOOP_COUNT_MIN) && ((count) <= CY_AXIDMAC_LOOP_COUNT_MAX))
245 #define CY_AXIDMAC_IS_LOOP_INCR_VALID(incr) (((incr) >= CY_AXIDMAC_LOOP_INCREMENT_MIN) && ((incr) <= CY_AXIDMAC_LOOP_INCREMENT_MAX))
246 #define CY_AXIDMAC_IS_PRIORITY_VALID(prio) ((prio) <= 3UL)
247 #define CY_AXIDMAC_INTR_MASK (CY_AXIDMAC_INTR_COMPLETION | \
248 CY_AXIDMAC_INTR_SRC_BUS_ERROR | \
249 CY_AXIDMAC_INTR_DST_BUS_ERROR | \
250 CY_AXIDMAC_INTR_INVALID_DESCR_TYPE | \
251 CY_AXIDMAC_INTR_CURR_PTR_NULL | \
252 CY_AXIDMAC_INTR_ACTIVE_CH_DISABLED | \
253 CY_AXIDMAC_INTR_DESCR_BUS_ERROR)
254
255 #define CY_AXIDMAC_IS_INTR_MASK_VALID(intr) (0UL == ((intr) & ((uint32_t) ~CY_AXIDMAC_INTR_MASK)))
256
257 #define CY_AXIDMAC_IS_RETRIGGER_VALID(retrigger) ((CY_AXIDMAC_RETRIG_IM == (retrigger)) || \
258 (CY_AXIDMAC_RETRIG_4CYC == (retrigger)) || \
259 (CY_AXIDMAC_RETRIG_16CYC == (retrigger)) || \
260 (CY_AXIDMAC_WAIT_FOR_REACT == (retrigger)))
261
262 #define CY_AXIDMAC_IS_TRIG_TYPE_VALID(trigType) ((CY_AXIDMAC_M_LOOP == (trigType)) || \
263 (CY_AXIDMAC_X_LOOP == (trigType)) || \
264 (CY_AXIDMAC_DESCR == (trigType)) || \
265 (CY_AXIDMAC_DESCR_CHAIN == (trigType)))
266
267 #define CY_AXIDMAC_IS_CHANNEL_STATE_VALID(state) ((CY_AXIDMAC_CHANNEL_ENABLED == (state)) || \
268 (CY_AXIDMAC_CHANNEL_DISABLED == (state)))
269
270
271 #define CY_AXIDMAC_IS_TYPE_VALID(descrType) ((CY_AXIDMAC_1D_MEMORY_COPY == (descrType)) || \
272 (CY_AXIDMAC_2D_MEMORY_COPY == (descrType)) || \
273 (CY_AXIDMAC_3D_MEMORY_COPY == (descrType)))
274
275 #define CY_AXIDMAC_IS_CH_NR_VALID(chNr) (CY_AXIDMAC_CH_NR > (chNr))
276
277 /** \endcond */
278
279 /**
280 * \addtogroup group_axidmac_data_structures
281 * \{
282 */
283
284
285 /**
286 * AXIDMAC descriptor structure type. It is a user-declared structure
287 * allocated in RAM. The AXIDMAC HW requires a pointer to this structure to work with it.
288 *
289 * For advanced users: the descriptor can be allocated even in flash, however the user
290 * have to predefine all the structure items with constants manually,
291 * because the descriptor "Set" API functions (including \ref Cy_AXIDMAC_Descriptor_Init())
292 * don't work with read-only descriptors.
293 */
294 typedef struct
295 {
296 uint32_t ctl; /*!< Descriptor control */
297 uint32_t src; /*!< Descriptor source holds the base address of source location */
298 uint32_t dst; /*!< Descriptor destination holds the base address of destination location*/
299 uint32_t mSize; /*!< Descriptor memory copy size. Valid range is 0...16777216 */
300 uint32_t xSize; /*!< Descriptor X loop size. Valid range is 0...65535 */
301 int32_t xIncr; /*!< Descriptor X loop increment. Valid range is -32768...32767 */
302 uint32_t ySize; /*!< Descriptor Y loop size. Valid range is 0...65535 */
303 int32_t yIncr; /*!< Descriptor Y loop increment. Valid range is -32768...32767 */
304 uint32_t nextPtr; /*!< Descriptor next pointer */
305 } cy_stc_axidmac_descriptor_t;
306
307 /** \cond The next type-specific descriptor types are ONLY for internal API implementation. */
308
309 typedef cy_stc_axidmac_descriptor_t cy_stc_axidmac_dscr_3d_t;
310
311 typedef struct
312 {
313 uint32_t ctl; /*!< Descriptor control */
314 uint32_t src; /*!< Descriptor source holds the base address of source location */
315 uint32_t dst; /*!< Descriptor destination holds the base address of destination location*/
316 uint32_t mSize; /*!< Descriptor memory copy size. Valid range is 0...16777216 */
317 uint32_t nextPtr; /*!< Descriptor next pointer */
318 } cy_stc_axidmac_dscr_1d_t;
319
320 typedef struct
321 {
322 uint32_t ctl; /*!< Descriptor control */
323 uint32_t src; /*!< Descriptor source holds the base address of source location */
324 uint32_t dst; /*!< Descriptor destination holds the base address of destination location*/
325 uint32_t mSize; /*!< Descriptor memory copy size. Valid range is 0...16777216 */
326 uint32_t xSize; /*!< Descriptor X loop size. Valid range is 0...65535 */
327 int32_t xIncr; /*!< Descriptor X loop increment. Valid range is -32768...32767 */
328 uint32_t nextPtr; /*!< Descriptor next pointer */
329 } cy_stc_axidmac_dscr_2d_t;
330
331 /** \endcond */
332
333
334 /**
335 * This structure is a configuration structure pre-initialized by user
336 * and passed as a parameter to the \ref Cy_AXIDMAC_Descriptor_Init().
337 * It can be allocated in RAM/flash (on user's choice).
338 * In case of flash allocation there is a possibility to reinitialize the descriptor in runtime.
339 * This structure has all the parameters of the descriptor as separate parameters.
340 * Most of these parameters are represented in the \ref cy_stc_axidmac_descriptor_t structure as bit fields.
341 */
342 typedef struct
343 {
344 cy_en_axidmac_retrigger_t retrigger; /**< Specifies whether the AXIDMA controller should wait for the input trigger to be deactivated. */
345 cy_en_axidmac_trigger_type_t interruptType; /**< Sets the event that triggers an interrupt. See \ref cy_en_axidmac_trigger_type_t. */
346 cy_en_axidmac_trigger_type_t triggerOutType; /**< Sets the event that triggers an output. See \ref cy_en_axidmac_trigger_type_t. */
347 cy_en_axidmac_channel_state_t channelState; /**< Specifies whether the channel is enabled or disabled on completion of descriptor see \ref cy_en_axidmac_channel_state_t. */
348 cy_en_axidmac_trigger_type_t triggerInType; /**< Sets what type of transfer is triggered. See \ref cy_en_axidmac_trigger_type_t. */
349 bool dataPrefetch; /**< Source data transfers are initiated as soon as the channel is enabled, the current descriptor pointer is NOT "0"
350 * and there is space available in the channel's data FIFO.
351 */
352 cy_en_axidmac_descriptor_type_t descriptorType; /**< The type of the descriptor. See \ref cy_en_axidmac_descriptor_type_t. */
353 void * srcAddress; /**< The source address of the transfer. */
354 void * dstAddress; /**< The destination address of the transfer. */
355 uint32_t mCount; /**< The number of bytes transfers in an M-loop */
356 int16_t srcXincrement; /**< The address increment of the source after each X-loop transfer. Valid range is -32768...32767. */
357 int16_t dstXincrement; /**< The address increment of the destination after each X-loop transfer. Valid range is -32768...32767. */
358 uint32_t xCount; /**< The number of transfers in an X-loop. Valid range (for all descriptors except scatter transfer) is 1...65536.
359 * For memory copy descriptors, the X count is a number of bytes (not a data transfer size).
360 * For scatter descriptors, the X count is a number of [address, data] pairs (two words each). Valid range is 1...32768.
361 */
362 int16_t srcYincrement; /**< The address increment of the source after each Y-loop transfer. Valid range is -32768...32767. */
363 int16_t dstYincrement; /**< The address increment of the destination after each Y-loop transfer. Valid range is -32768...32767. */
364 uint32_t yCount; /**< The number of X-loops in the Y-loop. Valid range is 1...65536. */
365 cy_stc_axidmac_descriptor_t * nextDescriptor; /**< The next descriptor to chain after completion. A NULL value will signify no chaining. */
366 } cy_stc_axidmac_descriptor_config_t;
367
368 /** This structure holds the initialization values for the AXIDMAC channel */
369 typedef struct
370 {
371 cy_stc_axidmac_descriptor_t * descriptor; /**< The AXIDMAC descriptor associated with the channel being initialized. */
372 uint32_t priority; /**< This parameter specifies the channel's priority. */
373 bool enable; /**< This parameter specifies if the channel is enabled after initializing. */
374 bool bufferable; /**< This parameter specifies whether a write transaction can complete.
375 * without waiting for the destination to accept the write transaction data.
376 */
377 } cy_stc_axidmac_channel_config_t;
378
379 /** \} group_axidmac_data_structures */
380
381
382 /**
383 * \addtogroup group_axidmac_functions
384 * \{
385 */
386
387 __STATIC_INLINE void Cy_AXIDMAC_Enable (AXI_DMAC_Type * base);
388 __STATIC_INLINE void Cy_AXIDMAC_Disable (AXI_DMAC_Type * base);
389 __STATIC_INLINE uint32_t Cy_AXIDMAC_GetAllChannelStatus (AXI_DMAC_Type * base);
390 #if defined (CY_IP_MXSAXIDMAC)
391 __STATIC_INLINE uint32_t Cy_AXIDMAC_GetActiveChannel (AXI_DMAC_Type const * base);
392 #elif defined (CY_IP_MXAXIDMAC)
393 __STATIC_INLINE uint32_t Cy_AXIDMAC_GetActiveSecureChannel (AXI_DMAC_Type const * base);
394 __STATIC_INLINE uint32_t Cy_AXIDMAC_GetActiveNonSecureChannel (AXI_DMAC_Type const * base);
395 #endif
396
397 /**
398 * \addtogroup group_axidmac_channel_functions
399 * \{
400 */
401
402 /*******************************************************************************
403 * Function Name: Cy_AXIDMAC_Channel_Init
404 ****************************************************************************//**
405 *
406 * Initializes the AXIDMAC channel with a descriptor and other parameters.
407 *
408 * \param base
409 * The pointer to the hardware AXIDMAC block.
410 *
411 * \param channel
412 * A channel number.
413 *
414 * \param config
415 * The structure that has the initialization information for the
416 * channel.
417 *
418 * \return
419 * The status /ref cy_en_axidmac_status_t.
420 *
421 * \funcusage
422 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Enable
423 *
424 *******************************************************************************/
425 cy_en_axidmac_status_t Cy_AXIDMAC_Channel_Init (AXI_DMAC_Type * base, uint32_t channel, cy_stc_axidmac_channel_config_t const * config);
426
427
428 /*******************************************************************************
429 * Function Name: Cy_AXIDMAC_Channel_DeInit
430 ****************************************************************************//**
431 *
432 * Clears the content of registers corresponding to the channel.
433 *
434 * \param base
435 * The pointer to the hardware AXIDMAC block.
436 *
437 * \param channel
438 * A channel number.
439 *
440 * \funcusage
441 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Disable
442 *
443 *******************************************************************************/
444 void Cy_AXIDMAC_Channel_DeInit (AXI_DMAC_Type * base, uint32_t channel);
445
446
447 __STATIC_INLINE void Cy_AXIDMAC_Channel_SetDescriptor (AXI_DMAC_Type * base, uint32_t channel, cy_stc_axidmac_descriptor_t const * descriptor);
448 __STATIC_INLINE void Cy_AXIDMAC_Channel_Enable (AXI_DMAC_Type * base, uint32_t channel);
449 __STATIC_INLINE void Cy_AXIDMAC_Channel_Disable (AXI_DMAC_Type * base, uint32_t channel);
450 __STATIC_INLINE void Cy_AXIDMAC_Channel_SetPriority (AXI_DMAC_Type * base, uint32_t channel, uint32_t priority);
451 __STATIC_INLINE uint32_t Cy_AXIDMAC_Channel_GetPriority (AXI_DMAC_Type const * base, uint32_t channel);
452 __STATIC_INLINE uint32_t Cy_AXIDMAC_Channel_GetStatus (AXI_DMAC_Type const * base, uint32_t channel);
453 __STATIC_INLINE void * Cy_AXIDMAC_Channel_GetCurrentSrcAddress (AXI_DMAC_Type const * base, uint32_t channel);
454 __STATIC_INLINE void * Cy_AXIDMAC_Channel_GetCurrentDstAddress (AXI_DMAC_Type const * base, uint32_t channel);
455 __STATIC_INLINE uint32_t Cy_AXIDMAC_Channel_GetCurrentXloopIndex (AXI_DMAC_Type const * base, uint32_t channel);
456 __STATIC_INLINE uint32_t Cy_AXIDMAC_Channel_GetCurrentYloopIndex (AXI_DMAC_Type const * base, uint32_t channel);
457 __STATIC_INLINE uint32_t Cy_AXIDMAC_Channel_GetCurrentMloopIndex (AXI_DMAC_Type const * base, uint32_t channel);
458 __STATIC_INLINE cy_stc_axidmac_descriptor_t *
459 Cy_AXIDMAC_Channel_GetCurrentDescriptor (AXI_DMAC_Type const * base, uint32_t channel);
460 __STATIC_INLINE uint32_t Cy_AXIDMAC_Channel_GetInterruptStatus (AXI_DMAC_Type const * base, uint32_t channel);
461 __STATIC_INLINE void Cy_AXIDMAC_Channel_ClearInterrupt (AXI_DMAC_Type * base, uint32_t channel, uint32_t interrupt);
462 __STATIC_INLINE void Cy_AXIDMAC_Channel_SetInterrupt (AXI_DMAC_Type * base, uint32_t channel, uint32_t interrupt);
463 __STATIC_INLINE uint32_t Cy_AXIDMAC_Channel_GetInterruptMask (AXI_DMAC_Type const * base, uint32_t channel);
464 __STATIC_INLINE void Cy_AXIDMAC_Channel_SetInterruptMask (AXI_DMAC_Type * base, uint32_t channel, uint32_t interrupt);
465 __STATIC_INLINE uint32_t Cy_AXIDMAC_Channel_GetInterruptStatusMasked (AXI_DMAC_Type const * base, uint32_t channel);
466 __STATIC_INLINE void Cy_AXIDMAC_Channel_SetSwTrigger (AXI_DMAC_Type * base, uint32_t channel);
467
468
469 /** \} group_axidmac_channel_functions */
470
471
472 /**
473 * \addtogroup group_axidmac_descriptor_functions
474 * \{
475 */
476
477 /*******************************************************************************
478 * Function Name: Cy_AXIDMAC_Descriptor_Init
479 ****************************************************************************//**
480 *
481 * Initializes the descriptor structure in SRAM from a pre-initialized
482 * configuration structure.
483 * This function initializes only the descriptor and not the channel.
484 *
485 * \param descriptor
486 * The descriptor structure instance.
487 *
488 * \param config
489 * This is a configuration structure that has all initialization information for
490 * the descriptor.
491 *
492 * \return
493 * The status /ref cy_en_axidmac_status_t.
494 *
495 * \funcusage
496 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Enable
497 *
498 *******************************************************************************/
499 cy_en_axidmac_status_t Cy_AXIDMAC_Descriptor_Init (cy_stc_axidmac_descriptor_t * descriptor, cy_stc_axidmac_descriptor_config_t const * config);
500
501
502 /*******************************************************************************
503 * Function Name: Cy_AXIDMAC_Descriptor_DeInit
504 ****************************************************************************//**
505 *
506 * Clears the content of the specified descriptor.
507 *
508 * \param descriptor
509 * The descriptor structure instance.
510 *
511 * \funcusage
512 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_Deinit
513 *
514 *******************************************************************************/
515 void Cy_AXIDMAC_Descriptor_DeInit(cy_stc_axidmac_descriptor_t * descriptor);
516
517
518 /*******************************************************************************
519 * Function Name: Cy_DMAC_Descriptor_SetNextDescriptor
520 ****************************************************************************//**
521 *
522 * Sets a Next Descriptor parameter for the specified descriptor.
523 *
524 * Based on the descriptor type, the offset of the address for the next descriptor
525 * register may vary:
526 * For the 1D memory copy descriptor type, this register is at offset 0x10.
527 * For the 2D memory copy descriptor type, this register is at offset 0x18.
528 * For the 3D memory copy descriptor type, this register is at offset 0x20.
529 *
530 * \param descriptor
531 * The descriptor structure instance.
532 *
533 * \param nextDescriptor
534 * The pointer to the next descriptor.
535 *
536 * \funcusage
537 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_SetterFunctions
538 *
539 *******************************************************************************/
540 void Cy_AXIDMAC_Descriptor_SetNextDescriptor (cy_stc_axidmac_descriptor_t * descriptor, cy_stc_axidmac_descriptor_t const * nextDescriptor);
541
542
543 /*******************************************************************************
544 * Function Name: Cy_AXIDMAC_Descriptor_SetDescriptorType
545 ****************************************************************************//**
546 *
547 * Sets the descriptor's type for the specified descriptor.
548 * Moves the next descriptor pointer and M data count values into the proper
549 * offset in accordance to the actual descriptor type.
550 *
551 * During the descriptor's type change, carefully set up the settings starting
552 * from dstAddress and all the rest below in the \ref cy_stc_axidmac_descriptor_config_t
553 * structure. This is because the content of the descriptor registers might be
554 * lost/overridden by other descriptor settings due to the
555 * different registers structure for different descriptor types.
556 *
557 * \param descriptor
558 * The descriptor structure instance.
559 *
560 * \param descriptorType
561 * The descriptor type \ref cy_en_axidmac_descriptor_type_t.
562 *
563 * \funcusage
564 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_SetterFunctions
565 *
566 *******************************************************************************/
567 void Cy_AXIDMAC_Descriptor_SetDescriptorType (cy_stc_axidmac_descriptor_t * descriptor, cy_en_axidmac_descriptor_type_t descriptorType);
568
569
570 __STATIC_INLINE void Cy_AXIDMAC_Descriptor_SetSrcAddress (cy_stc_axidmac_descriptor_t * descriptor, void const * srcAddress);
571 __STATIC_INLINE void Cy_AXIDMAC_Descriptor_SetDstAddress (cy_stc_axidmac_descriptor_t * descriptor, void const * dstAddress);
572 __STATIC_INLINE void Cy_AXIDMAC_Descriptor_SetMloopDataCount(cy_stc_axidmac_descriptor_t * descriptor, uint32_t mCount);
573
574
575 /*******************************************************************************
576 * Function Name: Cy_AXIDMAC_Descriptor_SetXloopDataCount
577 ****************************************************************************//**
578 *
579 * Sets the number of data elements to transfer in the X loop
580 * for the specified descriptor (for 2D and 3D memory copy descriptors).
581 *
582 *
583 * \param descriptor
584 * The descriptor structure instance.
585 *
586 * \param xCount
587 * The number of data elements to transfer in the X loop.
588 * For all the rest of the descriptors (except 1D memory copy), the valid range is 1...65536.
589 *
590 * \funcusage
591 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_SetterFunctions
592 *
593 *******************************************************************************/
594 void Cy_AXIDMAC_Descriptor_SetXloopDataCount (cy_stc_axidmac_descriptor_t * descriptor, uint32_t xCount);
595
596
597 __STATIC_INLINE void Cy_AXIDMAC_Descriptor_SetYloopDataCount(cy_stc_axidmac_descriptor_t * descriptor, uint32_t yCount);
598 __STATIC_INLINE void Cy_AXIDMAC_Descriptor_SetXloopSrcIncrement(cy_stc_axidmac_descriptor_t * descriptor, int16_t srcXincrement);
599 __STATIC_INLINE void Cy_AXIDMAC_Descriptor_SetXloopDstIncrement(cy_stc_axidmac_descriptor_t * descriptor, int16_t dstXincrement);
600 __STATIC_INLINE void Cy_AXIDMAC_Descriptor_SetYloopSrcIncrement(cy_stc_axidmac_descriptor_t * descriptor, int16_t srcYincrement);
601 __STATIC_INLINE void Cy_AXIDMAC_Descriptor_SetYloopDstIncrement(cy_stc_axidmac_descriptor_t * descriptor, int16_t dstYincrement);
602 __STATIC_INLINE void Cy_AXIDMAC_Descriptor_SetInterruptType (cy_stc_axidmac_descriptor_t * descriptor, cy_en_axidmac_trigger_type_t interruptType);
603 __STATIC_INLINE void Cy_AXIDMAC_Descriptor_SetTriggerInType (cy_stc_axidmac_descriptor_t * descriptor, cy_en_axidmac_trigger_type_t triggerInType);
604 __STATIC_INLINE void Cy_AXIDMAC_Descriptor_SetTriggerOutType(cy_stc_axidmac_descriptor_t * descriptor, cy_en_axidmac_trigger_type_t triggerOutType);
605 __STATIC_INLINE void Cy_AXIDMAC_Descriptor_SetRetrigger (cy_stc_axidmac_descriptor_t * descriptor, cy_en_axidmac_retrigger_t retrigger);
606 __STATIC_INLINE void Cy_AXIDMAC_Descriptor_SetChannelState (cy_stc_axidmac_descriptor_t * descriptor, cy_en_axidmac_channel_state_t channelState);
607
608
609 /*******************************************************************************
610 * Function Name: Cy_DMAC_Descriptor_GetNextDescriptor
611 ****************************************************************************//**
612 *
613 * Returns a next descriptor address of the specified descriptor.
614 *
615 * Based on the descriptor type, the offset of the address for the next descriptor
616 * register may vary:
617 * For the 1D memory copy descriptor type, this register is at offset 0x10.
618 * For the 2D memory copy descriptor type, this register is at offset 0x18.
619 * For the 3D memory copy descriptor type, this register is at offset 0x20.
620 *
621 * \param descriptor
622 * The descriptor structure instance.
623 *
624 * \return
625 * The pointer to the next descriptor.
626 *
627 * \funcusage
628 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_GetterFunctions
629 *
630 *******************************************************************************/
631 cy_stc_axidmac_descriptor_t * Cy_AXIDMAC_Descriptor_GetNextDescriptor (cy_stc_axidmac_descriptor_t const * descriptor);
632
633
634 __STATIC_INLINE cy_en_axidmac_descriptor_type_t Cy_AXIDMAC_Descriptor_GetDescriptorType(cy_stc_axidmac_descriptor_t const * descriptor);
635 __STATIC_INLINE void * Cy_AXIDMAC_Descriptor_GetSrcAddress (cy_stc_axidmac_descriptor_t const * descriptor);
636 __STATIC_INLINE void * Cy_AXIDMAC_Descriptor_GetDstAddress (cy_stc_axidmac_descriptor_t const * descriptor);
637 __STATIC_INLINE uint32_t Cy_AXIDMAC_Descriptor_GetMloopDataCount(cy_stc_axidmac_descriptor_t const * descriptor);
638
639
640 /*******************************************************************************
641 * Function Name: Cy_AXIDMAC_Descriptor_GetXloopDataCount
642 ****************************************************************************//**
643 *
644 * Returns the number of data elements for the X loop of the specified
645 * descriptor (for 2D and 3D memory copy descriptors).
646 *
647 *
648 * \param descriptor
649 * The descriptor structure instance.
650 *
651 * \return
652 * The number of data elements to transfer in the X loop.
653 *
654 * \funcusage
655 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_GetterFunctions
656 *
657 *******************************************************************************/
658 uint32_t Cy_AXIDMAC_Descriptor_GetXloopDataCount (cy_stc_axidmac_descriptor_t const * descriptor);
659
660
661 __STATIC_INLINE uint32_t Cy_AXIDMAC_Descriptor_GetYloopDataCount (cy_stc_axidmac_descriptor_t const * descriptor);
662 __STATIC_INLINE int16_t Cy_AXIDMAC_Descriptor_GetXloopSrcIncrement(cy_stc_axidmac_descriptor_t const * descriptor);
663 __STATIC_INLINE int16_t Cy_AXIDMAC_Descriptor_GetXloopDstIncrement(cy_stc_axidmac_descriptor_t const * descriptor);
664 __STATIC_INLINE int16_t Cy_AXIDMAC_Descriptor_GetYloopSrcIncrement(cy_stc_axidmac_descriptor_t const * descriptor);
665 __STATIC_INLINE int16_t Cy_AXIDMAC_Descriptor_GetYloopDstIncrement(cy_stc_axidmac_descriptor_t const * descriptor);
666 __STATIC_INLINE cy_en_axidmac_trigger_type_t Cy_AXIDMAC_Descriptor_GetInterruptType (cy_stc_axidmac_descriptor_t const * descriptor);
667 __STATIC_INLINE cy_en_axidmac_trigger_type_t Cy_AXIDMAC_Descriptor_GetTriggerInType (cy_stc_axidmac_descriptor_t const * descriptor);
668 __STATIC_INLINE cy_en_axidmac_trigger_type_t Cy_AXIDMAC_Descriptor_GetTriggerOutType (cy_stc_axidmac_descriptor_t const * descriptor);
669 __STATIC_INLINE cy_en_axidmac_retrigger_t Cy_AXIDMAC_Descriptor_GetRetrigger (cy_stc_axidmac_descriptor_t const * descriptor);
670 __STATIC_INLINE cy_en_axidmac_channel_state_t Cy_AXIDMAC_Descriptor_GetChannelState (cy_stc_axidmac_descriptor_t const * descriptor);
671
672 /** \} group_axidmac_descriptor_functions */
673
674
675 /***************************************
676 * In-line Function Implementation
677 ***************************************/
678
679
680 /**
681 * \addtogroup group_axidmac_block_functions
682 * \{
683 */
684
685
686 /*******************************************************************************
687 * Function Name: Cy_AXIDMAC_Enable
688 ****************************************************************************//**
689 *
690 * Enables the AXIDMAC block.
691 *
692 * \param base
693 * The pointer to the hardware AXIDMAC block.
694 *
695 * \funcusage
696 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Enable
697 *
698 *******************************************************************************/
Cy_AXIDMAC_Enable(AXI_DMAC_Type * base)699 __STATIC_INLINE void Cy_AXIDMAC_Enable(AXI_DMAC_Type * base)
700 {
701 AXIDMAC_CTL(base) |= AXI_DMAC_CTL_ENABLED_Msk;
702 }
703
704
705 /*******************************************************************************
706 * Function Name: Cy_AXIDMAC_Disable
707 ****************************************************************************//**
708 *
709 * Disables the AXIDMAC block.
710 *
711 * \param base
712 * The pointer to the hardware AXIDMAC block.
713 *
714 * \funcusage
715 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Disable
716 *
717 *******************************************************************************/
Cy_AXIDMAC_Disable(AXI_DMAC_Type * base)718 __STATIC_INLINE void Cy_AXIDMAC_Disable(AXI_DMAC_Type * base)
719 {
720 AXIDMAC_CTL(base) &= (uint32_t) ~AXI_DMAC_CTL_ENABLED_Msk;
721 }
722
723
724 /*******************************************************************************
725 * Function Name: Cy_AXIDMAC_GetAllChannelStatus
726 ****************************************************************************//**
727 *
728 * Returns the channel enabled status of all channels in a AXIDMAC block. Example if return value is 7 then channel 0,1,2 are enabled.
729 *
730 * \param base
731 * The pointer to the hardware AXIDMAC block.
732 *
733 * \return
734 * Returns a bit-field with all of the currently enabled channels in the
735 * AXIDMAC block.
736 *
737 * \funcusage
738 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_GetAllChannelStatus
739 *
740 *******************************************************************************/
Cy_AXIDMAC_GetAllChannelStatus(AXI_DMAC_Type * base)741 __STATIC_INLINE uint32_t Cy_AXIDMAC_GetAllChannelStatus(AXI_DMAC_Type * base)
742 {
743 return(_FLD2VAL(AXI_DMAC_STATUS_CH_EN, AXIDMAC_STATUS(base)));
744 }
745
746 #if defined (CY_IP_MXSAXIDMAC)
747 /*******************************************************************************
748 * Function Name: Cy_AXIDMAC_GetActiveChannel
749 ****************************************************************************//**
750 *
751 * Returns the status of the active/pending channels of the AXIDMAC block.
752 *
753 * \param base
754 * The pointer to the hardware AXIDMAC block.
755 *
756 * \return
757 * Returns a bit-field with all of the currently active/pending secure channels in the
758 * AXIDMAC block.
759 *
760 * \funcusage
761 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_GetActiveChannel
762 *
763 *******************************************************************************/
Cy_AXIDMAC_GetActiveChannel(AXI_DMAC_Type const * base)764 __STATIC_INLINE uint32_t Cy_AXIDMAC_GetActiveChannel(AXI_DMAC_Type const * base)
765 {
766 return(_FLD2VAL(AXI_DMAC_ACTIVE_ACTIVE, AXIDMAC_ACTIVE(base)));
767 }
768
769 #elif defined (CY_IP_MXAXIDMAC)
770 /*******************************************************************************
771 * Function Name: Cy_AXIDMAC_GetActiveSecureChannel
772 ****************************************************************************//**
773 *
774 * Returns the status of the active/pending secure channels of the AXIDMAC block.
775 *
776 * \param base
777 * The pointer to the hardware AXIDMAC block.
778 *
779 * \return
780 * Returns a bit-field with all of the currently active/pending secure channels
781 * in the AXIDMAC block.
782 *
783 * \funcusage
784 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_GetActiveChannel
785 *
786 *******************************************************************************/
Cy_AXIDMAC_GetActiveSecureChannel(AXI_DMAC_Type const * base)787 __STATIC_INLINE uint32_t Cy_AXIDMAC_GetActiveSecureChannel(AXI_DMAC_Type const * base)
788 {
789 return(_FLD2VAL(AXI_DMAC_ACTIVE_SEC_ACTIVE, AXIDMAC_ACTIVE_SEC(base)));
790 }
791
792 /*******************************************************************************
793 * Function Name: Cy_AXIDMAC_GetActiveNonSecureChannel
794 ****************************************************************************//**
795 *
796 * Returns the status of the active/pending non-secure channels of the AXIDMAC block.
797 *
798 * \param base
799 * The pointer to the hardware AXIDMAC block.
800 *
801 * \return
802 * Returns a bit-field with all of the currently active/pending non-secure channels
803 * in the AXIDMAC block.
804 *
805 * \funcusage
806 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_GetActiveChannel
807 *
808 *******************************************************************************/
Cy_AXIDMAC_GetActiveNonSecureChannel(AXI_DMAC_Type const * base)809 __STATIC_INLINE uint32_t Cy_AXIDMAC_GetActiveNonSecureChannel(AXI_DMAC_Type const * base)
810 {
811 return(_FLD2VAL(AXI_DMAC_ACTIVE_NONSEC_ACTIVE, AXIDMAC_ACTIVE_NONSEC(base)));
812 }
813 #endif
814
815
816 /** \} group_axidmac_block_functions */
817
818
819 /**
820 * \addtogroup group_axidmac_descriptor_functions
821 * \{
822 */
823
824
825 /*******************************************************************************
826 * Function Name: Cy_AXIDMAC_Descriptor_SetSrcAddress
827 ****************************************************************************//**
828 *
829 * Sets the source address parameter for the specified descriptor.
830 *
831 * \param descriptor
832 * The descriptor structure instance.
833 *
834 * \param srcAddress
835 * The source address value for the descriptor.
836 *
837 * \funcusage
838 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_SetterFunctions
839 *
840 *******************************************************************************/
Cy_AXIDMAC_Descriptor_SetSrcAddress(cy_stc_axidmac_descriptor_t * descriptor,void const * srcAddress)841 __STATIC_INLINE void Cy_AXIDMAC_Descriptor_SetSrcAddress(cy_stc_axidmac_descriptor_t * descriptor, void const * srcAddress)
842 {
843 descriptor->src = (uint32_t) srcAddress;
844 }
845
846
847 /*******************************************************************************
848 * Function Name: Cy_AXIDMAC_Descriptor_GetSrcAddress
849 ****************************************************************************//**
850 *
851 * Returns the source address of the specified descriptor.
852 *
853 * \param descriptor
854 * The descriptor structure instance.
855 *
856 * \return
857 * The source address value of the descriptor.
858 *
859 * \funcusage
860 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_GetterFunctions
861 *
862 *******************************************************************************/
Cy_AXIDMAC_Descriptor_GetSrcAddress(cy_stc_axidmac_descriptor_t const * descriptor)863 __STATIC_INLINE void * Cy_AXIDMAC_Descriptor_GetSrcAddress(cy_stc_axidmac_descriptor_t const * descriptor)
864 {
865 return ((void *) descriptor->src);
866 }
867
868
869 /*******************************************************************************
870 * Function Name: Cy_AXIDMAC_Descriptor_SetDstAddress
871 ****************************************************************************//**
872 *
873 * Sets the destination address parameter for the specified descriptor.
874 *
875 * \param descriptor
876 * The descriptor structure instance.
877 *
878 * \param dstAddress
879 * The destination address value for the descriptor.
880 *
881 * \funcusage
882 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_SetterFunctions
883 *
884 *******************************************************************************/
Cy_AXIDMAC_Descriptor_SetDstAddress(cy_stc_axidmac_descriptor_t * descriptor,void const * dstAddress)885 __STATIC_INLINE void Cy_AXIDMAC_Descriptor_SetDstAddress(cy_stc_axidmac_descriptor_t * descriptor, void const * dstAddress)
886 {
887 descriptor->dst = (uint32_t) dstAddress;
888 }
889
890
891 /*******************************************************************************
892 * Function Name: Cy_AXIDMAC_Descriptor_GetDstAddress
893 ****************************************************************************//**
894 *
895 * Returns the destination address of the specified descriptor.
896 *
897 * \param descriptor
898 * The descriptor structure instance.
899 *
900 * \return
901 * The destination address value of the descriptor.
902 *
903 * \funcusage
904 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_GetterFunctions
905 *
906 *******************************************************************************/
Cy_AXIDMAC_Descriptor_GetDstAddress(cy_stc_axidmac_descriptor_t const * descriptor)907 __STATIC_INLINE void * Cy_AXIDMAC_Descriptor_GetDstAddress(cy_stc_axidmac_descriptor_t const * descriptor)
908 {
909 return ((void *) descriptor->dst);
910 }
911
912
913 /*******************************************************************************
914 * Function Name: Cy_AXIDMAC_Descriptor_SetInterruptType
915 ****************************************************************************//**
916 *
917 * Sets the interrupt type parameter for the specified descriptor.
918 *
919 * \param descriptor
920 * The descriptor structure instance.
921 *
922 * \param interruptType
923 * The interrupt type set for the descriptor. \ref cy_en_axidmac_trigger_type_t
924 *
925 * \funcusage
926 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_SetterFunctions
927 *
928 *******************************************************************************/
Cy_AXIDMAC_Descriptor_SetInterruptType(cy_stc_axidmac_descriptor_t * descriptor,cy_en_axidmac_trigger_type_t interruptType)929 __STATIC_INLINE void Cy_AXIDMAC_Descriptor_SetInterruptType(cy_stc_axidmac_descriptor_t * descriptor, cy_en_axidmac_trigger_type_t interruptType)
930 {
931 CY_ASSERT_L3(CY_AXIDMAC_IS_TRIG_TYPE_VALID(interruptType));
932
933 CY_REG32_CLR_SET(descriptor->ctl, AXI_DMAC_CH_DESCR_CTL_INTR_TYPE, interruptType);
934 }
935
936
937 /*******************************************************************************
938 * Function Name: Cy_AXIDMAC_Descriptor_GetInterruptType
939 ****************************************************************************//**
940 *
941 * Returns the Interrupt-Type of the specified descriptor.
942 *
943 * \param descriptor
944 * The descriptor structure instance.
945 *
946 * \return
947 * The Interrupt-Type \ref cy_en_axidmac_trigger_type_t.
948 *
949 * \funcusage
950 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_GetterFunctions
951 *
952 *******************************************************************************/
Cy_AXIDMAC_Descriptor_GetInterruptType(cy_stc_axidmac_descriptor_t const * descriptor)953 __STATIC_INLINE cy_en_axidmac_trigger_type_t Cy_AXIDMAC_Descriptor_GetInterruptType(cy_stc_axidmac_descriptor_t const * descriptor)
954 {
955 CY_MISRA_DEVIATE_LINE('MISRA C-2012 Rule 10.8','Intentional typecast to cy_en_axidmac_trigger_type_t enum.');
956 return((cy_en_axidmac_trigger_type_t) _FLD2VAL(AXI_DMAC_CH_DESCR_CTL_INTR_TYPE, descriptor->ctl));
957 }
958
959
960 /*******************************************************************************
961 * Function Name: Cy_AXIDMAC_Descriptor_SetTriggerInType
962 ****************************************************************************//**
963 *
964 * Sets the Trigger In Type parameter for the specified descriptor.
965 *
966 * \param descriptor
967 * The descriptor structure instance.
968 *
969 * \param triggerInType
970 * The Trigger In Type parameter \ref cy_en_axidmac_trigger_type_t
971 *
972 * \funcusage
973 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_SetterFunctions
974 *
975 *******************************************************************************/
Cy_AXIDMAC_Descriptor_SetTriggerInType(cy_stc_axidmac_descriptor_t * descriptor,cy_en_axidmac_trigger_type_t triggerInType)976 __STATIC_INLINE void Cy_AXIDMAC_Descriptor_SetTriggerInType(cy_stc_axidmac_descriptor_t * descriptor, cy_en_axidmac_trigger_type_t triggerInType)
977 {
978 CY_ASSERT_L3(CY_AXIDMAC_IS_TRIG_TYPE_VALID(triggerInType));
979
980 CY_REG32_CLR_SET(descriptor->ctl, AXI_DMAC_CH_DESCR_CTL_TR_IN_TYPE, triggerInType);
981 }
982
983
984 /*******************************************************************************
985 * Function Name: Cy_AXIDMAC_Descriptor_GetTriggerInType
986 ****************************************************************************//**
987 *
988 * Returns the Trigger In Type of the specified descriptor.
989 *
990 * \param descriptor
991 * The descriptor structure instance.
992 *
993 * \return
994 * The Trigger In Type \ref cy_en_axidmac_trigger_type_t
995 *
996 * \funcusage
997 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_GetterFunctions
998 *
999 *******************************************************************************/
Cy_AXIDMAC_Descriptor_GetTriggerInType(cy_stc_axidmac_descriptor_t const * descriptor)1000 __STATIC_INLINE cy_en_axidmac_trigger_type_t Cy_AXIDMAC_Descriptor_GetTriggerInType(cy_stc_axidmac_descriptor_t const * descriptor)
1001 {
1002 CY_MISRA_DEVIATE_LINE('MISRA C-2012 Rule 10.8','Intentional typecast to cy_en_axidmac_trigger_type_t enum.');
1003 return((cy_en_axidmac_trigger_type_t) _FLD2VAL(AXI_DMAC_CH_DESCR_CTL_TR_IN_TYPE, descriptor->ctl));
1004 }
1005
1006
1007 /*******************************************************************************
1008 * Function Name: Cy_AXIDMAC_Descriptor_SetTriggerOutType
1009 ****************************************************************************//**
1010 *
1011 * Sets the Trigger Out Type parameter for the specified descriptor.
1012 *
1013 * \param descriptor
1014 * The descriptor structure instance.
1015 *
1016 * \param triggerOutType
1017 * The Trigger Out Type set for the descriptor. \ref cy_en_axidmac_trigger_type_t
1018 *
1019 * \funcusage
1020 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_SetterFunctions
1021 *
1022 *******************************************************************************/
Cy_AXIDMAC_Descriptor_SetTriggerOutType(cy_stc_axidmac_descriptor_t * descriptor,cy_en_axidmac_trigger_type_t triggerOutType)1023 __STATIC_INLINE void Cy_AXIDMAC_Descriptor_SetTriggerOutType(cy_stc_axidmac_descriptor_t * descriptor, cy_en_axidmac_trigger_type_t triggerOutType)
1024 {
1025 CY_ASSERT_L3(CY_AXIDMAC_IS_TRIG_TYPE_VALID(triggerOutType));
1026
1027 CY_REG32_CLR_SET(descriptor->ctl, AXI_DMAC_CH_DESCR_CTL_TR_OUT_TYPE, triggerOutType);
1028 }
1029
1030
1031 /*******************************************************************************
1032 * Function Name: Cy_AXIDMAC_Descriptor_GetTriggerOutType
1033 ****************************************************************************//**
1034 *
1035 * Returns the Trigger Out Type of the specified descriptor.
1036 *
1037 * \param descriptor
1038 * The descriptor structure instance.
1039 *
1040 * \return
1041 * The Trigger Out Type parameter \ref cy_en_axidmac_trigger_type_t.
1042 *
1043 * \funcusage
1044 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_GetterFunctions
1045 *
1046 *******************************************************************************/
Cy_AXIDMAC_Descriptor_GetTriggerOutType(cy_stc_axidmac_descriptor_t const * descriptor)1047 __STATIC_INLINE cy_en_axidmac_trigger_type_t Cy_AXIDMAC_Descriptor_GetTriggerOutType(cy_stc_axidmac_descriptor_t const * descriptor)
1048 {
1049 CY_MISRA_DEVIATE_LINE('MISRA C-2012 Rule 10.8','Intentional typecast to cy_en_axidmac_trigger_type_t enum.');
1050 return((cy_en_axidmac_trigger_type_t) _FLD2VAL(AXI_DMAC_CH_DESCR_CTL_TR_OUT_TYPE, descriptor->ctl));
1051 }
1052
1053
1054 /*******************************************************************************
1055 * Function Name: Cy_AXIDMAC_Descriptor_SetRetrigger
1056 ****************************************************************************//**
1057 *
1058 * Sets the retrigger value which specifies whether the controller should
1059 * wait for the input trigger to be deactivated.
1060 *
1061 * \param descriptor
1062 * The descriptor structure instance.
1063 *
1064 * \param retrigger
1065 * The \ref cy_en_axidmac_retrigger_t parameter specifies whether the controller
1066 * should wait for the input trigger to be deactivated.
1067 *
1068 * \funcusage
1069 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_SetterFunctions
1070 *
1071 *******************************************************************************/
Cy_AXIDMAC_Descriptor_SetRetrigger(cy_stc_axidmac_descriptor_t * descriptor,cy_en_axidmac_retrigger_t retrigger)1072 __STATIC_INLINE void Cy_AXIDMAC_Descriptor_SetRetrigger(cy_stc_axidmac_descriptor_t * descriptor, cy_en_axidmac_retrigger_t retrigger)
1073 {
1074 CY_ASSERT_L3(CY_AXIDMAC_IS_RETRIGGER_VALID(retrigger));
1075
1076 CY_REG32_CLR_SET(descriptor->ctl, AXI_DMAC_CH_DESCR_CTL_WAIT_FOR_DEACT, retrigger);
1077 }
1078
1079
1080 /*******************************************************************************
1081 * Function Name: Cy_AXIDMAC_Descriptor_GetRetrigger
1082 ****************************************************************************//**
1083 *
1084 * Returns a value which specifies whether the controller should
1085 * wait for the input trigger to be deactivated.
1086 *
1087 * \param descriptor
1088 * The descriptor structure instance.
1089 *
1090 * \return
1091 * The Retrigger setting \ref cy_en_axidmac_retrigger_t.
1092 *
1093 * \funcusage
1094 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_GetterFunctions
1095 *
1096 *******************************************************************************/
Cy_AXIDMAC_Descriptor_GetRetrigger(cy_stc_axidmac_descriptor_t const * descriptor)1097 __STATIC_INLINE cy_en_axidmac_retrigger_t Cy_AXIDMAC_Descriptor_GetRetrigger(cy_stc_axidmac_descriptor_t const * descriptor)
1098 {
1099 CY_MISRA_DEVIATE_LINE('MISRA C-2012 Rule 10.8','Intentional typecast to cy_en_axidmac_retrigger_t enum.');
1100 return((cy_en_axidmac_retrigger_t) _FLD2VAL(AXI_DMAC_CH_DESCR_CTL_WAIT_FOR_DEACT, descriptor->ctl));
1101 }
1102
1103
1104 /*******************************************************************************
1105 * Function Name: Cy_AXIDMAC_Descriptor_GetDescriptorType
1106 ****************************************************************************//**
1107 *
1108 * Returns the descriptor's type of the specified descriptor.
1109 *
1110 * \param descriptor
1111 * The descriptor structure instance.
1112 *
1113 * \return
1114 * The descriptor type \ref cy_en_axidmac_descriptor_type_t
1115 *
1116 * \funcusage
1117 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_GetterFunctions
1118 *
1119 *******************************************************************************/
Cy_AXIDMAC_Descriptor_GetDescriptorType(cy_stc_axidmac_descriptor_t const * descriptor)1120 __STATIC_INLINE cy_en_axidmac_descriptor_type_t Cy_AXIDMAC_Descriptor_GetDescriptorType(cy_stc_axidmac_descriptor_t const * descriptor)
1121 {
1122 CY_MISRA_DEVIATE_LINE('MISRA C-2012 Rule 10.8','Intentional typecast to cy_en_axidmac_descriptor_type_t enum.');
1123 return((cy_en_axidmac_descriptor_type_t) _FLD2VAL(AXI_DMAC_CH_DESCR_CTL_DESCR_TYPE, descriptor->ctl));
1124 }
1125
1126
1127 /*******************************************************************************
1128 * Function Name: Cy_AXIDMAC_Descriptor_SetChannelState
1129 ****************************************************************************//**
1130 *
1131 * Sets the channel state on completion of the specified descriptor.
1132 *
1133 * \param descriptor
1134 * The descriptor structure instance.
1135 *
1136 * \param channelState
1137 * The channel state \ref cy_en_axidmac_channel_state_t.
1138 *
1139 * \funcusage
1140 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_SetterFunctions
1141 *
1142 *******************************************************************************/
Cy_AXIDMAC_Descriptor_SetChannelState(cy_stc_axidmac_descriptor_t * descriptor,cy_en_axidmac_channel_state_t channelState)1143 __STATIC_INLINE void Cy_AXIDMAC_Descriptor_SetChannelState(cy_stc_axidmac_descriptor_t * descriptor, cy_en_axidmac_channel_state_t channelState)
1144 {
1145 CY_ASSERT_L3(CY_AXIDMAC_IS_CHANNEL_STATE_VALID(channelState));
1146
1147 CY_REG32_CLR_SET(descriptor->ctl, AXI_DMAC_CH_DESCR_CTL_CH_DISABLE, channelState);
1148 }
1149
1150
1151 /*******************************************************************************
1152 * Function Name: Cy_AXIDMAC_Descriptor_GetChannelState
1153 ****************************************************************************//**
1154 *
1155 * Returns the channel state on completion of the specified descriptor.
1156 *
1157 * \param descriptor
1158 * The descriptor structure instance.
1159 *
1160 * \return
1161 * The Channel State setting \ref cy_en_axidmac_channel_state_t
1162 *
1163 * \funcusage
1164 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_GetterFunctions
1165 *
1166 *******************************************************************************/
Cy_AXIDMAC_Descriptor_GetChannelState(cy_stc_axidmac_descriptor_t const * descriptor)1167 __STATIC_INLINE cy_en_axidmac_channel_state_t Cy_AXIDMAC_Descriptor_GetChannelState(cy_stc_axidmac_descriptor_t const * descriptor)
1168 {
1169 CY_MISRA_DEVIATE_LINE('MISRA C-2012 Rule 10.8','Intentional typecast to cy_en_axidmac_channel_state_t enum.');
1170 return((cy_en_axidmac_channel_state_t) _FLD2VAL(AXI_DMAC_CH_DESCR_CTL_CH_DISABLE, descriptor->ctl));
1171 }
1172
1173
1174 /*******************************************************************************
1175 * Function Name: Cy_AXIDMAC_Descriptor_SetMloopDataCount
1176 ****************************************************************************//**
1177 *
1178 * Sets the number of data elements for the M loop of the specified descriptor.
1179 *
1180 * \param descriptor
1181 * The descriptor structure instance.
1182 *
1183 * \param mCount
1184 * The number of M loops to execute. The valid range is 1 ... 65536.
1185 *
1186 * \funcusage
1187 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_SetterFunctions
1188 *
1189 *******************************************************************************/
Cy_AXIDMAC_Descriptor_SetMloopDataCount(cy_stc_axidmac_descriptor_t * descriptor,uint32_t mCount)1190 __STATIC_INLINE void Cy_AXIDMAC_Descriptor_SetMloopDataCount(cy_stc_axidmac_descriptor_t * descriptor, uint32_t mCount)
1191 {
1192 CY_ASSERT_L2(CY_AXIDMAC_IS_LOOP_COUNT_VALID(mCount));
1193 /* Convert the data count from the user's range (1-65536) into the machine range (0-65535). */
1194 CY_REG32_CLR_SET(descriptor->mSize, AXI_DMAC_CH_DESCR_M_SIZE_M_COUNT, mCount - 1UL);
1195 }
1196
1197
1198 /*******************************************************************************
1199 * Function Name: Cy_AXIDMAC_Descriptor_GetMloopDataCount
1200 ****************************************************************************//**
1201 *
1202 * Returns the number of M loops to execute in the specified
1203 * descriptor.
1204 *
1205 * \param descriptor
1206 * The descriptor structure instance.
1207 *
1208 * \return
1209 * The number of M loops to execute The range is 1 ... 65536.
1210 *
1211 * \funcusage
1212 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_GetterFunctions
1213 *
1214 *******************************************************************************/
Cy_AXIDMAC_Descriptor_GetMloopDataCount(cy_stc_axidmac_descriptor_t const * descriptor)1215 __STATIC_INLINE uint32_t Cy_AXIDMAC_Descriptor_GetMloopDataCount(cy_stc_axidmac_descriptor_t const * descriptor)
1216 {
1217 /* Convert the data count from the machine range (0-65535) into the user's range (1-65536). */
1218 return (_FLD2VAL(AXI_DMAC_CH_DESCR_M_SIZE_M_COUNT, descriptor->mSize) + 1UL);
1219 }
1220
1221
1222 /*******************************************************************************
1223 * Function Name: Cy_AXIDMAC_Descriptor_SetXloopSrcIncrement
1224 ****************************************************************************//**
1225 *
1226 * Sets the source increment parameter for the X loop of the specified
1227 * descriptor (for 2D or 3D descriptors only).
1228 *
1229 * \param descriptor
1230 * The descriptor structure instance.
1231 *
1232 * \param srcXincrement
1233 * The value of the source increment. The valid range is -32768 ... 32767.
1234 * Top most bit is a sign bit i.e., 0x8000 indicates -32768.
1235 *
1236 * \funcusage
1237 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_SetterFunctions
1238 *
1239 *******************************************************************************/
Cy_AXIDMAC_Descriptor_SetXloopSrcIncrement(cy_stc_axidmac_descriptor_t * descriptor,int16_t srcXincrement)1240 __STATIC_INLINE void Cy_AXIDMAC_Descriptor_SetXloopSrcIncrement(cy_stc_axidmac_descriptor_t * descriptor, int16_t srcXincrement)
1241 {
1242 CY_ASSERT_L1(CY_AXIDMAC_1D_MEMORY_COPY != Cy_AXIDMAC_Descriptor_GetDescriptorType(descriptor));
1243
1244 CY_REG32_CLR_SET(descriptor->xIncr, AXI_DMAC_CH_DESCR_X_INCR_SRC_X, srcXincrement);
1245 }
1246
1247
1248 /*******************************************************************************
1249 * Function Name: Cy_AXIDMAC_Descriptor_GetXloopSrcIncrement
1250 ****************************************************************************//**
1251 *
1252 * Returns the source increment parameter for the X loop of the specified
1253 * descriptor (for 2D or 3D descriptors only).
1254 *
1255 * \param descriptor
1256 * The descriptor structure instance.
1257 *
1258 * \return
1259 * The value of the source increment. The range is -32768 ... 32767.
1260 *
1261 * \funcusage
1262 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_GetterFunctions
1263 *
1264 *******************************************************************************/
Cy_AXIDMAC_Descriptor_GetXloopSrcIncrement(cy_stc_axidmac_descriptor_t const * descriptor)1265 __STATIC_INLINE int16_t Cy_AXIDMAC_Descriptor_GetXloopSrcIncrement(cy_stc_axidmac_descriptor_t const * descriptor)
1266 {
1267 CY_ASSERT_L1(CY_AXIDMAC_1D_MEMORY_COPY != Cy_AXIDMAC_Descriptor_GetDescriptorType(descriptor));
1268
1269 return ((int16_t) _FLD2VAL(AXI_DMAC_CH_DESCR_X_INCR_SRC_X, descriptor->xIncr));
1270 }
1271
1272
1273 /*******************************************************************************
1274 * Function Name: Cy_AXIDMAC_Descriptor_SetXloopDstIncrement
1275 ****************************************************************************//**
1276 *
1277 * Sets the destination increment parameter for the X loop for the specified
1278 * descriptor (for 2D or 3D descriptors only).
1279 *
1280 * \param descriptor
1281 * The descriptor structure instance.
1282 *
1283 * \param dstXincrement
1284 * The value of the destination increment. The valid range is -32768 ... 32767.
1285 * Top most bit is a sign bit i.e., 0x8000 indicates -32768.
1286 *
1287 * \funcusage
1288 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_SetterFunctions
1289 *
1290 *******************************************************************************/
Cy_AXIDMAC_Descriptor_SetXloopDstIncrement(cy_stc_axidmac_descriptor_t * descriptor,int16_t dstXincrement)1291 __STATIC_INLINE void Cy_AXIDMAC_Descriptor_SetXloopDstIncrement(cy_stc_axidmac_descriptor_t * descriptor, int16_t dstXincrement)
1292 {
1293 CY_ASSERT_L1(CY_AXIDMAC_1D_MEMORY_COPY != Cy_AXIDMAC_Descriptor_GetDescriptorType(descriptor));
1294
1295 CY_REG32_CLR_SET(descriptor->xIncr, AXI_DMAC_CH_DESCR_X_INCR_DST_X, dstXincrement);
1296 }
1297
1298
1299 /*******************************************************************************
1300 * Function Name: Cy_AXIDMAC_Descriptor_GetXloopDstIncrement
1301 ****************************************************************************//**
1302 *
1303 * Returns the destination increment parameter for the X loop of the specified
1304 * descriptor (for 2D or 3D descriptors only).
1305 *
1306 * \param descriptor
1307 * The descriptor structure instance.
1308 *
1309 * \return
1310 * The value of the destination increment. The range is -32768 ... 32767.
1311 * Top most bit is a sign bit i.e., 0x8000 indicates -32768.
1312 *
1313 * \funcusage
1314 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_GetterFunctions
1315 *
1316 *******************************************************************************/
Cy_AXIDMAC_Descriptor_GetXloopDstIncrement(cy_stc_axidmac_descriptor_t const * descriptor)1317 __STATIC_INLINE int16_t Cy_AXIDMAC_Descriptor_GetXloopDstIncrement(cy_stc_axidmac_descriptor_t const * descriptor)
1318 {
1319 CY_ASSERT_L1(CY_AXIDMAC_1D_MEMORY_COPY != Cy_AXIDMAC_Descriptor_GetDescriptorType(descriptor));
1320
1321 return ((int16_t) _FLD2VAL(AXI_DMAC_CH_DESCR_X_INCR_DST_X, descriptor->xIncr));
1322 }
1323
1324
1325 /*******************************************************************************
1326 * Function Name: Cy_AXIDMAC_Descriptor_SetYloopDataCount
1327 ****************************************************************************//**
1328 *
1329 * Sets the number of data elements for the Y loop of the specified descriptor
1330 * (for 3D descriptors only).
1331 *
1332 * \param descriptor
1333 * The descriptor structure instance.
1334 *
1335 * \param yCount
1336 * The number of X loops to execute in the Y loop. The valid range is 1 ... 65536.
1337 *
1338 * \funcusage
1339 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_SetterFunctions
1340 *
1341 *******************************************************************************/
Cy_AXIDMAC_Descriptor_SetYloopDataCount(cy_stc_axidmac_descriptor_t * descriptor,uint32_t yCount)1342 __STATIC_INLINE void Cy_AXIDMAC_Descriptor_SetYloopDataCount(cy_stc_axidmac_descriptor_t * descriptor, uint32_t yCount)
1343 {
1344 CY_ASSERT_L1(CY_AXIDMAC_3D_MEMORY_COPY == Cy_AXIDMAC_Descriptor_GetDescriptorType(descriptor));
1345 CY_ASSERT_L2(CY_AXIDMAC_IS_LOOP_COUNT_VALID(yCount));
1346 /* Convert the data count from the user's range (1-65536) into the machine range (0-65535). */
1347 CY_REG32_CLR_SET(descriptor->ySize, AXI_DMAC_CH_DESCR_Y_SIZE_Y_COUNT, yCount - 1UL);
1348 }
1349
1350
1351 /*******************************************************************************
1352 * Function Name: Cy_AXIDMAC_Descriptor_GetYloopDataCount
1353 ****************************************************************************//**
1354 *
1355 * Returns the number of X loops to execute in the Y loop of the specified
1356 * descriptor (for 3D descriptors only).
1357 *
1358 * \param descriptor
1359 * The descriptor structure instance.
1360 *
1361 * \return
1362 * The number of X loops to execute in the Y loop. The range is 1 ... 65536.
1363 *
1364 * \funcusage
1365 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_GetterFunctions
1366 *
1367 *******************************************************************************/
Cy_AXIDMAC_Descriptor_GetYloopDataCount(cy_stc_axidmac_descriptor_t const * descriptor)1368 __STATIC_INLINE uint32_t Cy_AXIDMAC_Descriptor_GetYloopDataCount(cy_stc_axidmac_descriptor_t const * descriptor)
1369 {
1370 CY_ASSERT_L1(CY_AXIDMAC_3D_MEMORY_COPY == Cy_AXIDMAC_Descriptor_GetDescriptorType(descriptor));
1371 /* Convert the data count from the machine range (0-65535) into the user's range (1-65536). */
1372 return (_FLD2VAL(AXI_DMAC_CH_DESCR_Y_SIZE_Y_COUNT, descriptor->ySize) + 1UL);
1373 }
1374
1375
1376 /*******************************************************************************
1377 * Function Name: Cy_AXIDMAC_Descriptor_SetYloopSrcIncrement
1378 ****************************************************************************//**
1379 *
1380 * Sets the source increment parameter for the Y loop for the specified
1381 * descriptor (for 3D descriptors only).
1382 *
1383 * \param descriptor
1384 * The descriptor structure instance.
1385 *
1386 * \param srcYincrement
1387 * The value of the source increment. The valid range is -32768 ... 32767.
1388 * Top most bit is a sign bit i.e., 0x8000 indicates -32768.
1389 *
1390 * \funcusage
1391 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_SetterFunctions
1392 *
1393 *******************************************************************************/
Cy_AXIDMAC_Descriptor_SetYloopSrcIncrement(cy_stc_axidmac_descriptor_t * descriptor,int16_t srcYincrement)1394 __STATIC_INLINE void Cy_AXIDMAC_Descriptor_SetYloopSrcIncrement(cy_stc_axidmac_descriptor_t * descriptor, int16_t srcYincrement)
1395 {
1396 CY_ASSERT_L1(CY_AXIDMAC_3D_MEMORY_COPY == Cy_AXIDMAC_Descriptor_GetDescriptorType(descriptor));
1397
1398 CY_REG32_CLR_SET(descriptor->yIncr, AXI_DMAC_CH_DESCR_Y_INCR_SRC_Y, srcYincrement);
1399 }
1400
1401
1402 /*******************************************************************************
1403 * Function Name: Cy_DMAC_Descriptor_GetYloopSrcIncrement
1404 ****************************************************************************//**
1405 *
1406 * Returns the source increment parameter for the Y loop of the specified
1407 * descriptor (for 2D descriptors only).
1408 *
1409 * \param descriptor
1410 * The descriptor structure instance.
1411 *
1412 * \return
1413 * The value of source increment. The range is -32768 ... 32767.
1414 *
1415 * \funcusage
1416 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_GetterFunctions
1417 *
1418 *******************************************************************************/
Cy_AXIDMAC_Descriptor_GetYloopSrcIncrement(cy_stc_axidmac_descriptor_t const * descriptor)1419 __STATIC_INLINE int16_t Cy_AXIDMAC_Descriptor_GetYloopSrcIncrement(cy_stc_axidmac_descriptor_t const * descriptor)
1420 {
1421 CY_ASSERT_L1(CY_AXIDMAC_3D_MEMORY_COPY == Cy_AXIDMAC_Descriptor_GetDescriptorType(descriptor));
1422
1423 return ((int16_t) _FLD2VAL(AXI_DMAC_CH_DESCR_Y_INCR_SRC_Y, descriptor->yIncr));
1424 }
1425
1426
1427 /*******************************************************************************
1428 * Function Name: Cy_AXIDMAC_Descriptor_SetYloopDstIncrement
1429 ****************************************************************************//**
1430 *
1431 * Sets the destination increment parameter for the Y loop of the specified
1432 * descriptor (for 3D descriptors only).
1433 *
1434 * \param descriptor
1435 * The descriptor structure instance.
1436 *
1437 * \param dstYincrement
1438 * The value of the destination increment. The valid range is -32768 ... 32767.
1439 * Top most bit is a sign bit i.e., 0x8000 indicates -32768.
1440 *
1441 * \funcusage
1442 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_SetterFunctions
1443 *
1444 *******************************************************************************/
Cy_AXIDMAC_Descriptor_SetYloopDstIncrement(cy_stc_axidmac_descriptor_t * descriptor,int16_t dstYincrement)1445 __STATIC_INLINE void Cy_AXIDMAC_Descriptor_SetYloopDstIncrement(cy_stc_axidmac_descriptor_t * descriptor, int16_t dstYincrement)
1446 {
1447 CY_ASSERT_L1(CY_AXIDMAC_3D_MEMORY_COPY == Cy_AXIDMAC_Descriptor_GetDescriptorType(descriptor));
1448
1449 CY_REG32_CLR_SET(descriptor->yIncr, AXI_DMAC_CH_DESCR_Y_INCR_DST_Y, dstYincrement);
1450 }
1451
1452
1453 /*******************************************************************************
1454 * Function Name: Cy_AXIDMAC_Descriptor_GetYloopDstIncrement
1455 ****************************************************************************//**
1456 *
1457 * Returns the destination increment parameter for the Y loop of the specified
1458 * descriptor (for 3D descriptors only).
1459 *
1460 * \param descriptor
1461 * The descriptor structure instance.
1462 *
1463 * \return
1464 * The value of the destination increment. The range is -32768 ... 32767.
1465 * Top most bit is a sign bit i.e., 0x8000 indicates -32768.
1466 *
1467 * \funcusage
1468 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_GetterFunctions
1469 *
1470 *******************************************************************************/
Cy_AXIDMAC_Descriptor_GetYloopDstIncrement(cy_stc_axidmac_descriptor_t const * descriptor)1471 __STATIC_INLINE int16_t Cy_AXIDMAC_Descriptor_GetYloopDstIncrement(cy_stc_axidmac_descriptor_t const * descriptor)
1472 {
1473 CY_ASSERT_L1(CY_AXIDMAC_3D_MEMORY_COPY == Cy_AXIDMAC_Descriptor_GetDescriptorType(descriptor));
1474
1475 return ((int16_t) _FLD2VAL(AXI_DMAC_CH_DESCR_Y_INCR_DST_Y, descriptor->yIncr));
1476 }
1477
1478 /** \} group_axidmac_descriptor_functions */
1479
1480
1481 /**
1482 * \addtogroup group_axidmac_channel_functions
1483 * \{
1484 */
1485
1486
1487 /*******************************************************************************
1488 * Function Name: Cy_AXIDMAC_Channel_SetDescriptor
1489 ****************************************************************************//**
1490 *
1491 * Sets a descriptor as current for the specified AXIDMAC channel.
1492 *
1493 * \param base
1494 * The pointer to the hardware AXIDMAC block.
1495 *
1496 * \param channel
1497 * The channel number.
1498 *
1499 * \param descriptor
1500 * This is the descriptor to be associated with the channel.
1501 *
1502 * \funcusage
1503 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Enable
1504 *
1505 *******************************************************************************/
Cy_AXIDMAC_Channel_SetDescriptor(AXI_DMAC_Type * base,uint32_t channel,cy_stc_axidmac_descriptor_t const * descriptor)1506 __STATIC_INLINE void Cy_AXIDMAC_Channel_SetDescriptor(AXI_DMAC_Type * base, uint32_t channel, cy_stc_axidmac_descriptor_t const * descriptor)
1507 {
1508 CY_ASSERT_L1(CY_AXIDMAC_IS_CH_NR_VALID(channel));
1509
1510 AXIDMAC_CH_CURR(base, channel) = (uint32_t)descriptor;
1511 }
1512
1513
1514 /*******************************************************************************
1515 * Function Name: Cy_AXIDMAC_Channel_Enable
1516 ****************************************************************************//**
1517 *
1518 * Enables a AXIDMAC channel.
1519 *
1520 * \param base
1521 * The pointer to the hardware AXIDMAC block.
1522 *
1523 * \param channel
1524 * The channel number.
1525 *
1526 * \funcusage
1527 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Enable
1528 *
1529 *******************************************************************************/
Cy_AXIDMAC_Channel_Enable(AXI_DMAC_Type * base,uint32_t channel)1530 __STATIC_INLINE void Cy_AXIDMAC_Channel_Enable(AXI_DMAC_Type * base, uint32_t channel)
1531 {
1532 CY_ASSERT_L1(CY_AXIDMAC_IS_CH_NR_VALID(channel));
1533
1534 AXIDMAC_CH_CTL(base, channel) |= AXI_DMAC_CH_CTL_ENABLED_Msk;
1535 }
1536
1537
1538 /*******************************************************************************
1539 * Function Name: Cy_AXIDMAC_Channel_Disable
1540 ****************************************************************************//**
1541 *
1542 * Disables a AXIDMAC channel.
1543 *
1544 * \param base
1545 * The pointer to the hardware AXIDMAC block.
1546 *
1547 * \param channel
1548 * The channel number.
1549 *
1550 * \funcusage
1551 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Disable
1552 *
1553 *******************************************************************************/
Cy_AXIDMAC_Channel_Disable(AXI_DMAC_Type * base,uint32_t channel)1554 __STATIC_INLINE void Cy_AXIDMAC_Channel_Disable(AXI_DMAC_Type * base, uint32_t channel)
1555 {
1556 CY_ASSERT_L1(CY_AXIDMAC_IS_CH_NR_VALID(channel));
1557
1558 AXIDMAC_CH_CTL(base, channel) &= (uint32_t) ~AXI_DMAC_CH_CTL_ENABLED_Msk;
1559 }
1560
1561
1562 /*******************************************************************************
1563 * Function Name: Cy_AXIDMAC_Channel_SetPriority
1564 ****************************************************************************//**
1565 *
1566 * The function is used to set a priority for the AXIDMAC channel.
1567 *
1568 * \param base
1569 * The pointer to the hardware AXIDMAC block.
1570 *
1571 * \param channel
1572 * The channel number.
1573 *
1574 * \param priority
1575 * The priority to be set for the AXIDMAC channel. The allowed values are 0,1,2,3.
1576 *
1577 * \funcusage
1578 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Enable
1579 *
1580 *******************************************************************************/
Cy_AXIDMAC_Channel_SetPriority(AXI_DMAC_Type * base,uint32_t channel,uint32_t priority)1581 __STATIC_INLINE void Cy_AXIDMAC_Channel_SetPriority(AXI_DMAC_Type * base, uint32_t channel, uint32_t priority)
1582 {
1583 CY_ASSERT_L1(CY_AXIDMAC_IS_CH_NR_VALID(channel));
1584 CY_ASSERT_L2(CY_AXIDMAC_IS_PRIORITY_VALID(priority));
1585
1586 CY_REG32_CLR_SET(AXIDMAC_CH_CTL(base, channel), AXI_DMAC_CH_CTL_PRIO, priority);
1587 }
1588
1589
1590 /*******************************************************************************
1591 * Function Name: Cy_AXIDMAC_Channel_GetPriority
1592 ****************************************************************************//**
1593 *
1594 * Returns the priority of the AXIDMAC channel.
1595 *
1596 * \param base
1597 * The pointer to the hardware AXIDMAC block.
1598 *
1599 * \param channel
1600 * The channel number.
1601 *
1602 * \return
1603 * The priority of the channel.
1604 *
1605 * \funcusage
1606 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Disable
1607 *
1608 *******************************************************************************/
Cy_AXIDMAC_Channel_GetPriority(AXI_DMAC_Type const * base,uint32_t channel)1609 __STATIC_INLINE uint32_t Cy_AXIDMAC_Channel_GetPriority(AXI_DMAC_Type const * base, uint32_t channel)
1610 {
1611 CY_ASSERT_L1(CY_AXIDMAC_IS_CH_NR_VALID(channel));
1612
1613 return ((uint32_t) _FLD2VAL(AXI_DMAC_CH_CTL_PRIO, AXIDMAC_CH_CTL(base, channel)));
1614 }
1615
1616 /*******************************************************************************
1617 * Function Name: Cy_AXIDMAC_Channel_GetStatus
1618 ****************************************************************************//**
1619 *
1620 * Returns the enable status of the AXIDMAC channel.
1621 *
1622 * \param base
1623 * The pointer to the hardware AXIDMAC block.
1624 *
1625 * \param channel
1626 * The channel number.
1627 *
1628 * \return
1629 * The status of the channel.
1630 *
1631 * \funcusage
1632 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Disable
1633 *
1634 *******************************************************************************/
Cy_AXIDMAC_Channel_GetStatus(AXI_DMAC_Type const * base,uint32_t channel)1635 __STATIC_INLINE uint32_t Cy_AXIDMAC_Channel_GetStatus(AXI_DMAC_Type const * base, uint32_t channel)
1636 {
1637 CY_ASSERT_L1(CY_AXIDMAC_IS_CH_NR_VALID(channel));
1638
1639 return ((uint32_t) _FLD2VAL(AXI_DMAC_CH_STATUS_ENABLED, AXIDMAC_CH_CTL(base, channel)));
1640 }
1641
1642 /*******************************************************************************
1643 * Function Name: Cy_AXIDMAC_Channel_GetCurrentSrcAddress
1644 ****************************************************************************//**
1645 *
1646 * Returns the source address being used for the current transfer.
1647 *
1648 * \param base
1649 * The pointer to the hardware AXIDMAC block.
1650 *
1651 * \param channel
1652 * The channel number.
1653 *
1654 * \return
1655 * Returns the pointer to the source of transfer.
1656 *
1657 * \funcusage
1658 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Channel_GetCurrentSrcAddress
1659 *
1660 *******************************************************************************/
Cy_AXIDMAC_Channel_GetCurrentSrcAddress(AXI_DMAC_Type const * base,uint32_t channel)1661 __STATIC_INLINE void * Cy_AXIDMAC_Channel_GetCurrentSrcAddress(AXI_DMAC_Type const * base, uint32_t channel)
1662 {
1663 CY_ASSERT_L1(CY_AXIDMAC_IS_CH_NR_VALID(channel));
1664
1665 return ((void *)(AXIDMAC_CH_DESCR_SRC(base, channel)));
1666 }
1667
1668
1669 /*******************************************************************************
1670 * Function Name: Cy_AXIDMAC_Channel_GetCurrentDstAddress
1671 ****************************************************************************//**
1672 *
1673 * Returns the destination address being used for the current transfer.
1674 *
1675 * \param base
1676 * The pointer to the hardware AXIDMAC block.
1677 *
1678 * \param channel
1679 * The channel number.
1680 *
1681 * \return
1682 * Returns the pointer to the destination of transfer.
1683 *
1684 * \funcusage
1685 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Channel_GetCurrentSrcAddress
1686 *
1687 *******************************************************************************/
Cy_AXIDMAC_Channel_GetCurrentDstAddress(AXI_DMAC_Type const * base,uint32_t channel)1688 __STATIC_INLINE void * Cy_AXIDMAC_Channel_GetCurrentDstAddress(AXI_DMAC_Type const * base, uint32_t channel)
1689 {
1690 CY_ASSERT_L1(CY_AXIDMAC_IS_CH_NR_VALID(channel));
1691
1692 return ((void *)(AXIDMAC_CH_DESCR_DST(base, channel)));
1693 }
1694
1695
1696 /*******************************************************************************
1697 * Function Name: Cy_AXIDMAC_Channel_GetCurrentXloopIndex
1698 ****************************************************************************//**
1699 *
1700 * Returns the current transfer X-loop index.
1701 *
1702 * \param base
1703 * The pointer to the hardware AXIDMAC block.
1704 *
1705 * \param channel
1706 * The channel number.
1707 *
1708 * \return
1709 * Returns the current transfer X-loop index.
1710 *
1711 * \funcusage
1712 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Channel_GetCurrentloopIndex
1713 *
1714 *******************************************************************************/
Cy_AXIDMAC_Channel_GetCurrentXloopIndex(AXI_DMAC_Type const * base,uint32_t channel)1715 __STATIC_INLINE uint32_t Cy_AXIDMAC_Channel_GetCurrentXloopIndex(AXI_DMAC_Type const * base, uint32_t channel)
1716 {
1717 CY_ASSERT_L1(CY_AXIDMAC_IS_CH_NR_VALID(channel));
1718
1719 return (_FLD2VAL(AXI_DMAC_CH_IDX_X, AXIDMAC_CH_IDX(base, channel)));
1720 }
1721
1722
1723 /*******************************************************************************
1724 * Function Name: Cy_AXIDMAC_Channel_GetCurrentYloopIndex
1725 ****************************************************************************//**
1726 *
1727 * Returns the current transfer Y-loop index.
1728 *
1729 * \param base
1730 * The pointer to the hardware AXIDMAC block.
1731 *
1732 * \param channel
1733 * The channel number.
1734 *
1735 * \return
1736 * Returns the current transfer Y-loop index.
1737 *
1738 * \funcusage
1739 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Channel_GetCurrentloopIndex
1740 *
1741 *******************************************************************************/
Cy_AXIDMAC_Channel_GetCurrentYloopIndex(AXI_DMAC_Type const * base,uint32_t channel)1742 __STATIC_INLINE uint32_t Cy_AXIDMAC_Channel_GetCurrentYloopIndex(AXI_DMAC_Type const * base, uint32_t channel)
1743 {
1744 CY_ASSERT_L1(CY_AXIDMAC_IS_CH_NR_VALID(channel));
1745
1746 return (_FLD2VAL(AXI_DMAC_CH_IDX_Y, AXIDMAC_CH_IDX(base, channel)));
1747 }
1748
1749
1750 /*******************************************************************************
1751 * Function Name: Cy_AXIDMAC_Channel_GetCurrentMloopIndex
1752 ****************************************************************************//**
1753 *
1754 * Returns the current transfer M-loop index.
1755 *
1756 * \param base
1757 * The pointer to the hardware AXIDMAC block.
1758 *
1759 * \param channel
1760 * The channel number.
1761 *
1762 * \return
1763 * Returns the current transfer M-loop index.
1764 *
1765 * \funcusage
1766 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Channel_GetCurrentloopIndex
1767 *
1768 *******************************************************************************/
Cy_AXIDMAC_Channel_GetCurrentMloopIndex(AXI_DMAC_Type const * base,uint32_t channel)1769 __STATIC_INLINE uint32_t Cy_AXIDMAC_Channel_GetCurrentMloopIndex(AXI_DMAC_Type const * base, uint32_t channel)
1770 {
1771 CY_ASSERT_L1(CY_AXIDMAC_IS_CH_NR_VALID(channel));
1772
1773 return (_FLD2VAL(AXI_DMAC_CH_M_IDX_M, AXIDMAC_CH_IDX(base, channel)));
1774 }
1775
1776
1777 /*******************************************************************************
1778 * Function Name: Cy_AXIDMAC_Channel_SetSwTrigger
1779 ****************************************************************************//**
1780 *
1781 * The function is used to set a SW trigger for a channel.
1782 *
1783 * \param base
1784 * The pointer to the hardware AXIDMAC block.
1785 *
1786 * \param channel
1787 * The channel number.
1788 *
1789 * \note Channel must have been enabled before setting software trigger.
1790 *
1791 * \funcusage
1792 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Enable
1793 *
1794 *******************************************************************************/
Cy_AXIDMAC_Channel_SetSwTrigger(AXI_DMAC_Type * base,uint32_t channel)1795 __STATIC_INLINE void Cy_AXIDMAC_Channel_SetSwTrigger(AXI_DMAC_Type * base, uint32_t channel)
1796 {
1797 CY_ASSERT_L1(CY_AXIDMAC_IS_CH_NR_VALID(channel));
1798
1799 CY_REG32_CLR_SET(AXIDMAC_CH_TR_CMD(base, channel), AXI_DMAC_CH_TR_CMD_ACTIVATE, 1);
1800 }
1801
1802 /*******************************************************************************
1803 * Function Name: Cy_AXIDMAC_Channel_GetCurrentDescriptor
1804 ****************************************************************************//**
1805 *
1806 * Returns the descriptor that is active in the channel.
1807 *
1808 * \param base
1809 * The pointer to the hardware AXIDMAC block.
1810 *
1811 * \param channel
1812 * The channel number.
1813 *
1814 * \return
1815 * The pointer to the descriptor associated with the channel.
1816 *
1817 * \funcusage
1818 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_Descriptor_Deinit
1819 *
1820 *******************************************************************************/
Cy_AXIDMAC_Channel_GetCurrentDescriptor(AXI_DMAC_Type const * base,uint32_t channel)1821 __STATIC_INLINE cy_stc_axidmac_descriptor_t * Cy_AXIDMAC_Channel_GetCurrentDescriptor(AXI_DMAC_Type const * base, uint32_t channel)
1822 {
1823 CY_ASSERT_L1(CY_AXIDMAC_IS_CH_NR_VALID(channel));
1824
1825 return ((cy_stc_axidmac_descriptor_t*)(AXIDMAC_CH_CURR(base, channel)));
1826 }
1827
1828
1829 /*******************************************************************************
1830 * Function Name: Cy_AXIDMAC_Channel_GetInterruptStatus
1831 ****************************************************************************//**
1832 *
1833 * Returns the interrupt status of the specified channel.
1834 *
1835 * \param base
1836 * The pointer to the hardware AXIDMAC block.
1837 *
1838 * \param channel
1839 * The channel number.
1840 *
1841 * \return
1842 * The interrupt status, see \ref group_axidmac_macros_interrupt_masks.
1843 *
1844 * \funcusage
1845 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_GetInterruptStatus
1846 *
1847 *******************************************************************************/
Cy_AXIDMAC_Channel_GetInterruptStatus(AXI_DMAC_Type const * base,uint32_t channel)1848 __STATIC_INLINE uint32_t Cy_AXIDMAC_Channel_GetInterruptStatus(AXI_DMAC_Type const * base, uint32_t channel)
1849 {
1850 CY_ASSERT_L1(CY_AXIDMAC_IS_CH_NR_VALID(channel));
1851
1852 return (AXIDMAC_CH_INTR(base, channel));
1853 }
1854
1855
1856 /*******************************************************************************
1857 * Function Name: Cy_AXIDMAC_Channel_ClearInterrupt
1858 ****************************************************************************//**
1859 *
1860 * Clears the interrupt status of the specified channel.
1861 *
1862 * \param base
1863 * The pointer to the hardware AXIDMAC block.
1864 *
1865 * \param channel
1866 * The channel number.
1867 *
1868 * \param interrupt
1869 * The interrupt mask, see \ref group_axidmac_macros_interrupt_masks.
1870 *
1871 * \funcusage
1872 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_ClearInterrupt
1873 *
1874 *******************************************************************************/
Cy_AXIDMAC_Channel_ClearInterrupt(AXI_DMAC_Type * base,uint32_t channel,uint32_t interrupt)1875 __STATIC_INLINE void Cy_AXIDMAC_Channel_ClearInterrupt(AXI_DMAC_Type * base, uint32_t channel, uint32_t interrupt)
1876 {
1877 CY_ASSERT_L1(CY_AXIDMAC_IS_CH_NR_VALID(channel));
1878 CY_ASSERT_L2(CY_AXIDMAC_IS_INTR_MASK_VALID(interrupt));
1879
1880 AXIDMAC_CH_INTR(base, channel) = interrupt;
1881 /* This dummy reading is necessary here. It provides a guarantee that interrupt is cleared at returning from this function. */
1882 (void) AXIDMAC_CH_INTR(base, channel);
1883 }
1884
1885
1886 /*******************************************************************************
1887 * Function Name: Cy_AXIDMAC_Channel_SetInterrupt
1888 ****************************************************************************//**
1889 *
1890 * Sets the interrupt for the specified channel.
1891 *
1892 * \param base
1893 * The pointer to the hardware AXIDMAC block.
1894 *
1895 * \param channel
1896 * The channel number.
1897 *
1898 * \param interrupt
1899 * The interrupt mask. See \ref group_axidmac_macros_interrupt_masks.
1900 *
1901 * \funcusage
1902 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_SetInterruptMask
1903 *
1904 *******************************************************************************/
Cy_AXIDMAC_Channel_SetInterrupt(AXI_DMAC_Type * base,uint32_t channel,uint32_t interrupt)1905 __STATIC_INLINE void Cy_AXIDMAC_Channel_SetInterrupt(AXI_DMAC_Type * base, uint32_t channel, uint32_t interrupt)
1906 {
1907 CY_ASSERT_L1(CY_AXIDMAC_IS_CH_NR_VALID(channel));
1908 CY_ASSERT_L2(CY_AXIDMAC_IS_INTR_MASK_VALID(interrupt));
1909
1910 AXIDMAC_CH_INTR_SET(base, channel) = interrupt;
1911 }
1912
1913
1914 /*******************************************************************************
1915 * Function Name: Cy_AXIDMAC_Channel_GetInterruptMask
1916 ****************************************************************************//**
1917 *
1918 * Returns the interrupt mask value of the specified channel.
1919 *
1920 * \param base
1921 * The pointer to the hardware AXIDMAC block.
1922 *
1923 * \param channel
1924 * The channel number.
1925 *
1926 * \return
1927 * The interrupt mask value. See \ref group_dmac_macros_interrupt_masks.
1928 *
1929 * \funcusage
1930 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_SetInterruptMask
1931 *
1932 *******************************************************************************/
Cy_AXIDMAC_Channel_GetInterruptMask(AXI_DMAC_Type const * base,uint32_t channel)1933 __STATIC_INLINE uint32_t Cy_AXIDMAC_Channel_GetInterruptMask(AXI_DMAC_Type const * base, uint32_t channel)
1934 {
1935 CY_ASSERT_L1(CY_AXIDMAC_IS_CH_NR_VALID(channel));
1936
1937 return (AXIDMAC_CH_INTR_MASK(base, channel));
1938 }
1939
1940
1941 /*******************************************************************************
1942 * Function Name: Cy_AXIDMAC_Channel_SetInterruptMask
1943 ****************************************************************************//**
1944 *
1945 * Sets an interrupt mask value for the specified channel.
1946 *
1947 * \param base
1948 * The pointer to the hardware AXIDMAC block.
1949 *
1950 * \param channel
1951 * The channel number.
1952 *
1953 * \param interrupt
1954 * The interrupt mask, see \ref group_axidmac_macros_interrupt_masks.
1955 *
1956 * \funcusage
1957 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_SetInterruptMask
1958 *
1959 *******************************************************************************/
Cy_AXIDMAC_Channel_SetInterruptMask(AXI_DMAC_Type * base,uint32_t channel,uint32_t interrupt)1960 __STATIC_INLINE void Cy_AXIDMAC_Channel_SetInterruptMask(AXI_DMAC_Type * base, uint32_t channel, uint32_t interrupt)
1961 {
1962 CY_ASSERT_L1(CY_AXIDMAC_IS_CH_NR_VALID(channel));
1963 CY_ASSERT_L2(CY_AXIDMAC_IS_INTR_MASK_VALID(interrupt));
1964 AXIDMAC_CH_INTR_MASK(base, channel) = interrupt;
1965 }
1966
1967
1968 /*******************************************************************************
1969 * Function Name: Cy_AXIDMAC_Channel_GetInterruptStatusMasked
1970 ****************************************************************************//**
1971 *
1972 * Returns the logical AND of the corresponding INTR and INTR_MASK fields
1973 * in a single-load operation.
1974 *
1975 * \param base
1976 * The pointer to the hardware AXIDMAC block.
1977 *
1978 * \param channel
1979 * The channel number.
1980 *
1981 * \return
1982 * The masked interrupt status. See \ref group_axidmac_macros_interrupt_masks.
1983 *
1984 * \funcusage
1985 * \snippet axidmac/snippet/main.c snippet_Cy_AXIDMAC_ClearInterrupt
1986 *
1987 *******************************************************************************/
Cy_AXIDMAC_Channel_GetInterruptStatusMasked(AXI_DMAC_Type const * base,uint32_t channel)1988 __STATIC_INLINE uint32_t Cy_AXIDMAC_Channel_GetInterruptStatusMasked(AXI_DMAC_Type const * base, uint32_t channel)
1989 {
1990 CY_ASSERT_L1(CY_AXIDMAC_IS_CH_NR_VALID(channel));
1991
1992 return (AXIDMAC_CH_INTR_MASKED(base, channel));
1993 }
1994
1995 /** \} group_axidmac_channel_functions */
1996
1997 /** \} group_axidmac_functions */
1998 CY_MISRA_BLOCK_END('MISRA C-2012 Rule 10.8')
1999 CY_MISRA_BLOCK_END('MISRA C-2012 Rule 10.4')
2000 CY_MISRA_BLOCK_END('MISRA C-2012 Rule 10.3')
2001 CY_MISRA_BLOCK_END('MISRA C-2012 Rule 10.1')
2002 #if defined(__cplusplus)
2003 }
2004 #endif
2005
2006 #endif /* CY_IP_MXSAXIDMAC || CY_IP_MXAXIDMAC */
2007
2008 #endif /* !defined (CY_AXI_DMAC_H) */
2009
2010 /** \} group_axidmac */
2011
2012
2013 /* [] END OF FILE */
2014
