1<?xml version="1.0" encoding="utf-8"?> 2 3 4<!--**************************************************************************** 5* \file sar2.cypersonality 6* \version 1.0 7* 8* \brief 9* SAR2 personality description file. 10* 11******************************************************************************** 12* \copyright 13* Copyright 2022 Cypress Semiconductor Corporation 14* SPDX-License-Identifier: Apache-2.0 15* 16* Licensed under the Apache License, Version 2.0 (the "License"); 17* you may not use this file except in compliance with the License. 18* You may obtain a copy of the License at 19* 20* http://www.apache.org/licenses/LICENSE-2.0 21* 22* Unless required by applicable law or agreed to in writing, software 23* distributed under the License is distributed on an "AS IS" BASIS, 24* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25* See the License for the specific language governing permissions and 26* limitations under the License. 27*****************************************************************************--> 28<Personality id="sar" name="SAR2" version="1.0" xmlns="http://cypress.com/xsd/cyhwpersonality_v7"> 29 <Dependencies> 30 <IpBlock name="mxs40epass" /> 31 <Resource name="pass\.saradc\.sar" /> 32 </Dependencies> 33 <ExposedMembers> 34 <ExposedMember key="sourceClockRsc" paramId="sourceClockRsc" /> 35 </ExposedMembers> 36 <Parameters> 37 <!-- PDL documentation --> 38 <ParamDoc id="pdlDoc" name="Configuration Help" group="Overview" default="file:///`${cy_libs_path()}`/docs/pdl_api_reference_manual/html/group__group__sar2.html" linkText="Open SAR2 Documentation" visible="true" desc="Opens the Peripheral Driver Library Documentation" /> 39 40 <ParamBool id="debug" name="debug" group="Internal" default="false" visible="false" editable="false" desc="" /> 41 <ParamString id="InstNumber" name="InstNumber" group="Internal" default="`${getInstNumber("saradc")}`" visible="`${debug}`" editable="false" desc="SARADC Instance name number." /> 42 43 <ParamBool id="isPowerEnabled" name="Is Power Enabled" group="Internal" default="`${isBlockUsed("srss[0].power[0]")}`" visible="`${debug}`" editable="false" desc="" /> 44 <ParamRange id="vdda" name="vdda" group="Internal" default="`${isPowerEnabled ? getExposedMember("srss[0].power[0]", "vddaMv") / 1000.0 : 3.6}`" min="0" max="10" resolution="0.001" visible="`${debug}`" editable="false" desc="" /> 45 46 <ParamChoice id="VDDAsel" name="VDDA Range" group="General" default="`${(vdda > 4.5) ? VDDA_VOLTAGE_4_5V_TO_5_5V : VDDA_VOLTAGE_2_7V_TO_4_5V}`" visible="false" editable="false" desc="VDDA range"> 47 <Entry name="Range 4,5V-5,5V" value="VDDA_VOLTAGE_4_5V_TO_5_5V" visible="true" /> 48 <Entry name="Range 2,7V-4,5V" value="VDDA_VOLTAGE_2_7V_TO_4_5V" visible="true" /> 49 </ParamChoice> 50 51 <ParamBool id="sarIpEnable" name="Enable SAR Block" group="General" default="false" visible="true" editable="true" desc="Enable the SAR block." /> 52 <ParamBool id="sarMuxEnable" name="Enable The SAR MUX" group="General" default="true" visible="true" editable="true" desc="Enable the SAR MUX." /> 53 <ParamBool id="adcEnable" name="Enable The SAR ADC" group="General" default="true" visible="true" editable="true" desc="Enable the SAR ADC." /> 54 <ParamRange id="preconditionTime" name="Precondition Time" group="General" default="0" min="0" max="7" resolution="1" visible="true" editable="true" desc="Number ADC clock cycles that Preconditioning is done before the sample window starts." /> 55 <ParamRange id="powerupTime" name="Power Up Time" group="General" default="0" min="0" max="255" resolution="1" visible="true" editable="true" desc="Number ADC clock cycles to wait to power up after IDLE_PWRDWN." /> 56 <ParamBool id="enableIdlePowerDown" name="Power Down If Idle" group="General" default="false" visible="true" editable="true" desc="When idle automatically power down the analog if true." /> 57 <ParamChoice id="msbStretch" name="MSB Cycles" group="General" default="CY_SAR2_MSB_STRETCH_MODE_1CYCLE" visible="true" editable="true" desc="When set use 2 cycles for the Most Significant Bit (MSB)." > 58 <Entry name="Use 1 clock cycles per conversion" value="CY_SAR2_MSB_STRETCH_MODE_1CYCLE" visible="true" /> 59 <Entry name="Use 2 clock cycles per conversion" value="CY_SAR2_MSB_STRETCH_MODE_2CYCLE" visible="true" /> 60 </ParamChoice> 61 <ParamBool id="enableHalfLsbConv" name="Half LSB" group="General" default="false" visible="true" editable="true" desc="When true take an extra cycle to convert the half LSB and add it to 12-bit result for Missing Code Recovery." /> 62 <ParamRange id="channelNum" name="Number Of Channels" group="General" default="1" min="1" max="`${lookupExpression("SAR_SLICE_NR[" . InstNumber . "].SAR.SAR_CHAN_NR")}`" resolution="1" visible="true" editable="true" desc="Number SAR2 ADC channels." /> 63 64 <ParamSignal name="Clock" port="clock_sar[0]" group="Connections" visible="true" desc="Clock that operates this block" canBeEmpty="false"> 65 </ParamSignal> 66 <ParamString id="sourceClockRsc" name="Source Clock Resource" group="Connections" default="`${getBlockFromSignal("clock_sar[0]")}`" visible="`${debug}`" editable="false" desc="Source Clock Resource" /> 67 <ParamBool id="isHFClkEnabled" name="Is Power Enabled" group="Connections" default="`${isBlockUsed("srss[0].clock[0].hfclk[0]")}`" visible="`${debug}`" editable="false" desc="" /> 68 <ParamString id="sourceClock" name="Source Clock Resource" group="Connections" default="`${getBlockFromSignal("clock_sar[0]")}`" visible="false" editable="false" desc="Source Clock Resource" /> 69 70 <ParamString id="clkFreqMinHz" name="clkFreqMinHz" group="Connections" default="1000000" visible="false" editable="false" desc="Minimum supported ADC clock frequency" /> 71 <ParamString id="clkFreqMaxHz" name="clkFreqMaxHz" group="Connections" default="`${VDDAsel eq VDDA_VOLTAGE_4_5V_TO_5_5V ? 26670000 : 13340000}`" visible="false" editable="false" desc="Maximum supported ADC clock frequency" /> 72 <ParamString id="clkFreqMinMHz" name="clkFreqMin" group="Connections" default="1" visible="false" editable="false" desc="Minimum supported ADC clock frequency" /> 73 <ParamString id="clkFreqMaxMHz" name="clkFreqMax" group="Connections" default="`${VDDAsel eq VDDA_VOLTAGE_4_5V_TO_5_5V ? 27 : 13}`" visible="false" editable="false" desc="Maximum supported ADC clock frequency" /> 74 <ParamRange id="adcClkFreqHz" name="SAR2 Clock Frequency, HZ" group="Connections" default="`${(sourceClock ne "") ? getExposedMember(sourceClock, "frequency") : 1}`" min="0" max="400000000" resolution="1" visible="false" editable="false" desc="" /> 75 <ParamString id="clk_freq_display" name="Clock Frequency" group="Connections" default="`${adcClkFreqHz < 1000000 ? adcClkFreqHz / 1000.0 . " kHz" : adcClkFreqHz / 1000000. . " MHz"}`" visible="true" editable="false" desc="Frequency of the connected clock" /> 76 77 <ParamRange id="hfClkFreqHz" name="sourceFrequency" group="Connections" default="`${isHFClkEnabled ? getExposedMember("srss[0].clock[0].hfclk[1]", "frequency") : 1}`" min="0" max="400000000" resolution="1" visible="`${debug}`" editable="false" desc="" /> 78 <ParamString id="pclk" name="pclk" group="Connections" default="`${getBlockFromSignal("clock_sar[0]")}`" visible="false" editable="false" desc="" /> 79 <ParamBool id="pclkOk" name="pclkOk" group="Connections" default="`${hasConnection("clock_sar", 0) && isBlockUsed(pclk)}`" visible="`${debug}`" editable="false" desc="" /> 80 81 <Repeat count="32"> 82 <ParamBool id="ch$idx_en" name="Enable" group="Channel $idx" default="`${channelNum > $idx}`" visible="`${debug}`" editable="false" desc="Include Channel $idx in scan"/> 83 </Repeat> 84 85 <Repeat count="32"> 86 <ParamString id="ch$idx_name" name="Channel Name" group="Channel $idx" default="channel_$idx" visible="`${ch$idx_en}`" editable="true" desc="Channel name. Make sure thet it is unique for the current ADC." /> 87 <ParamBool id="is_adc_channel$idx_name_valid" name="Is Channel Name Valid?" group="Channel $idx" default="`${hasMatch(ch$idx_name, "(^[_]+[-]+[0-9a-zA-Z]|^[a-zA-Z])[0-9a-zA-Z_]*$")}`" visible="`${debug}`" editable="false" desc="" /> 88 <ParamBool id="ch$idx_isHWenabled" name="Enabled" group="Channel $idx" default="false" visible="`${ch$idx_en}`" editable="true" desc="If HW is started, in scope of _Init() function, or just configured." /> 89 <ParamChoice id="ch$idx_triggerSelection" name="HW Trigger" group="Channel $idx" default="CY_SAR2_TRIGGER_OFF" visible="`${ch$idx_en}`" editable="true" desc="The ADC trigger mode selection." > 90 <Entry name="Disabled" value="CY_SAR2_TRIGGER_OFF" visible="true" /> 91 <Entry name="TCPWM" value="CY_SAR2_TRIGGER_TCPWM" visible="true" /> 92 <Entry name="Generic 0" value="CY_SAR2_TRIGGER_GENERIC0" visible="true" /> 93 <Entry name="Generic 1" value="CY_SAR2_TRIGGER_GENERIC1" visible="true" /> 94 <Entry name="Generic 2" value="CY_SAR2_TRIGGER_GENERIC2" visible="true" /> 95 <Entry name="Generic 3" value="CY_SAR2_TRIGGER_GENERIC3" visible="true" /> 96 <Entry name="Generic 4" value="CY_SAR2_TRIGGER_GENERIC4" visible="true" /> 97 <Entry name="Continuous" value="CY_SAR2_TRIGGER_CONTINUOUS" visible="true" /> 98 </ParamChoice> 99 <ParamSignal name="Trigger Input" port="tr_sar_gen_in[$idx]" group="Channel $idx" visible="`${ch$idx_en}`" desc="Input trigger selection" canBeEmpty="true"> 100 </ParamSignal> 101 <ParamSignal name="Trigger Output" port="tr_sar_gen_out[$idx]" group="Channel $idx" visible="`${ch$idx_en}`" desc="Output trigger selection" canBeEmpty="true"> 102 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 103 <Parameter id="DriveModes" severity="DEFAULT" reason=""> 104 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 105 </Parameter> 106 </Constraint> 107 <Constraint type="ACCEPT" targetLocation="ioss\[\d+\]\.port\[\d+\]\.pin.*" valid="true" > 108 <Parameter id="DriveModes" severity="INFO" reason="The pin Drive Mode parameter does not match expected."> 109 <Fixed value="CY_GPIO_DM_STRONG_IN_OFF" /> 110 </Parameter> 111 </Constraint> 112 <Constraint type="ACCEPT" targetLocation=".*" valid="true" /> 113 </ParamSignal> 114 <ParamSignal name="Trigger Chanel Input" port="tr_sar_ch_in[$idx]" group="Channel $idx" visible="`${ch$idx_en}`" desc="Input trigger to start the channel conversion" canBeEmpty="true"> 115 </ParamSignal> 116 <ParamSignal name="Voltage Range Trigger Output" port="tr_sar_ch_rangevio[$idx]" group="Channel $idx" visible="`${ch$idx_en}`" desc="Output trigger on the voltage range event" canBeEmpty="true"> 117 </ParamSignal> 118 <ParamSignal name="Channel Done Trigger Output" port="tr_sar_ch_done[$idx]" group="Channel $idx" visible="`${ch$idx_en}`" desc="Output trigger on the channel done event" canBeEmpty="true"> 119 </ParamSignal> 120 <ParamSignal name="Debug Freeze Input" port="tr_debug_freeze[$idx]" group="Channel $idx" visible="`${ch$idx_en}`" desc="Debug freeze input trigger selection" canBeEmpty="true"> 121 </ParamSignal> 122 <ParamRange id="ch$idx_channelPriority" name="Priority" group="Channel $idx" default="0" min="0" max="7" resolution="1" visible="`${ch$idx_en}`" editable="true" desc="Channel priority. 0=highest, 7=lowest."/> 123 <ParamChoice id="ch$idx_preenptionType" name="Preemption Type" group="Channel $idx" default="CY_SAR2_PREEMPTION_ABORT_CANCEL" visible="`${ch$idx_en}`" editable="true" desc="The ADC preemption type selection." > 124 <Entry name="Abort ongoing acquisition, do not return" value="CY_SAR2_PREEMPTION_ABORT_CANCEL" visible="true" /> 125 <Entry name="Abort ongoing acquisition, up on return Restart" value="CY_SAR2_PREEMPTION_ABORT_RESTART" visible="true" /> 126 <Entry name="Abort ongoing acquisition, up on return Resume" value="CY_SAR2_PREEMPTION_ABORT_RESUME" visible="true" /> 127 <Entry name="Complete ongoing acquisition (including averaging), up on return Resume" value="CY_SAR2_PREEMPTION_FINISH_RESUME" visible="true" /> 128 </ParamChoice> 129 <ParamBool id="ch$idx_isGroupEnd" name="Group End" group="Channel $idx" default="false" visible="`${ch$idx_en}`" editable="true" desc="This value indicates that this channel is the last in the group." /> 130 <ParamChoice id="ch$idx_doneLevel" name="Output Trigger Type" group="Channel $idx" default="CY_SAR2_DONE_LEVEL_PULSE" visible="`${ch$idx_en}`" editable="true" desc="Conversion done trigger output selection." > 131 <Entry name="Pulse" value="CY_SAR2_DONE_LEVEL_PULSE" visible="true" /> 132 <Entry name="Level" value="CY_SAR2_DONE_LEVEL_LEVEL" visible="true" /> 133 </ParamChoice> 134 <ParamSignal name="Input" port="vin[$idx]" group="Channel $idx" multiSelect="true" visible="`${ch$idx_en}`" canBeEmpty="false" desc="Channel input voltage" /> 135 <ParamBool id="ch$idx_extMuxEnable" name="Enable External Analog Mux" group="Channel $idx" default="false" visible="`${ch$idx_en}`" editable="true" desc="External analog mux enable." /> 136 <ParamChoice id="ch$idx_extMuxSelect" name="External Analog Mux Select" group="Channel $idx" default="0" visible="`${ch$idx_en && ch$idx_extMuxEnable}`" editable="`${ch$idx_extMuxEnable}`" desc="External analog mux select." > 137 <Entry name="EXT_MUX[x]_0" value="0" visible="true" /> 138 <Entry name="EXT_MUX[x]_1" value="1" visible="true" /> 139 </ParamChoice> 140 <ParamChoice id="ch$idx_preconditionMode" name="Precondition Mode" group="Channel $idx" default="CY_SAR2_PRECONDITION_MODE_OFF" visible="`${ch$idx_en}`" editable="true" desc="Select preconditioning mode." > 141 <Entry name="No Preconditioning" value="CY_SAR2_PRECONDITION_MODE_OFF" visible="true" /> 142 <Entry name="Discharge to VREFL" value="CY_SAR2_PRECONDITION_MODE_VREFL" visible="true" /> 143 <Entry name="Charge to VREFH" value="CY_SAR2_PRECONDITION_MODE_VREFH" visible="true" /> 144 <Entry name="Connect the Diagnostic Reference" value="CY_SAR2_PRECONDITION_MODE_DIAG" visible="true" /> 145 </ParamChoice> 146 <ParamChoice id="ch$idx_overlapDiagMode" name="Overlap Diagnostic Mode" group="Channel $idx" default="CY_SAR2_OVERLAP_DIAG_MODE_OFF" visible="`${ch$idx_en}`" editable="true" desc="Select Overlap mode or SARMUX Diagnostics." > 147 <Entry name="No Overlap or SARMUX Diagnostics" value="CY_SAR2_OVERLAP_DIAG_MODE_OFF" visible="true" /> 148 <Entry name="2 Sample Time Periods" value="CY_SAR2_OVERLAP_DIAG_MODE_HALF" visible="true" /> 149 <Entry name="Normal Sample Time" value="CY_SAR2_OVERLAP_DIAG_MODE_FULL" visible="true" /> 150 <Entry name="Diagnostic Reference" value="CY_SAR2_OVERLAP_DIAG_MODE_MUX_DIAG" visible="true" /> 151 </ParamChoice> 152 <ParamRange id="ch$idx_sampleTime" name="Sample Time (Aperture)" group="Channel $idx" default="6" min="`${ceil((adcClkFreqHz * (VDDAsel eq VDDA_VOLTAGE_4_5V_TO_5_5V ? 412 : 600 )) / 1000000000.0)}`" max="4095" resolution="1" visible="`${ch$idx_en}`" editable="true" desc="Sample time (aperture) in ADC clock cycles." /> 153 <ParamChoice id="ch$idx_calibrationValueSelect" name="Selection Of Calibration Values" group="Channel $idx" default="CY_SAR2_CALIBRATION_VALUE_REGULAR" visible="`${ch$idx_en}`" editable="true" desc="Select calibration values." > 154 <Entry name="Regular" value="CY_SAR2_CALIBRATION_VALUE_REGULAR" visible="true" /> 155 <Entry name="Alternate" value="CY_SAR2_CALIBRATION_VALUE_ALTERNATE" visible="true" /> 156 </ParamChoice> 157 <ParamChoice id="ch$idx_resultAlignment" name="Result Data Alignment" group="Channel $idx" default="CY_SAR2_RESULT_ALIGNMENT_RIGHT" visible="`${ch$idx_en}`" editable="true" desc="Select result data alignment." > 158 <Entry name="The data is right aligned in Result[11:0]" value="CY_SAR2_RESULT_ALIGNMENT_RIGHT" visible="true" /> 159 <Entry name="The data is left aligned in Result[15:4]" value="CY_SAR2_RESULT_ALIGNMENT_LEFT" visible="true" /> 160 </ParamChoice> 161 <ParamChoice id="ch$idx_signExtention" name="Sign Extension" group="Channel $idx" default="CY_SAR2_SIGN_EXTENTION_UNSIGNED" visible="`${ch$idx_en}`" editable="true" desc="Select whether result data is signed or unsigned." > 162 <Entry name="Unsigned" value="CY_SAR2_SIGN_EXTENTION_UNSIGNED" visible="true" /> 163 <Entry name="Signed" value="CY_SAR2_SIGN_EXTENTION_SIGNED" visible="true" /> 164 </ParamChoice> 165 <ParamChoice id="ch$idx_postProcessingMode" name="Post Processing Mode" group="Channel $idx" default="CY_SAR2_POST_PROCESSING_MODE_NONE" visible="`${ch$idx_en}`" editable="true" desc="Select post processing mode." > 166 <Entry name="No Post Processing" value="CY_SAR2_POST_PROCESSING_MODE_NONE" visible="true" /> 167 <Entry name="Averaging" value="CY_SAR2_POST_PROCESSING_MODE_AVG" visible="true" /> 168 <Entry name="Averaging + Range Detect" value="CY_SAR2_POST_PROCESSING_MODE_AVG_RANGE" visible="true" /> 169 <Entry name="Range Detect" value="CY_SAR2_POST_PROCESSING_MODE_RANGE" visible="true" /> 170 <Entry name="Range Detect + Pulse Detect" value="CY_SAR2_POST_PROCESSING_MODE_RANGE_PULSE" visible="true" /> 171 </ParamChoice> 172 <ParamRange id="ch$idx_averageCount" name="Averaging Count" group="Channel $idx" default="1" min="1" max="256" resolution="1" visible="`${ch$idx_en}`" editable="`${((ch$idx_postProcessingMode eq CY_SAR2_POST_PROCESSING_MODE_AVG) || (ch$idx_postProcessingMode eq CY_SAR2_POST_PROCESSING_MODE_AVG_RANGE))}`" desc="Averaging count. Available if Post Processing Mode Averaging is selected. Otherwise - ignored." /> 173 <ParamRange id="ch$idx_rightShift" name="Shift Right" group="Channel $idx" default="0" min="0" max="15" resolution="1" visible="`${ch$idx_en}`" editable="`${((ch$idx_postProcessingMode eq CY_SAR2_POST_PROCESSING_MODE_AVG) || (ch$idx_postProcessingMode eq CY_SAR2_POST_PROCESSING_MODE_AVG_RANGE) || (ch$idx_postProcessingMode eq CY_SAR2_POST_PROCESSING_MODE_NONE))}`" desc="Shift Right. Available if Post Processing Mode Averaging or None is selected. Otherwise - ignored." /> 174 <ParamRange id="ch$idx_positiveReload" name="Positive Reload" group="Channel $idx" default="0" min="0" max="255" resolution="1" visible="`${ch$idx_en}`" editable="`${(ch$idx_postProcessingMode eq CY_SAR2_POST_PROCESSING_MODE_RANGE_PULSE)}`" desc="Positive reload value. Available if Post Processing Mode Pulse Detect is selected. Otherwise - ignored." /> 175 <ParamRange id="ch$idx_negativeReload" name="Negative Reload" group="Channel $idx" default="0" min="0" max="31" resolution="1" visible="`${ch$idx_en}`" editable="`${(ch$idx_postProcessingMode eq CY_SAR2_POST_PROCESSING_MODE_RANGE_PULSE)}`" desc="Negative reload value. Available if Post Processing Mode Pulse Detect is selected. Otherwise - ignored." /> 176 <ParamChoice id="ch$idx_rangeDetectionMode" name="Range Detection Mode" group="Channel $idx" default="CY_SAR2_RANGE_DETECTION_MODE_BELOW_LO" visible="`${ch$idx_en}`" editable="true" desc="Select range detection mode." > 177 <Entry name="Below Low Threshold (Result < Low)" value="CY_SAR2_RANGE_DETECTION_MODE_BELOW_LO" visible="true" /> 178 <Entry name="Inside Range (Low <= Result < High)" value="CY_SAR2_RANGE_DETECTION_MODE_INSIDE_RANGE" visible="true" /> 179 <Entry name="Above High Threshold (High <= Result)" value="CY_SAR2_RANGE_DETECTION_MODE_ABOVE_HI" visible="true" /> 180 <Entry name="Outside Range (Result < Low || High <= Result)" value="CY_SAR2_RANGE_DETECTION_MODE_OUTSIDE_RANGE" visible="true" /> 181 </ParamChoice> 182 <ParamRange id="ch$idx_rangeDetectionLoThreshold" name="Range Detect Low Threshold" group="Channel $idx" default="0" min="0" max="65535" resolution="1" visible="`${ch$idx_en}`" editable="true" desc="Range detection Low threshold." /> 183 <ParamRange id="ch$idx_rangeDetectionHiThreshold" name="Range Detect High Threshold" group="Channel $idx" default="65535" min="0" max="65535" resolution="1" visible="`${ch$idx_en}`" editable="true" desc="Range detection High threshold." /> 184 <ParamString id="pclkDst" name="PCLK Destination" group="Internal" default="PCLK_PASS0_CLOCK_SAR`${InstNumber}`" visible="false" editable="false" desc="Generates PCLK connection define." /> 185 </Repeat> 186 187 <ParamBool id="inFlash" name="Store Config in Flash" group="Advanced" default="true" visible="true" editable="true" desc="Controls whether the configuration structure is stored in flash (const, true) or SRAM (not const, false)." /> 188 </Parameters> 189 <DRCs> 190 <DRC type="ERROR" text="SAR2 clock frequency, `${adcClkFreqHz < 1000000 ? adcClkFreqHz / 1000.0 . " kHz" : adcClkFreqHz / 1000000. . " MHz"}`, is out of the supported range (`${clkFreqMinMHz}` to `${clkFreqMaxMHz}` MHz). Change clock frequency or VDDA voltage." condition="`${(sourceClock ne "") && ((adcClkFreqHz > (clkFreqMaxHz)) || (adcClkFreqHz < (clkFreqMinHz)))}`" paramId="clk_freq_display"/> 191 <DRC type="ERROR" text="Power personality has to be enabled in order to configure and use SAR2 driver." condition="`${!isPowerEnabled}`" paramId="isPowerEnabled"/> 192 <DRC type="ERROR" repeatCount="32" text="Invalid Channel Name" condition="`${!is_adc_channel$idx_name_valid}`" paramId="ch$idx_name"/> 193 </DRCs> 194 <ConfigFirmware> 195 <ConfigInclude value="cy_sar2.h" include="true" /> 196 <ConfigInclude value="cy_sysclk.h" include="`${pclkOk}`" /> 197 <ConfigInclude value="cycfg_routing.h" include="true" /> 198 199 <ConfigDefine name="`${INST_NAME}`_HW" value="PASS0_SAR`${InstNumber}`" public="true" include="true" /> 200 201 <ConfigDefine name="`${INST_NAME}`_CH$idx_HW" value="PASS0_SAR`${InstNumber}`_CH$idx" public="true" include="`${(channelNum > $idx)}`" repeatCount="32" /> 202 <ConfigDefine name="`${INST_NAME}`_`${ch$idx_name}`_HW" value="`${INST_NAME}`_CH$idx_HW" public="true" include="`${(channelNum > $idx)}`" repeatCount="32" /> 203 204 <ConfigDefine name="`${INST_NAME}`_CH$idx_IRQ" value="pass_0_interrupts_sar_`${((32 * InstNumber) + $idx)}`_IRQn" public="true" include="`${(channelNum > $idx)}`" repeatCount="32" /> 205 <ConfigDefine name="`${INST_NAME}`_`${ch$idx_name}`_IRQ" value="`${INST_NAME}`_CH$idx_IRQ" public="true" include="`${(channelNum > $idx)}`" repeatCount="32" /> 206 207 <ConfigDefine name="`${INST_NAME}`_VDDA_RANGE" value="`${(vdda > 4.5) ? "CY_SAR2_VDDA_4_5V_TO_5_5V" : "CY_SAR2_VDDA_2_7V_TO_4_5V"}`" public="true" include="true" /> 208 209 <!-- The fitter only generates PORT_ADDR when the signal passes through an expansion mux. Other signals such as amuxbus or vmotor will not generate PORT_ADDR so define default here --> 210 <ConfigDefine name="SARMUX0_CH$idx_PORT_ADDR" value="0" public="false" include="`${(InstNumber == 0) && (channelNum > $idx)}`" repeatCount="32" preventOverride="true" /> 211 212 <ConfigDefine name="`${INST_NAME}`_`${ch$idx_name}`_IDX" value="($idxUL)" public="true" include="`${(channelNum > $idx)}`" repeatCount="32" /> 213 214 <ConfigStruct name="`${INST_NAME}`_`${ch$idx_name}`_config" type="cy_stc_sar2_channel_config_t" const="`${inFlash}`" public="true" include="`${(channelNum > $idx)}`" repeatCount="32" > 215 <Member name="channelHwEnable" value="`${ch$idx_isHWenabled}`" /> 216 <Member name="triggerSelection" value="`${ch$idx_triggerSelection}`" /> 217 <Member name="channelPriority" value="`${ch$idx_channelPriority}`U" /> 218 <Member name="preenptionType" value="`${ch$idx_preenptionType}`" /> 219 <Member name="doneLevel" value="`${ch$idx_doneLevel}`" /> 220 <Member name="isGroupEnd" value="`${ch$idx_isGroupEnd}`" /> 221 <Member name="pinAddress" value="`${hasConnection("vin", $idx) ? "SARMUX" . InstNumber . "_CH$idx_PIN_ADDR" : 0}`" /> 222 <Member name="portAddress" value="`${InstNumber == 0 && hasConnection("vin", $idx) ? "SARMUX0_CH$idx_PORT_ADDR" : 0}`" /> 223 <Member name="extMuxEnable" value="`${ch$idx_extMuxEnable}`" /> 224 <Member name="extMuxSelect" value="`${ch$idx_extMuxSelect}`U" /> 225 <Member name="preconditionMode" value="`${ch$idx_preconditionMode}`" /> 226 <Member name="overlapDiagMode" value="`${ch$idx_overlapDiagMode}`" /> 227 <Member name="sampleTime" value="`${ch$idx_sampleTime}`U" /> 228 <Member name="calibrationValueSelect" value="`${ch$idx_calibrationValueSelect}`" /> 229 <Member name="postProcessingMode" value="`${ch$idx_postProcessingMode}`" /> 230 <Member name="resultAlignment" value="`${ch$idx_resultAlignment}`" /> 231 <Member name="signExtention" value="`${ch$idx_signExtention}`" /> 232 <Member name="averageCount" value="`${((ch$idx_postProcessingMode eq CY_SAR2_POST_PROCESSING_MODE_AVG) || (ch$idx_postProcessingMode eq CY_SAR2_POST_PROCESSING_MODE_AVG_RANGE)) ? ch$idx_averageCount : 1}`U" /> 233 <Member name="rightShift" value="`${((ch$idx_postProcessingMode eq CY_SAR2_POST_PROCESSING_MODE_AVG) || (ch$idx_postProcessingMode eq CY_SAR2_POST_PROCESSING_MODE_AVG_RANGE) || (ch$idx_postProcessingMode eq CY_SAR2_POST_PROCESSING_MODE_NONE)) ? ch$idx_rightShift : 0}`U" /> 234 235 <Member name="positiveReload" value="`${(ch$idx_postProcessingMode eq CY_SAR2_POST_PROCESSING_MODE_RANGE_PULSE) ? ch$idx_positiveReload : 0}`U" /> 236 <Member name="negativeReload" value="`${(ch$idx_postProcessingMode eq CY_SAR2_POST_PROCESSING_MODE_RANGE_PULSE) ? ch$idx_negativeReload : 0}`U" /> 237 238 <Member name="rangeDetectionMode" value="`${ch$idx_rangeDetectionMode}`" /> 239 <Member name="rangeDetectionLoThreshold" value="`${ch$idx_rangeDetectionLoThreshold}`U" /> 240 <Member name="rangeDetectionHiThreshold" value="`${ch$idx_rangeDetectionHiThreshold}`U" /> 241 </ConfigStruct> 242 243 <ConfigStruct name="`${INST_NAME}`_config" type="cy_stc_sar2_config_t" const="`${inFlash}`" public="true" include="true"> 244 <Member name="preconditionTime" value="`${preconditionTime}`U" /> 245 <Member name="powerupTime" value="`${powerupTime}`U" /> 246 <Member name="enableIdlePowerDown" value="`${enableIdlePowerDown}`" /> 247 <Member name="msbStretchMode" value="`${msbStretch}`" /> 248 <Member name="enableHalfLsbConv" value="`${enableHalfLsbConv}`" /> 249 <Member name="sarMuxEnable" value="`${sarMuxEnable}`" /> 250 <Member name="adcEnable" value="`${adcEnable}`" /> 251 <Member name="sarIpEnable" value="`${sarIpEnable}`" /> 252 <Member name="channelConfig" value="{`${(ch0_en ? (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch0_name . "_config, " : "NULL, ") . 253 (ch1_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch1_name . "_config, " : "NULL, ") . 254 (ch2_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch2_name . "_config, " : "NULL, ") . 255 (ch3_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch3_name . "_config, " : "NULL, ") . 256 (ch4_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch4_name . "_config, " : "NULL, ") . 257 (ch5_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch5_name . "_config, " : "NULL, ") . 258 (ch6_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch6_name . "_config, " : "NULL, ") . 259 (ch7_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch7_name . "_config, " : "NULL, ") . 260 (ch8_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch8_name . "_config, " : "NULL, ") . 261 (ch9_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch9_name . "_config, " : "NULL, ") . 262 (ch10_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch10_name . "_config, " : "NULL, ") . 263 (ch11_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch11_name . "_config, " : "NULL, ") . 264 (ch12_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch12_name . "_config, " : "NULL, ") . 265 (ch13_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch13_name . "_config, " : "NULL, ") . 266 (ch14_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch14_name . "_config, " : "NULL, ") . 267 (ch15_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch15_name . "_config, " : "NULL, ") . 268 (ch16_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch16_name . "_config, " : "NULL, ") . 269 (ch17_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch17_name . "_config, " : "NULL, ") . 270 (ch18_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch18_name . "_config, " : "NULL, ") . 271 (ch19_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch19_name . "_config, " : "NULL, ") . 272 (ch20_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch20_name . "_config, " : "NULL, ") . 273 (ch21_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch21_name . "_config, " : "NULL, ") . 274 (ch22_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch22_name . "_config, " : "NULL, ") . 275 (ch23_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch23_name . "_config, " : "NULL, ") . 276 (ch24_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch24_name . "_config, " : "NULL, ") . 277 (ch25_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch25_name . "_config, " : "NULL, ") . 278 (ch26_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch26_name . "_config, " : "NULL, ") . 279 (ch27_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch27_name . "_config, " : "NULL, ") . 280 (ch28_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch28_name . "_config, " : "NULL, ") . 281 (ch29_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch29_name . "_config, " : "NULL, ") . 282 (ch30_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch30_name . "_config, " : "NULL, ") . 283 (ch31_en ? " " . (inFlash ? "(cy_stc_sar2_channel_config_t *)" : "") . "&" . INST_NAME . "_" . ch31_name . "_config" : "NULL")}`}" /> 284 285 </ConfigStruct> 286 287 <ConfigInstruction value="Cy_SysClk_PeriphAssignDivider(`${pclkDst}`, `${getExposedMember(pclk, "clockSel")}`);" include="`${pclkOk}`" /> 288 289 </ConfigFirmware> 290</Personality>
