1 /**
2 * @file xmc_ccu8.h
3 * @date 2019-07-29
4 *
5 * @cond
6 *********************************************************************************************************************
7 * XMClib v2.1.24 - XMC Peripheral Driver Library
8 *
9 * Copyright (c) 2015-2019, Infineon Technologies AG
10 * All rights reserved.
11 *
12 * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the
13 * following conditions are met:
14 *
15 * Redistributions of source code must retain the above copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following
19 * disclaimer in the documentation and/or other materials provided with the distribution.
20 *
21 * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote
22 * products derived from this software without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
25 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
29 * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with
33 * Infineon Technologies AG dave@infineon.com).
34 *********************************************************************************************************************
35 *
36 * Change History
37 * --------------
38 *
39 * 2015-02-20:
40 * - Initial <br>
41 * - Documentation updates <br>
42 *
43 * 2015-06-20:
44 * - Removed version macros and declaration of GetDriverVersion API <br>
45 * - Added XMC_CCU8_SLICE_LoadSelector() API, to select which compare register value has to be loaded
46 * during external load event.
47 *
48 * 2015-07-01:
49 * - In XMC_CCU8_SLICE_CHECK_INTERRUPT macro, fixed the missing item for compare match down for channel 2. <br>
50 *
51 * 2015-07-24:
52 * - XMC_CCU8_SLICE_ConfigureStatusBitOverrideEvent() is updated to support XMC14 device. <br>
53 *
54 * 2015-08-17:
55 * - XMC_CCU8_SLICE_PRESCALER_t enum is added to set the prescaler divider. <br>
56 * - XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_t is added for all the devices except XMC45 devices, to set when the
57 * shadow transfer has to happen. <br>
58 * - XMC_CCU8_SOURCE_OUT0_t, XMC_CCU8_SOURCE_OUT1_t, XMC_CCU8_SOURCE_OUT2_t, XMC_CCU8_SOURCE_OUT3_t enums are added
59 * to maps one of the ST to OUT0, OUT1, OUT3, OUT4 signals.
60 * - In XMC_CCU8_SLICE_COMPARE_CONFIG_t structure, selector_out0, selector_out1, selector_out2, selector_out3 are
61 * added to support XMC14 devices.
62 * - XMC_CCU8_EnableShadowTransfer() API is made as inline, to improve the speed. <br>
63 * - XMC_CCU8_SLICE_EnableCascadedShadowTransfer(), XMC_CCU8_SLICE_DisableCascadedShadowTransfer(),
64 * XMC_CCU8_SLICE_SetShadowTransferMode() API are supported for all the devices except XMC45.
65 *
66 * 2015-09-29:
67 * - In XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_t, two more enum items are added to support external count direction
68 * settings.
69 *
70 * 2015-10-07:
71 * - XMC_CCU8_SLICE_SetTimerCompareMatchChannel1(), XMC_CCU8_SLICE_SetTimerCompareMatchChannel2() inline APIs are
72 * added to update the respective compare registers directly.
73 * - XMC_CCU8_SLICE_GetEvent() is made as inline.
74 * - XMC_CCU8_SLICE_MULTI_IRQ_ID_t is added to support the XMC_CCU8_SLICE_EnableMultipleEvents() and
75 * XMC_CCU8_SLICE_DisableMultipleEvents() APIs.
76 * - DOC updates for the newly added APIs.
77 *
78 * 2016-03-09:
79 * - Optimization of write only registers
80 *
81 * 2016-05-20:
82 * - Added XMC_CCU8_SLICE_StopClearTimer()
83 * - Changed XMC_CCU8_SLICE_StopTimer() and XMC_CCU8_SLICE_ClearTimer()
84 *
85 * 2017-04-27:
86 * - XMC_CCU8_SLICE_SetPrescaler() changed div_val parameter to type XMC_CCU8_SLICE_PRESCALER_t
87 *
88 * 2017-09-15:
89 * - Fix XMC_CCU8_SLICE_SetShadowTransferMode()
90 * - Added parity checking functionality
91 *
92 * 2019-03-30:
93 * - Changed XMC_CCU8_StartPrescaler(), XMC_CCU8_StartParityChecker(), XMC_CCU8_StopPrescaler(), XMC_CCU8_StopParityChecker(),
94 * XMC_CCU8_EnableMultipleClocks(), XMC_CCU8_EnableClock(), XMC_CCU8_DisableClock() to avoid RMW access
95 * - Changed XMC_CCU8_SLICE_SetEvent(), XMC_CCU8_SLICE_ClearEvent() to avoid RMW access
96 * - Added XMC_CCU8_SetSuspendMode(), XMC_CCU8_SLICE_GetPrescaler()
97 * - Added XMC_CCU8_SLICE_GetTimerCompareMatchChannel1() and XMC_CCU8_SLICE_GetTimerCompareMatchChannel2()
98 *
99 * 2019-07-29:
100 * - Added XMC_CCU4_SLICE_GetStatus()
101 *
102 * @endcond
103 */
104
105 #ifndef XMC_CCU8_H
106 #define XMC_CCU8_H
107
108 /*********************************************************************************************************************
109 * HEADER FILES
110 ********************************************************************************************************************/
111 #include "xmc_common.h"
112
113 #if defined(CCU80)
114
115 #if UC_FAMILY == XMC1
116 #include "xmc1_ccu8_map.h"
117 #endif
118
119 #if UC_FAMILY == XMC4
120 #include "xmc4_ccu8_map.h"
121 #endif
122
123 /**
124 * @addtogroup XMClib XMC Peripheral Library
125 * @{
126 */
127
128 /**
129 * @addtogroup CCU8
130 *
131 * @brief Capture Compare Unit 8 (CCU8) low level driver for XMC family of microcontrollers<br>
132 *
133 * The CCU8 peripheral functions play a major role in applications that need complex Pulse Width Modulation (PWM) signal
134 * generation, with complementary high side and low side switches, multi phase control. These functions in conjunction
135 * with a very flexible and programmable signal conditioning scheme, make the CCU8 the must have peripheral for state
136 * of the art motor control, multi phase and multi level power electronics systems.\n
137 * Each CCU8 module is comprised of four identical 16 bit Capture/Compare Timer slices, CC8y (where y = [0..4]). Each
138 * timer slice can work in compare mode or in capture mode.
139 *
140 * APIs provided in this file cover the following functional blocks of CCU8:
141 * -- Timer configuration, Capture configuration, Function/Event configuration, Interrupt configuration
142 * \par Note:
143 * 1. SLICE (APIs prefixed with e.g. XMC_CCU8_SLICE_)
144 * 2. Module (APIs are not having any prefix e.g. XMC_CCU8_)
145 *
146 * \par Timer(Compare mode) configuration:
147 * This section of the LLD provides the configuration structure XMC_CCU8_SLICE_COMPARE_CONFIG_t,
148 * XMC_CCU8_SLICE_DEAD_TIME_CONFIG_t and the initialization functions XMC_CCU8_SLICE_CompareInit(), XMC_CCU8_SLICE_DeadTimeInit().
149 *
150 * It can be used to:
151 * -# Start and Stop the timer. (XMC_CCU8_SLICE_StartTimer(), XMC_CCU8_SLICE_StopTimer())
152 * -# Update the period, compare, Dither, Prescaler and Passive values. (XMC_CCU8_SLICE_SetTimerPeriodMatch(),
153 * XMC_CCU8_SLICE_SetTimerCompareMatch(), XMC_CCU8_SLICE_SetPrescaler(), XMC_CCU8_SLICE_SetDitherCompareValue(),
154 * XMC_CCU8_SLICE_SetPassiveLevel())
155 * -# Configure the dead time.(XMC_CCU8_SLICE_SetDeadTimeValue(), XMC_CCU8_SLICE_SetDeadTimePrescaler())
156 * -# Enable the slices to support multichannel mode. (XMC_CCU8_SLICE_EnableMultiChannelMode())
157 *
158 * \par Capture configuration:
159 * This section of the LLD provides the configuration structure XMC_CCU8_SLICE_CAPTURE_CONFIG_t and the initialization
160 * function XMC_CCU8_SLICE_CaptureInit().
161 *
162 * It can be used to:
163 * -# Configure the capture functionality. (XMC_CCU8_SLICE_Capture0Config(), XMC_CCU8_SLICE_Capture1Config())
164 * -# Read the captured values along with the status, which indicate the value is latest or not.
165 * (XMC_CCU8_SLICE_GetCaptureRegisterValue())
166 *
167 * \par Function/Event configuration:
168 * This section of the LLD provides the configuration structure XMC_CCU8_SLICE_EVENT_CONFIG_t.
169 *
170 * It can be used to:
171 * -# Enable and Disable the events. (XMC_CCU8_SLICE_EnableEvent(), XMC_CCU8_SLICE_DisableEvent())
172 * -# Configure to start and stop the timer on external events.(XMC_CCU8_SLICE_StartConfig(), XMC_CCU8_SLICE_StopConfig())
173 * -# Modulation, external load and Gating of the timer output.(XMC_CCU8_SLICE_ModulationConfig(),
174 * XMC_CCU8_SLICE_LoadConfig(), XMC_CCU8_SLICE_GateConfig())
175 * -# Control the count direction of the timer based on the external event. (XMC_CCU8_SLICE_DirectionConfig())
176 * -# Count the external events.(XMC_CCU8_SLICE_CountConfig())
177 * -# External Trap. Which can be used as protective feature.(XMC_CCU8_SLICE_EnableTrap(), XMC_CCU8_SLICE_DisableTrap(),
178 * XMC_CCU8_SLICE_TrapConfig())
179 *
180 * \par Interrupt configuration:
181 * This section of the LLD provides the function to configure the interrupt node to each event (XMC_CCU8_SLICE_SetInterruptNode())
182 *
183 * @{
184 */
185
186 /*********************************************************************************************************************
187 * MACROS
188 ********************************************************************************************************************/
189 #define XMC_CCU8_SLICE_CHECK_INTERRUPT(interrupt) \
190 ((interrupt == XMC_CCU8_SLICE_IRQ_ID_PERIOD_MATCH) || \
191 (interrupt == XMC_CCU8_SLICE_IRQ_ID_ONE_MATCH) || \
192 (interrupt == XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_UP_CH_1) || \
193 (interrupt == XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_DOWN_CH_1)|| \
194 (interrupt == XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_UP_CH_2) || \
195 (interrupt == XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_DOWN_CH_2)|| \
196 (interrupt == XMC_CCU8_SLICE_IRQ_ID_EVENT0) || \
197 (interrupt == XMC_CCU8_SLICE_IRQ_ID_EVENT1) || \
198 (interrupt == XMC_CCU8_SLICE_IRQ_ID_EVENT2) || \
199 (interrupt == XMC_CCU8_SLICE_IRQ_ID_TRAP))
200
201 /* Macro to check if the slice ptr passed is valid */
202 #define XMC_CCU8_SLICE_CHECK_COMP_CHANNEL(cmp_channel) \
203 ((cmp_channel == XMC_CCU8_SLICE_COMPARE_CHANNEL_1) || \
204 (cmp_channel == XMC_CCU8_SLICE_COMPARE_CHANNEL_2))
205
206 /*********************************************************************************************************************
207 * ENUMS
208 ********************************************************************************************************************/
209
210 /**
211 * Typedef for CCU8 Global data structure
212 */
213 typedef CCU8_GLOBAL_TypeDef XMC_CCU8_MODULE_t;
214
215 /**
216 * Typedef for CCU8 Slice data structure
217 */
218 typedef CCU8_CC8_TypeDef XMC_CCU8_SLICE_t;
219
220 /**
221 * Return Value of an API
222 */
223 typedef enum XMC_CCU8_STATUS
224 {
225 XMC_CCU8_STATUS_OK = 0U, /**< API fulfils request */
226 XMC_CCU8_STATUS_ERROR , /**< API cannot fulfil request */
227 XMC_CCU8_STATUS_RUNNING , /**< The timer slice is currently running */
228 XMC_CCU8_STATUS_IDLE /**< The timer slice is currently idle */
229 } XMC_CCU8_STATUS_t;
230
231 /**
232 * CCU8 module clock
233 */
234 typedef enum XMC_CCU8_CLOCK
235 {
236 XMC_CCU8_CLOCK_SCU = 0U, /**< Select the fCCU as the clock */
237 XMC_CCU8_CLOCK_EXTERNAL_A , /**< External clock-A */
238 XMC_CCU8_CLOCK_EXTERNAL_B , /**< External clock-B */
239 XMC_CCU8_CLOCK_EXTERNAL_C /**< External clock-C */
240 } XMC_CCU8_CLOCK_t;
241
242 /**
243 * CCU8 set the shadow transfer type for multichannel mode
244 */
245 typedef enum XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER
246 {
247 XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE0 = (uint32_t)0x4000000, /**< Shadow transfer through software
248 only for slice 0*/
249 XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE0 = (uint32_t)0x4000400, /**< Shadow transfer through software
250 and hardware for slice 0 */
251 XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE1 = (uint32_t)0x8000000, /**< Shadow transfer through software
252 only for slice 1*/
253 XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE1 = (uint32_t)0x8000800, /**< Shadow transfer through software
254 and hardware for slice 1 */
255 XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE2 = (uint32_t)0x10000000, /**< Shadow transfer through software
256 only for slice 2 */
257 XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE2 = (uint32_t)0x10001000, /**< Shadow transfer through software
258 and hardware for slice 2 */
259 XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_SLICE3 = (uint32_t)0x20000000, /**< Shadow transfer through software
260 only for slice 3*/
261 XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_SW_MCSS_SLICE3 = (uint32_t)0x20002000 /**< Shadow transfer through software
262 and hardware for slice 3 */
263 } XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_t;
264
265 /**
266 * Operational modes of CCU8 slice
267 */
268 typedef enum XMC_CCU8_SLICE_MODE
269 {
270 XMC_CCU8_SLICE_MODE_COMPARE = 0U, /**< slice(CC8y) operates in Compare Mode */
271 XMC_CCU8_SLICE_MODE_CAPTURE /**< slice(CC8y) operates in Capture Mode */
272 } XMC_CCU8_SLICE_MODE_t;
273
274 /**
275 * Slice Output selection
276 */
277 typedef enum XMC_CCU8_SLICE_OUTPUT
278 {
279 XMC_CCU8_SLICE_OUTPUT_0 = 1U, /**< Slice Output-0 */
280 XMC_CCU8_SLICE_OUTPUT_1 = 2U, /**< Slice Output-1 */
281 XMC_CCU8_SLICE_OUTPUT_2 = 4U, /**< Slice Output-2 */
282 XMC_CCU8_SLICE_OUTPUT_3 = 8U /**< Slice Output-3 */
283 } XMC_CCU8_SLICE_OUTPUT_t;
284
285 /**
286 * Timer counting modes for the slice
287 */
288 typedef enum XMC_CCU8_SLICE_TIMER_COUNT_MODE
289 {
290 XMC_CCU8_SLICE_TIMER_COUNT_MODE_EA = 0U, /**< Edge Aligned Mode */
291 XMC_CCU8_SLICE_TIMER_COUNT_MODE_CA /**< Centre Aligned Mode */
292 } XMC_CCU8_SLICE_TIMER_COUNT_MODE_t;
293
294 /**
295 * Timer repetition mode for the slice
296 */
297 typedef enum XMC_CCU8_SLICE_TIMER_REPEAT_MODE
298 {
299 XMC_CCU8_SLICE_TIMER_REPEAT_MODE_REPEAT = 0U, /**< Repetitive mode: continuous mode of operation */
300 XMC_CCU8_SLICE_TIMER_REPEAT_MODE_SINGLE /**< Single shot mode: Once a Period match/One match
301 occurs timer goes to idle state */
302 } XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t;
303
304 /**
305 * Timer counting direction for the CCU8 slice
306 */
307 typedef enum XMC_CCU8_SLICE_TIMER_COUNT_DIR
308 {
309 XMC_CCU8_SLICE_TIMER_COUNT_DIR_UP = 0U, /**< Counting up */
310 XMC_CCU8_SLICE_TIMER_COUNT_DIR_DOWN /**< Counting down */
311 } XMC_CCU8_SLICE_TIMER_COUNT_DIR_t;
312
313 /**
314 * Capture mode register sets
315 */
316 typedef enum XMC_CCU8_SLICE_CAP_REG_SET
317 {
318 XMC_CCU8_SLICE_CAP_REG_SET_LOW = 0U, /**< Capture register-0, Capture register-1 used */
319 XMC_CCU8_SLICE_CAP_REG_SET_HIGH /**< Capture register-0, Capture register-1 used */
320 } XMC_CCU8_SLICE_CAP_REG_SET_t;
321
322 /**
323 * Prescaler mode
324 */
325 typedef enum XMC_CCU8_SLICE_PRESCALER_MODE
326 {
327 XMC_CCU8_SLICE_PRESCALER_MODE_NORMAL = 0U, /**< Fixed division of module clock */
328 XMC_CCU8_SLICE_PRESCALER_MODE_FLOAT /**< Floating divider */
329 } XMC_CCU8_SLICE_PRESCALER_MODE_t;
330
331 /**
332 * Timer output passive level
333 */
334 typedef enum XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL
335 {
336 XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_LOW = 0U, /**< Passive level = Low */
337 XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_HIGH /**< Passive level = High */
338 } XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t;
339
340 /**
341 * Compare Channel selection
342 */
343 typedef enum XMC_CCU8_SLICE_COMPARE_CHANNEL
344 {
345 XMC_CCU8_SLICE_COMPARE_CHANNEL_1 = 0U, /**< Compare Channel-1 */
346 XMC_CCU8_SLICE_COMPARE_CHANNEL_2 /**< Compare Channel-2 */
347 } XMC_CCU8_SLICE_COMPARE_CHANNEL_t;
348
349 /**
350 * Timer clock Divider
351 */
352 typedef enum XMC_CCU8_SLICE_PRESCALER
353 {
354 XMC_CCU8_SLICE_PRESCALER_1 = 0U, /**< Slice Clock = fccu8 */
355 XMC_CCU8_SLICE_PRESCALER_2 , /**< Slice Clock = fccu8/2 */
356 XMC_CCU8_SLICE_PRESCALER_4 , /**< Slice Clock = fccu8/4 */
357 XMC_CCU8_SLICE_PRESCALER_8 , /**< Slice Clock = fccu8/8 */
358 XMC_CCU8_SLICE_PRESCALER_16 , /**< Slice Clock = fccu8/16 */
359 XMC_CCU8_SLICE_PRESCALER_32 , /**< Slice Clock = fccu8/32 */
360 XMC_CCU8_SLICE_PRESCALER_64 , /**< Slice Clock = fccu8/64 */
361 XMC_CCU8_SLICE_PRESCALER_128 , /**< Slice Clock = fccu8/128 */
362 XMC_CCU8_SLICE_PRESCALER_256 , /**< Slice Clock = fccu8/256 */
363 XMC_CCU8_SLICE_PRESCALER_512 , /**< Slice Clock = fccu8/512 */
364 XMC_CCU8_SLICE_PRESCALER_1024 , /**< Slice Clock = fccu8/1024 */
365 XMC_CCU8_SLICE_PRESCALER_2048 , /**< Slice Clock = fccu8/2048 */
366 XMC_CCU8_SLICE_PRESCALER_4096 , /**< Slice Clock = fccu8/4096 */
367 XMC_CCU8_SLICE_PRESCALER_8192 , /**< Slice Clock = fccu8/8192 */
368 XMC_CCU8_SLICE_PRESCALER_16384 , /**< Slice Clock = fccu8/16384 */
369 XMC_CCU8_SLICE_PRESCALER_32768 /**< Slice Clock = fccu8/32768 */
370 } XMC_CCU8_SLICE_PRESCALER_t;
371
372 /**
373 * Dead Time Generator Clock Divider
374 */
375 typedef enum XMC_CCU8_SLICE_DTC_DIV
376 {
377 XMC_CCU8_SLICE_DTC_DIV_1 = 0U, /**< DTC clock = Slice Clock */
378 XMC_CCU8_SLICE_DTC_DIV_2 , /**< DTC clock = Slice Clock/2 */
379 XMC_CCU8_SLICE_DTC_DIV_4 , /**< DTC clock = Slice Clock/4 */
380 XMC_CCU8_SLICE_DTC_DIV_8 /**< DTC clock = Slice Clock/8 */
381 } XMC_CCU8_SLICE_DTC_DIV_t;
382
383
384 /**
385 * The compare channel output which is routed to the slice output signal(STy).
386 */
387 typedef enum XMC_CCU8_SLICE_STATUS
388 {
389 XMC_CCU8_SLICE_STATUS_CHANNEL_1 = 0U, /**< Channel-1 status connected to Slice Status */
390 XMC_CCU8_SLICE_STATUS_CHANNEL_2 , /**< Channel-2 status connected to Slice Status */
391 XMC_CCU8_SLICE_STATUS_CHANNEL_1_AND_2 , /**< \b Wired \b AND of Channel-1 and Channel-2 status connected to
392 Slice status */
393 #if ((UC_SERIES == XMC13) || (UC_SERIES == XMC14)) || defined(DOXYGEN)
394 XMC_CCU8_SLICE_STATUS_CHANNEL_1_OR_2 /**< \b Wired \b OR of Channel-1 and Channel-2 status connected to Slice
395 status. @note Only available for XMC1300 and XMC1400 series */
396 #endif
397 } XMC_CCU8_SLICE_STATUS_t;
398
399 /**
400 * Compare channel for which modulation has to be applied
401 */
402 typedef enum XMC_CCU8_SLICE_MODULATION_CHANNEL
403 {
404 XMC_CCU8_SLICE_MODULATION_CHANNEL_NONE = 0U, /**< No modulation */
405 XMC_CCU8_SLICE_MODULATION_CHANNEL_1 , /**< Modulation for Compare Channel-1 */
406 XMC_CCU8_SLICE_MODULATION_CHANNEL_2 , /**< Modulation for Compare Channel-2 */
407 XMC_CCU8_SLICE_MODULATION_CHANNEL_1_AND_2 /**< Modulation for Compare Channel-1 and Compare Channel-2 */
408 } XMC_CCU8_SLICE_MODULATION_CHANNEL_t;
409
410 /**
411 * External Function list
412 */
413 typedef enum XMC_CCU8_SLICE_FUNCTION
414 {
415 XMC_CCU8_SLICE_FUNCTION_START = 0U, /**< Start function */
416 XMC_CCU8_SLICE_FUNCTION_STOP , /**< Stop function */
417 XMC_CCU8_SLICE_FUNCTION_CAPTURE_EVENT0 , /**< Capture Event-0 function, CCycapt0 signal is used for event
418 generation */
419 XMC_CCU8_SLICE_FUNCTION_CAPTURE_EVENT1 , /**< Capture Event-1 function, CCycapt1 signal is used for event
420 generation */
421 XMC_CCU8_SLICE_FUNCTION_GATING , /**< Gating function */
422 XMC_CCU8_SLICE_FUNCTION_DIRECTION , /**< Direction function */
423 XMC_CCU8_SLICE_FUNCTION_LOAD , /**< Load function */
424 XMC_CCU8_SLICE_FUNCTION_COUNT , /**< Counting function */
425 XMC_CCU8_SLICE_FUNCTION_OVERRIDE , /**< Override function */
426 XMC_CCU8_SLICE_FUNCTION_MODULATION , /**< Modulation function */
427 XMC_CCU8_SLICE_FUNCTION_TRAP /**< Trap function */
428 } XMC_CCU8_SLICE_FUNCTION_t;
429
430 /**
431 * External Event list
432 */
433 typedef enum XMC_CCU8_SLICE_EVENT
434 {
435 XMC_CCU8_SLICE_EVENT_NONE = 0U, /**< None */
436 XMC_CCU8_SLICE_EVENT_0 , /**< Event-0 */
437 XMC_CCU8_SLICE_EVENT_1 , /**< Event-1 */
438 XMC_CCU8_SLICE_EVENT_2 /**< Event-2 */
439 } XMC_CCU8_SLICE_EVENT_t;
440
441 /**
442 * External Event trigger criteria - Edge sensitivity
443 */
444 typedef enum XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY
445 {
446 XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_NONE = 0U, /**< None */
447 XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_RISING_EDGE , /**< Rising Edge of the input signal generates
448 event trigger */
449 XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_FALLING_EDGE , /**< Falling Edge of the input signal generates event
450 trigger */
451 XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_DUAL_EDGE /**< Both Rising and Falling edges cause an event trigger */
452 } XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_t;
453
454 /**
455 * External Event trigger criteria - Level sensitivity
456 */
457 typedef enum XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY
458 {
459 XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_HIGH = 0U, /**< Level sensitive functions react to a high signal level*/
460 XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_LOW = 1U, /**< Level sensitive functions react to a low signal level */
461 /* Below enum items can be utilised specific to the functionality */
462 XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_COUNT_UP_ON_LOW = 0U, /**< Timer counts up, during Low state of the control signal */
463 XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_COUNT_UP_ON_HIGH = 1U /**< Timer counts up, during High state of the control signal */
464 } XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_t;
465
466 /**
467 * Low pass filter Configuration. The External Event input should be stable for a selected number of clock cycles.
468 */
469 typedef enum XMC_CCU8_SLICE_EVENT_FILTER
470 {
471 XMC_CCU8_SLICE_EVENT_FILTER_DISABLED = 0U, /**< No Low Pass Filtering is applied */
472 XMC_CCU8_SLICE_EVENT_FILTER_3_CYCLES , /**< Input should be stable for 3 clock cycles */
473 XMC_CCU8_SLICE_EVENT_FILTER_5_CYCLES , /**< Input should be stable for 5 clock cycles */
474 XMC_CCU8_SLICE_EVENT_FILTER_7_CYCLES /**< Input should be stable for 7 clock cycles */
475 } XMC_CCU8_SLICE_EVENT_FILTER_t;
476
477 /**
478 * External Event Input list. This list depicts the possible input connections to the CCU8 slice.
479 * Interconnects are specific to each device.
480 */
481 typedef uint8_t XMC_CCU8_SLICE_INPUT_t;
482
483
484 /**
485 * Actions that can be performed upon detection of an external Timer STOP event
486 */
487 typedef enum XMC_CCU8_SLICE_END_MODE
488 {
489 XMC_CCU8_SLICE_END_MODE_TIMER_STOP = 0U, /**< Stops the timer, without clearing TIMER register */
490 XMC_CCU8_SLICE_END_MODE_TIMER_CLEAR , /**< Without stopping timer, clears the TIMER register */
491 XMC_CCU8_SLICE_END_MODE_TIMER_STOP_CLEAR /**< Stops the timer and clears the TIMER register */
492 } XMC_CCU8_SLICE_END_MODE_t;
493
494 /**
495 * Actions that can be performed upon detection of an external Timer START event
496 */
497 typedef enum XMC_CCU8_SLICE_START_MODE
498 {
499 XMC_CCU8_SLICE_START_MODE_TIMER_START = 0U, /**< Start the timer from the current count of TIMER register */
500 XMC_CCU8_SLICE_START_MODE_TIMER_START_CLEAR /**< Clears the TIMER register and start the timer */
501 } XMC_CCU8_SLICE_START_MODE_t;
502
503 /**
504 * Modulation of timer output signals
505 */
506 typedef enum XMC_CCU8_SLICE_MODULATION_MODE
507 {
508 XMC_CCU8_SLICE_MODULATION_MODE_CLEAR_ST_OUT = 0U, /**< Clear ST and OUT signals */
509 XMC_CCU8_SLICE_MODULATION_MODE_CLEAR_OUT /**< Clear only the OUT signal */
510 } XMC_CCU8_SLICE_MODULATION_MODE_t;
511
512 /**
513 * Trap exit mode
514 */
515 typedef enum XMC_CCU8_SLICE_TRAP_EXIT_MODE
516 {
517 XMC_CCU8_SLICE_TRAP_EXIT_MODE_AUTOMATIC = 0U, /**< Clear trap state as soon as the trap signal is de-asserted */
518 XMC_CCU8_SLICE_TRAP_EXIT_MODE_SW /**< Clear only when acknowledged by software */
519 } XMC_CCU8_SLICE_TRAP_EXIT_MODE_t;
520
521 /**
522 * Timer clear on capture
523 */
524 typedef enum XMC_CCU8_SLICE_TIMER_CLEAR_MODE
525 {
526 XMC_CCU8_SLICE_TIMER_CLEAR_MODE_NEVER = 0U, /**< Never clear the timer on any capture event */
527 XMC_CCU8_SLICE_TIMER_CLEAR_MODE_CAP_HIGH , /**< Clear only when timer value has been captured in C3V and C2V */
528 XMC_CCU8_SLICE_TIMER_CLEAR_MODE_CAP_LOW , /**< Clear only when timer value has been captured in C1V and C0V */
529 XMC_CCU8_SLICE_TIMER_CLEAR_MODE_ALWAYS /**< Always clear the timer upon detection of any capture event */
530 } XMC_CCU8_SLICE_TIMER_CLEAR_MODE_t;
531
532 /**
533 * Multi Channel Shadow transfer request configuration options
534 */
535 typedef enum XMC_CCU8_SLICE_MCMS_ACTION
536 {
537 XMC_CCU8_SLICE_MCMS_ACTION_TRANSFER_PR_CR = 0U, /**< Transfer Compare and Period Shadow register values to
538 the actual registers upon MCS xfer request */
539 XMC_CCU8_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP = 1U, /**< Transfer Compare, Period and Prescaler Compare Shadow
540 register values to the actual registers upon MCS xfer
541 request */
542 XMC_CCU8_SLICE_MCMS_ACTION_TRANSFER_PR_CR_PCMP_DIT = 3U /**< Transfer Compare, Period ,Prescaler Compare and Dither
543 Compare register values to the actual registers upon
544 MCS xfer request */
545 } XMC_CCU8_SLICE_MCMS_ACTION_t;
546
547 /**
548 * Available Interrupt Event Ids
549 */
550 typedef enum XMC_CCU8_SLICE_IRQ_ID
551 {
552 XMC_CCU8_SLICE_IRQ_ID_PERIOD_MATCH = 0U , /**< Period match counting up */
553 XMC_CCU8_SLICE_IRQ_ID_ONE_MATCH = 1U , /**< One match counting down */
554 XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_UP_CH_1 = 2U , /**< Compare match counting up for channel 1 */
555 XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_DOWN_CH_1 = 3U , /**< Compare match counting down for channel 1 */
556 XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_UP_CH_2 = 4U , /**< Compare match counting up for channel 2 */
557 XMC_CCU8_SLICE_IRQ_ID_COMPARE_MATCH_DOWN_CH_2 = 5U , /**< Compare match counting down for channel 2 */
558 XMC_CCU8_SLICE_IRQ_ID_EVENT0 = 8U , /**< Event-0 occurrence */
559 XMC_CCU8_SLICE_IRQ_ID_EVENT1 = 9U , /**< Event-1 occurrence */
560 XMC_CCU8_SLICE_IRQ_ID_EVENT2 = 10U, /**< Event-2 occurrence */
561 XMC_CCU8_SLICE_IRQ_ID_TRAP = 11U /**< Trap occurrence */
562 } XMC_CCU8_SLICE_IRQ_ID_t;
563
564 /**
565 * Available Interrupt Event Ids, which is added to support multi event APIs
566 */
567 typedef enum XMC_CCU8_SLICE_MULTI_IRQ_ID
568 {
569 XMC_CCU8_SLICE_MULTI_IRQ_ID_PERIOD_MATCH = 0x1U, /**< Period match counting up */
570 XMC_CCU8_SLICE_MULTI_IRQ_ID_ONE_MATCH = 0x2U, /**< One match counting down */
571 XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_UP_CH_1 = 0x4U, /**< Compare match counting up for channel 1 */
572 XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_DOWN_CH_1 = 0x8U, /**< Compare match counting down for channel 1 */
573 XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_UP_CH_2 = 0x10U, /**< Compare match counting up for channel 2 */
574 XMC_CCU8_SLICE_MULTI_IRQ_ID_COMPARE_MATCH_DOWN_CH_2 = 0x20U, /**< Compare match counting down for channel 2 */
575 XMC_CCU8_SLICE_MULTI_IRQ_ID_EVENT0 = 0x100U, /**< Event-0 occurrence */
576 XMC_CCU8_SLICE_MULTI_IRQ_ID_EVENT1 = 0x200U, /**< Event-1 occurrence */
577 XMC_CCU8_SLICE_MULTI_IRQ_ID_EVENT2 = 0x400U, /**< Event-2 occurrence */
578 } XMC_CCU8_SLICE_MULTI_IRQ_ID_t;
579
580 /**
581 * Service Request Lines for CCU8. Event are mapped to these SR lines and these are used to generate the interrupt.
582 */
583 typedef enum XMC_CCU8_SLICE_SR_ID
584 {
585 XMC_CCU8_SLICE_SR_ID_0 = 0U, /**< Service Request Line-0 selected */
586 XMC_CCU8_SLICE_SR_ID_1 , /**< Service Request Line-1 selected */
587 XMC_CCU8_SLICE_SR_ID_2 , /**< Service Request Line-2 selected */
588 XMC_CCU8_SLICE_SR_ID_3 /**< Service Request Line-3 selected */
589 } XMC_CCU8_SLICE_SR_ID_t;
590
591
592 /**
593 * Slice shadow transfer options.
594 */
595 typedef enum XMC_CCU8_SHADOW_TRANSFER
596 {
597 XMC_CCU8_SHADOW_TRANSFER_SLICE_0 = CCU8_GCSS_S0SE_Msk, /**< Transfer Period, Compare and Passive Level
598 shadow register values to actual registers for
599 SLICE-0 */
600 XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_0 = CCU8_GCSS_S0DSE_Msk, /**< Transfer Dither compare shadow register value
601 to actual register for SLICE-0 */
602 XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_0 = CCU8_GCSS_S0PSE_Msk, /**< Transfer Prescaler shadow register value to
603 actual register for SLICE-0 */
604 XMC_CCU8_SHADOW_TRANSFER_SLICE_1 = CCU8_GCSS_S1SE_Msk, /**< Transfer Period, Compare and Passive Level
605 shadow register values to actual registers for
606 SLICE-1 */
607 XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_1 = CCU8_GCSS_S1DSE_Msk, /**< Transfer Dither compare shadow register value
608 to actual registers for SLICE-1 */
609 XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_1 = CCU8_GCSS_S1PSE_Msk, /**< Transfer Prescaler shadow register value to
610 actual register for SLICE-1 */
611 XMC_CCU8_SHADOW_TRANSFER_SLICE_2 = CCU8_GCSS_S2SE_Msk, /**< Transfer Period, Compare and Passive Level
612 shadow register values to actual registers for
613 SLICE-2 */
614 XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_2 = CCU8_GCSS_S2DSE_Msk, /**< Transfer Dither compare shadow register value
615 to actual register for SLICE-2 */
616 XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_2 = CCU8_GCSS_S2PSE_Msk, /**< Transfer Prescaler shadow register value to
617 actual register for SLICE-2 */
618 XMC_CCU8_SHADOW_TRANSFER_SLICE_3 = CCU8_GCSS_S3SE_Msk, /**< Transfer Period, Compare and Passive Level
619 shadow register values to actual registers for
620 SLICE-3 */
621 XMC_CCU8_SHADOW_TRANSFER_DITHER_SLICE_3 = CCU8_GCSS_S3DSE_Msk, /**< Transfer Dither compare shadow register value
622 to actual register for SLICE-3 */
623 XMC_CCU8_SHADOW_TRANSFER_PRESCALER_SLICE_3 = CCU8_GCSS_S3PSE_Msk /**< Transfer Prescaler shadow register value to
624 actual register for SLICE-3 */
625 } XMC_CCU8_SHADOW_TRANSFER_t;
626
627 #if (UC_SERIES != XMC45) || defined(DOXYGEN)
628 /**
629 * Slice shadow transfer mode options.
630 * @note Not available for XMC4500 series
631 */
632 typedef enum XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE
633 {
634 XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_IN_PERIOD_MATCH_AND_ONE_MATCH = 0U, /**< Shadow transfer is done in Period Match and
635 One match. */
636 XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_ONLY_IN_PERIOD_MATCH = 1U, /**< Shadow transfer is done only in Period Match. */
637 XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_ONLY_IN_ONE_MATCH = 2U /**< Shadow transfer is done only in One Match. */
638 } XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_t;
639 #endif
640
641 #if defined(CCU8V3) || defined(DOXYGEN) /* Defined for XMC1400 devices only */
642 /**
643 * Output sources for OUTy0 signal
644 * @note Only available for XMC1400 series
645 */
646 typedef enum XMC_CCU8_SOURCE_OUT0
647 {
648 XMC_CCU8_SOURCE_OUT0_ST1 = (uint32_t)0x0, /**< CCU8yST1 signal path is connected the CCU8x.OUT0 */
649 XMC_CCU8_SOURCE_OUT0_INV_ST1 = (uint32_t)0x1, /**< Inverted CCU8yST1 signal path is connected the CCU8x.OUT0 */
650 XMC_CCU8_SOURCE_OUT0_ST2 = (uint32_t)0x2, /**< CCU8yST2 signal path is connected the CCU8x.OUT0 */
651 XMC_CCU8_SOURCE_OUT0_INV_ST2 = (uint32_t)0x3 /**< Inverted CCU8yST2 signal path is connected the CCU8x.OUT0 */
652 } XMC_CCU8_SOURCE_OUT0_t;
653
654 /**
655 * Output sources for OUTy1 signal
656 * @note Only available for XMC1400 series
657 */
658 typedef enum XMC_CCU8_SOURCE_OUT1
659 {
660 XMC_CCU8_SOURCE_OUT1_ST1 = (uint32_t)0x1, /**< CCU8yST1 signal path is connected the CCU8x.OUT1 */
661 XMC_CCU8_SOURCE_OUT1_INV_ST1 = (uint32_t)0x0, /**< Inverted CCU8yST1 signal path is connected the CCU8x.OUT1 */
662 XMC_CCU8_SOURCE_OUT1_ST2 = (uint32_t)0x3, /**< CCU8yST2 signal path is connected the CCU8x.OUT1 */
663 XMC_CCU8_SOURCE_OUT1_INV_ST2 = (uint32_t)0x2 /**< Inverted CCU8yST2 signal path is connected the CCU8x.OUT1 */
664 } XMC_CCU8_SOURCE_OUT1_t;
665
666 /**
667 * Output sources for OUTy2 signal
668 * @note Only available for XMC1400 series
669 */
670 typedef enum XMC_CCU8_SOURCE_OUT2
671 {
672 XMC_CCU8_SOURCE_OUT2_ST2 = (uint32_t)0x0, /**< CCU8yST2 signal path is connected the CCU8x.OUT2 */
673 XMC_CCU8_SOURCE_OUT2_INV_ST2 = (uint32_t)0x1, /**< Inverted CCU8yST2 signal path is connected the CCU8x.OUT2 */
674 XMC_CCU8_SOURCE_OUT2_ST1 = (uint32_t)0x2, /**< CCU8yST1 signal path is connected the CCU8x.OUT2 */
675 XMC_CCU8_SOURCE_OUT2_INV_ST1 = (uint32_t)0x3 /**< Inverted CCU8yST1 signal path is connected the CCU8x.OUT2 */
676 } XMC_CCU8_SOURCE_OUT2_t;
677
678 /**
679 * Output sources for OUTy3 signal
680 * @note Only available for XMC1400 series
681 */
682 typedef enum XMC_CCU8_SOURCE_OUT3
683 {
684 XMC_CCU8_SOURCE_OUT3_ST2 = (uint32_t)0x1, /**< CCU8yST2 signal path is connected the CCU8x.OUT2 */
685 XMC_CCU8_SOURCE_OUT3_INV_ST2 = (uint32_t)0x0, /**< Inverted CCU8yST2 signal path is connected the CCU8x.OUT2 */
686 XMC_CCU8_SOURCE_OUT3_ST1 = (uint32_t)0x3, /**< CCU8yST1 signal path is connected the CCU8x.OUT2 */
687 XMC_CCU8_SOURCE_OUT3_INV_ST1 = (uint32_t)0x2 /**< Inverted CCU8yST1 signal path is connected the CCU8x.OUT2 */
688 } XMC_CCU8_SOURCE_OUT3_t;
689 #endif
690
691
692 /**
693 * Output selector for CCU8x.OUT0-3
694 */
695 #if !defined(CCU8V3) /* Defined for all devices except XMC1400 */
696 typedef enum XMC_CCU8_OUT_PATH
697 {
698 XMC_CCU8_OUT_PATH_OUT0_ST1 = (uint32_t)0x20000, /**< CCU8yST1 signal path is connected the CCU8x.OUT0 */
699 XMC_CCU8_OUT_PATH_OUT0_INV_ST1 = (uint32_t)0x20002, /**< Inverted CCU8yST1 signal path is connected the CCU8x.OUT0 */
700 XMC_CCU8_OUT_PATH_OUT1_ST1 = (uint32_t)0x40000, /**< CCU8yST1 signal path is connected the CCU8x.OUT1 */
701 XMC_CCU8_OUT_PATH_OUT1_INV_ST1 = (uint32_t)0x40004, /**< Inverted CCU8yST1 signal path is connected the CCU8x.OUT1 */
702 XMC_CCU8_OUT_PATH_OUT2_ST2 = (uint32_t)0x80000, /**< CCU8yST2 signal path is connected the CCU8x.OUT2 */
703 XMC_CCU8_OUT_PATH_OUT2_INV_ST2 = (uint32_t)0x80008, /**< Inverted CCU8yST2 signal path is connected the CCU8x.OUT2 */
704 XMC_CCU8_OUT_PATH_OUT3_ST2 = (uint32_t)0x100000,/**< CCU8yST2 signal path is connected the CCU8x.OUT2 */
705 XMC_CCU8_OUT_PATH_OUT3_INV_ST1 = (uint32_t)0x100010 /**< Inverted CCU8yST2 signal path is connected the CCU8x.OUT3 */
706 } XMC_CCU8_OUT_PATH_t;
707 #else
708 typedef enum XMC_CCU8_OUT_PATH
709 {
710 XMC_CCU8_OUT_PATH_OUT0_ST1 = (uint32_t)0x000C0, /**< CCU8yST1 signal path is connected the CCU8x.OUT0 */
711 XMC_CCU8_OUT_PATH_OUT0_INV_ST1 = (uint32_t)0x000D0, /**< Inverted CCU8yST1 signal path is connected the CCU8x.OUT0 */
712 XMC_CCU8_OUT_PATH_OUT0_ST2 = (uint32_t)0x000E0, /**< CCU8yST2 signal path is connected the CCU8x.OUT0. @note Only available for XMC1400 series*/
713 XMC_CCU8_OUT_PATH_OUT0_INV_ST2 = (uint32_t)0x000F0, /**< Inverted CCU8yST2 signal path is connected the CCU8x.OUT0. @note Only available for XMC1400 series*/
714 XMC_CCU8_OUT_PATH_OUT1_ST1 = (uint32_t)0x00D00, /**< CCU8yST1 signal path is connected the CCU8x.OUT1 */
715 XMC_CCU8_OUT_PATH_OUT1_INV_ST1 = (uint32_t)0x00C00, /**< Inverted CCU8yST1 signal path is connected the CCU8x.OUT1 */
716 XMC_CCU8_OUT_PATH_OUT1_ST2 = (uint32_t)0x00F00, /**< CCU8yST2 signal path is connected the CCU8x.OUT1. @note Only available for XMC1400 series*/
717 XMC_CCU8_OUT_PATH_OUT1_INV_ST2 = (uint32_t)0x00E00, /**< Inverted CCU8yST2 signal path is connected the CCU8x.OUT1. @note Only available for XMC1400 series */
718 XMC_CCU8_OUT_PATH_OUT2_ST2 = (uint32_t)0x0C000, /**< CCU8yST2 signal path is connected the CCU8x.OUT2 */
719 XMC_CCU8_OUT_PATH_OUT2_INV_ST2 = (uint32_t)0x0D000, /**< Inverted CCU8yST2 signal path is connected the CCU8x.OUT2 */
720 XMC_CCU8_OUT_PATH_OUT2_ST1 = (uint32_t)0x0E000, /**< CCU8yST1 signal path is connected the CCU8x.OUT2. @note Only available for XMC1400 series*/
721 XMC_CCU8_OUT_PATH_OUT2_INV_ST1 = (uint32_t)0x0F000, /**< Inverted CCU8yST1 signal path is connected the CCU8x.OUT2.@note Only available for XMC1400 series */
722 XMC_CCU8_OUT_PATH_OUT3_ST2 = (uint32_t)0xD0000, /**< CCU8yST2 signal path is connected the CCU8x.OUT3 */
723 XMC_CCU8_OUT_PATH_OUT3_INV_ST2 = (uint32_t)0xC0000, /**< Inverted CCU8yST2 signal path is connected the CCU8x.OUT3.@note Only available for XMC1400 series */
724 XMC_CCU8_OUT_PATH_OUT3_ST1 = (uint32_t)0xF0000, /**< CCU8yST1 signal path is connected the CCU8x.OUT3.@note Only available for XMC1400 series */
725 XMC_CCU8_OUT_PATH_OUT3_INV_ST1 = (uint32_t)0xE0000 /**< Inverted CCU8yST1 signal path is connected the CCU8x.OUT3 */
726 } XMC_CCU8_OUT_PATH_t;
727
728 /**
729 * Immediate write into configuration register
730 * @note Only available for XMC1400 series
731 */
732 typedef enum XMC_CCU8_SLICE_WRITE_INTO
733 {
734 XMC_CCU8_SLICE_WRITE_INTO_PERIOD_CONFIGURATION = CCU8_CC8_STC_IRPC_Msk, /**< Immediate or Coherent
735 Write into Period
736 Configuration */
737 XMC_CCU8_SLICE_WRITE_INTO_COMPARE1_CONFIGURATION = CCU8_CC8_STC_IRCC1_Msk, /**< Immediate or Coherent
738 Write into Compare 1
739 Configuration */
740 XMC_CCU8_SLICE_WRITE_INTO_COMPARE2_CONFIGURATION = CCU8_CC8_STC_IRCC2_Msk, /**< Immediate or Coherent
741 Write into Compare 2
742 Configuration */
743 XMC_CCU8_SLICE_WRITE_INTO_PASSIVE_LEVEL_CONFIGURATION = CCU8_CC8_STC_IRLC_Msk, /**< Immediate or Coherent
744 Write into Passive Level
745 Configuration */
746 XMC_CCU8_SLICE_WRITE_INTO_DITHER_VALUE_CONFIGURATION = CCU8_CC8_STC_IRDC_Msk, /**< Immediate or Coherent
747 Write into Dither Value
748 Configuration */
749 XMC_CCU8_SLICE_WRITE_INTO_FLOATING_PRESCALER_VALUE_CONFIGURATION = CCU8_CC8_STC_IRFC_Msk /**< Immediate or Coherent
750 Write into Floating Prescaler
751 Value Configuration */
752 } XMC_CCU8_SLICE_WRITE_INTO_t;
753
754
755 /**
756 * Automatic Shadow Transfer request when writing into shadow register
757 * @note Only available for XMC1400 series
758 */
759 typedef enum XMC_CCU8_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO
760 {
761 XMC_CCU8_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_PERIOD_SHADOW = CCU8_CC8_STC_ASPC_Msk, /**< Automatic Shadow
762 Transfer request when
763 writing into Period
764 Shadow Register */
765 XMC_CCU8_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_COMPARE1_SHADOW = CCU8_CC8_STC_ASCC1_Msk, /**< Automatic Shadow
766 transfer request
767 when writing into
768 Compare 1 Shadow Register */
769 XMC_CCU8_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_COMPARE2_SHADOW = CCU8_CC8_STC_ASCC2_Msk, /**< Automatic Shadow
770 transfer request
771 when writing into
772 Compare 2 Shadow Register */
773 XMC_CCU8_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_PASSIVE_LEVEL = CCU8_CC8_STC_ASLC_Msk, /**< Automatic Shadow transfer
774 request when writing
775 into Passive Level Register*/
776 XMC_CCU8_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_DITHER_SHADOW = CCU8_CC8_STC_ASDC_Msk, /**< Automatic Shadow transfer
777 request when writing
778 into Dither Shadow Register */
779 XMC_CCU8_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_FLOATING_PRESCALER_SHADOW = CCU8_CC8_STC_ASFC_Msk /**< Automatic Shadow transfer
780 request when writing
781 into Floating Prescaler Shadow
782 register */
783
784 } XMC_CCU8_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_t;
785 #endif
786
787 /**
788 * CCU8 slice mask which can be used for the APIs as input where multi slice support is available
789 */
790 typedef enum XMC_CCU8_SLICE_MASK
791 {
792 XMC_CCU8_SLICE_MASK_SLICE_0 = 1U , /**< SLICE-0 */
793 XMC_CCU8_SLICE_MASK_SLICE_1 = 2U , /**< SLICE-1 */
794 XMC_CCU8_SLICE_MASK_SLICE_2 = 4U , /**< SLICE-2 */
795 XMC_CCU8_SLICE_MASK_SLICE_3 = 8U /**< SLICE-3 */
796 } XMC_CCU8_SLICE_MASK_t;
797
798 /**
799 * Selects which signal is controlling the delay between the change at the CCU8 outputs and effective change at the driver parity output
800 */
801 typedef enum XMC_CCU8_PARITY_CHECKER_DELAY_INPUT
802 {
803 XMC_CCU8_PARITY_CHECKER_DELAY_INPUT_IGBTA = 0 << CCU8_GPCHK_PCDS_Pos,
804 XMC_CCU8_PARITY_CHECKER_DELAY_INPUT_IGBTB = 1 << CCU8_GPCHK_PCDS_Pos,
805 XMC_CCU8_PARITY_CHECKER_DELAY_INPUT_IGBTC = 2 << CCU8_GPCHK_PCDS_Pos,
806 XMC_CCU8_PARITY_CHECKER_DELAY_INPUT_IGBTD = 3 << CCU8_GPCHK_PCDS_Pos
807 } XMC_CCU8_PARITY_CHECKER_DELAY_INPUT_t;
808
809
810 /**
811 * Selects which signal contains the driver parity information
812 */
813 typedef enum XMC_CCU8_PARITY_CHECKER_DRIVER_INPUT
814 {
815 XMC_CCU8_PARITY_CHECKER_DRIVER_INPUT_SLICE_0 = 0 << CCU8_GPCHK_PISEL_Pos,
816 XMC_CCU8_PARITY_CHECKER_DRIVER_INPUT_SLICE_1 = 1 << CCU8_GPCHK_PISEL_Pos,
817 XMC_CCU8_PARITY_CHECKER_DRIVER_INPUT_SLICE_2 = 2 << CCU8_GPCHK_PISEL_Pos,
818 XMC_CCU8_PARITY_CHECKER_DRIVER_INPUT_SLICE_3 = 3 << CCU8_GPCHK_PISEL_Pos,
819 } XMC_CCU8_PARITY_CHECKER_DRIVER_INPUT_t;
820
821 /**
822 * Selects if we have an odd or even parity
823 */
824 typedef enum XMC_CCU8_PARITY_CHECKER_TYPE
825 {
826 XMC_CCU8_PARITY_CHECKER_TYPE_EVEN = 0 << CCU8_GPCHK_PCTS_Pos,
827 XMC_CCU8_PARITY_CHECKER_TYPE_ODD = 1 << CCU8_GPCHK_PCTS_Pos,
828 } XMC_CCU8_PARITY_CHECKER_TYPE_t;
829
830 /**
831 * Selects suspend mode
832 */
833 typedef enum XMC_CCU8_SUSPEND_MODE
834 {
835 XMC_CCU8_SUSPEND_MODE_IGNORE = 0 << CCU8_GCTRL_SUSCFG_Pos, /**< Suspend request ignored. The module never enters in suspend */
836 XMC_CCU8_SUSPEND_MODE_STOPS_INMEDIATELLY = 1 << CCU8_GCTRL_SUSCFG_Pos, /**< Stops all the running slices immediately. Safe stop is not applied. */
837 XMC_CCU8_SUSPEND_MODE_SAFE_STOP = 2 << CCU8_GCTRL_SUSCFG_Pos, /**< Stops the block immediately and clamps all the outputs to PASSIVE state. Safe stop is applied. */
838 XMC_CCU8_SUSPEND_MODE_WAIT_ROLL_OVER = 3 << CCU8_GCTRL_SUSCFG_Pos /**< Waits for the roll over of each slice to stop and clamp the slices outputs. Safe stop is applied. */
839 } XMC_CCU8_SUSPEND_MODE_t;
840
841 /**
842 * CCU8 slice status bit
843 */
844 typedef enum XMC_CCU8_SLICE_STATUS_BIT
845 {
846 XMC_CCU8_SLICE_STATUS_BIT_PASSIVE = false, /**< Passive */
847 XMC_CCU8_SLICE_STATUS_BIT_ACTIVE = true /**< Active */
848 } XMC_CCU8_SLICE_STATUS_BIT_t;
849
850
851 /*********************************************************************************************************************
852 * DATA STRUCTURES
853 ********************************************************************************************************************/
854
855 /**
856 * Configuration data structure of an External Event(Event-0/1/2).
857 * Needed to configure the various aspects of an External Event.
858 * This structure will not connect the external event with an external function.
859 */
860 typedef struct XMC_CCU8_SLICE_EVENT_CONFIG
861 {
862 XMC_CCU8_SLICE_INPUT_t mapped_input; /**< Required input signal for the Event. */
863 XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_t edge; /**< Select the event edge of the input signal.
864 This is needed for an edge sensitive External function.*/
865 XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_t level; /**< Select the event level of the input signal.
866 This is needed for an level sensitive External function.*/
867 XMC_CCU8_SLICE_EVENT_FILTER_t duration; /**< Low Pass filter duration in terms of fCCU clock cycles. */
868 } XMC_CCU8_SLICE_EVENT_CONFIG_t;
869
870 /*Anonymous structure/union guard start*/
871 #if defined(__CC_ARM)
872 #pragma push
873 #pragma anon_unions
874 #elif defined(__TASKING__)
875 #pragma warning 586
876 #endif
877
878 /**
879 * Dead Time configuration
880 */
881 typedef struct XMC_CCU8_SLICE_DEAD_TIME_CONFIG
882 {
883 union
884 {
885 struct
886 {
887 uint32_t enable_dead_time_channel1 : 1; /**< Enable dead time for Compare Channel-1 */
888 uint32_t enable_dead_time_channel2 : 1; /**< Enable dead time for Compare Channel-2 */
889 uint32_t channel1_st_path : 1; /**< Should dead time be applied to ST output of Compare Channel-1? */
890 uint32_t channel1_inv_st_path : 1; /**< Should dead time be applied to inverse ST output of
891 Compare Channel-1? */
892 uint32_t channel2_st_path : 1; /**< Should dead time be applied to ST output of Compare Channel-2? */
893 uint32_t channel2_inv_st_path : 1; /**< Should dead time be applied to inverse ST output of
894 Compare Channel-2? */
895 uint32_t div : 2; /**< Dead time prescaler divider value.
896 Accepts enum ::XMC_CCU8_SLICE_DTC_DIV_t*/
897 uint32_t : 24;
898 };
899 uint32_t dtc;
900 };
901 union
902 {
903 struct
904 {
905 uint32_t channel1_st_rising_edge_counter : 8; /**< Contains the delay value that is applied to the rising edge
906 for compare channel-1. Range: [0x0 to 0xFF] */
907 uint32_t channel1_st_falling_edge_counter : 8; /**< Contains the delay value that is applied to the falling edge
908 for compare channel-1. Range: [0x0 to 0xFF] */
909 uint32_t : 16;
910 };
911 uint32_t dc1r;
912 };
913 union
914 {
915 struct
916 {
917 uint32_t channel2_st_rising_edge_counter : 8; /**< Contains the delay value that is applied to the rising edge
918 for compare channel-2. Range: [0x0 to 0xFF]*/
919 uint32_t channel2_st_falling_edge_counter : 8; /**< Contains the delay value that is applied to the falling edge
920 for compare channel-2. Range: [0x0 to 0xFF]*/
921 uint32_t : 16;
922 };
923 uint32_t dc2r;
924 };
925 } XMC_CCU8_SLICE_DEAD_TIME_CONFIG_t;
926
927 /**
928 * Configuration data structure for CCU8 slice. Specifically configures the CCU8 slice to compare mode operation.
929 * This excludes event and function configuration.
930 */
931 typedef struct XMC_CCU8_SLICE_COMPARE_CONFIG
932 {
933 union
934 {
935 struct
936 {
937 uint32_t timer_mode : 1; /**< Edge aligned or Centre Aligned.
938 Accepts enum :: XMC_CCU8_SLICE_TIMER_COUNT_MODE_t */
939 uint32_t monoshot : 1; /**< Single shot or Continuous mode .
940 Accepts enum :: XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t */
941 uint32_t shadow_xfer_clear : 1; /**< Should PR and CR shadow xfer happen when timer is cleared? */
942 uint32_t : 10;
943 uint32_t dither_timer_period: 1; /**< Can the period of the timer dither? */
944 uint32_t dither_duty_cycle : 1; /**< Can the compare match of the timer dither? */
945 uint32_t : 1;
946 uint32_t prescaler_mode: 1; /**< Normal or floating prescaler mode.
947 Accepts enum :: XMC_CCU8_SLICE_PRESCALER_MODE_t */
948 uint32_t : 8;
949 uint32_t mcm_ch1_enable : 1; /**< Multi-Channel mode for compare channel 1 enable? */
950 uint32_t mcm_ch2_enable : 1; /**< Multi-Channel mode for compare channel 2 enable? */
951 uint32_t : 2;
952 uint32_t slice_status : 2; /**< Which of the two channels drives the slice status output.
953 Accepts enum :: XMC_CCU8_SLICE_STATUS_t*/
954 uint32_t : 1;
955 };
956 uint32_t tc;
957 };
958 union
959 {
960 struct
961 {
962 uint32_t passive_level_out0 : 1; /**< ST and OUT passive levels Configuration for OUT0.
963 Accepts enum :: XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t */
964 uint32_t passive_level_out1 : 1; /**< ST and OUT passive levels Configuration for OUT1.
965 Accepts enum :: XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t */
966 uint32_t passive_level_out2 : 1; /**< ST and OUT passive levels Configuration for OUT2.
967 Accepts enum :: XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t */
968 uint32_t passive_level_out3 : 1; /**< ST and OUT passive levels Configuration for OUT3.
969 Accepts enum :: XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t */
970 uint32_t : 28;
971 };
972 uint32_t psl;
973 };
974 union
975 {
976 struct
977 {
978 uint32_t asymmetric_pwm : 1; /**< Should the PWM be a function of the 2 compare channels
979 rather than period value? */
980 #if !defined(CCU8V3) /* Defined for all devices except XMC1400 */
981 uint32_t invert_out0 : 1; /**< Should inverted ST of Channel-1 be connected to OUT0? */
982 uint32_t invert_out1 : 1; /**< Should inverted ST of Channel-1 be connected to OUT1? */
983 uint32_t invert_out2 : 1; /**< Should inverted ST of Channel-2 be connected to OUT2? */
984 uint32_t invert_out3 : 1; /**< Should inverted ST of Channel-2 be connected to OUT3? */
985 uint32_t : 27;
986 #else
987 uint32_t : 3;
988 uint32_t selector_out0 : 2; /**< Connect ST or inverted ST of Channel-1 or Channel-2 be to OUT0
989 Accepts enum :: XMC_CCU8_SOURCE_OUT0_t
990 refer OCS1 bit-field of CHC register.
991 @note Only available for XMC1400 series */
992 uint32_t : 2;
993 uint32_t selector_out1 : 2; /**< Connect ST or inverted ST of Channel-1 or Channel-2 be to OUT1
994 Accepts enum :: XMC_CCU8_SOURCE_OUT1_t
995 refer OCS2 bit-field of CHC register.
996 @note Only available for XMC1400 series */
997 uint32_t : 2;
998 uint32_t selector_out2 : 2; /**< Connect ST or inverted ST of Channel-1 or Channel-2 be to OUT2
999 Accepts enum :: XMC_CCU8_SOURCE_OUT2_t
1000 refer OCS3 bit-field of CHC register.
1001 @note Only available for XMC1400 series */
1002 uint32_t : 2;
1003 uint32_t selector_out3 : 2; /**< Connect ST or inverted ST of Channel-1 or Channel-2 be to OUT3
1004 Accepts enum :: XMC_CCU8_SOURCE_OUT3_t
1005 refer OCS4 bit-field of CHC register.
1006 @note Only available for XMC1400 series */
1007 uint32_t : 14;
1008 #endif
1009 };
1010 uint32_t chc;
1011 };
1012 uint32_t prescaler_initval : 4; /**< Initial prescaler divider value
1013 Accepts enum :: XMC_CCU8_SLICE_PRESCALER_t */
1014 uint32_t float_limit : 4; /**< The max value which the prescaler divider can increment to.
1015 Range : [0 to 15] */
1016 uint32_t dither_limit : 4; /**< The value that determines the spreading of dithering
1017 Range : [0 to 15] */
1018 uint32_t timer_concatenation : 1; /**< Enables the concatenation of the timer if true*/
1019 } XMC_CCU8_SLICE_COMPARE_CONFIG_t;
1020
1021 /**
1022 * Configuration data structure for CCU8 slice. Specifically configures the CCU8 slice to capture mode operation.
1023 * This excludes event and function configuration.
1024 */
1025 typedef struct XMC_CCU8_SLICE_CAPTURE_CONFIG
1026 {
1027 union
1028 {
1029 struct
1030 {
1031 uint32_t : 4;
1032 uint32_t fifo_enable : 1; /**< Should the capture registers be setup as a FIFO?(Extended capture mode) */
1033 uint32_t timer_clear_mode : 2; /**< How should the timer register be cleared upon detection of capture event?
1034 Accepts enum ::XMC_CCU8_SLICE_TIMER_CLEAR_MODE_t */
1035 uint32_t : 4;
1036 uint32_t same_event : 1; /**< Should the capture event for C1V/C0V and C3V/C2V be same capture edge? */
1037 uint32_t ignore_full_flag : 1; /**< Should updates to capture registers follow full flag rules? */
1038 uint32_t : 3;
1039 uint32_t prescaler_mode: 1; /**< Normal or floating prescaler Accepts enum :: XMC_CCU8_SLICE_PRESCALER_MODE_t*/
1040 uint32_t : 15;
1041 };
1042 uint32_t tc;
1043 };
1044 uint32_t prescaler_initval : 4; /**< Prescaler divider value */
1045 uint32_t float_limit : 4; /**< The max value which the prescaler divider can increment to */
1046 uint32_t timer_concatenation : 1; /**< Enables the concatenation of the timer */
1047 } XMC_CCU8_SLICE_CAPTURE_CONFIG_t;
1048 /*Anonymous structure/union guard end*/
1049 #if defined(__CC_ARM)
1050 #pragma pop
1051 #elif defined(__TASKING__)
1052 #pragma warning restore
1053 #endif
1054 /*********************************************************************************************************************
1055 * API Prototypes
1056 ********************************************************************************************************************/
1057 #ifdef __cplusplus
1058 extern "C" {
1059 #endif
1060
XMC_CCU8_IsValidModule(const XMC_CCU8_MODULE_t * const module)1061 __STATIC_INLINE bool XMC_CCU8_IsValidModule(const XMC_CCU8_MODULE_t *const module)
1062 {
1063 bool tmp = false;
1064
1065 tmp = (module == CCU80);
1066
1067 #if defined(CCU81)
1068 tmp = tmp || (module == CCU81);
1069 #endif
1070
1071 return tmp;
1072 }
1073
XMC_CCU8_IsValidSlice(const XMC_CCU8_SLICE_t * const slice)1074 __STATIC_INLINE bool XMC_CCU8_IsValidSlice(const XMC_CCU8_SLICE_t *const slice)
1075 {
1076 bool tmp = false;
1077
1078 tmp = (slice == CCU80_CC80);
1079 #if defined(CCU80_CC81)
1080 tmp = tmp || (slice == CCU80_CC81);
1081 #endif
1082 #if defined(CCU80_CC82)
1083 tmp = tmp || (slice == CCU80_CC82);
1084 #endif
1085 #if defined(CCU80_CC83)
1086 tmp = tmp || (slice == CCU80_CC83);
1087 #endif
1088 #if defined(CCU81)
1089 tmp = tmp || (slice == CCU81_CC80);
1090 #if defined(CCU81_CC81)
1091 tmp = tmp || (slice == CCU81_CC81);
1092 #endif
1093 #if defined(CCU81_CC82)
1094 tmp = tmp || (slice == CCU81_CC82);
1095 #endif
1096 #if defined(CCU81_CC83)
1097 tmp = tmp || (slice == CCU81_CC83);
1098 #endif
1099 #endif
1100
1101 return tmp;
1102 }
1103
1104 /**
1105 * @param module Constant pointer to CCU8 module
1106 * @param mcs_action multi-channel shadow transfer request configuration
1107 * @return <BR>
1108 * None<BR>
1109 *
1110 * \par<b>Description:</b><br>
1111 * Initialization of global register GCTRL.\n\n
1112 * As part of module initialization, behaviour of the module upon detection
1113 * Multi-Channel Mode trigger is configured. Will also invoke the XMC_CCU8_EnableModule().
1114 * The API call would bring up the required CCU8 module and also initialize the module for
1115 * the required multi-channel shadow transfer.
1116 *
1117 * \par<b>Related APIs:</b><br>
1118 * XMC_CCU8_SLICE_CompareInit()<BR> XMC_CCU8_SLICE_CaptureInit().
1119 */
1120 void XMC_CCU8_Init(XMC_CCU8_MODULE_t *const module, const XMC_CCU8_SLICE_MCMS_ACTION_t mcs_action);
1121
1122 /**
1123 * @param module Constant pointer to CCU8 module
1124 * @return <BR>
1125 * None<BR>
1126 *
1127 * \par<b>Description:</b><br>
1128 * Enables the CCU8 module and brings it to active state.\n\n
1129 * Also disables the gating of the clock signal (if applicable depending on the device being selected).
1130 * Invoke this API before any operations are done on the CCU8 module. Invoked from XMC_CCU8_Init().
1131 *
1132 * \par<b>Related APIs:</b><br>
1133 * XMC_CCU8_SetModuleClock()<BR> XMC_CCU8_DisableModule()<BR> XMC_CCU8_StartPrescaler().
1134 */
1135 void XMC_CCU8_EnableModule(XMC_CCU8_MODULE_t *const module);
1136
1137 /**
1138 * @param module Constant pointer to CCU8 module
1139 * @return <BR>
1140 * None<BR>
1141 *
1142 * \par<b>Description:</b><br>
1143 * Brings the CCU8 module to reset state and enables gating of the clock signal(if applicable depending
1144 * on the device being selected).\n\n
1145 * Invoke this API when a CCU8 module needs to be disabled completely.
1146 * Any operation on the CCU8 module will have no effect after this API is called.
1147 *
1148 * \par<b>Related APIs:</b><br>
1149 * XMC_CCU8_EnableModule()<BR> XMC_CCU8_DisableModule().
1150 */
1151 void XMC_CCU8_DisableModule(XMC_CCU8_MODULE_t *const module);
1152
1153 /**
1154 * @param module Constant pointer to CCU8 module
1155 * @param clock Choice of input clock to the module
1156 * @return <BR>
1157 * None<BR>
1158 *
1159 * \par<b>Description:</b><br>
1160 * Selects the Module Clock by configuring GCTRL.PCIS bits.\n\n
1161 * There are 3 potential clock sources. This API helps to select the required clock source.
1162 * Call to this API is valid after the XMC_CCU8_Init().
1163 *
1164 * \par<b>Related APIs:</b><br>
1165 * None.<BR>
1166 */
1167 void XMC_CCU8_SetModuleClock(XMC_CCU8_MODULE_t *const module, const XMC_CCU8_CLOCK_t clock);
1168
1169 /**
1170 * @param module Constant pointer to CCU8 module
1171 * @return <BR>
1172 * None<BR>
1173 *
1174 * \par<b>Description:</b><br>
1175 * Starts the prescaler and restores clocks to the timer slices, by setting GIDLC.SPRB bit.<br>\n
1176 * Once the input to the prescaler has been chosen and the prescaler divider of all slices programmed,
1177 * the prescaler itself may be started. Invoke this API after XMC_CCU8_Init()
1178 * (Mandatory to fully initialize the module).
1179 *
1180 * \par<b>Related APIs:</b><br>
1181 * XMC_CCU8_Init()<BR> XMC_CCU8_EnableClock()<BR> XMC_CCU8_DisableClock()<BR> XMC_CCU8_StartPrescaler()<BR>
1182 * XMC_CCU8_StopPrescaler().
1183 */
XMC_CCU8_StartPrescaler(XMC_CCU8_MODULE_t * const module)1184 __STATIC_INLINE void XMC_CCU8_StartPrescaler(XMC_CCU8_MODULE_t *const module)
1185 {
1186 XMC_ASSERT("XMC_CCU8_StartPrescaler:Invalid Module Pointer", XMC_CCU8_IsValidModule(module));
1187 module->GIDLC = (uint32_t) CCU8_GIDLC_SPRB_Msk;
1188 }
1189
1190 /**
1191 * @param module Constant pointer to CCU8 module
1192 * @return <BR>
1193 * None<BR>
1194 *
1195 * \par<b>Description:</b><br>
1196 * Starts the parity function.<br>\n
1197 * Invoke this API after XMC_CCU8_Init()
1198 *
1199 * \par<b>Related APIs:</b><br>
1200 * XMC_CCU8_Init()<BR> XMC_CCU8_EnableClock()<BR> XMC_CCU8_DisableClock()<BR> XMC_CCU8_StopParityChecker().
1201 */
XMC_CCU8_StartParityChecker(XMC_CCU8_MODULE_t * const module)1202 __STATIC_INLINE void XMC_CCU8_StartParityChecker(XMC_CCU8_MODULE_t *const module)
1203 {
1204 XMC_ASSERT("XMC_CCU8_StartParityChecker:Invalid Module Pointer", XMC_CCU8_IsValidModule(module));
1205 module->GIDLC = (uint32_t) CCU8_GIDLC_SPCH_Msk;
1206 }
1207
1208 /**
1209 * @param module Constant pointer to CCU8 module
1210 * @return <BR>
1211 * None<BR>
1212 *
1213 * \par<b>Description:</b><br>
1214 * Stops the prescaler and blocks clocks to the timer slices, by setting GIDLS.CPRB bit.\n\n
1215 * Clears the run bit of the prescaler. Ensures that the module clock is not supplied to
1216 * the slices of the module.
1217 *
1218 * \par<b>Related APIs:</b><br>
1219 * XMC_CCU8_EnableClock()<BR> XMC_CCU8_DisableClock()<BR> XMC_CCU8_StartPrescaler()<BR> XMC_CCU8_StopPrescaler().
1220 */
XMC_CCU8_StopPrescaler(XMC_CCU8_MODULE_t * const module)1221 __STATIC_INLINE void XMC_CCU8_StopPrescaler(XMC_CCU8_MODULE_t *const module)
1222 {
1223 XMC_ASSERT("XMC_CCU8_StopPrescaler:Invalid Module Pointer", XMC_CCU8_IsValidModule(module));
1224 module->GIDLS = (uint32_t) CCU8_GIDLS_CPRB_Msk;
1225 }
1226
1227 /**
1228 * @param module Constant pointer to CCU8 module
1229 * @return <BR>
1230 * None<BR>
1231 *
1232 * \par<b>Description:</b><br>
1233 * Stops the parity function.<br>\n
1234 *
1235 * \par<b>Related APIs:</b><br>
1236 * XMC_CCU8_EnableClock()<BR> XMC_CCU8_DisableClock()<BR> XMC_CCU8_StartParityChecker()<BR>
1237 */
XMC_CCU8_StopParityChecker(XMC_CCU8_MODULE_t * const module)1238 __STATIC_INLINE void XMC_CCU8_StopParityChecker(XMC_CCU8_MODULE_t *const module)
1239 {
1240 XMC_ASSERT("XMC_CCU8_StopParityChecker:Invalid Module Pointer", XMC_CCU8_IsValidModule(module));
1241 module->GIDLS = (uint32_t) CCU8_GIDLS_CPCH_Msk;
1242 }
1243
1244 /**
1245 * @param module Constant pointer to CCU8 module
1246 * @return <BR>
1247 * None<BR>
1248 *
1249 * \par<b>Description:</b><br>
1250 * Returns the state of the prescaler, by reading GSTAT.PRB bit.\n\n
1251 * If clock is being supplied to the slices of the module then returns as true.
1252 *
1253 * \par<b>Related APIs:</b><br>
1254 * XMC_CCU8_StartPrescaler()<BR> XMC_CCU8_StopPrescaler()<BR> XMC_CCU8_EnableClock()<BR> XMC_CCU8_DisableClock().
1255 */
XMC_CCU8_IsPrescalerRunning(XMC_CCU8_MODULE_t * const module)1256 __STATIC_INLINE bool XMC_CCU8_IsPrescalerRunning(XMC_CCU8_MODULE_t *const module)
1257 {
1258 XMC_ASSERT("XMC_CCU8_IsPrescalerRunning:Invalid Module Pointer", XMC_CCU8_IsValidModule(module));
1259 return((bool)((module->GSTAT & (uint32_t) CCU8_GSTAT_PRB_Msk) == CCU8_GSTAT_PRB_Msk));
1260 }
1261
1262 /**
1263 * @param module Constant pointer to CCU8 module
1264 * @return <BR>
1265 * None<BR>
1266 *
1267 * \par<b>Description:</b><br>
1268 * Returns the state of the parity checker.\n\n
1269 *
1270 * \par<b>Related APIs:</b><br>
1271 * XMC_CCU8_StartParityChecker()<BR> XMC_CCU8_StopParityChecker()<BR> XMC_CCU8_EnableClock()<BR> XMC_CCU8_DisableClock().
1272 */
XMC_CCU8_IsParityCheckerRunning(XMC_CCU8_MODULE_t * const module)1273 __STATIC_INLINE bool XMC_CCU8_IsParityCheckerRunning(XMC_CCU8_MODULE_t *const module)
1274 {
1275 XMC_ASSERT("XMC_CCU8_IsPrescalerRunning:Invalid Module Pointer", XMC_CCU8_IsValidModule(module));
1276 return((bool)((module->GSTAT & (uint32_t) CCU8_GSTAT_PCRB_Msk) == CCU8_GSTAT_PCRB_Msk));
1277 }
1278
1279 /**
1280 * @param module Constant pointer to CCU8 module
1281 * @param clock_mask Slices whose clocks are to be enabled simultaneously.
1282 * Bit location 0/1/2/3 represents slice-0/1/2/3 respectively.
1283 * Range: [0x1 to 0xF]
1284 * @return <BR>
1285 * None<BR>
1286 *
1287 * \par<b>Description:</b><br>
1288 * Enables clocks of multiple slices at a time, by configuring GIDLC.CS0I, GIDLC.CS1I, GIDLC.CS2I,
1289 * GIDLC.CS3I bits.\n\n
1290 * Takes an input clock_mask, which determines the slices that would receive the clock. Bring them out
1291 * of the idle state simultaneously.
1292 *
1293 * \par<b>Related APIs:</b><br>
1294 * XMC_CCU8_EnableClock()<BR> XMC_CCU8_DisableClock().
1295 */
XMC_CCU8_EnableMultipleClocks(XMC_CCU8_MODULE_t * const module,const uint8_t clock_mask)1296 __STATIC_INLINE void XMC_CCU8_EnableMultipleClocks(XMC_CCU8_MODULE_t *const module, const uint8_t clock_mask)
1297 {
1298 XMC_ASSERT("XMC_CCU8_EnableMultipleClocks:Invalid Module Pointer", XMC_CCU8_IsValidModule(module));
1299 XMC_ASSERT("XMC_CCU8_EnableMultipleClocks:Invalid clock mask", (clock_mask < 16U));
1300
1301 module->GIDLC = (uint32_t) clock_mask;
1302 }
1303
1304 /**
1305 * @param module Constant pointer to CCU8 module
1306 * @param mode Selects suspend mode
1307 * @return <BR>
1308 * None<BR>
1309 *
1310 * \par<b>Description:</b><br>
1311 * Configures the entering in suspend mode for all the CCU8 slices.
1312 *
1313 * \par<b>Related APIs:</b><br>
1314 * None.
1315 */
XMC_CCU8_SetSuspendMode(XMC_CCU8_MODULE_t * const module,const XMC_CCU8_SUSPEND_MODE_t mode)1316 __STATIC_INLINE void XMC_CCU8_SetSuspendMode(XMC_CCU8_MODULE_t *const module, const XMC_CCU8_SUSPEND_MODE_t mode)
1317 {
1318 XMC_ASSERT("XMC_CCU8_EnableMultipleClocks:Invalid Module Pointer", XMC_CCU8_IsValidModule(module));
1319 module->GCTRL = (module->GCTRL & (uint32_t)~CCU8_GCTRL_SUSCFG_Msk) | mode;
1320 }
1321
1322 /**
1323 * @param slice Constant pointer to CC8 Slice
1324 * @param compare_init Pointer to slice configuration structure
1325 * @return <BR>
1326 * None<BR>
1327 *
1328 * \par<b>Description:</b><br>
1329 * Initialization of a CC8 slice to compare mode, by configuring CC8yTC, CC8yCMC, CC8yPSC, CC8yDITH, CC8yPSL,
1330 * CC8yFPCS, CC8yCHC registers.\n\n
1331 * CC8 slice is configured with Timer configurations in this routine. Timer is stopped before initialization
1332 * by calling XMC_CCU8_SLICE_StopTimer(). After initialization user has to explicitly enable
1333 * the shadow transfer for the required values by calling XMC_CCU8_EnableShadowTransfer() with appropriate mask.
1334 *
1335 * \par<b>Related APIs:</b><br>
1336 * None.
1337 */
1338 void XMC_CCU8_SLICE_CompareInit(XMC_CCU8_SLICE_t *const slice,
1339 const XMC_CCU8_SLICE_COMPARE_CONFIG_t *const compare_init);
1340
1341 /**
1342 * @param slice Constant pointer to CC8 Slice
1343 * @param capture_init Pointer to slice configuration structure
1344 * @return <BR>
1345 * None<BR>
1346 *
1347 * \par<b>Description:</b><br>
1348 * Initialization of a CC8 slice to capture mode, by configuring CC8yTC, CC8yCMC, CC8yPSC,CC8yFPCS registers.\n\n
1349 * CC8 slice is configured with Capture configurations in this routine. Timer is stopped before initialization
1350 * by calling XMC_CCU8_SLICE_StopTimer(). After initialization user has to explicitly enable the shadow transfer
1351 * for the required values by calling XMC_CCU8_EnableShadowTransfer() with appropriate mask.
1352 *
1353 * \par<b>Related APIs:</b><br>
1354 * XMC_CCU8_SLICE_Capture0Config()<BR> XMC_CCU8_SLICE_Capture1Config().
1355 */
1356 void XMC_CCU8_SLICE_CaptureInit(XMC_CCU8_SLICE_t *const slice,
1357 const XMC_CCU8_SLICE_CAPTURE_CONFIG_t *const capture_init);
1358
1359 /**
1360 * @param module Constant pointer to CCU8 module
1361 * @param slice_number Slice for which the clock should be Enabled.
1362 * Range: [0x0 to 0x3]
1363 * @return <BR>
1364 * None<BR>
1365 *
1366 * \par<b>Description:</b><br>
1367 * Enables the slice timer clock, by configuring GIDLC.CS0I, GIDLC.CS1I, GIDLC.CS2I,
1368 * GIDLC.CS3I bits according to the selected \a slice_number.\n\n
1369 * It is possible to enable/disable clock at slice level. This uses the \b slice_number to indicate the
1370 * slice whose clock needs to be enabled. Directly accessed register is GIDLC.
1371 *
1372 * \par<b>Related APIs:</b><br>
1373 * XMC_CCU8_DisableClock()<BR> XMC_CCU8_EnableMultipleClocks()<BR> XMC_CCU8_StartPrescaler()<BR> XMC_CCU8_StopPrescaler().
1374 */
XMC_CCU8_EnableClock(XMC_CCU8_MODULE_t * const module,const uint8_t slice_number)1375 __STATIC_INLINE void XMC_CCU8_EnableClock(XMC_CCU8_MODULE_t *const module, const uint8_t slice_number)
1376 {
1377 XMC_ASSERT("XMC_CCU8_EnableClock:Invalid Module Pointer", XMC_CCU8_IsValidModule(module));
1378 XMC_ASSERT("XMC_CCU8_EnableClock:Invalid Slice Number", (slice_number < 4U));
1379
1380 module->GIDLC = ((uint32_t) 1 << slice_number);
1381 }
1382
1383 /**
1384 * @param module Constant pointer to CCU8 module
1385 * @param slice_number Slice for which the clock should be disabled.
1386 * Range: [0x0 to 0x3]
1387 * @return <BR>
1388 * None<BR>
1389 *
1390 * \par<b>Description:</b><br>
1391 * Disables the slice timer clock, by configuring GIDLS.SS0I, GIDLS.SSS1I, GIDLS.SSS2I,
1392 * GIDLS.SSS3I bits according to the selected \a slice_number .\n\n
1393 * It is possible to disable clock at slice level using the module pointer.
1394 * \b slice_number is used to disable the clock to a given slice of the module.
1395 *
1396 * \par<b>Related APIs:</b><br>
1397 * XMC_CCU8_EnableClock()<BR> XMC_CCU8_EnableMultipleClocks()<BR> XMC_CCU8_StartPrescaler()<BR> XMC_CCU8_StopPrescaler().
1398 */
XMC_CCU8_DisableClock(XMC_CCU8_MODULE_t * const module,const uint8_t slice_number)1399 __STATIC_INLINE void XMC_CCU8_DisableClock(XMC_CCU8_MODULE_t *const module, const uint8_t slice_number)
1400 {
1401 XMC_ASSERT("XMC_CCU8_DisableClock:Invalid Module Pointer", XMC_CCU8_IsValidModule(module));
1402 XMC_ASSERT("XMC_CCU8_DisableClock:Invalid Slice Number", (slice_number < 4U));
1403
1404 module->GIDLS = ((uint32_t) 1 << slice_number);
1405 }
1406
1407 /**
1408 * @param module Constant pointer to CCU8 module
1409 * @param slice_number Slice for which the clock should be disabled.
1410 * Range: [0x0 to 0x3]
1411 * @param output Slice output.
1412 * @return <BR>
1413 * None<BR>
1414 *
1415 * \par<b>Description:</b><br>
1416 * Enables slice outputs to be used to perform the parity check.
1417 *
1418 * \par<b>Related APIs:</b><br>
1419 * XMC_CCU8_StartParityChecker()<BR> XMC_CCU8_SLICE_ParityCheckerDisableSliceOutput()<BR>
1420 */
XMC_CCU8_SLICE_ParityCheckerEnableSliceOutput(XMC_CCU8_MODULE_t * const module,const uint8_t slice_number,XMC_CCU8_SLICE_OUTPUT_t output)1421 __STATIC_INLINE void XMC_CCU8_SLICE_ParityCheckerEnableSliceOutput(XMC_CCU8_MODULE_t *const module, const uint8_t slice_number, XMC_CCU8_SLICE_OUTPUT_t output)
1422 {
1423 XMC_ASSERT("XMC_CCU8_SLICE_ParityCheckerEnableSliceOutput:Invalid Module Pointer", XMC_CCU8_IsValidModule(module));
1424 XMC_ASSERT("XMC_CCU8_SLICE_ParityCheckerEnableSliceOutput:Invalid Slice Number", (slice_number < 4U));
1425
1426 module->GPCHK |= (uint32_t)(((output & (1 << slice_number)) << CCU8_GPCHK_PCSEL0_Pos) |
1427 ((output & (2 << slice_number)) << CCU8_GPCHK_PCSEL1_Pos) |
1428 ((output & (4 << slice_number)) << CCU8_GPCHK_PCSEL2_Pos) |
1429 ((output & (8 << slice_number)) << CCU8_GPCHK_PCSEL3_Pos));
1430 }
1431
1432 /**
1433 * @param module Constant pointer to CCU8 module
1434 * @param slice_number Slice for which the clock should be disabled.
1435 * Range: [0x0 to 0x3]
1436 * @param output Slice output ::XMC_CCU8_SLICE_OUTPUT_t.
1437 * @return <BR>
1438 * None<BR>
1439 *
1440 * \par<b>Description:</b><br>
1441 * Enables slice outputs to be used to perform the parity check.
1442 *
1443 * \par<b>Related APIs:</b><br>
1444 * XMC_CCU8_StartParityChecker()<BR> XMC_CCU8_SLICE_ParityCheckerEnableSliceOutput()<BR>
1445 */
XMC_CCU8_SLICE_ParityCheckerDisableSliceOutput(XMC_CCU8_MODULE_t * const module,const uint8_t slice_number,XMC_CCU8_SLICE_OUTPUT_t output)1446 __STATIC_INLINE void XMC_CCU8_SLICE_ParityCheckerDisableSliceOutput(XMC_CCU8_MODULE_t *const module, const uint8_t slice_number, XMC_CCU8_SLICE_OUTPUT_t output)
1447 {
1448 XMC_ASSERT("XMC_CCU8_SLICE_ParityCheckerEnableSliceOutput:Invalid Module Pointer", XMC_CCU8_IsValidModule(module));
1449 XMC_ASSERT("XMC_CCU8_SLICE_ParityCheckerDisableSliceOutput:Invalid Slice Number", (slice_number < 4U));
1450
1451 module->GPCHK &= (uint32_t)~(((output & (1 << slice_number)) << CCU8_GPCHK_PCSEL0_Pos) |
1452 ((output & (2 << slice_number)) << CCU8_GPCHK_PCSEL1_Pos) |
1453 ((output & (4 << slice_number)) << CCU8_GPCHK_PCSEL2_Pos) |
1454 ((output & (8 << slice_number)) << CCU8_GPCHK_PCSEL3_Pos));
1455 }
1456
1457 /**
1458 * @param module Constant pointer to CCU8 module
1459 * @param input signal controlling the delay between the change at the CCU8 outputs and effective change at the driver parity output ::XMC_CCU8_PARITY_CHECKER_DELAY_INPUT_t.
1460 * @return <BR>
1461 * None<BR>
1462 *
1463 * \par<b>Description:</b><br>
1464 * Selects which signal is controlling the delay between the change at the CCU8 outputs and effective change at the driver parity output
1465 *
1466 * \par<b>Related APIs:</b><br>
1467 * XMC_CCU8_StartParityChecker()<BR>
1468 */
XMC_CCU8_SLICE_ParityCheckerSetDelayInput(XMC_CCU8_MODULE_t * const module,const XMC_CCU8_PARITY_CHECKER_DELAY_INPUT_t input)1469 __STATIC_INLINE void XMC_CCU8_SLICE_ParityCheckerSetDelayInput(XMC_CCU8_MODULE_t *const module, const XMC_CCU8_PARITY_CHECKER_DELAY_INPUT_t input)
1470 {
1471 XMC_ASSERT("XMC_CCU8_SLICE_ParityCheckerSetDelayInput:Invalid Module Pointer", XMC_CCU8_IsValidModule(module));
1472 module->GPCHK = (module->GPCHK & (uint32_t)~CCU8_GPCHK_PCDS_Msk) | input;
1473 }
1474
1475 /**
1476 * @param module Constant pointer to CCU8 module
1477 * @param input signal contains the driver parity information ::XMC_CCU8_PARITY_CHECKER_DRIVER_INPUT_t.
1478 * @return <BR>
1479 * None<BR>
1480 *
1481 * \par<b>Description:</b><br>
1482 * Selects which signal contains the driver parity information.
1483 * The signal must be selected throughout the input selector mux of each slice. The signal must be mapped to the Event 1 of a slice using XMC_CCU8_SLICE_SetInput()
1484 *
1485 * \par<b>Related APIs:</b><br>
1486 * XMC_CCU8_StartParityChecker(), XMC_CCU8_SLICE_SetInput()<BR>.
1487 */
XMC_CCU8_SLICE_ParityCheckerSetDriverInput(XMC_CCU8_MODULE_t * const module,const XMC_CCU8_PARITY_CHECKER_DRIVER_INPUT_t input)1488 __STATIC_INLINE void XMC_CCU8_SLICE_ParityCheckerSetDriverInput(XMC_CCU8_MODULE_t *const module, const XMC_CCU8_PARITY_CHECKER_DRIVER_INPUT_t input)
1489 {
1490 XMC_ASSERT("XMC_CCU8_SLICE_ParityCheckerSetDelayInput:Invalid Module Pointer", XMC_CCU8_IsValidModule(module));
1491 module->GPCHK = (module->GPCHK & (uint32_t)~CCU8_GPCHK_PISEL_Msk) | input;
1492 }
1493
1494 /**
1495 * @param module Constant pointer to CCU8 module
1496 * @param type odd or even parity ::XMC_CCU8_PARITY_CHECKER_TYPE_t.
1497 * @return <BR>
1498 * None<BR>
1499 *
1500 * \par<b>Description:</b><br>
1501 * Selects if we have an odd or even parity.
1502 *
1503 * \par<b>Related APIs:</b><br>
1504 * XMC_CCU8_StartParityChecker()<BR>.
1505 */
XMC_CCU8_SLICE_ParityCheckerSetType(XMC_CCU8_MODULE_t * const module,const XMC_CCU8_PARITY_CHECKER_TYPE_t type)1506 __STATIC_INLINE void XMC_CCU8_SLICE_ParityCheckerSetType(XMC_CCU8_MODULE_t *const module, const XMC_CCU8_PARITY_CHECKER_TYPE_t type)
1507 {
1508 XMC_ASSERT("XMC_CCU8_SLICE_ParityCheckerSetDelayInput:Invalid Module Pointer", XMC_CCU8_IsValidModule(module));
1509 module->GPCHK = (module->GPCHK & (uint32_t)~CCU8_GPCHK_PCTS_Msk) | type;
1510 }
1511
1512
1513 /**
1514 * @param module Constant pointer to CCU8 module
1515 * @return status of parity checker. If >0 then an error is dectected
1516 *
1517 * \par<b>Description:</b><br>
1518 * Returns current value of the XOR chain.
1519 *
1520 * \par<b>Related APIs:</b><br>
1521 * XMC_CCU8_StartParityChecker()<BR>
1522 */
XMC_CCU8_SLICE_ParityCheckerGetStatus(XMC_CCU8_MODULE_t * const module)1523 __STATIC_INLINE uint32_t XMC_CCU8_SLICE_ParityCheckerGetStatus(XMC_CCU8_MODULE_t *const module)
1524 {
1525 XMC_ASSERT("XMC_CCU8_SLICE_ParityCheckerSetDelayInput:Invalid Module Pointer", XMC_CCU8_IsValidModule(module));
1526 return (module->GPCHK & CCU8_GPCHK_PCST_Msk);
1527 }
1528
1529 /**
1530 * @param slice Constant pointer to CC8 Slice
1531 * @param out_path_msk configuration for output path selection.
1532 * combination of XMC_CCU8_OUT_PATH_t enum items can be used to create a mask.
1533 *
1534 * @return <BR>
1535 * None<BR>
1536 *
1537 * \par<b>Description:</b><br>
1538 * Configure the out the path of the two compare channels with specified ST signal, by configuring the
1539 ^ CC8yCHC register.\n\n
1540 *
1541 * For the two compare channels it is possible to select either direct ST signal or inverted ST signal.
1542 * \b out_path_msk is used to set the required out put path.
1543 *
1544 * \par<b>Related APIs:</b><br>
1545 * None
1546 */
1547 void XMC_CCU8_SLICE_SetOutPath(XMC_CCU8_SLICE_t *const slice, const uint32_t out_path_msk);
1548
1549 /**
1550 * @param slice Constant pointer to CC8 Slice
1551 * @param event Map an External event to the External Start Function
1552 * @param start_mode Behaviour of slice when the start function is activated
1553 * @return <BR>
1554 * None<BR>
1555 *
1556 * \par<b>Description:</b><br>
1557 * Configures the Start Function of the slice, by configuring CC8yCMC.ENDS and CC8yTC.ENDM bits.\n\n
1558 * Start function is mapped with one of the 3 events. An external signal can control when a CC8 timer should start.
1559 * Additionally, the behaviour of the slice upon activation of the start function is configured as well.
1560 *
1561 * \par<b>Related APIs:</b><br>
1562 * XMC_CCU8_SLICE_StopConfig()<BR> XMC_CCU8_SLICE_ConfigureEvent()<BR> XMC_CCU8_SLICE_SetInput().
1563 */
1564 void XMC_CCU8_SLICE_StartConfig(XMC_CCU8_SLICE_t *const slice,
1565 const XMC_CCU8_SLICE_EVENT_t event,
1566 const XMC_CCU8_SLICE_START_MODE_t start_mode);
1567
1568 /**
1569 * @param slice Constant pointer to CC8 Slice
1570 * @param event Map an External event to the External Stop Function
1571 * @param end_mode Behaviour of slice when the stop function is activated
1572 * @return <BR>
1573 * None<BR>
1574 *
1575 * \par<b>Description:</b><br>
1576 * Configures the Stop function for the slice, by configuring CC8yCMC.STRTS and CC8yTC.STRM bits.\n\n
1577 * Stop function is mapped with one of the 3 events. An external signal can control when a CCU8 timer should stop.
1578 * Additionally, the behaviour of the slice upon activation of the stop function is configured as well.
1579 *
1580 * \par<b>Related APIs:</b><br>
1581 * XMC_CCU8_SLICE_StartConfig()<BR> XMC_CCU8_SLICE_ConfigureEvent()<BR> XMC_CCU8_SLICE_SetInput().
1582 */
1583 void XMC_CCU8_SLICE_StopConfig(XMC_CCU8_SLICE_t *const slice,
1584 const XMC_CCU8_SLICE_EVENT_t event,
1585 const XMC_CCU8_SLICE_END_MODE_t end_mode);
1586
1587 /**
1588 * @param slice Constant pointer to CC8 Slice
1589 * @param event Map an External event to the External load Function
1590 * @return <BR>
1591 * None<BR>
1592 *
1593 * \par<b>Description:</b><br>
1594 * Configures the Load Function for the slice, by configuring CC8yCMC.LDS bit.\n\n
1595 * Load function is mapped with one of the 3 events. Up on occurrence of the event,\n
1596 * if CC8yTCST.CDIR set to 0,CC8yTIMER register is reloaded with the value from compare channel 1 or
1597 * compare channel 2\n
1598 * if CC8yTCST.CDIR set to 1,CC8yTIMER register is reloaded with the value from period register\n
1599 *
1600 *
1601 * \par<b>Related APIs:</b><br>
1602 * XMC_CCU8_SLICE_ConfigureEvent()<BR> XMC_CCU8_SLICE_SetInput().
1603 */
1604 void XMC_CCU8_SLICE_LoadConfig(XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event);
1605
1606 /**
1607 * @param slice Constant pointer to CC8 Slice
1608 * @param ch_num Select which compare channel value has to be loaded to the Timer register during external load event.
1609 * @return <BR>
1610 * None<BR>
1611 *
1612 * \par<b>Description:</b><br>
1613 * Up on occurrence of the external load event, if CC8yTCST.CDIR set to 0, CC8yTIMER register can be reloaded\n
1614 * with the value from compare channel 1 or compare channel 2\n
1615 * If CC8yTC.TLS is 0, compare channel 1 value is loaded to the CC8yTIMER register\n
1616 * If CC8yTC.TLS is 1, compare channel 2 value is loaded to the CC8yTIMER register\n
1617 *
1618 * \par<b>Related APIs:</b><br>
1619 * XMC_CCU8_SLICE_ConfigureEvent()<BR> XMC_CCU8_SLICE_SetInput().
1620 */
1621 void XMC_CCU8_SLICE_LoadSelector(XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_COMPARE_CHANNEL_t ch_num);
1622
1623 /**
1624 * @param slice Constant pointer to CC8 Slice
1625 * @param event Map an External event to the External Modulation Function
1626 * @param mod_mode Desired Modulation mode
1627 * @param channel Specify the channel(s) on which the modulation should be applied.
1628 * @param synch_with_pwm Option to synchronize modulation with PWM start
1629 * Pass \b true if the modulation needs to be synchronized with PWM signal.
1630 * @return <BR>
1631 * None<BR>
1632 *
1633 * \par<b>Description:</b><br>
1634 * Configures the Output Modulation Function of the slice, by configuring CC8yCMC.MOS, CC8yTC.EMT and
1635 * CC8yTC.EMS bits.\n\n
1636 * Modulation function is mapped with one of the 3 events. The output signal of the CCU can
1637 * be modulated according to a external input. Additionally, the behaviour of the slice upon activation
1638 * of the modulation function is configured as well.
1639 *
1640 * \par<b>Related APIs:</b><br>
1641 * XMC_CCU8_SLICE_ConfigureEvent()<BR> XMC_CCU8_SLICE_SetInput().
1642 */
1643 void XMC_CCU8_SLICE_ModulationConfig(XMC_CCU8_SLICE_t *const slice,
1644 const XMC_CCU8_SLICE_EVENT_t event,
1645 const XMC_CCU8_SLICE_MODULATION_MODE_t mod_mode,
1646 const XMC_CCU8_SLICE_MODULATION_CHANNEL_t channel,
1647 const bool synch_with_pwm
1648 );
1649
1650 /**
1651 * @param slice Constant pointer to CC8 Slice
1652 * @param event Map an External event to the External Count Function
1653 * @return <BR>
1654 * None<BR>
1655 *
1656 * \par<b>Description:</b><br>
1657 * Configures the Count Function of the slice, by configuring CC8yCMC.CNTS bit.\n\n
1658 * Count function is mapped with one of the 3 events. CCU8 slice can take an external
1659 * signal to act as the counting event. The CCU8 slice would count the
1660 * edges present on the \b event selected.
1661 *
1662 * \par<b>Related APIs:</b><br>
1663 * XMC_CCU8_SLICE_ConfigureEvent()<BR> XMC_CCU8_SLICE_SetInput().
1664 */
1665 void XMC_CCU8_SLICE_CountConfig(XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event);
1666
1667 /**
1668 * @param slice Constant pointer to CC8 Slice
1669 * @param event Map an External event to the External Gating Function
1670 * @return <BR>
1671 * None<BR>
1672 *
1673 * \par<b>Description:</b><br>
1674 * Configures the Gating Function of the slice, by configuring CC8yCMC.GATES bit.\n\n
1675 * Gating function is mapped with one of the 3 events. A CCU8 slice can use an input signal that would
1676 * operate as counter gating. If the configured Active level is detected the counter will gate all the pulses.
1677 *
1678 * \par<b>Related APIs:</b><br>
1679 * XMC_CCU8_SLICE_ConfigureEvent()<BR> XMC_CCU8_SLICE_SetInput().
1680 */
1681 void XMC_CCU8_SLICE_GateConfig(XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event);
1682
1683 /**
1684 * @param slice Constant pointer to CC8 Slice
1685 * @param event Map an External event to the Capture-0 Function
1686 * @return <BR>
1687 * None<BR>
1688 *
1689 * \par<b>Description:</b><br>
1690 * Configures the Capture-0 Function of the slice, by configuring CC8yCMC.CAP0S bit.\n\n
1691 * Capture function is mapped with one of the 3 events. A CCU8 slice can be configured into capture-0 mode
1692 * with the selected \b event. In this mode the CCU8 will capture the timer value into CC8yC0V and CC8yC1V.
1693 *
1694 * \par<b>Related APIs:</b><br>
1695 * XMC_CCU8_SLICE_ConfigureEvent()<BR> XMC_CCU8_SLICE_SetInput().
1696 */
1697 void XMC_CCU8_SLICE_Capture0Config(XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event);
1698
1699 /**
1700 * @param slice Constant pointer to CC8 Slice
1701 * @param event Map an External event to the Capture-1 Function
1702 * @return <BR>
1703 * None<BR>
1704 *
1705 * \par<b>Description:</b><br>
1706 * Configures the Capture-1 Function of the slice, by configuring CC8yCMC.CAP1S bit.\n\n
1707 * Capture function is mapped with one of the 3 events. A CCU8 slice can be configured into capture-1
1708 * mode with the selected \b event. In this mode the CCU8 will capture the timer value into CC8yC2V and CC8yC3V.
1709 *
1710 * \par<b>Related APIs:</b><br>
1711 * XMC_CCU8_SLICE_ConfigureEvent()<BR> XMC_CCU8_SLICE_SetInput().
1712 */
1713 void XMC_CCU8_SLICE_Capture1Config(XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event);
1714
1715 /**
1716 * @param slice Constant pointer to CC8 Slice
1717 * @return <BR>
1718 * bool would return true if the extended capture read back mode is enabled<BR>
1719 *
1720 * \par<b>Description:</b><br>
1721 * Checks if Extended capture mode read is enabled for particular slice or not, by reading CC8yTC.ECM bit.\n\n
1722 * In this mode the there is only one associated read address for all the capture registers.
1723 * Individual capture registers can still be accessed in this mode.
1724 *
1725 * \par<b>Related APIs:</b><br>
1726 * XMC_CCU8_GetCapturedValueFromFifo().
1727 */
XMC_CCU8_SLICE_IsExtendedCapReadEnabled(const XMC_CCU8_SLICE_t * const slice)1728 __STATIC_INLINE bool XMC_CCU8_SLICE_IsExtendedCapReadEnabled(const XMC_CCU8_SLICE_t *const slice)
1729 {
1730 XMC_ASSERT("XMC_CCU8_IsPrescalerRunning:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
1731 return((bool)((slice->TC & (uint32_t) CCU8_CC8_TC_ECM_Msk) == (uint32_t)CCU8_CC8_TC_ECM_Msk));
1732 }
1733
1734 #if defined(CCU8V1) /* Defined for XMC4800, XMC4700, XMC4500, XMC4400, XMC4200, XMC4100 devices only */
1735 /**
1736 * @param module Constant pointer to CCU8 module
1737 * @param slice_number to check whether read value belongs to required slice or not
1738 * @return <BR>
1739 * int32_t Returns -1 if the FIFO value being retrieved is not from the \b slice_number.
1740 * Returns the value captured in the \b slice_number, if captured value is from the correct slice.
1741 * Range: [0x0 to 0xFFFF]
1742 *
1743 * \par<b>Description:</b><br>
1744 * Read captured value from FIFO(ECRD register).\n\n
1745 * This is applicable only in the Capture mode of operation. The signal whose timing characteristics are to be measured
1746 * must be mapped to an event which in turn must be mapped to the capture function. Based on the capture criteria, the
1747 * instant timer values are captured into capture registers. Timing characteristics of the input signal may then be
1748 * derived/inferred from the captured values.
1749 *
1750 * \par<b>Related APIs:</b><br>
1751 * XMC_CCU8_SLICE_IsExtendedCapReadEnabled().
1752 */
1753 int32_t XMC_CCU8_GetCapturedValueFromFifo(const XMC_CCU8_MODULE_t *const module, const uint8_t slice_number);
1754 #else
1755 /**
1756 * @param slice Constant pointer to CC8 Slice
1757 * @param set The capture register set from which the captured value is to be retrieved
1758 * @return <BR>
1759 * uint32_t Returns the value captured in the \b slice_number
1760 * Range: [0x0 to 0xFFFF]
1761 *
1762 * \par<b>Description:</b><br>
1763 * Read captured value from FIFO(CC8yECRD0 and CC8yECRD1).\n\n
1764 * This is applicable only in the Capture mode of operation. The signal whose timing characteristics are to be measured
1765 * must be mapped to an event which in turn must be mapped to the capture function. Based on the capture criteria, the
1766 * instant timer values are captured into capture registers. Timing characteristics of the input signal may then be
1767 * derived/inferred from the captured values.
1768 *
1769 * \par<b>Related APIs:</b><br>
1770 * XMC_CCU8_SLICE_IsExtendedCapReadEnabled().
1771 * @note Defined for XMC4800, XMC4700, XMC4500, XMC4400, XMC4200, XMC4100 devices only. For other devices use XMC_CCU8_GetCapturedValueFromFifo() API
1772 */
1773 uint32_t XMC_CCU8_SLICE_GetCapturedValueFromFifo(const XMC_CCU8_SLICE_t *const slice,
1774 const XMC_CCU8_SLICE_CAP_REG_SET_t set);
1775 #endif
1776
1777 /**
1778 * @param slice Constant pointer to CC8 Slice
1779 * @param event Map an External event to the External Count Direction Function
1780 * @return <BR>
1781 * None<BR>
1782 *
1783 * \par<b>Description:</b><br>
1784 * Configures the Count Direction of the slice, by configuring CC8yCMC.UDS bit.\n\n
1785 * Count direction function is mapped with one of the 3 events. A slice can be configured to change the
1786 * CC8yTIMER count direction depending on an external signal.
1787 *
1788 * \par<b>Related APIs:</b><br>
1789 * XMC_CCU8_SLICE_ConfigureEvent()<BR> XMC_CCU8_SLICE_SetInput().
1790 */
1791 void XMC_CCU8_SLICE_DirectionConfig(XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_EVENT_t event);
1792
1793 /**
1794 * @param slice Constant pointer to CC8 Slice
1795 * @return <BR>
1796 * None<BR>
1797 *
1798 * \par<b>Description:</b><br>
1799 * Configures the status bit override Function of the slice, by configuring CC8yCMC.OFS bit.\n\n
1800 * Status bit override function is mapped with one of the 3 events. A slice can be configured to change the
1801 * output of the timer's CC8yST1 signal depending on an external signal.
1802 *
1803 * \par<b>Related APIs:</b><br>
1804 * XMC_CCU8_SLICE_ConfigureStatusBitOverrideEvent().
1805 */
1806 void XMC_CCU8_SLICE_StatusBitOverrideConfig(XMC_CCU8_SLICE_t *const slice);
1807
1808 /**
1809 * @param slice Constant pointer to CC8 Slice
1810 * @param exit_mode How should a previously logged trap state be exited?
1811 * @param synch_with_pwm Should exit of trap state be synchronized with PWM cycle start?
1812 * @return <BR>
1813 * None<BR>
1814 *
1815 *
1816 * \par<b>Description:</b><br>
1817 * Configures the Trap Function of the slice, by configuring CC8yCMC.TS, CC8yTC.TRPSE, and CC8yTC.TRPSW bits.\n\n
1818 * Trap function is mapped with Event-2. Criteria for exiting the trap state is configured.
1819 * This trap function allows PWM outputs to react on the state of an input pin.
1820 * Thus PWM output can be forced to inactive state upon detection of a trap.
1821 * It is also possible to synchronize the trap function with the PWM signal using the \b synch_with_pwm.
1822 *
1823 * \par<b>Related APIs:</b><br>
1824 * XMC_CCU8_SLICE_ConfigureEvent()<BR> XMC_CCU8_SLICE_SetInput().
1825 */
1826 void XMC_CCU8_SLICE_TrapConfig(XMC_CCU8_SLICE_t *const slice,
1827 const XMC_CCU8_SLICE_TRAP_EXIT_MODE_t exit_mode,
1828 bool synch_with_pwm);
1829
1830 /**
1831 * @param slice Constant pointer to CC8 Slice
1832 * @param ev1_config Pointer to event 1 configuration data
1833 * @param ev2_config Pointer to event 2 configuration data
1834 * @return <BR>
1835 * None<BR>
1836 *
1837 *
1838 * \par<b>Description:</b><br>
1839 * Map Status bit override function with an Event1 & Event 2 of the slice and configure CC8yINS register.\n\n
1840 * Details such as the input mapped to the event, event detection criteria and Low Pass filter options are programmed
1841 * by this routine for the events 1 & 2. Event-1 input would be the trigger to override the value.
1842 * Event-2 input would be the override value.
1843 *
1844 * \par<b>Related APIs:</b><br>
1845 * XMC_CCU8_SLICE_StatusBitOverrideConfig().
1846 */
1847 void XMC_CCU8_SLICE_ConfigureStatusBitOverrideEvent(XMC_CCU8_SLICE_t *const slice,
1848 const XMC_CCU8_SLICE_EVENT_CONFIG_t *const ev1_config,
1849 const XMC_CCU8_SLICE_EVENT_CONFIG_t *const ev2_config);
1850
1851 /**
1852 * @param slice Constant pointer to CC8 Slice
1853 * @param event The External Event which needs to be configured.
1854 * @param config Pointer to event configuration data.
1855 * @return <BR>
1856 * None<BR>
1857 *
1858 * \par<b>Description:</b><br>
1859 * Configures an External Event of the slice, by updating CC8yINS register .\n\n
1860 * Details such as the input mapped to the event, event detection criteria and low pass filter
1861 * options are programmed by this routine. The Event \b config will configure the input selection,
1862 * the edge selection, the level selection and the Low pass filter for the event.
1863 *
1864 * \par<b>Related APIs:</b><br>
1865 * XMC_CCU8_SLICE_StartConfig()<BR> XMC_CCU8_SLICE_StopConfig()<BR> XMC_CCU8_SLICE_LoadConfig()<BR>
1866 * XMC_CCU8_SLICE_ModulationConfig()<BR> XMC_CCU8_SLICE_CountConfig()<BR> XMC_CCU8_SLICE_GateConfig()<BR>
1867 * XMC_CCU8_SLICE_Capture0Config()<BR> XMC_CCU8_SLICE_Capture1Config()<BR> XMC_CCU8_SLICE_DirectionConfig()<BR>
1868 * XMC_CCU8_SLICE_StatusBitOverrideConfig()<BR> XMC_CCU8_SLICE_TrapConfig().
1869 */
1870 void XMC_CCU8_SLICE_ConfigureEvent(XMC_CCU8_SLICE_t *const slice,
1871 const XMC_CCU8_SLICE_EVENT_t event,
1872 const XMC_CCU8_SLICE_EVENT_CONFIG_t *config);
1873
1874 /**
1875 * @param slice Constant pointer to CC8 Slice
1876 * @param event The External Event which needs to be configured.
1877 * @param input One of the 16 inputs meant to be mapped to the desired event
1878 * @return <BR>
1879 * None<BR>
1880 *
1881 *
1882 * \par<b>Description:</b><br>
1883 * Selects an input for an external event, by configuring CC8yINS register.\n\n
1884 * It is possible to select one of the possible 16 input signals for a given Event.
1885 * This configures the CC8yINS.EVxIS for the selected event.
1886 *
1887 * \par<b>Related APIs:</b><br>
1888 * XMC_CCU8_SLICE_StartConfig()<BR> XMC_CCU8_SLICE_StopConfig()<BR> XMC_CCU8_SLICE_LoadConfig()<BR>
1889 * XMC_CCU8_SLICE_ModulationConfig()<BR> XMC_CCU8_SLICE_CountConfig()<BR> XMC_CCU8_SLICE_GateConfig()<BR>
1890 * XMC_CCU8_SLICE_Capture0Config()<BR> XMC_CCU8_SLICE_Capture1Config()<BR> XMC_CCU8_SLICE_DirectionConfig()<BR>
1891 * XMC_CCU8_SLICE_StatusBitOverrideConfig()<BR> XMC_CCU8_SLICE_TrapConfig().
1892 */
1893 void XMC_CCU8_SLICE_SetInput(XMC_CCU8_SLICE_t *const slice,
1894 const XMC_CCU8_SLICE_EVENT_t event,
1895 const XMC_CCU8_SLICE_INPUT_t input);
1896
1897 /**
1898 * @param slice Constant pointer to CC8 Slice
1899 * @param out_mask Output signals for which the Trap function needs to be activated.
1900 * Use ::XMC_CCU8_SLICE_OUTPUT_t enum items to create a mask of choice,
1901 * using a bit wise OR operation
1902 * Range: [0x1 to 0xF]
1903 * @return <BR>
1904 * None<BR>
1905 *
1906 * \par<b>Description:</b><br>
1907 * Enables the trap feature, by setting CC8yTC.TRAPE0, CC8yTC.TRAPE1, CC8yTC.TRAPE2 and CC8yTC.TRAPE3 bit based on the
1908 * \a out_mask.\n\n
1909 * A particularly useful feature where the PWM output can be forced inactive upon detection of a trap. The trap signal
1910 * can be the output of a sensing element which has just detected an abnormal electrical condition.
1911 *
1912 * \par<b>Related APIs:</b><br>
1913 * XMC_CCU8_SLICE_TrapConfig()<BR> XMC_CCU8_SLICE_DisableTrap()<BR> XMC_CCU8_SLICE_ConfigureEvent()<BR>
1914 * XMC_CCU8_SLICE_SetInput().
1915 */
XMC_CCU8_SLICE_EnableTrap(XMC_CCU8_SLICE_t * const slice,const uint32_t out_mask)1916 __STATIC_INLINE void XMC_CCU8_SLICE_EnableTrap(XMC_CCU8_SLICE_t *const slice, const uint32_t out_mask)
1917 {
1918 XMC_ASSERT("XMC_CCU8_SLICE_EnableTrap:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
1919 slice->TC |= (uint32_t)out_mask << CCU8_CC8_TC_TRAPE0_Pos;
1920 }
1921
1922 /**
1923 * @param slice Constant pointer to CC8 Slice
1924 * @param out_mask Output signals for which the Trap function needs to be deactivated.
1925 * Use ::XMC_CCU8_SLICE_OUTPUT_t enum items to create a mask of choice,
1926 * using a bit wise OR operation.
1927 * Range: [0x1 to 0xF]
1928 * @return <BR>
1929 * None<BR>
1930 *
1931 * \par<b>Description:</b><br>
1932 * Disables the trap feature, by clearing CC8yTC.TRAPE0, CC8yTC.TRAPE1, CC8yTC.TRAPE2 and CC8yTC.TRAPE3 bit based on the
1933 * \a out_mask.\n\n.\n\n
1934 * This API will revert the changes done by XMC_CCU8_SLICE_EnableTrap().
1935 * This Ensures that the TRAP function has no effect on the output of the CCU8 slice.
1936 *
1937 * \par<b>Related APIs:</b><br>
1938 * XMC_CCU8_SLICE_EnableTrap().
1939 */
XMC_CCU8_SLICE_DisableTrap(XMC_CCU8_SLICE_t * const slice,const uint32_t out_mask)1940 __STATIC_INLINE void XMC_CCU8_SLICE_DisableTrap(XMC_CCU8_SLICE_t *const slice, const uint32_t out_mask)
1941 {
1942 XMC_ASSERT("XMC_CCU8_SLICE_DisableTrap:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
1943
1944 slice->TC &= ~((uint32_t)out_mask << CCU8_CC8_TC_TRAPE0_Pos);
1945 }
1946
1947 /**
1948 * @param slice Constant pointer to CC8 Slice
1949 * @return <BR>
1950 * bool returns \b true if the Timer is running else it returns \b false.
1951 *
1952 * \par<b>Description:</b><br>
1953 * Returns the state of the timer (Either Running or stopped(idle)), by reading CC8yTCST.TRB bit.
1954 *
1955 * \par<b>Related APIs:</b><br>
1956 * XMC_CCU8_SLICE_StartTimer()<BR> XMC_CCU8_SLICE_StopTimer().
1957 */
XMC_CCU8_SLICE_IsTimerRunning(const XMC_CCU8_SLICE_t * const slice)1958 __STATIC_INLINE bool XMC_CCU8_SLICE_IsTimerRunning(const XMC_CCU8_SLICE_t *const slice)
1959 {
1960 XMC_ASSERT("XMC_CCU8_SLICE_GetTimerStatus:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
1961 return(bool)(((slice->TCST) & CCU8_CC8_TCST_TRB_Msk) == (uint32_t)CCU8_CC8_TCST_TRB_Msk);
1962 }
1963
1964 /**
1965 * @param slice Pointer to an instance of CC8 slice
1966 * @return <BR>
1967 * bool returns \b true if the dead time counter of Compare channel-1 is running else it returns \b false.
1968 *
1969 * \par<b>Description:</b><br>
1970 * Returns the state of the Dead time counter 1 (Either Running or stopped(idle)), by reading CC8yTCST.DTR1 bit.
1971 * This returns the state of the dead time counter which is linked to Compare channel-1.
1972 *
1973 * \par<b>Related APIs:</b><br>
1974 * XMC_CCU8_SLICE_IsDeadTimeCntr2Running().
1975 */
XMC_CCU8_SLICE_IsDeadTimeCntr1Running(const XMC_CCU8_SLICE_t * const slice)1976 __STATIC_INLINE bool XMC_CCU8_SLICE_IsDeadTimeCntr1Running(const XMC_CCU8_SLICE_t *const slice)
1977 {
1978 XMC_ASSERT("XMC_CCU8_SLICE_IsDeadTimeCntr1Running:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
1979 return(bool)(((slice->TCST) & CCU8_CC8_TCST_DTR1_Msk) == (uint32_t)CCU8_CC8_TCST_DTR1_Msk);
1980 }
1981
1982 /**
1983 * @param slice Pointer to an instance of CC8 slice
1984 * @return <BR>
1985 * bool returns \b true if the dead time counter of Compare channel-2 is running else it returns \b false.
1986 *
1987 * \par<b>Description:</b><br>
1988 * Returns the state of the Dead time counter 2 (Either Running or stopped(idle)), by reading CC8yTCST.DTR2 bit.
1989 * This returns the state of the dead time counter which is linked to Compare channel-2.
1990 *
1991 * \par<b>Related APIs:</b><br>
1992 * XMC_CCU8_SLICE_IsDeadTimeCntr1Running().
1993 */
XMC_CCU8_SLICE_IsDeadTimeCntr2Running(const XMC_CCU8_SLICE_t * const slice)1994 __STATIC_INLINE bool XMC_CCU8_SLICE_IsDeadTimeCntr2Running(const XMC_CCU8_SLICE_t *const slice)
1995 {
1996 XMC_ASSERT("XMC_CCU8_SLICE_IsDeadTimeCntr2Running:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
1997 return(bool)(((slice->TCST) & CCU8_CC8_TCST_DTR2_Msk) == (uint32_t)CCU8_CC8_TCST_DTR2_Msk);
1998 }
1999
2000 /**
2001 * @param slice Constant pointer to CC8 Slice
2002 * @return <BR>
2003 * ::XMC_CCU8_SLICE_TIMER_COUNT_DIR_t returns the direction in which the timer is counting.
2004 *
2005 * \par<b>Description:</b><br>
2006 * Returns the timer counting direction, by reading CC8yTCST.CDIR bit.\n\n
2007 * This API will return the direction in which the timer is currently
2008 * incrementing(XMC_CCU8_SLICE_TIMER_COUNT_DIR_UP) or decrementing (XMC_CCU8_SLICE_TIMER_COUNT_DIR_DOWN).
2009 *
2010 * \par<b>Related APIs:</b><br>
2011 * None.
2012 */
XMC_CCU8_SLICE_GetCountingDir(const XMC_CCU8_SLICE_t * const slice)2013 __STATIC_INLINE XMC_CCU8_SLICE_TIMER_COUNT_DIR_t XMC_CCU8_SLICE_GetCountingDir(const XMC_CCU8_SLICE_t *const slice)
2014 {
2015 XMC_ASSERT("XMC_CCU8_SLICE_GetCountingDir:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2016 return((XMC_CCU8_SLICE_TIMER_COUNT_DIR_t)(((slice->TCST) & CCU8_CC8_TCST_CDIR_Msk) >> CCU8_CC8_TCST_CDIR_Pos));
2017 }
2018 /**
2019 * @param slice Constant pointer to CC8 Slice
2020 * @return <BR>
2021 * None<BR>
2022 *
2023 * \par<b>Description:</b><br>
2024 * Starts the timer counting operation, by setting CC8yTCSET.TRBS bit.\n\n
2025 * It is necessary to have configured the CC8 slice before starting its timer.
2026 * Before the Timer is started ensure that the clock is provided to the slice.
2027 *
2028 * \par<b>Related APIs:</b><br>
2029 * XMC_CCU8_SLICE_StopTimer().
2030 */
XMC_CCU8_SLICE_StartTimer(XMC_CCU8_SLICE_t * const slice)2031 __STATIC_INLINE void XMC_CCU8_SLICE_StartTimer(XMC_CCU8_SLICE_t *const slice)
2032 {
2033 XMC_ASSERT("XMC_CCU8_SLICE_StartTimer:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2034 slice->TCSET = CCU8_CC8_TCSET_TRBS_Msk;
2035 }
2036
2037 /**
2038 * @param slice Constant pointer to CC8 Slice
2039 * @return <BR>
2040 * None<BR>
2041 *
2042 * \par<b>Description:</b><br>
2043 * Stops the Timer.\n\n
2044 * Timer counting operation can be stopped by invoking this API, by setting CC8yTCCLR.TRBC bit.
2045 *
2046 * \par<b>Related APIs:</b><br>
2047 * XMC_CCU8_SLICE_StartTimer().
2048 */
XMC_CCU8_SLICE_StopTimer(XMC_CCU8_SLICE_t * const slice)2049 __STATIC_INLINE void XMC_CCU8_SLICE_StopTimer(XMC_CCU8_SLICE_t *const slice)
2050 {
2051 XMC_ASSERT("XMC_CCU8_SLICE_StopTimer:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2052 slice->TCCLR = (uint32_t) CCU8_CC8_TCCLR_TRBC_Msk;
2053 }
2054
2055 /**
2056 * @param slice Constant pointer to CC8 Slice
2057 * @return <BR>
2058 * None<BR>
2059 *
2060 * \par<b>Description:</b><br>
2061 * Resets the timer count to zero, by setting CC8yTCCLR.TCC bit.\n\n
2062 * A timer which has been stopped can still retain the last counted value.
2063 * After invoking this API the timer value will be cleared.
2064 *
2065 * \par<b>Related APIs:</b><br>
2066 * XMC_CCU8_SLICE_StartTimer().
2067 */
XMC_CCU8_SLICE_ClearTimer(XMC_CCU8_SLICE_t * const slice)2068 __STATIC_INLINE void XMC_CCU8_SLICE_ClearTimer(XMC_CCU8_SLICE_t *const slice)
2069 {
2070 XMC_ASSERT("XMC_CCU8_SLICE_ClearTimer:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2071 slice->TCCLR = (uint32_t) CCU8_CC8_TCCLR_TCC_Msk;
2072 }
2073
2074 /**
2075 * @param slice Constant pointer to CC8 Slice
2076 * @return <BR>
2077 * None<BR>
2078 *
2079 * \par<b>Description:</b><br>
2080 * Stops and resets the timer count to zero, by setting CC8yTCCLR.TCC and CC8yTCCLR.TRBC bit.\n\n
2081 *
2082 * \par<b>Related APIs:</b><br>
2083 * XMC_CCU8_SLICE_StartTimer().
2084 */
XMC_CCU8_SLICE_StopClearTimer(XMC_CCU8_SLICE_t * const slice)2085 __STATIC_INLINE void XMC_CCU8_SLICE_StopClearTimer(XMC_CCU8_SLICE_t *const slice)
2086 {
2087 XMC_ASSERT("XMC_CCU8_SLICE_StopClearTimer:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2088 slice->TCCLR = CCU8_CC8_TCCLR_TRBC_Msk | CCU8_CC8_TCCLR_TCC_Msk;
2089 }
2090
2091 /**
2092 * @param slice Constant pointer to CC8 Slice
2093 * @return <BR>
2094 * ::XMC_CCU8_SLICE_MODE_t returns XMC_CCU8_SLICE_MODE_COMPARE if the slice is operating in compare mode
2095 * returns XMC_CCU8_SLICE_MODE_CAPTURE if the slice is operating in capture mode
2096 *
2097 * \par<b>Description:</b><br>
2098 * Retrieves the current mode of operation in the slice (either Capture mode or Compare mode), by reading
2099 * CC8yTC.CMOD bit.\n\n
2100 * Ensure that before invoking this API the CCU8 slice should be configured otherwise the output of this API is
2101 * invalid.
2102 *
2103 * \par<b>Related APIs:</b><br>
2104 * None.
2105 */
XMC_CCU8_SLICE_GetSliceMode(const XMC_CCU8_SLICE_t * const slice)2106 __STATIC_INLINE XMC_CCU8_SLICE_MODE_t XMC_CCU8_SLICE_GetSliceMode(const XMC_CCU8_SLICE_t *const slice)
2107 {
2108 XMC_ASSERT("XMC_CCU8_SLICE_GetSliceMode:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2109 return((XMC_CCU8_SLICE_MODE_t)(((slice->TC) & CCU8_CC8_TC_CMOD_Msk) >> CCU8_CC8_TC_CMOD_Pos));
2110 }
2111
2112 /**
2113 * @param slice Constant pointer to CC8 Slice
2114 * @param mode Desired repetition mode (Either single shot or Continuous)
2115 * @return <BR>
2116 * None<BR>
2117 *
2118 * \par<b>Description:</b><br>
2119 * Configures the Timer to either Single shot mode or continuous mode, by configuring CC8yTC.TSSM bit.\n\n
2120 * The timer will count up to the terminal count as specified in the period register and stops immediately if the repeat
2121 * mode has been set to single shot. In the continuous mode of operation, the timer starts counting all over again after
2122 * reaching the terminal count.
2123 *
2124 * \par<b>Related APIs:</b><br>
2125 * XMC_CCU8_SLICE_GetTimerRepeatMode().
2126 */
2127 void XMC_CCU8_SLICE_SetTimerRepeatMode(XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t mode);
2128
2129 /**
2130 * @param slice Constant pointer to CC8 Slice
2131 * @return <br>
2132 * ::XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t returns XMC_CCU8_SLICE_TIMER_REPEAT_MODE_REPEAT if continuous mode is selected
2133 * returns XMC_CCU8_SLICE_TIMER_REPEAT_MODE_SINGLE if single shot mode is selected
2134 *
2135 * \par<b>Description:</b><br>
2136 * Retrieves the Timer repeat mode, either Single shot mode or continuous mode, by reading CC8yTC.TSSM bit.\n\n
2137 * The timer will count upto the terminal count as specified in the period register and stops immediately if the repeat
2138 * mode has been set to single shot mode. In the continuous mode of operation, the timer starts counting
2139 * all over again after reaching the terminal count.
2140 *
2141 * \par<b>Related APIs:</b><br>
2142 * XMC_CCU8_SLICE_SetTimerRepeatMode().
2143 */
XMC_CCU8_SLICE_GetTimerRepeatMode(const XMC_CCU8_SLICE_t * const slice)2144 __STATIC_INLINE XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t XMC_CCU8_SLICE_GetTimerRepeatMode(
2145 const XMC_CCU8_SLICE_t *const slice)
2146 {
2147 XMC_ASSERT("XMC_CCU8_SLICE_GetTimerRepeatMode:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2148 return((XMC_CCU8_SLICE_TIMER_REPEAT_MODE_t)(((slice->TC) & CCU8_CC8_TC_TSSM_Msk) >> CCU8_CC8_TC_TSSM_Pos));
2149 }
2150 /**
2151 * @param slice Constant pointer to CC8 Slice
2152 * @param mode Desired counting mode (Either Edge Aligned or Center Aligned)
2153 * @return <BR>
2154 * None<BR>
2155 *
2156 * \par<b>Description:</b><br>
2157 * Configures the timer counting mode either Edge Aligned or Center Aligned, by configuring CC8yTC.TCM bit.\n\n
2158 * In the edge aligned mode, the timer counts from 0 to the terminal count. Once the timer count has reached a preset
2159 * compare value, the timer status output asserts itself. It will now deassert only after the timer count reaches the
2160 * terminal count.\n In the center aligned mode, the timer first counts from 0 to the terminal count and then back to 0.
2161 * During this upward and downward counting, the timer status output stays asserted as long as the timer value is
2162 * greater than the compare value.
2163 *
2164 * \par<b>Related APIs:</b><br>
2165 * XMC_CCU8_SLICE_GetTimerCountingMode().
2166 */
2167 void XMC_CCU8_SLICE_SetTimerCountingMode(XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_TIMER_COUNT_MODE_t mode);
2168
2169 /**
2170 * @param slice Constant pointer to CC8 Slice
2171 * @return <br>
2172 * ::XMC_CCU8_SLICE_TIMER_COUNT_MODE_t returns XMC_CCU8_SLICE_TIMER_COUNT_MODE_EA if edge aligned mode is selected
2173 * returns XMC_CCU8_SLICE_TIMER_COUNT_MODE_CA if center aligned mode is selected
2174 *
2175 * \par<b>Description:</b><br>
2176 * Retrieves timer counting mode either Edge aligned or Center Aligned, by reading CC8yTC.TCM bit.\n\n
2177 *
2178 * \par<b>Related APIs:</b><br>
2179 * XMC_CCU8_SLICE_SetTimerCountingMode().
2180 */
XMC_CCU8_SLICE_GetTimerCountingMode(const XMC_CCU8_SLICE_t * const slice)2181 __STATIC_INLINE XMC_CCU8_SLICE_TIMER_COUNT_MODE_t XMC_CCU8_SLICE_GetTimerCountingMode(
2182 const XMC_CCU8_SLICE_t *const slice)
2183 {
2184 XMC_ASSERT("XMC_CCU8_SLICE_GetTimerCountingMode:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2185 return((XMC_CCU8_SLICE_TIMER_COUNT_MODE_t)(((slice->TC) & CCU8_CC8_TC_TCM_Msk) >> CCU8_CC8_TC_TCM_Pos));
2186 }
2187 /**
2188 * @param slice Constant pointer to CC8 Slice
2189 * @param period_val Timer period value
2190 * Range: [0x0 to 0xFFFF]
2191 * @return <BR>
2192 * None<BR>
2193 *
2194 * \par<b>Description:</b><br>
2195 * Programs the timer period, by writing CC8yPRS register.\n\n
2196 * The frequency of counting/ PWM frequency is determined by this value. The period value is written to a shadow
2197 * register. Explicitly enable the shadow transfer for the the period value by calling
2198 * XMC_CCU8_EnableShadowTransfer() with appropriate mask. If shadow transfer is enabled and the timer is running,
2199 * a period match transfers the value from the shadow register to the actual period register.
2200 *
2201 * \par<b>Related APIs:</b><br>
2202 * XMC_CCU8_SLICE_GetTimerPeriodMatch().
2203 */
2204 void XMC_CCU8_SLICE_SetTimerPeriodMatch(XMC_CCU8_SLICE_t *const slice, const uint16_t period_val);
2205
2206 /**
2207 * @param slice Constant pointer to CC8 Slice
2208 * @return <BR>
2209 * uint16_t returns the current timer period value
2210 * Range: [0x0 to 0xFFFF]
2211 *
2212 * \par<b>Description:</b><br>
2213 * Retrieves the timer period value currently effective, by reading CC8yPR register.\n\n
2214 * If the timer is active then the value being returned is currently being used for the PWM period.
2215 *
2216 * \par<b>Note:</b><br>
2217 * The XMC_CCU8_SLICE_SetTimerPeriodMatch() would set the new period value to a shadow register.
2218 * This would only transfer the new values into the actual period register if the shadow transfer request
2219 * is enabled and if a period match occurs. Hence a consecutive call to XMC_CCU8_SLICE_GetTimerPeriodMatch()
2220 * would not reflect the new values until the shadow transfer completes.
2221 *
2222 * \par<b>Related APIs:</b><br>
2223 * XMC_CCU8_SLICE_SetTimerPeriodMatch().
2224 */
XMC_CCU8_SLICE_GetTimerPeriodMatch(const XMC_CCU8_SLICE_t * const slice)2225 __STATIC_INLINE uint16_t XMC_CCU8_SLICE_GetTimerPeriodMatch(const XMC_CCU8_SLICE_t *const slice)
2226 {
2227 XMC_ASSERT("XMC_CCU8_SLICE_GetTimerPeriodMatch:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2228 return((uint16_t) slice->PR);
2229 }
2230 /**
2231 * @param slice Constant pointer to CC8 Slice
2232 * @param channel Select the compare channel to which the \b compare_val has to programmed.
2233 * @param compare_val Timer compare value
2234 * @return <BR>
2235 * None<BR>
2236 *
2237 * \par<b>Description:</b><br>
2238 * Programs the timer compare value, by writing CC8yCR1S and CC8yCR2S registers.\n\n
2239 * The PWM duty cycle is determined by this value.\n\n
2240 * The compare value is written to a shadow register. Explicitly enable the shadow transfer for
2241 * the the period/compare value by calling XMC_CCU8_EnableShadowTransfer() with
2242 * appropriate mask.If shadow transfer is enabled and the timer is running,
2243 * a period match transfers the value from the shadow register to the actual compare register.
2244 *
2245 * \par<b>Related APIs:</b><br>
2246 * XMC_CCU8_EnableShadowTransfer().
2247 */
2248 void XMC_CCU8_SLICE_SetTimerCompareMatch(XMC_CCU8_SLICE_t *const slice,
2249 const XMC_CCU8_SLICE_COMPARE_CHANNEL_t channel,
2250 const uint16_t compare_val);
2251
2252 /**
2253 * @param slice Constant pointer to CC8 Slice
2254 * @param compare_val Timer compare value
2255 * @return <BR>
2256 * None<BR>
2257 *
2258 * \par<b>Description:</b><br>
2259 * Programs the timer compare1 value, by writing CC8yCR1S register.\n\n
2260 * The PWM duty cycle is determined by this value.\n\n
2261 * The compare value is written to a shadow register. Explicitly enable the shadow transfer for
2262 * the the period/compare value by calling XMC_CCU8_EnableShadowTransfer() with appropriate mask.
2263 * If shadow transfer is enabled and the timer is running, a period match transfers the value from
2264 * the shadow register to the actual compare register.
2265 *
2266 * \par<b>Related APIs:</b><br>
2267 * XMC_CCU8_EnableShadowTransfer().
2268 */
XMC_CCU8_SLICE_SetTimerCompareMatchChannel1(XMC_CCU8_SLICE_t * const slice,const uint16_t compare_val)2269 __STATIC_INLINE void XMC_CCU8_SLICE_SetTimerCompareMatchChannel1(XMC_CCU8_SLICE_t *const slice, const uint16_t compare_val)
2270 {
2271 XMC_ASSERT("XMC_CCU8_SLICE_SetTimerCompareMatchChannel1:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2272 slice->CR1S = (uint32_t) compare_val;
2273 }
2274
2275 /**
2276 * @param slice Constant pointer to CC8 Slice
2277 * @param compare_val Timer compare value
2278 * @return <BR>
2279 * None<BR>
2280 *
2281 * \par<b>Description:</b><br>
2282 * Programs the timer compare2 value, by writing CC8yCR2S register.\n\n
2283 * The PWM duty cycle is determined by this value.\n\n
2284 * The compare value is written to a shadow register. Explicitly enable the shadow transfer for
2285 * the the period/compare value by calling XMC_CCU8_EnableShadowTransfer() with appropriate mask.
2286 * If shadow transfer is enabled and the timer is running, a period match transfers the value from
2287 * the shadow register to the actual compare register.
2288 *
2289 * \par<b>Related APIs:</b><br>
2290 * XMC_CCU8_EnableShadowTransfer().
2291 */
XMC_CCU8_SLICE_SetTimerCompareMatchChannel2(XMC_CCU8_SLICE_t * const slice,const uint16_t compare_val)2292 __STATIC_INLINE void XMC_CCU8_SLICE_SetTimerCompareMatchChannel2(XMC_CCU8_SLICE_t *const slice, const uint16_t compare_val)
2293 {
2294 XMC_ASSERT("XMC_CCU8_SLICE_SetTimerCompareMatchChannel2:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2295 slice->CR2S = (uint32_t) compare_val;
2296 }
2297
2298 /**
2299 * @param slice Constant pointer to CC8 Slice
2300 * @param channel Select the compare channel to retrieve from.
2301 * @return <BR>
2302 * uint16_t returns the current timer compare value
2303 * Range: [0x0 to 0xFFFF]
2304 *
2305 * \par<b>Description:</b><br>
2306 * Retrieves the timer compare value currently effective, by reading CC8yCR1S and CC8yCR2S registers.\n\n
2307 * If the timer is active then the value being returned is currently being for the PWM duty cycle( timer compare value).
2308 *
2309 * \par<b>Note:</b><br>
2310 * The XMC_CCU8_SLICE_SetTimerCompareMatch() would set the new compare value to a shadow register.
2311 * This would only transfer the new values into the actual compare register if the shadow transfer request
2312 * is enabled and if a period match occurs. Hence a consecutive call to XMC_CCU8_SLICE_GetTimerCompareMatch()
2313 * would not reflect the new values until the shadow transfer completes.
2314 *
2315 * \par<b>Related APIs:</b><br>
2316 * XMC_CCU8_SLICE_SetTimerCompareMatch().
2317 */
2318 uint16_t XMC_CCU8_SLICE_GetTimerCompareMatch(const XMC_CCU8_SLICE_t *const slice,
2319 const XMC_CCU8_SLICE_COMPARE_CHANNEL_t channel);
2320
2321 /**
2322 * @param slice Constant pointer to CC8 Slice
2323 * @return
2324 * uint16_t Timer compare value
2325 *
2326 * \par<b>Description:</b><br>
2327 * Gets the timer compare1 value, by reading CC8yCR1 register.\n\n
2328 *
2329 * \par<b>Related APIs:</b><br>
2330 * XMC_CCU8_SLICE_SetTimerCompareMatchChannel1().
2331 */
XMC_CCU8_SLICE_GetTimerCompareMatchChannel1(XMC_CCU8_SLICE_t * const slice)2332 __STATIC_INLINE uint16_t XMC_CCU8_SLICE_GetTimerCompareMatchChannel1(XMC_CCU8_SLICE_t *const slice)
2333 {
2334 XMC_ASSERT("XMC_CCU8_SLICE_GetTimerCompareMatchChannel1:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2335 return slice->CR1;
2336 }
2337
2338 /**
2339 * @param slice Constant pointer to CC8 Slice
2340 * @return Timer compare value
2341 * uint16_t Timer compare value
2342 *
2343 * \par<b>Description:</b><br>
2344 * Gets the timer compare1 value, by reading CC8yCR2 register.\n\n
2345 *
2346 * \par<b>Related APIs:</b><br>
2347 * XMC_CCU8_SLICE_SetTimerCompareMatchChannel2().
2348 */
XMC_CCU8_SLICE_GetTimerCompareMatchChannel2(XMC_CCU8_SLICE_t * const slice)2349 __STATIC_INLINE uint16_t XMC_CCU8_SLICE_GetTimerCompareMatchChannel2(XMC_CCU8_SLICE_t *const slice)
2350 {
2351 XMC_ASSERT("XMC_CCU8_SLICE_SetTimerCompareMatchChannel2:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2352 return slice->CR2;
2353 }
2354
2355 /**
2356 * @param module Constant pointer to CCU8 module
2357 * @param shadow_transfer_msk Shadow transfer request mask for various transfers.
2358 * Use ::XMC_CCU8_SHADOW_TRANSFER_t enum items to create a mask of choice,
2359 * using a bit wise OR operation.
2360 * @return <BR>
2361 * None<BR>
2362 *
2363 * \par<b>Description:</b><br>
2364 * Requests of shadow transfer for Period, Compare, Passive level, dither and prescaler, by configuring
2365 * the GCSS register.\n\n
2366 * The transfer from the shadow registers to the actual registers is done in the immediate next occurrence of the
2367 * shadow transfer trigger after the API is called.
2368 *
2369 * Any call to XMC_CCU8_SLICE_SetTimerPeriodMatch()<BR> XMC_CCU8_SLICE_SetTimerCompareMatch()<BR>
2370 * XMC_XMC_CCU8_SLICE_SetPrescaler()<BR> XMC_CCU8_SLICE_CompareInit()<BR> XMC_CCU8_SLICE_CaptureInit().
2371 * must be succeeded by this API.
2372 *
2373 * \par<b>Related APIs:</b><br>
2374 * None.
2375 */
XMC_CCU8_EnableShadowTransfer(XMC_CCU8_MODULE_t * const module,const uint32_t shadow_transfer_msk)2376 __STATIC_INLINE void XMC_CCU8_EnableShadowTransfer(XMC_CCU8_MODULE_t *const module, const uint32_t shadow_transfer_msk)
2377 {
2378 XMC_ASSERT("XMC_CCU8_EnableShadowTransfer:Invalid module Pointer", XMC_CCU8_IsValidModule(module));
2379 module->GCSS = (uint32_t)shadow_transfer_msk;
2380 }
2381
2382 /**
2383 * @param slice Constant pointer to CC8 Slice
2384 * @return <BR>
2385 * uint16_t returns the current timer value
2386 * Range: [0x0 to 0xFFFF]
2387 *
2388 * \par<b>Description:</b><br>
2389 * Retrieves the latest timer value, from CC8yTIMER register.\n\n
2390 *
2391 * \par<b>Related APIs:</b><br>
2392 * XMC_CCU8_SLICE_SetTimerValue().
2393 */
XMC_CCU8_SLICE_GetTimerValue(const XMC_CCU8_SLICE_t * const slice)2394 __STATIC_INLINE uint16_t XMC_CCU8_SLICE_GetTimerValue(const XMC_CCU8_SLICE_t *const slice)
2395 {
2396 XMC_ASSERT("XMC_CCU8_SLICE_GetTimerValue:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2397 return((uint16_t) slice->TIMER);
2398 }
2399 /**
2400 * @param slice Constant pointer to CC8 Slice
2401 * @param timer_val The new timer value that has to be loaded into the TIMER register.
2402 * Range: [0x0 to 0xFFFF]
2403 * @return <BR>
2404 * None<BR>
2405 *
2406 * \par<b>Description:</b><br>
2407 * Loads a new timer value, by setting CC8yTIMER register.\n\n
2408 *
2409 * \par<b>Note:</b><br>
2410 * Request to load is ignored if the timer is running.
2411 *
2412 * \par<b>Related APIs:</b><br>
2413 * XMC_CCU8_SLICE_GetTimerValue().
2414 */
XMC_CCU8_SLICE_SetTimerValue(XMC_CCU8_SLICE_t * const slice,const uint16_t timer_val)2415 __STATIC_INLINE void XMC_CCU8_SLICE_SetTimerValue(XMC_CCU8_SLICE_t *const slice, const uint16_t timer_val)
2416 {
2417 XMC_ASSERT("XMC_CCU8_SLICE_SetTimerValue:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2418 slice->TIMER = (uint32_t) timer_val;
2419 }
2420 /**
2421 * @param slice Constant pointer to CC8 Slice
2422 * @param period_dither Boolean instruction on dithering of period match
2423 * @param duty_dither Boolean instruction on dithering of compare match
2424 * @param spread Dither compare value
2425 * @return <BR>
2426 * None<BR>
2427 *
2428 * \par<b>Description:</b><br>
2429 * Enables dithering of PWM frequency and duty cycle, by configuring CC8yTC.DITHE and CC8yDITS bits.\n\n
2430 * Some control loops are slow in updating PWM frequency and duty cycle. In such a case, a Bresenham style dithering
2431 * can help reduce long term errors. Dithering can be applied to period and duty individually,
2432 * this can be selected using the parameter \b period_dither and \b duty_dither.
2433 * The \b spread would provide the dither compare value. If the dither counter value is less than this \b spread then
2434 * the period/compare values would be dithered according to the dither mode selected. This API would invoke
2435 * XMC_CCU8_SLICE_SetDitherCompareValue().
2436 *
2437 * \par<b>Note:</b><br>
2438 * After this API call, XMC_CCU8_EnableShadowTransfer() has to be called with appropriate mask
2439 * to transfer the dither value.
2440 *
2441 * \par<b>Related APIs:</b><br>
2442 * XMC_CCU8_SLICE_DisableDithering().
2443 */
2444 void XMC_CCU8_SLICE_EnableDithering(XMC_CCU8_SLICE_t *const slice,
2445 const bool period_dither,
2446 const bool duty_dither,
2447 const uint8_t spread);
2448
2449 /**
2450 * @param slice Constant pointer to CC8 Slice
2451 * @return <BR>
2452 * None<BR>
2453 *
2454 * \par<b>Description:</b><br>
2455 * Disables dithering of PWM frequency and duty cycle, by clearing CC8yTC.DITHE bits.\n\n
2456 * This disables the Dither mode that was set in XMC_CCU8_SLICE_EnableDithering().
2457 * This API will not clear the dither compare value.
2458 *
2459 * \par<b>Related APIs:</b><br>
2460 * XMC_CCU8_SLICE_EnableDithering().
2461 */
XMC_CCU8_SLICE_DisableDithering(XMC_CCU8_SLICE_t * const slice)2462 __STATIC_INLINE void XMC_CCU8_SLICE_DisableDithering(XMC_CCU8_SLICE_t *const slice)
2463 {
2464 XMC_ASSERT("XMC_CCU8_SLICE_DisableDithering:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2465 slice->TC &= ~((uint32_t) CCU8_CC8_TC_DITHE_Msk);
2466 }
2467
2468 /**
2469 * @param slice Constant pointer to CC8 Slice
2470 * @return <BR>
2471 * None<BR>
2472 *
2473 * \par<b>Description:</b><br>
2474 * Enables the floating prescaler, by setting CC8yTC.FPE bit.\n\n
2475 * The prescaler divider starts with an initial value and increments upon every period match. It keeps incrementing
2476 * until a ceiling (prescaler compare value) is hit and thereafter rolls back to the original prescaler divider value.\n
2477 * It is necessary to have programmed an initial divider value and a compare value before the feature is enabled.
2478 *
2479 * \par<b>Related APIs:</b><br>
2480 * XMC_CCU8_SLICE_SetFloatingPrescalerCompareValue()<BR> XMC_CCU8_SLICE_DisableFloatingPrescaler()<BR>
2481 * XMC_XMC_CCU8_SLICE_SetPrescaler().
2482 */
XMC_CCU8_SLICE_EnableFloatingPrescaler(XMC_CCU8_SLICE_t * const slice)2483 __STATIC_INLINE void XMC_CCU8_SLICE_EnableFloatingPrescaler(XMC_CCU8_SLICE_t *const slice)
2484 {
2485 XMC_ASSERT("XMC_CCU8_SLICE_EnableFloatingPrescaler:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2486 slice->TC |= (uint32_t) CCU8_CC8_TC_FPE_Msk;
2487 }
2488
2489 /**
2490 * @param slice Constant pointer to CC8 Slice
2491 * @return <BR>
2492 * None<BR>
2493 *
2494 * \par<b>Description:</b><br>
2495 * Disables the floating prescaler, by clearing CC8yTC.FPE bit.\n\n
2496 * This would return the prescaler to the normal mode.
2497 * The prescaler that would be applied is the value present in CC8yPSC.
2498 *
2499 * \par<b>Related APIs:</b><br>
2500 * XMC_CCU8_SLICE_EnableFloatingPrescaler().
2501 */
XMC_CCU8_SLICE_DisableFloatingPrescaler(XMC_CCU8_SLICE_t * const slice)2502 __STATIC_INLINE void XMC_CCU8_SLICE_DisableFloatingPrescaler(XMC_CCU8_SLICE_t *const slice)
2503 {
2504 XMC_ASSERT("XMC_CCU8_SLICE_DisableFloatingPrescaler:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2505 slice->TC &= ~((uint32_t) CCU8_CC8_TC_FPE_Msk);
2506 }
2507
2508 /**
2509 * @param slice Constant pointer to CC8 Slice
2510 * @param comp_val Dither compare value
2511 * Range: [0x0 to 0xF]
2512 * @return <BR>
2513 * None<BR>
2514 *
2515 * \par<b>Description:</b><br>
2516 * Sets the dither spread/compare value, by setting CC8yDITS.DCVS bits.\n\n
2517 * This value is the cornerstone of PWM dithering feature. Dithering is applied/done when the value in the
2518 * dithering counter is less than this compare/spread value. For all dithering counter values greater than
2519 * the spread value, there is no dithering. After setting the value XMC_CCU8_EnableShadowTransfer() has to be
2520 * called with appropriate mask.
2521 *
2522 * \par<b>Related APIs:</b><br>
2523 * XMC_CCU8_SLICE_EnableDithering().
2524 */
XMC_CCU8_SLICE_SetDitherCompareValue(XMC_CCU8_SLICE_t * const slice,const uint8_t comp_val)2525 __STATIC_INLINE void XMC_CCU8_SLICE_SetDitherCompareValue(XMC_CCU8_SLICE_t *const slice, const uint8_t comp_val)
2526 {
2527 XMC_ASSERT("XMC_CCU8_SLICE_SetDitherCompareValue:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2528 XMC_ASSERT("XMC_CCU8_SLICE_SetDitherCompareValue:Invalid Dither compare value", (comp_val <= 15U));
2529
2530 slice->DITS = comp_val;
2531 }
2532
2533 /**
2534 * @param slice Constant pointer to CC8 Slice
2535 * @param div_val Prescaler divider value. Accepts enum :: XMC_CCU8_SLICE_PRESCALER_t
2536 * Range: [0x0 to 0xF]
2537 * @return <BR>
2538 * None<BR>
2539 *
2540 * \par<b>Description:</b><br>
2541 * Programs the slice specific prescaler divider, by configuring the CC8yPSC and CC8yFPC registers.\n\n
2542 * The prescaler divider may only be programmed after the prescaler run bit has been cleared
2543 * by calling XMC_CCU8_StopPrescaler().
2544 *
2545 * \par<b>Related APIs:</b><br>
2546 * XMC_CCU8_SLICE_SetFloatingPrescalerCompareValue().
2547 */
2548 void XMC_CCU8_SLICE_SetPrescaler(XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_PRESCALER_t div_val);
2549
2550 /**
2551 * @param slice Constant pointer to CC8 Slice
2552 * @return <BR>
2553 * XMC_CCU8_SLICE_PRESCALER_t Prescaler divider value. <BR>
2554 *
2555 * \par<b>Description:</b><br>
2556 * Returns current prescaler value.\n\n
2557 * Used to detrmine the clock frequency of the CCU8 slice XMC_SCU_CLOCK_GetCcuClockFrequency() / XMC_CCU8_SLICE_GetPrescaler()
2558 *
2559 * \par<b>Related APIs:</b><br>
2560 * XMC_CCU8_SLICE_SetPrescaler().
2561 */
XMC_CCU8_SLICE_GetPrescaler(XMC_CCU8_SLICE_t * const slice)2562 __STATIC_INLINE XMC_CCU8_SLICE_PRESCALER_t XMC_CCU8_SLICE_GetPrescaler(XMC_CCU8_SLICE_t *const slice)
2563 {
2564 XMC_ASSERT("XMC_CCU8_SLICE_SetPrescaler:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2565
2566 return (XMC_CCU8_SLICE_PRESCALER_t)slice->PSC;
2567 }
2568
2569 /**
2570 * @param slice Constant pointer to CC8 Slice
2571 * @param cmp_val Prescaler divider compare value
2572 * Range: [0x0 to 0xF]
2573 * @return <BR>
2574 * None<BR>
2575 *
2576 * \par<b>Description:</b><br>
2577 * Programs the slice specific prescaler divider compare value, by configuring CC8yFPCS register.\n\n
2578 * The compare value is applicable only in floating mode of operation. The prescaler divider starts with an initial
2579 * value and increments to the compare value steadily upon every period match. Once prescaler divider
2580 * equals the prescaler divider compare value, the value in the former resets back to the PVAL (from FPC). After setting
2581 * the value, XMC_CCU8_EnableShadowTransfer() has to be called with appropriate mask.
2582 *
2583 * \par<b>Related APIs:</b><br>
2584 * XMC_CCU8_SLICE_SetPrescaler().
2585 */
XMC_CCU8_SLICE_SetFloatingPrescalerCompareValue(XMC_CCU8_SLICE_t * const slice,const uint8_t cmp_val)2586 __STATIC_INLINE void XMC_CCU8_SLICE_SetFloatingPrescalerCompareValue(XMC_CCU8_SLICE_t *const slice,
2587 const uint8_t cmp_val)
2588 {
2589 XMC_ASSERT("XMC_CCU8_SLICE_SetFloatingPrescalerCompareValue:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2590 /* First, write to the shadow register */
2591 slice->FPCS = (uint32_t) cmp_val;
2592 }
2593
2594 /**
2595 * @param slice Constant pointer to CC8 Slice
2596 * @param ch_num Compare channel for which the multi-channel mode is needed.
2597 * @return <BR>
2598 * None<BR>
2599 *
2600 * \par<b>Description:</b><br>
2601 * Enables the multichannel mode, by setting CC8yTC.MCME1 or CC8yTC.MCME1 bits based on the \a ch_num.\n\n
2602 * The output state of the Timer slices can be controlled in parallel by a single input signal.
2603 * A particularly useful feature in motor control applications where the PWM output of multiple slices of a module can
2604 * be gated and ungated by multi-channel gating inputs connected to the slices. A peripheral like POSIF connected to the
2605 * motor knows exactly which of the power drive switches are to be turned on and off at any instant. It can thus through
2606 * a gating bus (known as multi-channel inputs) control which of the slices output stays gated/ungated.
2607 *
2608 * \par<b>Related APIs:</b><br>
2609 * XMC_CCU8_SLICE_DisableMultiChannelMode()<BR> XMC_CCU8_SetMultiChannelShadowTransferMode().
2610 */
XMC_CCU8_SLICE_EnableMultiChannelMode(XMC_CCU8_SLICE_t * const slice,const XMC_CCU8_SLICE_COMPARE_CHANNEL_t ch_num)2611 __STATIC_INLINE void XMC_CCU8_SLICE_EnableMultiChannelMode(XMC_CCU8_SLICE_t *const slice,
2612 const XMC_CCU8_SLICE_COMPARE_CHANNEL_t ch_num)
2613 {
2614 XMC_ASSERT("XMC_CCU8_SLICE_EnableMultiChannelMode:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2615 XMC_ASSERT("XMC_CCU8_SLICE_EnableMultiChannelMode:Invalid Channel", XMC_CCU8_SLICE_CHECK_COMP_CHANNEL(ch_num));
2616
2617 slice->TC |= (uint32_t)CCU8_CC8_TC_MCME1_Msk << ch_num;
2618 }
2619
2620 /**
2621 * @param slice Constant pointer to CC8 Slice
2622 * @param ch_num Compare channel for which the multi-channel mode needs to be disabled.
2623 * @return <BR>
2624 * None<BR>
2625 *
2626 * \par<b>Description:</b><br>
2627 * Disables the multichannel mode, by clearing CC8yTC.MCME1 or CC8yTC.MCME1 bits based on the \a ch_num.\n\n
2628 * Returns the slices to the normal operation mode. This takes the slice number as input and
2629 * configures the multi channel mode for it.
2630 *
2631 * \par<b>Related APIs:</b><br>
2632 * XMC_CCU8_SLICE_EnableMultiChannelMode().
2633 */
XMC_CCU8_SLICE_DisableMultiChannelMode(XMC_CCU8_SLICE_t * const slice,const XMC_CCU8_SLICE_COMPARE_CHANNEL_t ch_num)2634 __STATIC_INLINE void XMC_CCU8_SLICE_DisableMultiChannelMode(XMC_CCU8_SLICE_t *const slice,
2635 const XMC_CCU8_SLICE_COMPARE_CHANNEL_t ch_num)
2636 {
2637 XMC_ASSERT("XMC_CCU8_SLICE_DisableMultiChannelMode:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2638 XMC_ASSERT("XMC_CCU8_SLICE_DisableMultiChannelMode:Invalid Channel", XMC_CCU8_SLICE_CHECK_COMP_CHANNEL(ch_num));
2639
2640 slice->TC &= ~((uint32_t)CCU8_CC8_TC_MCME1_Msk << ch_num);
2641 }
2642
2643 /**
2644 * @param module Constant pointer to CCU8 module
2645 * @param slice_mode_msk Slices for which the configuration has to be applied.
2646 * Use ::XMC_CCU8_MULTI_CHANNEL_SHADOW_TRANSFER_t enum items to create a mask of choice,
2647 * using a bit wise OR operation.
2648 * @return <BR>
2649 * None<BR>
2650 *
2651 * \par<b>Description:</b><br>
2652 * Enables the Multi-channel shadow transfer request trigger signal either by software or hardware by configuring
2653 * GCTRL.MSE0, GCTRL.MSE1, GCTRL.MSE2, and GCTRL.MSE3 based on the mask.\n\n
2654 * The shadow transfer would take place either if it was requested by software or by the CCU8x.MCSS input.
2655 *
2656 * \par<b>Related APIs:</b><br>
2657 * None.
2658 */
2659 void XMC_CCU8_SetMultiChannelShadowTransferMode(XMC_CCU8_MODULE_t *const module, const uint32_t slice_mode_msk);
2660
2661 /**
2662 * @param slice Constant pointer to CC8 Slice
2663 * @param reg_num The capture register from which the captured value is to be retrieved
2664 * Range: [0,3]
2665 * @return <BR>
2666 * uint32_t Returns the Capture register value.
2667 * Range: [0 to 0x1FFFFF]
2668 *
2669 * \par<b>Description:</b><br>
2670 * Retrieves timer value which has been captured in the Capture registers, by reading CC8yCV[\b reg_num] register.\n\n
2671 * The signal whose timing characteristics are to be measured must be mapped to an event which in turn must be mapped
2672 * to the capture function. Based on the capture criteria, the timer values are captured into capture registers. Timing
2673 * characteristics of the input signal may then be derived/inferred from the captured values. The full flag will help
2674 * to find out if there is a new captured value present.
2675 *
2676 * \par<b>Related APIs:</b><br>
2677 * XMC_CCU8_SLICE_GetLastCapturedTimerValue().
2678 */
2679 uint32_t XMC_CCU8_SLICE_GetCaptureRegisterValue(const XMC_CCU8_SLICE_t *const slice, const uint8_t reg_num);
2680
2681 /**
2682 * @param slice Constant pointer to CC8 Slice
2683 * @param set The capture register set, which must be evaluated
2684 * @param val_ptr Out Parameter of the API.Stores the captured timer value into this out parameter.
2685 * @return <BR>
2686 * ::XMC_CCU8_STATUS_t Returns XMC_CCU8_STATUS_OK if there was new value present in the capture registers.
2687 * returns XMC_CCU8_STATUS_ERROR if there was no new value present in the capture registers.
2688 *
2689 * \par<b>Description:</b><br>
2690 * Retrieves the latest captured timer value, by reading CC8yCV registers.\n\n
2691 * Retrieve the timer value last stored by the slice. When separate capture events are used,
2692 * users must specify the capture set to evaluate. If single capture event mode is used, all 8 capture registers are
2693 * evaluated.\n
2694 * The lowest register is evaluated first followed by the next higher ordered register and this continues until all
2695 * capture registers have been evaluated.
2696 *
2697 * \par<b>Related APIs:</b><br>
2698 * XMC_CCU8_SLICE_GetCaptureregisterValue().
2699 */
2700 XMC_CCU8_STATUS_t XMC_CCU8_SLICE_GetLastCapturedTimerValue(const XMC_CCU8_SLICE_t *const slice,
2701 const XMC_CCU8_SLICE_CAP_REG_SET_t set,
2702 uint32_t *val_ptr);
2703
2704 /**
2705 * @param slice Constant pointer to CC8 Slice
2706 * @param event Event whose assertion can potentially lead to an interrupt
2707 * @return <BR>
2708 * None<BR>
2709 *
2710 * \par<b>Description:</b><br>
2711 * Enables the generation of an interrupt pulse for the event, by configuring CC8yINTE register.\n\n
2712 * For an event to lead to an interrupt, it must first be enabled and bound to a service request line. The corresponding
2713 * NVIC node must be enabled as well. This API merely enables the event. Binding with SR is performed by another API.
2714 *
2715 * \par<b>Related APIs:</b><br>
2716 * XMC_CCU8_SLICE_SetInterruptNode()<BR> XMC_CCU8_SLICE_EnableMultipleEvents()<BR> XMC_CCU8_SLICE_DisableEvent()<BR>
2717 * XMC_CCU8_SLICE_DisableMultipleEvents().
2718 */
XMC_CCU8_SLICE_EnableEvent(XMC_CCU8_SLICE_t * const slice,const XMC_CCU8_SLICE_IRQ_ID_t event)2719 __STATIC_INLINE void XMC_CCU8_SLICE_EnableEvent(XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event)
2720 {
2721 XMC_ASSERT("XMC_CCU8_SLICE_EnableEvent:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2722 XMC_ASSERT("XMC_CCU8_SLICE_EnableEvent:Invalid SR event", XMC_CCU8_SLICE_CHECK_INTERRUPT(event));
2723
2724 slice->INTE |= ((uint32_t) 1) << ((uint32_t) event);
2725 }
2726
2727 /**
2728 * @param slice Constant pointer to CC8 Slice
2729 * @param mask Event mask such that multiple events can be enabled.
2730 * Use ::XMC_CCU8_SLICE_MULTI_IRQ_ID_t enum items to create a mask of choice,
2731 * using a bit wise OR operation.
2732 * @return <BR>
2733 * None<BR>
2734 *
2735 * \par<b>Description:</b><br>
2736 * Enables the generation of an interrupt pulse for the required events, by configuring CC8yINTE register.\n\n
2737 * For an event to lead to an interrupt, it must first be enabled and bound to a service request line. The corresponding
2738 * NVIC node must be enabled as well. This API merely enables the events. Binding with SR is performed by another API.
2739 *
2740 * \par<b>Related APIs:</b><br>
2741 * XMC_CCU8_SLICE_SetInterruptNode()<BR> XMC_CCU8_SLICE_EnableEvent()<BR> XMC_CCU8_SLICE_DisableEvent()<BR>
2742 * XMC_CCU8_SLICE_DisableMultipleEvents().
2743 */
XMC_CCU8_SLICE_EnableMultipleEvents(XMC_CCU8_SLICE_t * const slice,const uint16_t mask)2744 __STATIC_INLINE void XMC_CCU8_SLICE_EnableMultipleEvents(XMC_CCU8_SLICE_t *const slice, const uint16_t mask)
2745 {
2746 XMC_ASSERT("XMC_CCU8_SLICE_EnableMultipleEvents:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2747 slice->INTE = (uint32_t) mask;
2748 }
2749
2750 /**
2751 * @param slice Constant pointer to CC8 Slice
2752 * @param event Event whose assertion can potentially lead to an interrupt
2753 * @return <BR>
2754 * None<BR>
2755 *
2756 * \par<b>Description:</b><br>
2757 * Disables the generation of an interrupt pulse for the event, by clearing CC8yINTE register.\n\n
2758 * Prevents the event from being asserted.
2759 *
2760 * \par<b>Related APIs:</b><br>
2761 * XMC_CCU8_SLICE_SetInterruptNode()<BR> XMC_CCU8_SLICE_EnableEvent()<BR> XMC_CCU8_SLICE_EnableMultipleEvents()<BR>
2762 * XMC_CCU8_SLICE_DisableMultipleEvents().
2763 */
XMC_CCU8_SLICE_DisableEvent(XMC_CCU8_SLICE_t * const slice,const XMC_CCU8_SLICE_IRQ_ID_t event)2764 __STATIC_INLINE void XMC_CCU8_SLICE_DisableEvent(XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event)
2765 {
2766 XMC_ASSERT("XMC_CCU8_SLICE_DisableEvent:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2767 XMC_ASSERT("XMC_CCU8_SLICE_DisableEvent:Invalid SR event", XMC_CCU8_SLICE_CHECK_INTERRUPT(event));
2768
2769 slice->INTE &= ~(((uint32_t) 1) << ((uint32_t) event));
2770 }
2771
2772 /**
2773 * @param slice Constant pointer to CC8 Slice
2774 * @param mask Event mask such that multiple events can be enabled.
2775 * Use ::XMC_CCU8_SLICE_MULTI_IRQ_ID_t enum items to create a mask of choice,
2776 * using a bit wise OR operation.
2777 * @return <BR>
2778 * None<BR>
2779 *
2780 * \par<b>Description:</b><br>
2781 * Disables the generation of an interrupt pulse for the required events, by clearing CC8yINTE register.\n\n
2782 * Prevents selected events of the slice from being asserted.
2783 *
2784 * \par<b>Related APIs:</b><br>
2785 * XMC_CCU8_SLICE_SetInterruptNode()<BR> XMC_CCU8_SLICE_EnableEvent()<BR> XMC_CCU8_SLICE_EnableMultipleEvents()<BR>
2786 * XMC_CCU8_SLICE_DisableEvent().
2787 */
XMC_CCU8_SLICE_DisableMultipleEvents(XMC_CCU8_SLICE_t * const slice,const uint16_t mask)2788 __STATIC_INLINE void XMC_CCU8_SLICE_DisableMultipleEvents(XMC_CCU8_SLICE_t *const slice, const uint16_t mask)
2789 {
2790 XMC_ASSERT("XMC_CCU8_SLICE_DisableMultipleEvents:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2791 slice->INTE &= ~((uint32_t) mask);
2792 }
2793
2794 /**
2795 * @param slice Constant pointer to CC8 Slice
2796 * @param event Event whose assertion can potentially lead to an interrupt
2797 * @return <BR>
2798 * None<BR>
2799 *
2800 * \par<b>Description:</b><br>
2801 * Manually asserts the requested event, by setting CC8ySWS register.\n\n
2802 * For an event to lead to an interrupt, it must first be enabled and bound to a service request line. The corresponding
2803 * NVIC node must be enabled as well. This API manually asserts the requested event.
2804 *
2805 * \par<b>Related APIs:</b><br>
2806 * XMC_CCU8_SLICE_SetInterruptNode()<BR> XMC_CCU8_SLICE_EnableEvent()<BR> XMC_CCU8_SLICE_EnableMultipleEvents().
2807 */
XMC_CCU8_SLICE_SetEvent(XMC_CCU8_SLICE_t * const slice,const XMC_CCU8_SLICE_IRQ_ID_t event)2808 __STATIC_INLINE void XMC_CCU8_SLICE_SetEvent(XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event)
2809 {
2810 XMC_ASSERT("XMC_CCU8_SLICE_SetEvent:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2811 XMC_ASSERT("XMC_CCU8_SLICE_SetEvent:Invalid SR event", XMC_CCU8_SLICE_CHECK_INTERRUPT(event));
2812
2813 slice->SWS = ((uint32_t) 1) << ((uint32_t) event);
2814 }
2815
2816 /**
2817 * @param slice Constant pointer to CC8 Slice
2818 * @param event Asserted event which must be acknowledged.
2819 * @return <BR>
2820 * None<BR>
2821 *
2822 * \par<b>Description:</b><br>
2823 * Acknowledges an asserted event, by setting CC8ySWR with respective event flag.\n\n
2824 *
2825 * \par<b>Related APIs:</b><br>
2826 * XMC_CCU8_SLICE_EnableEvent()<BR> XMC_CCU8_SLICE_SetEvent()<BR> XMC_CCU8_SLICE_GetEvent().
2827 *
2828 */
XMC_CCU8_SLICE_ClearEvent(XMC_CCU8_SLICE_t * const slice,const XMC_CCU8_SLICE_IRQ_ID_t event)2829 __STATIC_INLINE void XMC_CCU8_SLICE_ClearEvent(XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event)
2830 {
2831 XMC_ASSERT("XMC_CCU8_SLICE_ClearEvent:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2832 XMC_ASSERT("XMC_CCU8_SLICE_ClearEvent:Invalid SR event", XMC_CCU8_SLICE_CHECK_INTERRUPT(event));
2833 slice->SWR = ((uint32_t) 1) << ((uint32_t) event);
2834 }
2835
2836 /**
2837 * @param slice Constant pointer to CC8 Slice
2838 * @param event Event to be evaluated for assertion
2839 * @return <br>
2840 * bool Returns true if event is set else false is returned.
2841 *
2842 * \par<b>Description:</b><br>
2843 * Evaluates if a given event is asserted or not, by reading CC8yINTS register.\n\n
2844 * Return true if the event is asserted. For a event to be asserted it has to be
2845 * first enabled. Only if that event is enabled the call to this API is valid.
2846 * If the Event is enabled and has not yet occurred then a false is returned.
2847 *
2848 * \par<b>Related APIs:</b><br>
2849 * XMC_CCU8_SLICE_EnableEvent()<BR> XMC_CCU8_SLICE_SetEvent().
2850 */
XMC_CCU8_SLICE_GetEvent(const XMC_CCU8_SLICE_t * const slice,const XMC_CCU8_SLICE_IRQ_ID_t event)2851 __STATIC_INLINE bool XMC_CCU8_SLICE_GetEvent(const XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_IRQ_ID_t event)
2852 {
2853 XMC_ASSERT("XMC_CCU8_SLICE_GetEvent:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2854 XMC_ASSERT("XMC_CCU8_SLICE_GetEvent:Invalid SR event", XMC_CCU8_SLICE_CHECK_INTERRUPT(event));
2855 return(((uint32_t)(slice->INTS & ((uint32_t)1 << event))) != 0U);
2856 }
2857
2858 /**
2859 * @param slice Constant pointer to CC8 Slice
2860 * @param event Event which must be bound to a service request line
2861 * @param sr The Service request line which is bound to the \b event
2862 * @return <BR>
2863 * None<BR>
2864 *
2865 * \par<b>Description:</b><br>
2866 * Binds requested event to a service request line, by configuring CC8ySRS register with respective event.\n\n
2867 * For an event to lead to an interrupt, it must first be enabled and bound to a service request line. The corresponding
2868 * NVIC node must be enabled as well. This API binds the requested event with the requested service request line(\b sr).
2869 *
2870 * \par<b>Related APIs:</b><br>
2871 * XMC_CCU8_SLICE_EnableEvent()<BR> XMC_CCU8_SLICE_SetEvent().
2872 *
2873 */
2874 void XMC_CCU8_SLICE_SetInterruptNode(XMC_CCU8_SLICE_t *const slice,
2875 const XMC_CCU8_SLICE_IRQ_ID_t event,
2876 const XMC_CCU8_SLICE_SR_ID_t sr);
2877
2878 /**
2879 * @param slice Constant pointer to CC8 Slice
2880 * @param out Output signal for which the passive level needs to be set.
2881 * @param level Output passive level for the \b out signal
2882 * @return <BR>
2883 * None<BR>
2884 *
2885 * \par<b>Description:</b><br>
2886 * Configures the passive level for the slice output, by setting CC8yPSL register.\n\n
2887 * Defines the passive level for the timer slice output pin. Selects either level high is passive
2888 * or level low is passive. This is the level of the output before the compare match is value changes it.
2889 *
2890 * \par<b>Related APIs:</b><br>
2891 * XMC_CCU8_SLICE_EnableEvent()<BR> XMC_CCU8_SLICE_SetEvent().
2892 */
2893 void XMC_CCU8_SLICE_SetPassiveLevel(XMC_CCU8_SLICE_t *const slice,
2894 const XMC_CCU8_SLICE_OUTPUT_t out,
2895 const XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_t level);
2896
2897 /**
2898 * @param slice Constant pointer to CC8 Slice
2899 * @param config Pointer to dead time configuration data
2900 * @return <BR>
2901 * None<BR>
2902 *
2903 * \par<b>Description:</b><br>
2904 * Initializes Dead time configuration for the slice outputs, by configuring CC8yDC1R, CC8yDC2R, CC8yDTC registers.\n\n
2905 * This routine programs dead time delays (rising & falling) and dead time clock prescaler.
2906 * Details such as the choice of dead time for channel1, channel2, ST1, Inverted ST1, ST2, Inverted ST2, are also
2907 * programmed by this routine.
2908 *
2909 * \par<b>Related APIs:</b><br>
2910 * XMC_CCU8_SLICE_ConfigureDeadTime()<BR> XMC_CCU8_SLICE_SetDeadTimeValue()<BR> XMC_CCU8_SLICE_SetDeadTimePrescaler()<BR>
2911 * XMC_CCU8_SLICE_IsDeadTimeCntr1Running()<BR> XMC_CCU8_SLICE_IsDeadTimeCntr2Running().
2912 */
2913 void XMC_CCU8_SLICE_DeadTimeInit(XMC_CCU8_SLICE_t *const slice,
2914 const XMC_CCU8_SLICE_DEAD_TIME_CONFIG_t *const config);
2915
2916 /**
2917 * @param slice Constant pointer to CC8 Slice
2918 * @return <BR>
2919 * None<BR>
2920 *
2921 * \par<b>Description:</b><br>
2922 * Configures the slice to generate PWM in asymmetric compare mode, by setting CC8yCHC.ASE bit.\n\n
2923 * In asymmetric compare mode, the compare channels 1 & 2 are grouped to generate the PWM.This would
2924 * generate an inverted PWM at OUT0 & OUT1.
2925 * In Edge Aligned mode (counting up), the Status bit is set when a compare match of
2926 * Compare channel-1 occurs and cleared when a compare match event of Compare channel-2 occurs.\n
2927 * In Center Aligned mode, the status bit is set when a compare match event of Compare channel-1 occurs while
2928 * counting up and cleared when a compare match event of Compare channel-2 occurs while counting down.
2929 *
2930 * \par<b>Note:</b><br>
2931 * External count direction function is enabled then the asymmetric mode of operation is not possible.
2932 *
2933 * \par<b>Related APIs:</b><br>
2934 * XMC_CCU8_SLICE_EnableSymmetricCompareMode()<BR>
2935 */
XMC_CCU8_SLICE_EnableAsymmetricCompareMode(XMC_CCU8_SLICE_t * const slice)2936 __STATIC_INLINE void XMC_CCU8_SLICE_EnableAsymmetricCompareMode(XMC_CCU8_SLICE_t *const slice)
2937 {
2938 XMC_ASSERT("XMC_CCU8_SLICE_EnableAsymmetricCompareMode:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2939 slice->CHC |= (uint32_t) CCU8_CC8_CHC_ASE_Msk;
2940 }
2941
2942 /**
2943 * @param slice Constant pointer to CC8 Slice
2944 * @return <BR>
2945 * None<BR>
2946 *
2947 * \par<b>Description:</b><br>
2948 * Configures the slice to generate PWM in symmetric(standard) compare mode, by clearing CC8yCHC.ASE bit.\n\n
2949 * In symmetric compare mode, the compare channels 1 & 2 are independent of each other & each channel generates the
2950 * PWM & inverted PWM at OUT0, OUT1, OUT2 & OUT3.
2951 *
2952 * \par<b>Related APIs:</b><br>
2953 * XMC_CCU8_SLICE_EnableAsymmetricCompareMode().
2954 */
XMC_CCU8_SLICE_EnableSymmetricCompareMode(XMC_CCU8_SLICE_t * const slice)2955 __STATIC_INLINE void XMC_CCU8_SLICE_EnableSymmetricCompareMode(XMC_CCU8_SLICE_t *const slice)
2956 {
2957 XMC_ASSERT("XMC_CCU8_SLICE_EnableSymmetricCompareMode:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
2958 slice->CHC &= ~((uint32_t) CCU8_CC8_CHC_ASE_Msk);
2959 }
2960
2961 /**
2962 * @param slice Constant pointer to CC8 Slice
2963 * @param mask The Dead Time configuration mask.
2964 * Do a bitwise OR operation on the following values depending on the need.
2965 * Value 0x1: Dead Time Enable for Compare Channel 1
2966 * Value 0x2: Dead Time Enable for Compare Channel 2
2967 * Value 0x4: Dead Time Enable for CC8yST1 path is enabled.
2968 * Value 0x8: Dead Time Enable for Inverted CC8yST1 path is enabled.
2969 * Value 0x10: Dead Time Enable for CC8yST2 path is enabled.
2970 * Value 0x20: Dead Time Enable for Inverted CC8yST2 path is enabled.
2971 * Range: [0x0 to 0x3F]
2972 *
2973 * \par<b>Description:</b><br>
2974 * Activates or deactivates dead time for compare channel and ST path, by configuring CC8y.DC1R, CC8y.DC1R and
2975 * CC8y.DTC registers.\n\n
2976 * Use the provided masks to enable/disable the dead time for the compare channels and the ST signals. It is possible
2977 * to deactivate the dead time for all the options by passing a 0x0 as the mask.
2978 * Details such as the choice of dead time for channel1, channel2, ST1, Inverted ST1, ST2, Inverted ST2, are
2979 * programmed by this routine.
2980 *
2981 * \par<b>Related APIs:</b><br>
2982 * XMC_CCU8_SLICE_DeadTimeInit()<BR> XMC_CCU8_SLICE_SetDeadTimeValue()<BR> XMC_CCU8_SLICE_SetDeadTimePrescaler()<BR>
2983 * XMC_CCU8_SLICE_IsDeadTimeCntr1Running()<BR> XMC_CCU8_SLICE_IsDeadTimeCntr2Running().
2984 */
2985 void XMC_CCU8_SLICE_ConfigureDeadTime(XMC_CCU8_SLICE_t *const slice, const uint8_t mask);
2986
2987 /**
2988 * @param slice Constant pointer to CC8 Slice
2989 * @param channel Compare channel number
2990 * @param rise_value Programs rising edge delay
2991 * Range: [0x0 to 0xFF]
2992 * @param fall_value Programs falling edge delay
2993 * Range: [0x0 to 0xFF]
2994 * @return <BR>
2995 * None<BR>
2996 *
2997 * \par<b>Description:</b><br>
2998 * Configures the dead time for rising and falling edges, by updating CC8y.DC1R, CC8y.DC1R registers.\n\n
2999 * This API will Configure the delay that is need either when the value changes from 0 to 1 (rising edge) or
3000 * value changes from 1 to 0(falling edge). Directly accessed registers are CC8yDC1R, CC8yDC2R.
3001 *
3002 * \par<b>Related APIs:</b><br>
3003 * XMC_CCU8_SLICE_DeadTimeInit()<BR> XMC_CCU8_SLICE_SetDeadTimeValue()<BR> XMC_CCU8_SLICE_ConfigureDeadTime()<BR>
3004 * XMC_CCU8_SLICE_IsDeadTimeCntr1Running()<BR> XMC_CCU8_SLICE_IsDeadTimeCntr2Running().
3005 */
3006 void XMC_CCU8_SLICE_SetDeadTimeValue(XMC_CCU8_SLICE_t *const slice,
3007 const XMC_CCU8_SLICE_COMPARE_CHANNEL_t channel,
3008 const uint8_t rise_value,
3009 const uint8_t fall_value);
3010
3011 /**
3012 * @param slice Pointer to an instance of CC8 slice
3013 * @param div_val Prescaler divider value
3014 * @return <BR>
3015 * None<BR>
3016 *
3017 * \par<b>Description:</b><br>
3018 * Configures clock division factor for dead time generator, by configuring CC8yDTC.DTCC bit.
3019 * The Clock divider works on the timer clock. It is possible to scale the timer clock for the dead time
3020 * generator by a factor of 1/2/4/8. This selection is passed as an argument to the API.
3021 *
3022 * \par<b>Related APIs:</b><br>
3023 * XMC_CCU8_SLICE_DeadTimeInit()<BR> XMC_CCU8_SLICE_SetDeadTimeValue()<BR> XMC_CCU8_SLICE_ConfigureDeadTime()<BR>
3024 * XMC_CCU8_SLICE_IsDeadTimeCntr1Running()<BR> XMC_CCU8_SLICE_IsDeadTimeCntr2Running().
3025 */
3026 void XMC_CCU8_SLICE_SetDeadTimePrescaler(XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_DTC_DIV_t div_val);
3027
3028 /**
3029 * @param slice Constant pointer to CC8 Slice
3030 * @param channel which channel status has to be give as out
3031 * @return <BR>
3032 * None<BR>
3033 *
3034 * \par<b>Description:</b><br>
3035 * Configures status ST1, ST2 mapping to STy, by configuring CC8yTC.STOS bits.\n\n
3036 * This routine defines the output STy as a function of ST1 or ST2 or both ST1 & ST2.
3037 * It is possible to make the CCU8x.STy signal to reflect the CC8y.ST1/CC8y.ST2 or a function of the 2 signals.
3038 *
3039 * \par<b>Related APIs:</b><br>
3040 * None.
3041 */
3042 void XMC_CCU8_SLICE_ConfigureStatusBitOutput(XMC_CCU8_SLICE_t *const slice, const XMC_CCU8_SLICE_STATUS_t channel);
3043
3044 #if (UC_SERIES != XMC45) || defined(DOXYGEN)
3045 /**
3046 * @param slice Constant pointer to CC8 Slice
3047 *
3048 * @return <BR>
3049 * None<BR>
3050 *
3051 * \par<b>Description:</b><br>
3052 * Cascades the shadow transfer operation throughout the CCU8 timer slices, by setting CSE bit in STC register.\n\n
3053 *
3054 * The shadow transfer enable bits needs to be set in all timer slices, that are being used in the cascaded architecture,
3055 * at the same time. The shadow transfer enable bits, also need to be set for all slices even if the shadow values of
3056 * some slices were not updated. It is possible to to cascade with the adjacent slices only. CC80 slice is a
3057 * master to start the operation.
3058 *
3059 * \par<b>Note:</b><br>
3060 * XMC_CCU8_EnableShadowTransfer() must be called to enable the shadow transfer of the all the slices, which needs to be
3061 * cascaded.
3062 *
3063 * \par<b>Related APIs:</b><br>
3064 * XMC_CCU8_EnableShadowTransfer(), XMC_CCU8_SLICE_DisableCascadedShadowTransfer()<BR>.
3065 * @note Not available for XMC4500 series
3066 */
XMC_CCU8_SLICE_EnableCascadedShadowTransfer(XMC_CCU8_SLICE_t * const slice)3067 __STATIC_INLINE void XMC_CCU8_SLICE_EnableCascadedShadowTransfer(XMC_CCU8_SLICE_t *const slice)
3068 {
3069 XMC_ASSERT("XMC_CCU8_SLICE_EnableCascadedShadowTransfer:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
3070 slice->STC |= (uint32_t) CCU8_CC8_STC_CSE_Msk;
3071 }
3072
3073 /**
3074 * @param slice Constant pointer to CC8 Slice
3075 *
3076 * @return <BR>
3077 * None<BR>
3078 *
3079 * \par<b>Description:</b><br>
3080 * Disables the cascaded the shadow transfer operation, by clearing CSE bit in STC register.\n\n
3081 *
3082 * If in any slice the cascaded mode disabled, other slices from there onwards does not update the values in cascaded mode.
3083 *
3084 * \par<b>Related APIs:</b><br>
3085 * XMC_CCU8_SLICE_EnableCascadedShadowTransfer()<BR>.
3086 * @note Not available for XMC4500 series
3087 */
XMC_CCU8_SLICE_DisableCascadedShadowTransfer(XMC_CCU8_SLICE_t * const slice)3088 __STATIC_INLINE void XMC_CCU8_SLICE_DisableCascadedShadowTransfer(XMC_CCU8_SLICE_t *const slice)
3089 {
3090 XMC_ASSERT("XMC_CCU8_SLICE_DisableCascadedShadowTransfer:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
3091 slice->STC &= ~(uint32_t) CCU8_CC8_STC_CSE_Msk;
3092 }
3093
3094 /**
3095 * @param slice Constant pointer to CC8 Slice
3096 * @param shadow_transfer_mode mode to be configured
3097 * Use :: XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_t enum items for mode
3098 * @return <BR>
3099 * None<BR>
3100 *
3101 * \par<b>Description:</b><br>
3102 * Configures when the shadow transfer has to occur, by setting STM bit in STC register.\n\n
3103 *
3104 * After requesting for shadow transfer mode using XMC_CCU8_EnableShadowTransfer(), actual transfer occurs based on the
3105 * selection done using this API (i.e. on period and One match, on Period match only, on One match only).
3106 *
3107 * \par<b>Note:</b><br>
3108 * This is effective when the timer is configured in centre aligned mode.
3109 *
3110 * \par<b>Related APIs:</b><br>
3111 * XMC_CCU8_EnableShadowTransfer()<BR>
3112 * @note Not available for XMC4500 series
3113 */
XMC_CCU8_SLICE_SetShadowTransferMode(XMC_CCU8_SLICE_t * const slice,const XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_t shadow_transfer_mode)3114 __STATIC_INLINE void XMC_CCU8_SLICE_SetShadowTransferMode(XMC_CCU8_SLICE_t *const slice,
3115 const XMC_CCU8_SLICE_SHADOW_TRANSFER_MODE_t shadow_transfer_mode)
3116 {
3117 XMC_ASSERT("XMC_CCU8_SLICE_SetShadowTransferMode:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
3118 slice->STC = ((slice->STC) & (uint32_t)~CCU8_CC8_STC_STM_Msk) |
3119 ((shadow_transfer_mode << CCU8_CC8_STC_STM_Pos) & (uint32_t)CCU8_CC8_STC_STM_Msk);
3120 }
3121 #endif
3122
3123 #if defined(CCU8V3) || defined(DOXYGEN)/* Defined for XMC1400 devices only */
3124 /**
3125 * @param slice Constant pointer to CC8 Slice
3126 * @param immediate_write specifies for what fields this mode has to be applied
3127 * Use :: XMC_CCU8_SLICE_WRITE_INTO_t enum items to create a mask of choice, using a bit wise OR operation.
3128 * @return <BR>
3129 * None<BR>
3130 *
3131 * \par<b>Description:</b><br>
3132 * Configures the specified fields shadow value to be updated immediately after shadow transfer request, by setting
3133 * IRPC, IRCC1, IRCC2, IRLC, IRDC, IRFC bits in STC register.\n\n
3134 *
3135 * When immediate shadow is enabled, by calling XMC_CCU8_EnableShadowTransfer() the value which are written in the
3136 * shadow registers get updated to the actual registers immediately. \par<b>Note:</b><br>
3137 *
3138 * \par<b>Related APIs:</b><br>
3139 * XMC_CCU8_EnableShadowTransfer()<BR>
3140 * @note Only available for XMC1400 series
3141 */
XMC_CCU8_SLICE_WriteImmediateAfterShadowTransfer(XMC_CCU8_SLICE_t * const slice,const uint32_t immediate_write)3142 __STATIC_INLINE void XMC_CCU8_SLICE_WriteImmediateAfterShadowTransfer(XMC_CCU8_SLICE_t *const slice,
3143 const uint32_t immediate_write)
3144 {
3145 XMC_ASSERT("XMC_CCU8_SLICE_WriteImmediateAfterShadowTransfer:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
3146 slice->STC |= immediate_write;
3147 }
3148
3149 /**
3150 * @param slice Constant pointer to CC8 Slice
3151 * @param coherent_write specifies for what fields this mode has to be applied
3152 * Use :: XMC_CCU8_SLICE_WRITE_INTO_t enum items to create a mask of choice, using a bit wise OR operation.
3153 * @return <BR>
3154 * None<BR>
3155 *
3156 * \par<b>Description:</b><br>
3157 * Configures the specified fields shadow value to be updated in synchronous with PWM after shadow transfer request, by
3158 * clearing IRPC, IRCC1, IRCC2, IRLC, IRDC, IRFC bits in STC register.\n\n
3159 *
3160 * When coherent shadow is enabled, after calling XMC_CCU8_EnableShadowTransfer(), the value which are written in the
3161 * respective shadow registers get updated according the configuration done using XMC_CCU8_SLICE_SetShadowTransferMode()
3162 * API. \par<b>Note:</b><br>
3163 *
3164 * \par<b>Related APIs:</b><br>
3165 * XMC_CCU8_EnableShadowTransfer(), XMC_CCU8_SLICE_SetShadowTransferMode()<BR>
3166 * @note Only available for XMC1400 series
3167 */
XMC_CCU8_SLICE_WriteCoherentlyWithPWMCycle(XMC_CCU8_SLICE_t * const slice,const uint32_t coherent_write)3168 __STATIC_INLINE void XMC_CCU8_SLICE_WriteCoherentlyWithPWMCycle(XMC_CCU8_SLICE_t *const slice,
3169 const uint32_t coherent_write)
3170 {
3171 XMC_ASSERT("XMC_CCU8_SLICE_WriteCoherentlyWithPWMCycle:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
3172 slice->STC &= ~(uint32_t)coherent_write;
3173 }
3174
3175 /**
3176 * @param slice Constant pointer to CC8 Slice
3177 * @param automatic_shadow_transfer specify upon which register update, automatic shadow transfer request is generated
3178 * Use :: XMC_CCU8_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_t enum items to create a mask of choice, using a
3179 * bit wise OR operation.
3180 * @return <BR>
3181 * None<BR>
3182 *
3183 * \par<b>Description:</b><br>
3184 * Configure on which shadow register update, automatic shadow transfer request generation has to be enabled. By setting
3185 * ASPC, ASCC1, ASCC2, ASLC, ASDC, ASFC bits in STC register.\n\n
3186 *
3187 * By updating the configured shadow register, the shadow transfer request is generated to update all the shadow registers.
3188 * \par<b>Note:</b><br>
3189 *
3190 * \par<b>Related APIs:</b><br>
3191 * XMC_CCU8_SLICE_DisableAutomaticShadowTransferRequest().
3192 * @note Only available for XMC1400 series
3193 */
XMC_CCU8_SLICE_EnableAutomaticShadowTransferRequest(XMC_CCU8_SLICE_t * const slice,const uint32_t automatic_shadow_transfer)3194 __STATIC_INLINE void XMC_CCU8_SLICE_EnableAutomaticShadowTransferRequest(XMC_CCU8_SLICE_t *const slice,
3195 const uint32_t automatic_shadow_transfer)
3196 {
3197 XMC_ASSERT("XMC_CCU8_SLICE_EnableAutomaticShadowTransferRequest:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
3198 slice->STC |= automatic_shadow_transfer;
3199 }
3200
3201 /**
3202 * @param slice Constant pointer to CC8 Slice
3203 * @param automatic_shadow_transfer specify upon which register update, automatic shadow transfer request should not be
3204 * generated
3205 * Use :: XMC_CCU8_SLICE_AUTOMAIC_SHADOW_TRANSFER_WRITE_INTO_t enum items to create a mask of choice, using a
3206 * bit wise OR operation.
3207 * @return <BR>
3208 * None<BR>
3209 *
3210 * \par<b>Description:</b><br>
3211 * Configure on which shadow register update, automatic shadow transfer request generation has to be disabled. By
3212 * clearing ASPC, ASCC1, ASCC2, ASLC, ASDC, ASFC bits in STC register.\n\n
3213 *
3214 * This disables the generation of automatic shadow transfer request for the specified register update.
3215 * \par<b>Note:</b><br>
3216 *
3217 * \par<b>Related APIs:</b><br>
3218 * XMC_CCU8_SLICE_EnableAutomaticShadowTransferRequest().
3219 * @note Only available for XMC1400 series
3220 */
XMC_CCU8_SLICE_DisableAutomaticShadowTransferRequest(XMC_CCU8_SLICE_t * const slice,const uint32_t automatic_shadow_transfer)3221 __STATIC_INLINE void XMC_CCU8_SLICE_DisableAutomaticShadowTransferRequest(XMC_CCU8_SLICE_t *const slice,
3222 const uint32_t automatic_shadow_transfer)
3223 {
3224 XMC_ASSERT("XMC_CCU8_SLICE_DisableAutomaticShadowTransferRequest:Invalid Slice Pointer", XMC_CCU8_IsValidSlice(slice));
3225 slice->STC &= ~(uint32_t)automatic_shadow_transfer;
3226 }
3227 #endif
3228
3229 /**
3230 * @param module Constant pointer to CCU8 module
3231 * @param slice_number Slice for which the clock should be disabled.
3232 * Range: [0x0 to 0x3]
3233 * @param channel Select which compare channel
3234 *
3235 * @return status bit of slice passive (false) or active (true)
3236 *
3237 * \par<b>Description:</b><br>
3238 * Returns CCU4 slice status bit (passive or active)
3239 *
3240 */
XMC_CCU8_GetSliceStatusBit(XMC_CCU8_MODULE_t * const module,uint8_t slice_number,XMC_CCU8_SLICE_COMPARE_CHANNEL_t channel)3241 __STATIC_INLINE XMC_CCU8_SLICE_STATUS_BIT_t XMC_CCU8_GetSliceStatusBit(XMC_CCU8_MODULE_t *const module, uint8_t slice_number, XMC_CCU8_SLICE_COMPARE_CHANNEL_t channel)
3242 {
3243 return (XMC_CCU8_SLICE_STATUS_BIT_t)((module->GCST & ((CCU8_GCST_CC80ST1_Msk << slice_number) << (channel * CCU8_GCST_CC80ST2_Pos))) ? 1: 0);
3244 }
3245
3246
3247 #ifdef __cplusplus
3248 }
3249 #endif
3250
3251 /**
3252 * @}
3253 */
3254
3255 /**
3256 * @}
3257 */
3258
3259 #endif /* defined(CCU80) */
3260
3261 #endif /* XMC_CCU8_H */
3262
3263
3264
