1;******************************************************************************* 2;* @file startup_XMC4502.s 3;* @brief CMSIS Core Device Startup File for 4;* Infineon XMC4502 Device Series 5;* @version V1.8 6;* @date June 2016 7;* 8;* @cond 9;********************************************************************************************************************* 10;* Copyright (c) 2012-2016, Infineon Technologies AG 11;* All rights reserved. 12;* 13;* Redistribution and use in source and binary forms, with or without modification,are permitted provided that the 14;* following conditions are met: 15;* 16;* Redistributions of source code must retain the above copyright notice, this list of conditions and the following 17;* disclaimer. 18;* 19;* Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following 20;* disclaimer in the documentation and/or other materials provided with the distribution. 21;* 22;* Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote 23;* products derived from this software without specific prior written permission. 24;* 25;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, 26;* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 28;* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 29;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 30;* WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32;* 33;* To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with 34;* Infineon Technologies AG dave@infineon.com). 35;********************************************************************************************************************* 36;* 37;************************** Version History ************************************ 38; V1.00, February 2012, First version 39; V1.10, August 2012, Adding Dave3 init function call 40; V1.20, February 2013, FIX for CPU prefetch bug implemented 41; V1.30, August 2013, Fix the bug of stack pointer alignment to a 8 byte boundary 42; V1.40, November 2014, Disable CPU workaround. 43; To enable the workaround add to the ASM defines: 44; ENABLE_PMU_CM_001_WORKAROUND 45; Increased stack size. 46; Removed DAVE3 dependency 47; V1.50, December 2014, Fix not available entries in vector table 48; V1.60, November 2015, Remove peripherals not included in device 49; V1.7 , March 2016, Fix weak definition of Veneers. 50; Only relevant for AA and AB step, which needs ENABLE_PMU_CM_001_WORKAROUND 51; V1.8, June 2016, Rename ENABLE_CPU_CM_001_WORKAROUND to ENABLE_PMU_CM_001_WORKAROUND 52; Action required: If using AA/AB step, use ENABLE_PMU_CM_001_WORKAROUND instead of ENABLE_CPU_CM_001_WORKAROUND 53;******************************************************************************* 54;* @endcond 55 56; ------------------ <<< Use Configuration Wizard in Context Menu >>> ------------------ 57 58; <h> Stack Configuration 59; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> 60; </h> 61 62Stack_Size EQU 0x00000800 63 64 AREA STACK, NOINIT, READWRITE, ALIGN=3 65Stack_Mem SPACE Stack_Size 66__initial_sp 67 68 69; <h> Heap Configuration 70; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> 71; </h> 72 73Heap_Size EQU 0x00000200 74 75 AREA HEAP, NOINIT, READWRITE, ALIGN=3 76__heap_base 77Heap_Mem SPACE Heap_Size 78__heap_limit 79 80 PRESERVE8 81 THUMB 82 83 IF :DEF:ENABLE_PMU_CM_001_WORKAROUND 84 MACRO 85 Entry $Handler 86 DCD $Handler._Veneer 87 MEND 88 ELSE 89 MACRO 90 Entry $Handler 91 DCD $Handler 92 MEND 93 ENDIF 94 95; Vector Table Mapped to Address 0 at Reset 96 97 AREA RESET, DATA, READONLY 98 EXPORT __Vectors 99 EXPORT __Vectors_End 100 EXPORT __Vectors_Size 101 102__Vectors DCD __initial_sp ; 0 Top of Stack 103 DCD Reset_Handler ; 1 Reset Handler 104 Entry NMI_Handler ; 2 NMI Handler 105 Entry HardFault_Handler ; 3 Hard Fault Handler 106 Entry MemManage_Handler ; 4 MPU Fault Handler 107 Entry BusFault_Handler ; 5 Bus Fault Handler 108 Entry UsageFault_Handler ; 6 Usage Fault Handler 109 DCD 0 ; 7 Reserved 110 DCD 0 ; 8 Reserved 111 DCD 0 ; 9 Reserved 112 DCD 0 ; 10 Reserved 113 Entry SVC_Handler ; 11 SVCall Handler 114 Entry DebugMon_Handler ; 12 Debug Monitor Handler 115 DCD 0 ; 13 Reserved 116 Entry PendSV_Handler ; 14 PendSV Handler 117 Entry SysTick_Handler ; 15 SysTick Handler 118 119; Interrupt Handlers for Service Requests (SR) from XMC4500 Peripherals */ 120 Entry SCU_0_IRQHandler ; Handler name for SR SCU_0 121 Entry ERU0_0_IRQHandler ; Handler name for SR ERU0_0 122 Entry ERU0_1_IRQHandler ; Handler name for SR ERU0_1 123 Entry ERU0_2_IRQHandler ; Handler name for SR ERU0_2 124 Entry ERU0_3_IRQHandler ; Handler name for SR ERU0_3 125 Entry ERU1_0_IRQHandler ; Handler name for SR ERU1_0 126 Entry ERU1_1_IRQHandler ; Handler name for SR ERU1_1 127 Entry ERU1_2_IRQHandler ; Handler name for SR ERU1_2 128 Entry ERU1_3_IRQHandler ; Handler name for SR ERU1_3 129 DCD 0 ; Not Available 130 DCD 0 ; Not Available 131 DCD 0 ; Not Available 132 Entry PMU0_0_IRQHandler ; Handler name for SR PMU0_0 133 DCD 0 ; Not Available 134 Entry VADC0_C0_0_IRQHandler ; Handler name for SR VADC0_C0_0 135 Entry VADC0_C0_1_IRQHandler ; Handler name for SR VADC0_C0_1 136 Entry VADC0_C0_2_IRQHandler ; Handler name for SR VADC0_C0_1 137 Entry VADC0_C0_3_IRQHandler ; Handler name for SR VADC0_C0_3 138 Entry VADC0_G0_0_IRQHandler ; Handler name for SR VADC0_G0_0 139 Entry VADC0_G0_1_IRQHandler ; Handler name for SR VADC0_G0_1 140 Entry VADC0_G0_2_IRQHandler ; Handler name for SR VADC0_G0_2 141 Entry VADC0_G0_3_IRQHandler ; Handler name for SR VADC0_G0_3 142 Entry VADC0_G1_0_IRQHandler ; Handler name for SR VADC0_G1_0 143 Entry VADC0_G1_1_IRQHandler ; Handler name for SR VADC0_G1_1 144 Entry VADC0_G1_2_IRQHandler ; Handler name for SR VADC0_G1_2 145 Entry VADC0_G1_3_IRQHandler ; Handler name for SR VADC0_G1_3 146 Entry VADC0_G2_0_IRQHandler ; Handler name for SR VADC0_G2_0 147 Entry VADC0_G2_1_IRQHandler ; Handler name for SR VADC0_G2_1 148 Entry VADC0_G2_2_IRQHandler ; Handler name for SR VADC0_G2_2 149 Entry VADC0_G2_3_IRQHandler ; Handler name for SR VADC0_G2_3 150 Entry VADC0_G3_0_IRQHandler ; Handler name for SR VADC0_G3_0 151 Entry VADC0_G3_1_IRQHandler ; Handler name for SR VADC0_G3_1 152 Entry VADC0_G3_2_IRQHandler ; Handler name for SR VADC0_G3_2 153 Entry VADC0_G3_3_IRQHandler ; Handler name for SR VADC0_G3_3 154 Entry DSD0_0_IRQHandler ; Handler name for SR DSD_SRM_0 155 Entry DSD0_1_IRQHandler ; Handler name for SR DSD_SRM_1 156 Entry DSD0_2_IRQHandler ; Handler name for SR DSD_SRM_2 157 Entry DSD0_3_IRQHandler ; Handler name for SR DSD_SRM_3 158 Entry DSD0_4_IRQHandler ; Handler name for SR DSD_SRA_0 159 Entry DSD0_5_IRQHandler ; Handler name for SR DSD_SRA_1 160 Entry DSD0_6_IRQHandler ; Handler name for SR DSD_SRA_2 161 Entry DSD0_7_IRQHandler ; Handler name for SR DSD_SRA_3 162 Entry DAC0_0_IRQHandler ; Handler name for SR DAC0_0 163 Entry DAC0_1_IRQHandler ; Handler name for SR DAC0_1 164 Entry CCU40_0_IRQHandler ; Handler name for SR CCU40_0 165 Entry CCU40_1_IRQHandler ; Handler name for SR CCU40_1 166 Entry CCU40_2_IRQHandler ; Handler name for SR CCU40_2 167 Entry CCU40_3_IRQHandler ; Handler name for SR CCU40_3 168 Entry CCU41_0_IRQHandler ; Handler name for SR CCU41_0 169 Entry CCU41_1_IRQHandler ; Handler name for SR CCU41_1 170 Entry CCU41_2_IRQHandler ; Handler name for SR CCU41_2 171 Entry CCU41_3_IRQHandler ; Handler name for SR CCU41_3 172 Entry CCU42_0_IRQHandler ; Handler name for SR CCU42_0 173 Entry CCU42_1_IRQHandler ; Handler name for SR CCU42_1 174 Entry CCU42_2_IRQHandler ; Handler name for SR CCU42_2 175 Entry CCU42_3_IRQHandler ; Handler name for SR CCU42_3 176 Entry CCU43_0_IRQHandler ; Handler name for SR CCU43_0 177 Entry CCU43_1_IRQHandler ; Handler name for SR CCU43_1 178 Entry CCU43_2_IRQHandler ; Handler name for SR CCU43_2 179 Entry CCU43_3_IRQHandler ; Handler name for SR CCU43_3 180 Entry CCU80_0_IRQHandler ; Handler name for SR CCU80_0 181 Entry CCU80_1_IRQHandler ; Handler name for SR CCU80_1 182 Entry CCU80_2_IRQHandler ; Handler name for SR CCU80_2 183 Entry CCU80_3_IRQHandler ; Handler name for SR CCU80_3 184 Entry CCU81_0_IRQHandler ; Handler name for SR CCU81_0 185 Entry CCU81_1_IRQHandler ; Handler name for SR CCU81_1 186 Entry CCU81_2_IRQHandler ; Handler name for SR CCU81_2 187 Entry CCU81_3_IRQHandler ; Handler name for SR CCU81_3 188 Entry POSIF0_0_IRQHandler ; Handler name for SR POSIF0_0 189 Entry POSIF0_1_IRQHandler ; Handler name for SR POSIF0_1 190 Entry POSIF1_0_IRQHandler ; Handler name for SR POSIF1_0 191 Entry POSIF1_1_IRQHandler ; Handler name for SR POSIF1_1 192 DCD 0 ; Not Available 193 DCD 0 ; Not Available 194 DCD 0 ; Not Available 195 DCD 0 ; Not Available 196 Entry CAN0_0_IRQHandler ; Handler name for SR CAN0_0 197 Entry CAN0_1_IRQHandler ; Handler name for SR CAN0_1 198 Entry CAN0_2_IRQHandler ; Handler name for SR CAN0_2 199 Entry CAN0_3_IRQHandler ; Handler name for SR CAN0_3 200 Entry CAN0_4_IRQHandler ; Handler name for SR CAN0_4 201 Entry CAN0_5_IRQHandler ; Handler name for SR CAN0_5 202 Entry CAN0_6_IRQHandler ; Handler name for SR CAN0_6 203 Entry CAN0_7_IRQHandler ; Handler name for SR CAN0_7 204 Entry USIC0_0_IRQHandler ; Handler name for SR USIC0_0 205 Entry USIC0_1_IRQHandler ; Handler name for SR USIC0_1 206 Entry USIC0_2_IRQHandler ; Handler name for SR USIC0_2 207 Entry USIC0_3_IRQHandler ; Handler name for SR USIC0_3 208 Entry USIC0_4_IRQHandler ; Handler name for SR USIC0_4 209 Entry USIC0_5_IRQHandler ; Handler name for SR USIC0_5 210 Entry USIC1_0_IRQHandler ; Handler name for SR USIC1_0 211 Entry USIC1_1_IRQHandler ; Handler name for SR USIC1_1 212 Entry USIC1_2_IRQHandler ; Handler name for SR USIC1_2 213 Entry USIC1_3_IRQHandler ; Handler name for SR USIC1_3 214 Entry USIC1_4_IRQHandler ; Handler name for SR USIC1_4 215 Entry USIC1_5_IRQHandler ; Handler name for SR USIC1_5 216 Entry USIC2_0_IRQHandler ; Handler name for SR USIC2_0 217 Entry USIC2_1_IRQHandler ; Handler name for SR USIC2_1 218 Entry USIC2_2_IRQHandler ; Handler name for SR USIC2_2 219 Entry USIC2_3_IRQHandler ; Handler name for SR USIC2_3 220 Entry USIC2_4_IRQHandler ; Handler name for SR USIC2_4 221 Entry USIC2_5_IRQHandler ; Handler name for SR USIC2_5 222 Entry LEDTS0_0_IRQHandler ; Handler name for SR LEDTS0_0 223 DCD 0 ; Not Available 224 Entry FCE0_0_IRQHandler ; Handler name for SR FCE0_0 225 Entry GPDMA0_0_IRQHandler ; Handler name for SR GPDMA0_0 226 Entry SDMMC0_0_IRQHandler ; Handler name for SR SDMMC0_0 227 Entry USB0_0_IRQHandler ; Handler name for SR USB0_0 228 DCD 0 ; Not Available 229 DCD 0 ; Not Available 230 Entry GPDMA1_0_IRQHandler ; Handler name for SR GPDMA0_1 231 DCD 0 ; Not Available 232__Vectors_End 233 234__Vectors_Size EQU __Vectors_End - __Vectors 235 236 AREA |.text|, CODE, READONLY 237 238; Reset Handler 239 240Reset_Handler PROC 241 EXPORT Reset_Handler [WEAK] 242 IMPORT SystemInit 243 IMPORT __main 244 LDR SP, =__initial_sp 245 LDR R0, =SystemInit 246 BLX R0 247 LDR R0, =__main 248 BX R0 249 ENDP 250 251; Dummy Exception Handlers (infinite loops which can be modified) 252 253Default_Handler PROC 254 EXPORT NMI_Handler [WEAK] 255 EXPORT HardFault_Handler [WEAK] 256 EXPORT MemManage_Handler [WEAK] 257 EXPORT BusFault_Handler [WEAK] 258 EXPORT UsageFault_Handler [WEAK] 259 EXPORT SVC_Handler [WEAK] 260 EXPORT DebugMon_Handler [WEAK] 261 EXPORT PendSV_Handler [WEAK] 262 EXPORT SysTick_Handler [WEAK] 263 264 EXPORT SCU_0_IRQHandler [WEAK] 265 EXPORT ERU0_0_IRQHandler [WEAK] 266 EXPORT ERU0_1_IRQHandler [WEAK] 267 EXPORT ERU0_2_IRQHandler [WEAK] 268 EXPORT ERU0_3_IRQHandler [WEAK] 269 EXPORT ERU1_0_IRQHandler [WEAK] 270 EXPORT ERU1_1_IRQHandler [WEAK] 271 EXPORT ERU1_2_IRQHandler [WEAK] 272 EXPORT ERU1_3_IRQHandler [WEAK] 273 EXPORT PMU0_0_IRQHandler [WEAK] 274 EXPORT VADC0_C0_0_IRQHandler [WEAK] 275 EXPORT VADC0_C0_1_IRQHandler [WEAK] 276 EXPORT VADC0_C0_2_IRQHandler [WEAK] 277 EXPORT VADC0_C0_3_IRQHandler [WEAK] 278 EXPORT VADC0_G0_0_IRQHandler [WEAK] 279 EXPORT VADC0_G0_1_IRQHandler [WEAK] 280 EXPORT VADC0_G0_2_IRQHandler [WEAK] 281 EXPORT VADC0_G0_3_IRQHandler [WEAK] 282 EXPORT VADC0_G1_0_IRQHandler [WEAK] 283 EXPORT VADC0_G1_1_IRQHandler [WEAK] 284 EXPORT VADC0_G1_2_IRQHandler [WEAK] 285 EXPORT VADC0_G1_3_IRQHandler [WEAK] 286 EXPORT VADC0_G2_0_IRQHandler [WEAK] 287 EXPORT VADC0_G2_1_IRQHandler [WEAK] 288 EXPORT VADC0_G2_2_IRQHandler [WEAK] 289 EXPORT VADC0_G2_3_IRQHandler [WEAK] 290 EXPORT VADC0_G3_0_IRQHandler [WEAK] 291 EXPORT VADC0_G3_1_IRQHandler [WEAK] 292 EXPORT VADC0_G3_2_IRQHandler [WEAK] 293 EXPORT VADC0_G3_3_IRQHandler [WEAK] 294 EXPORT DSD0_0_IRQHandler [WEAK] 295 EXPORT DSD0_1_IRQHandler [WEAK] 296 EXPORT DSD0_2_IRQHandler [WEAK] 297 EXPORT DSD0_3_IRQHandler [WEAK] 298 EXPORT DSD0_4_IRQHandler [WEAK] 299 EXPORT DSD0_5_IRQHandler [WEAK] 300 EXPORT DSD0_6_IRQHandler [WEAK] 301 EXPORT DSD0_7_IRQHandler [WEAK] 302 EXPORT DAC0_0_IRQHandler [WEAK] 303 EXPORT DAC0_1_IRQHandler [WEAK] 304 EXPORT CCU40_0_IRQHandler [WEAK] 305 EXPORT CCU40_1_IRQHandler [WEAK] 306 EXPORT CCU40_2_IRQHandler [WEAK] 307 EXPORT CCU40_3_IRQHandler [WEAK] 308 EXPORT CCU41_0_IRQHandler [WEAK] 309 EXPORT CCU41_1_IRQHandler [WEAK] 310 EXPORT CCU41_2_IRQHandler [WEAK] 311 EXPORT CCU41_3_IRQHandler [WEAK] 312 EXPORT CCU42_0_IRQHandler [WEAK] 313 EXPORT CCU42_1_IRQHandler [WEAK] 314 EXPORT CCU42_2_IRQHandler [WEAK] 315 EXPORT CCU42_3_IRQHandler [WEAK] 316 EXPORT CCU43_0_IRQHandler [WEAK] 317 EXPORT CCU43_1_IRQHandler [WEAK] 318 EXPORT CCU43_2_IRQHandler [WEAK] 319 EXPORT CCU43_3_IRQHandler [WEAK] 320 EXPORT CCU80_0_IRQHandler [WEAK] 321 EXPORT CCU80_1_IRQHandler [WEAK] 322 EXPORT CCU80_2_IRQHandler [WEAK] 323 EXPORT CCU80_3_IRQHandler [WEAK] 324 EXPORT CCU81_0_IRQHandler [WEAK] 325 EXPORT CCU81_1_IRQHandler [WEAK] 326 EXPORT CCU81_2_IRQHandler [WEAK] 327 EXPORT CCU81_3_IRQHandler [WEAK] 328 EXPORT POSIF0_0_IRQHandler [WEAK] 329 EXPORT POSIF0_1_IRQHandler [WEAK] 330 EXPORT POSIF1_0_IRQHandler [WEAK] 331 EXPORT POSIF1_1_IRQHandler [WEAK] 332 EXPORT CAN0_0_IRQHandler [WEAK] 333 EXPORT CAN0_1_IRQHandler [WEAK] 334 EXPORT CAN0_2_IRQHandler [WEAK] 335 EXPORT CAN0_3_IRQHandler [WEAK] 336 EXPORT CAN0_4_IRQHandler [WEAK] 337 EXPORT CAN0_5_IRQHandler [WEAK] 338 EXPORT CAN0_6_IRQHandler [WEAK] 339 EXPORT CAN0_7_IRQHandler [WEAK] 340 EXPORT USIC0_0_IRQHandler [WEAK] 341 EXPORT USIC0_1_IRQHandler [WEAK] 342 EXPORT USIC0_2_IRQHandler [WEAK] 343 EXPORT USIC0_3_IRQHandler [WEAK] 344 EXPORT USIC0_4_IRQHandler [WEAK] 345 EXPORT USIC0_5_IRQHandler [WEAK] 346 EXPORT USIC1_0_IRQHandler [WEAK] 347 EXPORT USIC1_1_IRQHandler [WEAK] 348 EXPORT USIC1_2_IRQHandler [WEAK] 349 EXPORT USIC1_3_IRQHandler [WEAK] 350 EXPORT USIC1_4_IRQHandler [WEAK] 351 EXPORT USIC1_5_IRQHandler [WEAK] 352 EXPORT USIC2_0_IRQHandler [WEAK] 353 EXPORT USIC2_1_IRQHandler [WEAK] 354 EXPORT USIC2_2_IRQHandler [WEAK] 355 EXPORT USIC2_3_IRQHandler [WEAK] 356 EXPORT USIC2_4_IRQHandler [WEAK] 357 EXPORT USIC2_5_IRQHandler [WEAK] 358 EXPORT LEDTS0_0_IRQHandler [WEAK] 359 EXPORT FCE0_0_IRQHandler [WEAK] 360 EXPORT GPDMA0_0_IRQHandler [WEAK] 361 EXPORT SDMMC0_0_IRQHandler [WEAK] 362 EXPORT USB0_0_IRQHandler [WEAK] 363 EXPORT GPDMA1_0_IRQHandler [WEAK] 364 365NMI_Handler 366HardFault_Handler 367MemManage_Handler 368BusFault_Handler 369UsageFault_Handler 370SVC_Handler 371DebugMon_Handler 372PendSV_Handler 373SysTick_Handler 374SCU_0_IRQHandler 375ERU0_0_IRQHandler 376ERU0_1_IRQHandler 377ERU0_2_IRQHandler 378ERU0_3_IRQHandler 379ERU1_0_IRQHandler 380ERU1_1_IRQHandler 381ERU1_2_IRQHandler 382ERU1_3_IRQHandler 383PMU0_0_IRQHandler 384VADC0_C0_0_IRQHandler 385VADC0_C0_1_IRQHandler 386VADC0_C0_2_IRQHandler 387VADC0_C0_3_IRQHandler 388VADC0_G0_0_IRQHandler 389VADC0_G0_1_IRQHandler 390VADC0_G0_2_IRQHandler 391VADC0_G0_3_IRQHandler 392VADC0_G1_0_IRQHandler 393VADC0_G1_1_IRQHandler 394VADC0_G1_2_IRQHandler 395VADC0_G1_3_IRQHandler 396VADC0_G2_0_IRQHandler 397VADC0_G2_1_IRQHandler 398VADC0_G2_2_IRQHandler 399VADC0_G2_3_IRQHandler 400VADC0_G3_0_IRQHandler 401VADC0_G3_1_IRQHandler 402VADC0_G3_2_IRQHandler 403VADC0_G3_3_IRQHandler 404DSD0_0_IRQHandler 405DSD0_1_IRQHandler 406DSD0_2_IRQHandler 407DSD0_3_IRQHandler 408DSD0_4_IRQHandler 409DSD0_5_IRQHandler 410DSD0_6_IRQHandler 411DSD0_7_IRQHandler 412DAC0_0_IRQHandler 413DAC0_1_IRQHandler 414CCU40_0_IRQHandler 415CCU40_1_IRQHandler 416CCU40_2_IRQHandler 417CCU40_3_IRQHandler 418CCU41_0_IRQHandler 419CCU41_1_IRQHandler 420CCU41_2_IRQHandler 421CCU41_3_IRQHandler 422CCU42_0_IRQHandler 423CCU42_1_IRQHandler 424CCU42_2_IRQHandler 425CCU42_3_IRQHandler 426CCU43_0_IRQHandler 427CCU43_1_IRQHandler 428CCU43_2_IRQHandler 429CCU43_3_IRQHandler 430CCU80_0_IRQHandler 431CCU80_1_IRQHandler 432CCU80_2_IRQHandler 433CCU80_3_IRQHandler 434CCU81_0_IRQHandler 435CCU81_1_IRQHandler 436CCU81_2_IRQHandler 437CCU81_3_IRQHandler 438POSIF0_0_IRQHandler 439POSIF0_1_IRQHandler 440POSIF1_0_IRQHandler 441POSIF1_1_IRQHandler 442CAN0_0_IRQHandler 443CAN0_1_IRQHandler 444CAN0_2_IRQHandler 445CAN0_3_IRQHandler 446CAN0_4_IRQHandler 447CAN0_5_IRQHandler 448CAN0_6_IRQHandler 449CAN0_7_IRQHandler 450USIC0_0_IRQHandler 451USIC0_1_IRQHandler 452USIC0_2_IRQHandler 453USIC0_3_IRQHandler 454USIC0_4_IRQHandler 455USIC0_5_IRQHandler 456USIC1_0_IRQHandler 457USIC1_1_IRQHandler 458USIC1_2_IRQHandler 459USIC1_3_IRQHandler 460USIC1_4_IRQHandler 461USIC1_5_IRQHandler 462USIC2_0_IRQHandler 463USIC2_1_IRQHandler 464USIC2_2_IRQHandler 465USIC2_3_IRQHandler 466USIC2_4_IRQHandler 467USIC2_5_IRQHandler 468LEDTS0_0_IRQHandler 469FCE0_0_IRQHandler 470GPDMA0_0_IRQHandler 471SDMMC0_0_IRQHandler 472USB0_0_IRQHandler 473GPDMA1_0_IRQHandler 474 475 B . 476 477 ENDP 478 479 IF :DEF:ENABLE_PMU_CM_001_WORKAROUND 480 481 MACRO 482 Insert_ExceptionHandlerVeneer $Handler_Func 483$Handler_Func._Veneer\ 484 PROC 485 EXPORT $Handler_Func._Veneer [WEAK] 486 LDR R0, =$Handler_Func 487 PUSH {LR} ;/* Breaks AAPCS */ 488 SUB SP,#4 ;/* Restores AAPCS */ 489 BLX R0 490 ADD SP,#4 491 POP {PC} 492 ALIGN 493 LTORG 494 ENDP 495 MEND 496 497 Insert_ExceptionHandlerVeneer NMI_Handler 498 Insert_ExceptionHandlerVeneer HardFault_Handler 499 Insert_ExceptionHandlerVeneer MemManage_Handler 500 Insert_ExceptionHandlerVeneer BusFault_Handler 501 Insert_ExceptionHandlerVeneer UsageFault_Handler 502 Insert_ExceptionHandlerVeneer SVC_Handler 503 Insert_ExceptionHandlerVeneer DebugMon_Handler 504 Insert_ExceptionHandlerVeneer PendSV_Handler 505 Insert_ExceptionHandlerVeneer SysTick_Handler 506 507 Insert_ExceptionHandlerVeneer SCU_0_IRQHandler 508 Insert_ExceptionHandlerVeneer ERU0_0_IRQHandler 509 Insert_ExceptionHandlerVeneer ERU0_1_IRQHandler 510 Insert_ExceptionHandlerVeneer ERU0_2_IRQHandler 511 Insert_ExceptionHandlerVeneer ERU0_3_IRQHandler 512 Insert_ExceptionHandlerVeneer ERU1_0_IRQHandler 513 Insert_ExceptionHandlerVeneer ERU1_1_IRQHandler 514 Insert_ExceptionHandlerVeneer ERU1_2_IRQHandler 515 Insert_ExceptionHandlerVeneer ERU1_3_IRQHandler 516 Insert_ExceptionHandlerVeneer PMU0_0_IRQHandler 517 Insert_ExceptionHandlerVeneer VADC0_C0_0_IRQHandler 518 Insert_ExceptionHandlerVeneer VADC0_C0_1_IRQHandler 519 Insert_ExceptionHandlerVeneer VADC0_C0_2_IRQHandler 520 Insert_ExceptionHandlerVeneer VADC0_C0_3_IRQHandler 521 Insert_ExceptionHandlerVeneer VADC0_G0_0_IRQHandler 522 Insert_ExceptionHandlerVeneer VADC0_G0_1_IRQHandler 523 Insert_ExceptionHandlerVeneer VADC0_G0_2_IRQHandler 524 Insert_ExceptionHandlerVeneer VADC0_G0_3_IRQHandler 525 Insert_ExceptionHandlerVeneer VADC0_G1_0_IRQHandler 526 Insert_ExceptionHandlerVeneer VADC0_G1_1_IRQHandler 527 Insert_ExceptionHandlerVeneer VADC0_G1_2_IRQHandler 528 Insert_ExceptionHandlerVeneer VADC0_G1_3_IRQHandler 529 Insert_ExceptionHandlerVeneer VADC0_G2_0_IRQHandler 530 Insert_ExceptionHandlerVeneer VADC0_G2_1_IRQHandler 531 Insert_ExceptionHandlerVeneer VADC0_G2_2_IRQHandler 532 Insert_ExceptionHandlerVeneer VADC0_G2_3_IRQHandler 533 Insert_ExceptionHandlerVeneer VADC0_G3_0_IRQHandler 534 Insert_ExceptionHandlerVeneer VADC0_G3_1_IRQHandler 535 Insert_ExceptionHandlerVeneer VADC0_G3_2_IRQHandler 536 Insert_ExceptionHandlerVeneer VADC0_G3_3_IRQHandler 537 Insert_ExceptionHandlerVeneer DSD0_0_IRQHandler 538 Insert_ExceptionHandlerVeneer DSD0_1_IRQHandler 539 Insert_ExceptionHandlerVeneer DSD0_2_IRQHandler 540 Insert_ExceptionHandlerVeneer DSD0_3_IRQHandler 541 Insert_ExceptionHandlerVeneer DSD0_4_IRQHandler 542 Insert_ExceptionHandlerVeneer DSD0_5_IRQHandler 543 Insert_ExceptionHandlerVeneer DSD0_6_IRQHandler 544 Insert_ExceptionHandlerVeneer DSD0_7_IRQHandler 545 Insert_ExceptionHandlerVeneer DAC0_0_IRQHandler 546 Insert_ExceptionHandlerVeneer DAC0_1_IRQHandler 547 Insert_ExceptionHandlerVeneer CCU40_0_IRQHandler 548 Insert_ExceptionHandlerVeneer CCU40_1_IRQHandler 549 Insert_ExceptionHandlerVeneer CCU40_2_IRQHandler 550 Insert_ExceptionHandlerVeneer CCU40_3_IRQHandler 551 Insert_ExceptionHandlerVeneer CCU41_0_IRQHandler 552 Insert_ExceptionHandlerVeneer CCU41_1_IRQHandler 553 Insert_ExceptionHandlerVeneer CCU41_2_IRQHandler 554 Insert_ExceptionHandlerVeneer CCU41_3_IRQHandler 555 Insert_ExceptionHandlerVeneer CCU42_0_IRQHandler 556 Insert_ExceptionHandlerVeneer CCU42_1_IRQHandler 557 Insert_ExceptionHandlerVeneer CCU42_2_IRQHandler 558 Insert_ExceptionHandlerVeneer CCU42_3_IRQHandler 559 Insert_ExceptionHandlerVeneer CCU43_0_IRQHandler 560 Insert_ExceptionHandlerVeneer CCU43_1_IRQHandler 561 Insert_ExceptionHandlerVeneer CCU43_2_IRQHandler 562 Insert_ExceptionHandlerVeneer CCU43_3_IRQHandler 563 Insert_ExceptionHandlerVeneer CCU80_0_IRQHandler 564 Insert_ExceptionHandlerVeneer CCU80_1_IRQHandler 565 Insert_ExceptionHandlerVeneer CCU80_2_IRQHandler 566 Insert_ExceptionHandlerVeneer CCU80_3_IRQHandler 567 Insert_ExceptionHandlerVeneer CCU81_0_IRQHandler 568 Insert_ExceptionHandlerVeneer CCU81_1_IRQHandler 569 Insert_ExceptionHandlerVeneer CCU81_2_IRQHandler 570 Insert_ExceptionHandlerVeneer CCU81_3_IRQHandler 571 Insert_ExceptionHandlerVeneer POSIF0_0_IRQHandler 572 Insert_ExceptionHandlerVeneer POSIF0_1_IRQHandler 573 Insert_ExceptionHandlerVeneer POSIF1_0_IRQHandler 574 Insert_ExceptionHandlerVeneer POSIF1_1_IRQHandler 575 Insert_ExceptionHandlerVeneer CAN0_0_IRQHandler 576 Insert_ExceptionHandlerVeneer CAN0_1_IRQHandler 577 Insert_ExceptionHandlerVeneer CAN0_2_IRQHandler 578 Insert_ExceptionHandlerVeneer CAN0_3_IRQHandler 579 Insert_ExceptionHandlerVeneer CAN0_4_IRQHandler 580 Insert_ExceptionHandlerVeneer CAN0_5_IRQHandler 581 Insert_ExceptionHandlerVeneer CAN0_6_IRQHandler 582 Insert_ExceptionHandlerVeneer CAN0_7_IRQHandler 583 Insert_ExceptionHandlerVeneer USIC0_0_IRQHandler 584 Insert_ExceptionHandlerVeneer USIC0_1_IRQHandler 585 Insert_ExceptionHandlerVeneer USIC0_2_IRQHandler 586 Insert_ExceptionHandlerVeneer USIC0_3_IRQHandler 587 Insert_ExceptionHandlerVeneer USIC0_4_IRQHandler 588 Insert_ExceptionHandlerVeneer USIC0_5_IRQHandler 589 Insert_ExceptionHandlerVeneer USIC1_0_IRQHandler 590 Insert_ExceptionHandlerVeneer USIC1_1_IRQHandler 591 Insert_ExceptionHandlerVeneer USIC1_2_IRQHandler 592 Insert_ExceptionHandlerVeneer USIC1_3_IRQHandler 593 Insert_ExceptionHandlerVeneer USIC1_4_IRQHandler 594 Insert_ExceptionHandlerVeneer USIC1_5_IRQHandler 595 Insert_ExceptionHandlerVeneer USIC2_0_IRQHandler 596 Insert_ExceptionHandlerVeneer USIC2_1_IRQHandler 597 Insert_ExceptionHandlerVeneer USIC2_2_IRQHandler 598 Insert_ExceptionHandlerVeneer USIC2_3_IRQHandler 599 Insert_ExceptionHandlerVeneer USIC2_4_IRQHandler 600 Insert_ExceptionHandlerVeneer USIC2_5_IRQHandler 601 Insert_ExceptionHandlerVeneer LEDTS0_0_IRQHandler 602 Insert_ExceptionHandlerVeneer FCE0_0_IRQHandler 603 Insert_ExceptionHandlerVeneer GPDMA0_0_IRQHandler 604 Insert_ExceptionHandlerVeneer SDMMC0_0_IRQHandler 605 Insert_ExceptionHandlerVeneer USB0_0_IRQHandler 606 Insert_ExceptionHandlerVeneer GPDMA1_0_IRQHandler 607 ENDIF 608 609 ALIGN 610 611; User Initial Stack & Heap 612 613 IF :DEF:__MICROLIB 614 615 EXPORT __initial_sp 616 EXPORT __heap_base 617 EXPORT __heap_limit 618 619 ELSE 620 621 IMPORT __use_two_region_memory 622 EXPORT __user_initial_stackheap 623__user_initial_stackheap 624 625 LDR R0, = Heap_Mem 626 LDR R1, =(Stack_Mem + Stack_Size) 627 LDR R2, = (Heap_Mem + Heap_Size) 628 LDR R3, = Stack_Mem 629 BX LR 630 631 ALIGN 632 633 ENDIF 634 635 636 END 637
