1 /*!
2 \file gd32e50x_tmu.c
3 \brief TMU driver
4
5 \version 2020-03-10, V1.0.0, firmware for GD32E50x
6 \version 2020-08-26, V1.1.0, firmware for GD32E50x
7 \version 2021-03-23, V1.2.0, firmware for GD32E50x
8 */
9
10 /*
11 Copyright (c) 2021, GigaDevice Semiconductor Inc.
12
13 Redistribution and use in source and binary forms, with or without modification,
14 are permitted provided that the following conditions are met:
15
16 1. Redistributions of source code must retain the above copyright notice, this
17 list of conditions and the following disclaimer.
18 2. Redistributions in binary form must reproduce the above copyright notice,
19 this list of conditions and the following disclaimer in the documentation
20 and/or other materials provided with the distribution.
21 3. Neither the name of the copyright holder nor the names of its contributors
22 may be used to endorse or promote products derived from this software without
23 specific prior written permission.
24
25 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
27 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29 INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
30 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
31 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
32 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
34 OF SUCH DAMAGE.
35 */
36
37 #include "gd32e50x_tmu.h"
38
39 #if defined(GD32E50X_CL) || defined(GD32E508)
40
41 /*!
42 \brief reset the TMU
43 \param[in] none
44 \param[out] none
45 \retval none
46 */
tmu_deinit(void)47 void tmu_deinit(void)
48 {
49 /* reset TMU */
50 rcu_periph_reset_enable(RCU_TMURST);
51 rcu_periph_reset_disable(RCU_TMURST);
52 }
53
54 /*!
55 \brief enable the TMU
56 \param[in] none
57 \param[out] none
58 \retval none
59 */
tmu_enable(void)60 void tmu_enable(void)
61 {
62 TMU_CTL |= (uint32_t)TMU_CTL_TMUEN;
63 }
64
65 /*!
66 \brief configure the TMU mode
67 \param[in] modex: the operation mode of TMU
68 \arg TMU_MODE0: the operation mode0
69 \arg TMU_MODE1: the operation mode1
70 \arg TMU_MODE2: the operation mode2
71 \arg TMU_MODE2: the operation mode3
72 \arg TMU_MODE2: the operation mode4
73 \arg TMU_MODE1: the operation mode5
74 \arg TMU_MODE2: the operation mode6
75 \arg TMU_MODE2: the operation mode7
76 \arg TMU_MODE2: the operation mode8
77 \param[out] none
78 \retval none
79 */
tmu_mode_set(uint32_t modex)80 void tmu_mode_set(uint32_t modex)
81 {
82 TMU_CTL &= (uint32_t)(~ TMU_CTL_MODE);
83 TMU_CTL |= (uint32_t)modex;
84
85 }
86
87 /*!
88 \brief write the data to TMU input data0 regisetr
89 \param[in] idata0: the value write to input data0
90 idata0 must meet IEEE 32-Bit Single Precision Floating-Point Format.
91 \param[out] none
92 \retval none
93 */
tmu_idata0_write(uint32_t idata0)94 void tmu_idata0_write(uint32_t idata0)
95 {
96 TMU_IDATA0 &= (uint32_t)(~ TMU_IDATA0_IDATA0);
97 TMU_IDATA0 = idata0;
98 }
99
100 /*!
101 \brief write the data to TMU input data1 regisetr
102 \param[in] idata1: the value write to input data1(idata1 only uesed for MODE6,MODE7,MODE8)
103 idata1 must meet IEEE 32-Bit Single Precision Floating-Point Format
104 \param[out] none
105 \retval none
106 */
tmu_idata1_write(uint32_t idata1)107 void tmu_idata1_write(uint32_t idata1)
108 {
109 TMU_IDATA1 &= (uint32_t)(~ TMU_IDATA1_IDATA1);
110 TMU_IDATA1 = idata1;
111 }
112
113 /*!
114 \brief read the data from TMU data0 regisetr
115 \param[in] none
116 \param[out] none
117 \retval 32-bit value of the data0 register.
118 the value of data0 register meet IEEE 32-Bit Single Precision Floating-Point Format
119 */
tmu_data0_read(void)120 uint32_t tmu_data0_read(void)
121 {
122 uint32_t data0;
123 data0 = TMU_DATA0;
124 return (data0);
125 }
126
127 /*!
128 \brief read the data from TMU data1 regisetr
129 \param[in] none
130 \param[out] none
131 \retval 32-bit value of the data1 register.
132 the value of data1 register meet IEEE 32-Bit Single Precision Floating-Point Format
133 */
tmu_data1_read(void)134 uint32_t tmu_data1_read(void)
135 {
136 uint32_t data1;
137 data1 = TMU_DATA1;
138 return (data1);
139 }
140
141 /*!
142 \brief enable TMU interrupt
143 \param[in] none
144 \param[out] none
145 \retval none
146 */
tmu_interrupt_enable(void)147 void tmu_interrupt_enable(void)
148 {
149 TMU_CTL &= (uint32_t)(~ TMU_CTL_CFIE);
150 TMU_CTL |= (uint32_t)TMU_CTL_CFIE;
151 }
152
153 /*!
154 \brief disable TMU interrupt
155 \param[in] none
156 \param[out] none
157 \retval none
158 */
tmu_interrupt_disable(void)159 void tmu_interrupt_disable(void)
160 {
161 TMU_CTL &= (uint32_t)(~ TMU_CTL_CFIE);
162 }
163
164 /*!
165 \brief check the TMU status flag
166 \param[in] flag: teh TMU status flag
167 only one parameter can be selected which is shown as below:
168 \arg TMU_FLAG_OVRF: the flag of TMU overflow
169 \arg TMU_FLAG_UDRF: the flag of TMU underflow
170 \param[out] none
171 \retval none
172 */
tmu_flag_get(uint32_t flag)173 FlagStatus tmu_flag_get(uint32_t flag)
174 {
175 if(TMU_STAT & flag){
176 return SET;
177 }else{
178 return RESET;
179 }
180 }
181
182 /*!
183 \brief check teh TMU interrupt flag
184 \param[in] int_flag: teh TMU interrupt flag
185 \arg TMU_INT_FLAG_CFIF: the interrupt flag of calculation finished
186 \param[out] none
187 \retval none
188 */
tmu_interrupt_flag_get(uint32_t int_flag)189 FlagStatus tmu_interrupt_flag_get(uint32_t int_flag)
190 {
191 uint32_t reg = TMU_CTL;
192 if(reg & TMU_CTL_CFIE){
193 return SET;
194 }else{
195 return RESET;
196 }
197 }
198
199 #endif /* GD32E50x_CL and GD32E508 */
