1config SPIRAM
2    bool "Support for external, SPI-connected RAM"
3    default "n"
4    help
5        This enables support for an external SPI RAM chip, connected in parallel with the
6        main SPI flash chip.
7
8menu "SPI RAM config"
9    depends on SPIRAM
10
11    config SPIRAM_MODE_QUAD
12        bool
13        default "y"
14
15    choice SPIRAM_TYPE
16        prompt "Type of SPI RAM chip in use"
17        default SPIRAM_TYPE_AUTO
18
19        config SPIRAM_TYPE_AUTO
20            bool "Auto-detect"
21
22        config SPIRAM_TYPE_ESPPSRAM16
23            bool "ESP-PSRAM16 or APS1604"
24
25        config SPIRAM_TYPE_ESPPSRAM32
26            bool "ESP-PSRAM32"
27
28        config SPIRAM_TYPE_ESPPSRAM64
29            bool "ESP-PSRAM64 or LY68L6400"
30
31    endchoice
32
33    choice SPIRAM_SPEED
34        prompt "Set RAM clock speed"
35        default SPIRAM_SPEED_40M
36        help
37            Select the speed for the SPI RAM chip.
38            If SPI RAM is enabled, we only support three combinations of SPI speed mode we supported now:
39
40            1. Flash SPI running at 40Mhz and RAM SPI running at 40Mhz
41            2. Flash SPI running at 80Mhz and RAM SPI running at 40Mhz
42            3. Flash SPI running at 80Mhz and RAM SPI running at 80Mhz
43
44            Note: If the third mode(80Mhz+80Mhz) is enabled for SPI RAM of type 32MBit, one of the HSPI/VSPI host
45            will be occupied by the system. Which SPI host to use can be selected by the config item
46            SPIRAM_OCCUPY_SPI_HOST. Application code should never touch HSPI/VSPI hardware in this case. The
47            option to select 80MHz will only be visible if the flash SPI speed is also 80MHz.
48            (ESPTOOLPY_FLASHFREQ_80M is true)
49
50        config SPIRAM_SPEED_40M
51            bool "40MHz clock speed"
52        config SPIRAM_SPEED_80M
53            depends on ESPTOOLPY_FLASHFREQ_80M
54            bool "80MHz clock speed"
55    endchoice
56
57    config SPIRAM_SPEED
58        int
59        default 80 if SPIRAM_SPEED_80M
60        default 40 if SPIRAM_SPEED_40M
61
62    source "$IDF_PATH/components/esp_psram/Kconfig.spiram.common"    # insert non-chip-specific items here
63
64    config SPIRAM_CACHE_WORKAROUND
65        bool "Enable workaround for bug in SPI RAM cache for Rev1 ESP32s"
66        depends on (SPIRAM_USE_MEMMAP || SPIRAM_USE_CAPS_ALLOC || SPIRAM_USE_MALLOC) && (ESP32_REV_MIN_FULL < 300)
67        default "y"
68        help
69            Revision 1 of the ESP32 has a bug that can cause a write to PSRAM not to take place in some situations
70            when the cache line needs to be fetched from external RAM and an interrupt occurs. This enables a
71            fix in the compiler (-mfix-esp32-psram-cache-issue) that makes sure the specific code that is
72            vulnerable to this will not be emitted.
73
74            This will also not use any bits of newlib that are located in ROM, opting for a version that is
75            compiled with the workaround and located in flash instead.
76
77            The workaround is not required for ESP32 revision 3 and above.
78
79    menu "SPIRAM cache workaround debugging"
80
81        choice SPIRAM_CACHE_WORKAROUND_STRATEGY
82            prompt "Workaround strategy"
83            depends on SPIRAM_CACHE_WORKAROUND
84            default SPIRAM_CACHE_WORKAROUND_STRATEGY_MEMW
85            help
86                Select the workaround strategy. Note that the strategy for precompiled
87                libraries (libgcc, newlib, bt, wifi) is not affected by this selection.
88
89                Unless you know you need a different strategy, it's suggested you stay
90                with the default MEMW strategy. Note that DUPLDST can interfere with hardware
91                encryption and this will be automatically disabled if this workaround is selected.
92                'Insert nops' is the workaround that was used in older esp-idf versions. This workaround
93                still can cause faulty data transfers from/to SPI RAM in some situation.
94
95            config SPIRAM_CACHE_WORKAROUND_STRATEGY_MEMW
96                bool "Insert memw after vulnerable instructions (default)"
97
98            config SPIRAM_CACHE_WORKAROUND_STRATEGY_DUPLDST
99                bool "Duplicate LD/ST for 32-bit, memw for 8/16 bit"
100
101            config SPIRAM_CACHE_WORKAROUND_STRATEGY_NOPS
102                bool "Insert nops between vulnerable loads/stores (old strategy, obsolete)"
103        endchoice
104
105        #This needs to be Y only for the dupldst workaround
106        config SPIRAM_WORKAROUND_NEED_VOLATILE_SPINLOCK
107            bool
108            default "y" if SPIRAM_CACHE_WORKAROUND_STRATEGY_DUPLDST
109    endmenu
110
111    menu "SPIRAM workaround libraries placement"
112        visible if SPIRAM_CACHE_WORKAROUND
113
114        config SPIRAM_CACHE_LIBJMP_IN_IRAM
115            bool "Put libc's jump related functions in IRAM"
116            depends on SPIRAM_CACHE_WORKAROUND
117            default "y"
118            help
119                The functions affected by this option are: longjmp and setjmp.
120                Putting these function in IRAM will allow them to be called when flash cache is disabled
121                but it will also reduce the available size of free IRAM for the user application.
122
123        config SPIRAM_CACHE_LIBMATH_IN_IRAM
124            bool "Put libc's math related functions in IRAM"
125            depends on SPIRAM_CACHE_WORKAROUND
126            default "y"
127            help
128                The functions affected by this option are: abs, div, labs, ldiv, quorem, fpclassify,
129                and nan.
130                Putting these function in IRAM will allow them to be called when flash cache is disabled
131                but it will also reduce the available size of free IRAM for the user application.
132
133        config SPIRAM_CACHE_LIBNUMPARSER_IN_IRAM
134            bool "Put libc's number parsing related functions in IRAM"
135            depends on SPIRAM_CACHE_WORKAROUND
136            default "y"
137            help
138                The functions affected by this option are: utoa, itoa, atoi, atol, strtol, and strtoul.
139                Putting these function in IRAM will allow them to be called when flash cache is disabled
140                but it will also reduce the available size of free IRAM for the user application.
141
142        config SPIRAM_CACHE_LIBIO_IN_IRAM
143            bool "Put libc's I/O related functions in IRAM"
144            depends on SPIRAM_CACHE_WORKAROUND
145            default "y"
146            help
147                The functions affected by this option are: wcrtomb, fvwrite, wbuf, wsetup, fputwc, wctomb_r,
148                ungetc, makebuf, fflush, refill, and sccl.
149                Putting these function in IRAM will allow them to be called when flash cache is disabled
150                but it will also reduce the available size of free IRAM for the user application.
151
152        config SPIRAM_CACHE_LIBTIME_IN_IRAM
153            bool "Put libc's time related functions in IRAM"
154            depends on SPIRAM_CACHE_WORKAROUND
155            default "y"
156            help
157                The functions affected by this option are: asctime, asctime_r, ctime, ctime_r, lcltime, lcltime_r,
158                gmtime, gmtime_r, strftime, mktime, tzset_r, tzset, time, gettzinfo, systimes, month_lengths,
159                timelocal, tzvars, tzlock, tzcalc_limits, and strptime.
160                Putting these function in IRAM will allow them to be called when flash cache is disabled
161                but it will also reduce the available size of free IRAM for the user application.
162
163        config SPIRAM_CACHE_LIBCHAR_IN_IRAM
164            bool "Put libc's characters related functions in IRAM"
165            depends on SPIRAM_CACHE_WORKAROUND
166            default "y"
167            help
168                The functions affected by this option are: ctype_, toupper, tolower, toascii, strupr, bzero,
169                isalnum, isalpha, isascii, isblank, iscntrl, isdigit, isgraph, islower, isprint, ispunct,
170                isspace, and isupper.
171                Putting these function in IRAM will allow them to be called when flash cache is disabled
172                but it will also reduce the available size of free IRAM for the user application.
173
174        config SPIRAM_CACHE_LIBMEM_IN_IRAM
175            bool "Put libc's memory related functions in IRAM"
176            depends on SPIRAM_CACHE_WORKAROUND
177            default "y"
178            help
179                The functions affected by this option are: memccpy, memchr memmove, and memrchr.
180                Putting these function in IRAM will allow them to be called when flash cache is disabled
181                but it will also reduce the available size of free IRAM for the user application.
182
183        config SPIRAM_CACHE_LIBSTR_IN_IRAM
184            bool "Put libc's string related functions in IRAM"
185            depends on SPIRAM_CACHE_WORKAROUND
186            default "y"
187            help
188                The functions affected by this option are: strcasecmp, strcasestr, strchr, strcoll,
189                strcpy, strcspn, strdup, strdup_r, strlcat, strlcpy, strlen, strlwr, strncasecmp,
190                strncat, strncmp, strncpy, strndup, strndup_r, strrchr, strsep, strspn, strstr,
191                strtok_r, and strupr.
192                Putting these function in IRAM will allow them to be called when flash cache is disabled
193                but it will also reduce the available size of free IRAM for the user application.
194
195        config SPIRAM_CACHE_LIBRAND_IN_IRAM
196            bool "Put libc's random related functions in IRAM"
197            depends on SPIRAM_CACHE_WORKAROUND
198            default "y"
199            help
200                The functions affected by this option are: srand, rand, and rand_r.
201                Putting these function in IRAM will allow them to be called when flash cache is disabled
202                but it will also reduce the available size of free IRAM for the user application.
203
204        config SPIRAM_CACHE_LIBENV_IN_IRAM
205            bool "Put libc's environment related functions in IRAM"
206            depends on SPIRAM_CACHE_WORKAROUND
207            default "y"
208            help
209                The functions affected by this option are: environ, envlock, and getenv_r.
210                Putting these function in IRAM will allow them to be called when flash cache is disabled
211                but it will also reduce the available size of free IRAM for the user application.
212
213        config SPIRAM_CACHE_LIBFILE_IN_IRAM
214            bool "Put libc's file related functions in IRAM"
215            depends on SPIRAM_CACHE_WORKAROUND
216            default "y"
217            help
218                The functions affected by this option are: lock, isatty, fclose, open, close, creat, read,
219                rshift, sbrk, stdio, syssbrk, sysclose, sysopen, creat, sysread, syswrite, impure, fwalk,
220                and findfp.
221                Putting these function in IRAM will allow them to be called when flash cache is disabled
222                but it will also reduce the available size of free IRAM for the user application.
223
224        config SPIRAM_CACHE_LIBMISC_IN_IRAM
225            bool "Put libc's miscellaneous functions in IRAM, see help"
226            depends on SPIRAM_CACHE_WORKAROUND
227            default "y"
228            help
229                The functions affected by this option are: raise and system
230                Putting these function in IRAM will allow them to be called when flash cache is disabled
231                but it will also reduce the available size of free IRAM for the user application.
232    endmenu
233
234    config SPIRAM_BANKSWITCH_ENABLE
235        bool "Enable bank switching for >4MiB external RAM"
236        default y
237        depends on SPIRAM_USE_MEMMAP || SPIRAM_USE_CAPS_ALLOC || SPIRAM_USE_MALLOC
238        help
239            The ESP32 only supports 4MiB of external RAM in its address space. The hardware does support larger
240            memories, but these have to be bank-switched in and out of this address space. Enabling this allows you
241            to reserve some MMU pages for this, which allows the use of the esp_himem api to manage these banks.
242
243            #Note that this is limited to 62 banks, as esp_psram_extram_writeback_cache needs some kind of mapping of
244            #some banks below that mark to work. We cannot at this moment guarantee this to exist when himem is
245            #enabled.
246
247            If spiram 2T mode is enabled, the size of 64Mbit psram will be changed as 32Mbit, so himem will be
248            unusable.
249    config SPIRAM_BANKSWITCH_RESERVE
250        int "Amount of 32K pages to reserve for bank switching"
251        depends on SPIRAM_BANKSWITCH_ENABLE
252        default 8
253        range 1 62
254        help
255            Select the amount of banks reserved for bank switching. Note that the amount of RAM allocatable with
256            malloc/esp_heap_alloc_caps will decrease by 32K for each page reserved here.
257
258            Note that this reservation is only actually done if your program actually uses the himem API. Without
259            any himem calls, the reservation is not done and the original amount of memory will be available
260            to malloc/esp_heap_alloc_caps.
261
262    config SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
263        bool "Allow external memory as an argument to xTaskCreateStatic"
264        default n
265        depends on SPIRAM_USE_MALLOC
266        help
267            Because some bits of the ESP32 code environment cannot be recompiled with the cache workaround,
268            normally tasks cannot be safely run with their stack residing in external memory; for this reason
269            xTaskCreate (and related task creaton functions) always allocate stack in internal memory and
270            xTaskCreateStatic will check if the memory passed to it is in internal memory. If you have a task that
271            needs a large amount of stack and does not call on ROM code in any way (no direct calls, but also no
272            Bluetooth/WiFi), you can try enable this to cause xTaskCreateStatic to allow tasks stack in external
273            memory.
274
275    choice SPIRAM_OCCUPY_SPI_HOST
276        prompt "SPI host to use for 32MBit PSRAM"
277        default SPIRAM_OCCUPY_VSPI_HOST
278        depends on SPIRAM_SPEED_80M
279        help
280            When both flash and PSRAM is working under 80MHz, and the PSRAM is of type 32MBit, one of the HSPI/VSPI
281            host will be used to output the clock. Select which one to use here.
282
283        config SPIRAM_OCCUPY_HSPI_HOST
284            bool "HSPI host (SPI2)"
285        config SPIRAM_OCCUPY_VSPI_HOST
286            bool "VSPI host (SPI3)"
287        config SPIRAM_OCCUPY_NO_HOST
288            bool "Will not try to use any host, will abort if not able to use the PSRAM"
289
290    endchoice
291
292    menu "PSRAM clock and cs IO for ESP32-DOWD"
293
294        config D0WD_PSRAM_CLK_IO
295            int "PSRAM CLK IO number"
296            depends on SPIRAM
297            range 0 33
298            default 17
299            help
300                The PSRAM CLOCK IO can be any unused GPIO, user can config it based on hardware design. If user use
301                1.8V flash and 1.8V psram, this value can only be one of 6, 7, 8, 9, 10, 11, 16, 17.
302
303        config D0WD_PSRAM_CS_IO
304            int "PSRAM CS IO number"
305            depends on SPIRAM
306            range 0 33
307            default 16
308            help
309                The PSRAM CS IO can be any unused GPIO, user can config it based on hardware design. If user use
310                1.8V flash and 1.8V psram, this value can only be one of 6, 7, 8, 9, 10, 11, 16, 17.
311    endmenu
312
313    menu "PSRAM clock and cs IO for ESP32-D2WD"
314
315        config D2WD_PSRAM_CLK_IO
316            int "PSRAM CLK IO number"
317            depends on SPIRAM
318            range 0 33
319            default 9
320            help
321                User can config it based on hardware design. For ESP32-D2WD chip, the psram can only be 1.8V psram,
322                so this value can only be one of 6, 7, 8, 9, 10, 11, 16, 17.
323
324        config D2WD_PSRAM_CS_IO
325            int "PSRAM CS IO number"
326            depends on SPIRAM
327            range 0 33
328            default 10
329            help
330                User can config it based on hardware design. For ESP32-D2WD chip, the psram can only be 1.8V psram,
331                so this value can only be one of 6, 7, 8, 9, 10, 11, 16, 17.
332    endmenu
333
334    menu "PSRAM clock and cs IO for ESP32-PICO"
335
336        config PICO_PSRAM_CS_IO
337            int "PSRAM CS IO number"
338            depends on SPIRAM
339            range 0 33
340            default 10
341            help
342                The PSRAM CS IO can be any unused GPIO, user can config it based on hardware design.
343
344                For ESP32-PICO chip, the psram share clock with flash, so user do not need to configure the clock
345                IO.
346                For the reference hardware design, please refer to
347                https://www.espressif.com/sites/default/files/documentation/esp32-pico-d4_datasheet_en.pdf
348
349    endmenu
350
351    config SPIRAM_CUSTOM_SPIWP_SD3_PIN
352        bool "Use custom SPI PSRAM WP(SD3) Pin when flash pins set in eFuse (read help)"
353        depends on IDF_TARGET_ESP32 && (ESPTOOLPY_FLASHMODE_DIO || ESPTOOLPY_FLASHMODE_DOUT)
354        default y if SPIRAM_SPIWP_SD3_PIN != 7  # backwards compatibility, can remove in IDF 5
355        default n
356        help
357            This setting is only used if the SPI flash pins have been overridden by setting the eFuses
358            SPI_PAD_CONFIG_xxx, and the SPI flash mode is DIO or DOUT.
359
360            When this is the case, the eFuse config only defines 3 of the 4 Quad I/O data pins. The WP pin (aka
361            ESP32 pin "SD_DATA_3" or SPI flash pin "IO2") is not specified in eFuse. The psram only has QPI
362            mode, so a WP pin setting is necessary.
363
364            If this config item is set to N (default), the correct WP pin will be automatically used for any
365            Espressif chip or module with integrated flash. If a custom setting is needed, set this config item
366            to Y and specify the GPIO number connected to the WP pin.
367
368            When flash mode is set to QIO or QOUT, the PSRAM WP pin will be set the same as the SPI Flash WP pin
369            configured in the bootloader.
370
371    config SPIRAM_SPIWP_SD3_PIN
372        int "Custom SPI PSRAM WP(SD3) Pin"
373        depends on IDF_TARGET_ESP32 && (ESPTOOLPY_FLASHMODE_DIO || ESPTOOLPY_FLASHMODE_DOUT)
374        #depends on SPIRAM_CUSTOM_SPIWP_SD3_PIN  # backwards compatibility, can uncomment in IDF 5
375        range 0 33
376        default 7
377        help
378            The option "Use custom SPI PSRAM WP(SD3) pin" must be set or this value is ignored
379
380            If burning a customized set of SPI flash pins in eFuse and using DIO or DOUT mode for flash, set this
381            value to the GPIO number of the SPIRAM WP pin.
382
383    config SPIRAM_2T_MODE
384        bool "Enable SPI PSRAM 2T mode"
385        depends on SPIRAM
386        default "n"
387        help
388            Enable this option to fix single bit errors inside 64Mbit PSRAM.
389
390            Some 64Mbit PSRAM chips have a hardware issue in the RAM which causes bit errors at multiple
391            fixed bit positions.
392
393            Note: If this option is enabled, the 64Mbit PSRAM chip will appear to be 32Mbit in size.
394            Applications will not be affected unless the use the esp_himem APIs, which are not supported
395            in 2T mode.
396
397endmenu # "SPI RAM config"
398