1 // Copyright 2019 Espressif Systems (Shanghai) PTE LTD
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 
7 //     http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14 
15 // The HAL layer for LEDC (common part)
16 
17 #include "esp_attr.h"
18 #include "hal/ledc_hal.h"
19 #include "soc/soc_caps.h"
20 
ledc_hal_init(ledc_hal_context_t * hal,ledc_mode_t speed_mode)21 void ledc_hal_init(ledc_hal_context_t *hal, ledc_mode_t speed_mode)
22 {
23     //Get hardware instance.
24     hal->dev = LEDC_LL_GET_HW();
25     hal->speed_mode = speed_mode;
26 }
27 
ledc_hal_get_clk_cfg(ledc_hal_context_t * hal,ledc_timer_t timer_sel,ledc_clk_cfg_t * clk_cfg)28 void ledc_hal_get_clk_cfg(ledc_hal_context_t *hal, ledc_timer_t timer_sel, ledc_clk_cfg_t *clk_cfg)
29 {
30     ledc_clk_src_t clk_src = LEDC_APB_CLK;
31     ledc_hal_get_clock_source(hal, timer_sel, &clk_src);
32     if (clk_src == LEDC_REF_TICK) {
33         *clk_cfg = LEDC_USE_REF_TICK;
34     } else {
35         *clk_cfg = LEDC_USE_APB_CLK;
36         if (hal->speed_mode == LEDC_LOW_SPEED_MODE) {
37             ledc_slow_clk_sel_t slow_clk = LEDC_SLOW_CLK_APB;
38             ledc_hal_get_slow_clk_sel(hal, &slow_clk);
39             if (slow_clk == LEDC_SLOW_CLK_RTC8M) {
40                 *clk_cfg = LEDC_USE_RTC8M_CLK;
41 #if SOC_LEDC_SUPPORT_XTAL_CLOCK
42             } else if (slow_clk == LEDC_SLOW_CLK_XTAL) {
43                 *clk_cfg = LEDC_USE_XTAL_CLK;
44 #endif
45             }
46         }
47     }
48 }
49 
ledc_hal_set_slow_clk(ledc_hal_context_t * hal,ledc_clk_cfg_t clk_cfg)50 void ledc_hal_set_slow_clk(ledc_hal_context_t *hal, ledc_clk_cfg_t clk_cfg)
51 {
52     // For low speed channels, if RTC_8MCLK is used as the source clock, the `slow_clk_sel` register should be cleared, otherwise it should be set.
53     ledc_slow_clk_sel_t slow_clk_sel = LEDC_SLOW_CLK_APB;
54 #if SOC_LEDC_SUPPORT_XTAL_CLOCK
55     slow_clk_sel = (clk_cfg == LEDC_USE_RTC8M_CLK) ? LEDC_SLOW_CLK_RTC8M :
56                                        ((clk_cfg == LEDC_USE_XTAL_CLK) ? LEDC_SLOW_CLK_XTAL : LEDC_SLOW_CLK_APB);
57 #else
58     slow_clk_sel = (clk_cfg == LEDC_USE_RTC8M_CLK) ? LEDC_SLOW_CLK_RTC8M : LEDC_SLOW_CLK_APB;
59 #endif
60     ledc_hal_set_slow_clk_sel(hal, slow_clk_sel);
61 }
62