1  /*
2   * Autogenerated file
3   *
4   * SPDX-License-Identifier: Apache-2.0
5   */
6  
7  #include <dt-bindings/pinctrl/atmel_sam_pinctrl.h>
8  
9  /* pa0_gpio */
10  #define PA0_GPIO \
11  	SAM_PINMUX(a, 0, gpio, gpio)
12  
13  /* pa0a_can0_tx */
14  #define PA0A_CAN0_TX \
15  	SAM_PINMUX(a, 0, a, periph)
16  
17  /* pa0b_pwm_pwml3 */
18  #define PA0B_PWM_PWML3 \
19  	SAM_PINMUX(a, 0, b, periph)
20  
21  /* pa1_gpio */
22  #define PA1_GPIO \
23  	SAM_PINMUX(a, 1, gpio, gpio)
24  
25  /* pa1a_can0_rx */
26  #define PA1A_CAN0_RX \
27  	SAM_PINMUX(a, 1, a, periph)
28  
29  /* pa1b_pmc_pck0 */
30  #define PA1B_PMC_PCK0 \
31  	SAM_PINMUX(a, 1, b, periph)
32  
33  /* pa1x_supc_wkup0 */
34  #define PA1X_SUPC_WKUP0 \
35  	SAM_PINMUX(a, 1, wkup0, wakeup)
36  
37  /* pa2_gpio */
38  #define PA2_GPIO \
39  	SAM_PINMUX(a, 2, gpio, gpio)
40  
41  /* pa2a_tc0_tioa1 */
42  #define PA2A_TC0_TIOA1 \
43  	SAM_PINMUX(a, 2, a, periph)
44  
45  /* pa2b_ebi_nandrdy */
46  #define PA2B_EBI_NANDRDY \
47  	SAM_PINMUX(a, 2, b, periph)
48  
49  /* pa2x_adc_ad0 */
50  #define PA2X_ADC_AD0 \
51  	SAM_PINMUX(a, 2, x, extra)
52  
53  /* pa3_gpio */
54  #define PA3_GPIO \
55  	SAM_PINMUX(a, 3, gpio, gpio)
56  
57  /* pa3a_tc0_tiob1 */
58  #define PA3A_TC0_TIOB1 \
59  	SAM_PINMUX(a, 3, a, periph)
60  
61  /* pa3b_pwm_pwmfi1 */
62  #define PA3B_PWM_PWMFI1 \
63  	SAM_PINMUX(a, 3, b, periph)
64  
65  /* pa3x_adc_ad1 */
66  #define PA3X_ADC_AD1 \
67  	SAM_PINMUX(a, 3, x, extra)
68  
69  /* pa3x_supc_wkup1 */
70  #define PA3X_SUPC_WKUP1 \
71  	SAM_PINMUX(a, 3, wkup1, wakeup)
72  
73  /* pa4_gpio */
74  #define PA4_GPIO \
75  	SAM_PINMUX(a, 4, gpio, gpio)
76  
77  /* pa4a_tc0_tclk1 */
78  #define PA4A_TC0_TCLK1 \
79  	SAM_PINMUX(a, 4, a, periph)
80  
81  /* pa4b_ebi_nwait */
82  #define PA4B_EBI_NWAIT \
83  	SAM_PINMUX(a, 4, b, periph)
84  
85  /* pa4x_adc_ad2 */
86  #define PA4X_ADC_AD2 \
87  	SAM_PINMUX(a, 4, x, extra)
88  
89  /* pa5_gpio */
90  #define PA5_GPIO \
91  	SAM_PINMUX(a, 5, gpio, gpio)
92  
93  /* pa5a_tc0_tioa2 */
94  #define PA5A_TC0_TIOA2 \
95  	SAM_PINMUX(a, 5, a, periph)
96  
97  /* pa5b_pwm_pwmfi0 */
98  #define PA5B_PWM_PWMFI0 \
99  	SAM_PINMUX(a, 5, b, periph)
100  
101  /* pa5x_supc_wkup2 */
102  #define PA5X_SUPC_WKUP2 \
103  	SAM_PINMUX(a, 5, wkup2, wakeup)
104  
105  /* pa6_gpio */
106  #define PA6_GPIO \
107  	SAM_PINMUX(a, 6, gpio, gpio)
108  
109  /* pa6a_tc0_tiob2 */
110  #define PA6A_TC0_TIOB2 \
111  	SAM_PINMUX(a, 6, a, periph)
112  
113  /* pa6b_ebi_ncs0 */
114  #define PA6B_EBI_NCS0 \
115  	SAM_PINMUX(a, 6, b, periph)
116  
117  /* pa6x_adc_ad3 */
118  #define PA6X_ADC_AD3 \
119  	SAM_PINMUX(a, 6, x, extra)
120  
121  /* pa7_gpio */
122  #define PA7_GPIO \
123  	SAM_PINMUX(a, 7, gpio, gpio)
124  
125  /* pa7a_tc0_tclk2 */
126  #define PA7A_TC0_TCLK2 \
127  	SAM_PINMUX(a, 7, a, periph)
128  
129  /* pa7b_ebi_ncs1 */
130  #define PA7B_EBI_NCS1 \
131  	SAM_PINMUX(a, 7, b, periph)
132  
133  /* pa7x_supc_wkup3 */
134  #define PA7X_SUPC_WKUP3 \
135  	SAM_PINMUX(a, 7, wkup3, wakeup)
136  
137  /* pa8_gpio */
138  #define PA8_GPIO \
139  	SAM_PINMUX(a, 8, gpio, gpio)
140  
141  /* pa8a_uart_rxd */
142  #define PA8A_UART_RXD \
143  	SAM_PINMUX(a, 8, a, periph)
144  
145  /* pa8b_pwm_pwmh0 */
146  #define PA8B_PWM_PWMH0 \
147  	SAM_PINMUX(a, 8, b, periph)
148  
149  /* pa8x_supc_wkup4 */
150  #define PA8X_SUPC_WKUP4 \
151  	SAM_PINMUX(a, 8, wkup4, wakeup)
152  
153  /* pa9_gpio */
154  #define PA9_GPIO \
155  	SAM_PINMUX(a, 9, gpio, gpio)
156  
157  /* pa9a_uart_txd */
158  #define PA9A_UART_TXD \
159  	SAM_PINMUX(a, 9, a, periph)
160  
161  /* pa9b_pwm_pwmh3 */
162  #define PA9B_PWM_PWMH3 \
163  	SAM_PINMUX(a, 9, b, periph)
164  
165  /* pa10_gpio */
166  #define PA10_GPIO \
167  	SAM_PINMUX(a, 10, gpio, gpio)
168  
169  /* pa10a_usart0_rxd */
170  #define PA10A_USART0_RXD \
171  	SAM_PINMUX(a, 10, a, periph)
172  
173  /* pa10b_dacc_datrg */
174  #define PA10B_DACC_DATRG \
175  	SAM_PINMUX(a, 10, b, periph)
176  
177  /* pa10x_supc_wkup5 */
178  #define PA10X_SUPC_WKUP5 \
179  	SAM_PINMUX(a, 10, wkup5, wakeup)
180  
181  /* pa11_gpio */
182  #define PA11_GPIO \
183  	SAM_PINMUX(a, 11, gpio, gpio)
184  
185  /* pa11a_usart0_txd */
186  #define PA11A_USART0_TXD \
187  	SAM_PINMUX(a, 11, a, periph)
188  
189  /* pa11b_adc_adtrg */
190  #define PA11B_ADC_ADTRG \
191  	SAM_PINMUX(a, 11, b, periph)
192  
193  /* pa11x_supc_wkup6 */
194  #define PA11X_SUPC_WKUP6 \
195  	SAM_PINMUX(a, 11, wkup6, wakeup)
196  
197  /* pa12_gpio */
198  #define PA12_GPIO \
199  	SAM_PINMUX(a, 12, gpio, gpio)
200  
201  /* pa12a_usart1_rxd */
202  #define PA12A_USART1_RXD \
203  	SAM_PINMUX(a, 12, a, periph)
204  
205  /* pa12b_pwm_pwml1 */
206  #define PA12B_PWM_PWML1 \
207  	SAM_PINMUX(a, 12, b, periph)
208  
209  /* pa12x_supc_wkup7 */
210  #define PA12X_SUPC_WKUP7 \
211  	SAM_PINMUX(a, 12, wkup7, wakeup)
212  
213  /* pa13_gpio */
214  #define PA13_GPIO \
215  	SAM_PINMUX(a, 13, gpio, gpio)
216  
217  /* pa13a_usart1_txd */
218  #define PA13A_USART1_TXD \
219  	SAM_PINMUX(a, 13, a, periph)
220  
221  /* pa13b_pwm_pwmh2 */
222  #define PA13B_PWM_PWMH2 \
223  	SAM_PINMUX(a, 13, b, periph)
224  
225  /* pa14_gpio */
226  #define PA14_GPIO \
227  	SAM_PINMUX(a, 14, gpio, gpio)
228  
229  /* pa14a_usart1_rts */
230  #define PA14A_USART1_RTS \
231  	SAM_PINMUX(a, 14, a, periph)
232  
233  /* pa14b_ssc_tk */
234  #define PA14B_SSC_TK \
235  	SAM_PINMUX(a, 14, b, periph)
236  
237  /* pa15_gpio */
238  #define PA15_GPIO \
239  	SAM_PINMUX(a, 15, gpio, gpio)
240  
241  /* pa15a_usart1_cts */
242  #define PA15A_USART1_CTS \
243  	SAM_PINMUX(a, 15, a, periph)
244  
245  /* pa15b_ssc_tf */
246  #define PA15B_SSC_TF \
247  	SAM_PINMUX(a, 15, b, periph)
248  
249  /* pa15x_supc_wkup8 */
250  #define PA15X_SUPC_WKUP8 \
251  	SAM_PINMUX(a, 15, wkup8, wakeup)
252  
253  /* pa16_gpio */
254  #define PA16_GPIO \
255  	SAM_PINMUX(a, 16, gpio, gpio)
256  
257  /* pa16a_spi1_spck1 */
258  #define PA16A_SPI1_SPCK1 \
259  	SAM_PINMUX(a, 16, a, periph)
260  
261  /* pa16b_ssc_td */
262  #define PA16B_SSC_TD \
263  	SAM_PINMUX(a, 16, b, periph)
264  
265  /* pa16x_adc_ad7 */
266  #define PA16X_ADC_AD7 \
267  	SAM_PINMUX(a, 16, x, extra)
268  
269  /* pa17_gpio */
270  #define PA17_GPIO \
271  	SAM_PINMUX(a, 17, gpio, gpio)
272  
273  /* pa17a_twi0_twd */
274  #define PA17A_TWI0_TWD \
275  	SAM_PINMUX(a, 17, a, periph)
276  
277  /* pa17b_spi0_spck0 */
278  #define PA17B_SPI0_SPCK0 \
279  	SAM_PINMUX(a, 17, b, periph)
280  
281  /* pa18_gpio */
282  #define PA18_GPIO \
283  	SAM_PINMUX(a, 18, gpio, gpio)
284  
285  /* pa18a_twi0_twck */
286  #define PA18A_TWI0_TWCK \
287  	SAM_PINMUX(a, 18, a, periph)
288  
289  /* pa18b_ebi_a20 */
290  #define PA18B_EBI_A20 \
291  	SAM_PINMUX(a, 18, b, periph)
292  
293  /* pa18x_supc_wkup9 */
294  #define PA18X_SUPC_WKUP9 \
295  	SAM_PINMUX(a, 18, wkup9, wakeup)
296  
297  /* pa19_gpio */
298  #define PA19_GPIO \
299  	SAM_PINMUX(a, 19, gpio, gpio)
300  
301  /* pa19a_hsmci_mcck */
302  #define PA19A_HSMCI_MCCK \
303  	SAM_PINMUX(a, 19, a, periph)
304  
305  /* pa19b_pwm_pwmh1 */
306  #define PA19B_PWM_PWMH1 \
307  	SAM_PINMUX(a, 19, b, periph)
308  
309  /* pa20_gpio */
310  #define PA20_GPIO \
311  	SAM_PINMUX(a, 20, gpio, gpio)
312  
313  /* pa20a_hsmci_mccda */
314  #define PA20A_HSMCI_MCCDA \
315  	SAM_PINMUX(a, 20, a, periph)
316  
317  /* pa20b_pwm_pwml2 */
318  #define PA20B_PWM_PWML2 \
319  	SAM_PINMUX(a, 20, b, periph)
320  
321  /* pa21_gpio */
322  #define PA21_GPIO \
323  	SAM_PINMUX(a, 21, gpio, gpio)
324  
325  /* pa21a_hsmci_mcda0 */
326  #define PA21A_HSMCI_MCDA0 \
327  	SAM_PINMUX(a, 21, a, periph)
328  
329  /* pa21b_pwm_pwml0 */
330  #define PA21B_PWM_PWML0 \
331  	SAM_PINMUX(a, 21, b, periph)
332  
333  /* pa22_gpio */
334  #define PA22_GPIO \
335  	SAM_PINMUX(a, 22, gpio, gpio)
336  
337  /* pa22a_hsmci_mcda1 */
338  #define PA22A_HSMCI_MCDA1 \
339  	SAM_PINMUX(a, 22, a, periph)
340  
341  /* pa22b_tc1_tclk3 */
342  #define PA22B_TC1_TCLK3 \
343  	SAM_PINMUX(a, 22, b, periph)
344  
345  /* pa22x_adc_ad4 */
346  #define PA22X_ADC_AD4 \
347  	SAM_PINMUX(a, 22, x, extra)
348  
349  /* pa23_gpio */
350  #define PA23_GPIO \
351  	SAM_PINMUX(a, 23, gpio, gpio)
352  
353  /* pa23a_hsmci_mcda2 */
354  #define PA23A_HSMCI_MCDA2 \
355  	SAM_PINMUX(a, 23, a, periph)
356  
357  /* pa23b_tc1_tclk4 */
358  #define PA23B_TC1_TCLK4 \
359  	SAM_PINMUX(a, 23, b, periph)
360  
361  /* pa23x_adc_ad5 */
362  #define PA23X_ADC_AD5 \
363  	SAM_PINMUX(a, 23, x, extra)
364  
365  /* pa24_gpio */
366  #define PA24_GPIO \
367  	SAM_PINMUX(a, 24, gpio, gpio)
368  
369  /* pa24a_hsmci_mcda3 */
370  #define PA24A_HSMCI_MCDA3 \
371  	SAM_PINMUX(a, 24, a, periph)
372  
373  /* pa24b_pmc_pck1 */
374  #define PA24B_PMC_PCK1 \
375  	SAM_PINMUX(a, 24, b, periph)
376  
377  /* pa24x_adc_ad6 */
378  #define PA24X_ADC_AD6 \
379  	SAM_PINMUX(a, 24, x, extra)
380  
381  /* pa25_gpio */
382  #define PA25_GPIO \
383  	SAM_PINMUX(a, 25, gpio, gpio)
384  
385  /* pa25a_spi0_miso */
386  #define PA25A_SPI0_MISO \
387  	SAM_PINMUX(a, 25, a, periph)
388  
389  /* pa25b_ebi_a18 */
390  #define PA25B_EBI_A18 \
391  	SAM_PINMUX(a, 25, b, periph)
392  
393  /* pa26_gpio */
394  #define PA26_GPIO \
395  	SAM_PINMUX(a, 26, gpio, gpio)
396  
397  /* pa26a_spi0_mosi */
398  #define PA26A_SPI0_MOSI \
399  	SAM_PINMUX(a, 26, a, periph)
400  
401  /* pa26b_ebi_a19 */
402  #define PA26B_EBI_A19 \
403  	SAM_PINMUX(a, 26, b, periph)
404  
405  /* pa27_gpio */
406  #define PA27_GPIO \
407  	SAM_PINMUX(a, 27, gpio, gpio)
408  
409  /* pa27a_spi0_spck */
410  #define PA27A_SPI0_SPCK \
411  	SAM_PINMUX(a, 27, a, periph)
412  
413  /* pa27b_ebi_a20 */
414  #define PA27B_EBI_A20 \
415  	SAM_PINMUX(a, 27, b, periph)
416  
417  /* pa27x_supc_wkup10 */
418  #define PA27X_SUPC_WKUP10 \
419  	SAM_PINMUX(a, 27, wkup10, wakeup)
420  
421  /* pa28_gpio */
422  #define PA28_GPIO \
423  	SAM_PINMUX(a, 28, gpio, gpio)
424  
425  /* pa28a_spi0_npcs0 */
426  #define PA28A_SPI0_NPCS0 \
427  	SAM_PINMUX(a, 28, a, periph)
428  
429  /* pa28b_pmc_pck2 */
430  #define PA28B_PMC_PCK2 \
431  	SAM_PINMUX(a, 28, b, periph)
432  
433  /* pa28x_supc_wkup11 */
434  #define PA28X_SUPC_WKUP11 \
435  	SAM_PINMUX(a, 28, wkup11, wakeup)
436  
437  /* pa29_gpio */
438  #define PA29_GPIO \
439  	SAM_PINMUX(a, 29, gpio, gpio)
440  
441  /* pa29a_spi0_npcs1 */
442  #define PA29A_SPI0_NPCS1 \
443  	SAM_PINMUX(a, 29, a, periph)
444  
445  /* pa29b_ebi_nrd */
446  #define PA29B_EBI_NRD \
447  	SAM_PINMUX(a, 29, b, periph)
448  
449  /* pa30_gpio */
450  #define PA30_GPIO \
451  	SAM_PINMUX(a, 30, gpio, gpio)
452  
453  /* pa30a_spi0_npcs2 */
454  #define PA30A_SPI0_NPCS2 \
455  	SAM_PINMUX(a, 30, a, periph)
456  
457  /* pa30b_pmc_pck1 */
458  #define PA30B_PMC_PCK1 \
459  	SAM_PINMUX(a, 30, b, periph)
460  
461  /* pa31_gpio */
462  #define PA31_GPIO \
463  	SAM_PINMUX(a, 31, gpio, gpio)
464  
465  /* pa31a_spi_npcs3 */
466  #define PA31A_SPI_NPCS3 \
467  	SAM_PINMUX(a, 31, a, periph)
468  
469  /* pa31b_pmc_pck2 */
470  #define PA31B_PMC_PCK2 \
471  	SAM_PINMUX(a, 31, b, periph)
472  
473  /* pb0_gpio */
474  #define PB0_GPIO \
475  	SAM_PINMUX(b, 0, gpio, gpio)
476  
477  /* pb0a_emac_etxck_erefck */
478  #define PB0A_EMAC_ETXCK_EREFCK \
479  	SAM_PINMUX(b, 0, a, periph)
480  
481  /* pb0b_tc1_tioa3 */
482  #define PB0B_TC1_TIOA3 \
483  	SAM_PINMUX(b, 0, b, periph)
484  
485  /* pb1_gpio */
486  #define PB1_GPIO \
487  	SAM_PINMUX(b, 1, gpio, gpio)
488  
489  /* pb1a_emac_etxen */
490  #define PB1A_EMAC_ETXEN \
491  	SAM_PINMUX(b, 1, a, periph)
492  
493  /* pb1b_tc1_tiob3 */
494  #define PB1B_TC1_TIOB3 \
495  	SAM_PINMUX(b, 1, b, periph)
496  
497  /* pb2_gpio */
498  #define PB2_GPIO \
499  	SAM_PINMUX(b, 2, gpio, gpio)
500  
501  /* pb2a_emac_etx0 */
502  #define PB2A_EMAC_ETX0 \
503  	SAM_PINMUX(b, 2, a, periph)
504  
505  /* pb2b_tc1_tioa4 */
506  #define PB2B_TC1_TIOA4 \
507  	SAM_PINMUX(b, 2, b, periph)
508  
509  /* pb3_gpio */
510  #define PB3_GPIO \
511  	SAM_PINMUX(b, 3, gpio, gpio)
512  
513  /* pb3a_emac_etx1 */
514  #define PB3A_EMAC_ETX1 \
515  	SAM_PINMUX(b, 3, a, periph)
516  
517  /* pb3b_tc1_tiob4 */
518  #define PB3B_TC1_TIOB4 \
519  	SAM_PINMUX(b, 3, b, periph)
520  
521  /* pb4_gpio */
522  #define PB4_GPIO \
523  	SAM_PINMUX(b, 4, gpio, gpio)
524  
525  /* pb4a_emac_ecrsdv_erxdv */
526  #define PB4A_EMAC_ECRSDV_ERXDV \
527  	SAM_PINMUX(b, 4, a, periph)
528  
529  /* pb4b_tc1_tioa5 */
530  #define PB4B_TC1_TIOA5 \
531  	SAM_PINMUX(b, 4, b, periph)
532  
533  /* pb5_gpio */
534  #define PB5_GPIO \
535  	SAM_PINMUX(b, 5, gpio, gpio)
536  
537  /* pb5a_emac_erx0 */
538  #define PB5A_EMAC_ERX0 \
539  	SAM_PINMUX(b, 5, a, periph)
540  
541  /* pb5b_tc1_tiob5 */
542  #define PB5B_TC1_TIOB5 \
543  	SAM_PINMUX(b, 5, b, periph)
544  
545  /* pb6_gpio */
546  #define PB6_GPIO \
547  	SAM_PINMUX(b, 6, gpio, gpio)
548  
549  /* pb6a_emac_erx1 */
550  #define PB6A_EMAC_ERX1 \
551  	SAM_PINMUX(b, 6, a, periph)
552  
553  /* pb6b_pwm_pwml4 */
554  #define PB6B_PWM_PWML4 \
555  	SAM_PINMUX(b, 6, b, periph)
556  
557  /* pb7_gpio */
558  #define PB7_GPIO \
559  	SAM_PINMUX(b, 7, gpio, gpio)
560  
561  /* pb7a_emac_erxer */
562  #define PB7A_EMAC_ERXER \
563  	SAM_PINMUX(b, 7, a, periph)
564  
565  /* pb7b_pwm_pwml5 */
566  #define PB7B_PWM_PWML5 \
567  	SAM_PINMUX(b, 7, b, periph)
568  
569  /* pb8_gpio */
570  #define PB8_GPIO \
571  	SAM_PINMUX(b, 8, gpio, gpio)
572  
573  /* pb8a_emac_emdc */
574  #define PB8A_EMAC_EMDC \
575  	SAM_PINMUX(b, 8, a, periph)
576  
577  /* pb8b_pwm_pwml6 */
578  #define PB8B_PWM_PWML6 \
579  	SAM_PINMUX(b, 8, b, periph)
580  
581  /* pb9_gpio */
582  #define PB9_GPIO \
583  	SAM_PINMUX(b, 9, gpio, gpio)
584  
585  /* pb9a_emac_emdio */
586  #define PB9A_EMAC_EMDIO \
587  	SAM_PINMUX(b, 9, a, periph)
588  
589  /* pb9b_pwm_pwml7 */
590  #define PB9B_PWM_PWML7 \
591  	SAM_PINMUX(b, 9, b, periph)
592  
593  /* pb10_gpio */
594  #define PB10_GPIO \
595  	SAM_PINMUX(b, 10, gpio, gpio)
596  
597  /* pb10a_uotg_vbof */
598  #define PB10A_UOTG_VBOF \
599  	SAM_PINMUX(b, 10, a, periph)
600  
601  /* pb10b_ebi_a18 */
602  #define PB10B_EBI_A18 \
603  	SAM_PINMUX(b, 10, b, periph)
604  
605  /* pb11_gpio */
606  #define PB11_GPIO \
607  	SAM_PINMUX(b, 11, gpio, gpio)
608  
609  /* pb11a_uotg_id */
610  #define PB11A_UOTG_ID \
611  	SAM_PINMUX(b, 11, a, periph)
612  
613  /* pb11b_ebi_a19 */
614  #define PB11B_EBI_A19 \
615  	SAM_PINMUX(b, 11, b, periph)
616  
617  /* pb12_gpio */
618  #define PB12_GPIO \
619  	SAM_PINMUX(b, 12, gpio, gpio)
620  
621  /* pb12a_twi1_twd */
622  #define PB12A_TWI1_TWD \
623  	SAM_PINMUX(b, 12, a, periph)
624  
625  /* pb12b_pwm_pwmh0 */
626  #define PB12B_PWM_PWMH0 \
627  	SAM_PINMUX(b, 12, b, periph)
628  
629  /* pb12x_adc_ad8 */
630  #define PB12X_ADC_AD8 \
631  	SAM_PINMUX(b, 12, x, extra)
632  
633  /* pb13_gpio */
634  #define PB13_GPIO \
635  	SAM_PINMUX(b, 13, gpio, gpio)
636  
637  /* pb13a_twi1_twck */
638  #define PB13A_TWI1_TWCK \
639  	SAM_PINMUX(b, 13, a, periph)
640  
641  /* pb13b_pwm_pwmh1 */
642  #define PB13B_PWM_PWMH1 \
643  	SAM_PINMUX(b, 13, b, periph)
644  
645  /* pb13x_adc_ad9 */
646  #define PB13X_ADC_AD9 \
647  	SAM_PINMUX(b, 13, x, extra)
648  
649  /* pb14_gpio */
650  #define PB14_GPIO \
651  	SAM_PINMUX(b, 14, gpio, gpio)
652  
653  /* pb14a_can1_tx */
654  #define PB14A_CAN1_TX \
655  	SAM_PINMUX(b, 14, a, periph)
656  
657  /* pb14b_pwm_pwmh2 */
658  #define PB14B_PWM_PWMH2 \
659  	SAM_PINMUX(b, 14, b, periph)
660  
661  /* pb15_gpio */
662  #define PB15_GPIO \
663  	SAM_PINMUX(b, 15, gpio, gpio)
664  
665  /* pb15a_can1_rx */
666  #define PB15A_CAN1_RX \
667  	SAM_PINMUX(b, 15, a, periph)
668  
669  /* pb15b_pwm_pwmh3 */
670  #define PB15B_PWM_PWMH3 \
671  	SAM_PINMUX(b, 15, b, periph)
672  
673  /* pb15x_dacc_dac0 */
674  #define PB15X_DACC_DAC0 \
675  	SAM_PINMUX(b, 15, x, extra)
676  
677  /* pb15x_supc_wkup10 */
678  #define PB15X_SUPC_WKUP10 \
679  	SAM_PINMUX(b, 15, wkup10, wakeup)
680  
681  /* pb16_gpio */
682  #define PB16_GPIO \
683  	SAM_PINMUX(b, 16, gpio, gpio)
684  
685  /* pb16a_tc1_tclk5 */
686  #define PB16A_TC1_TCLK5 \
687  	SAM_PINMUX(b, 16, a, periph)
688  
689  /* pb16b_pwm_pwml0 */
690  #define PB16B_PWM_PWML0 \
691  	SAM_PINMUX(b, 16, b, periph)
692  
693  /* pb16x_dacc_dac1 */
694  #define PB16X_DACC_DAC1 \
695  	SAM_PINMUX(b, 16, x, extra)
696  
697  /* pb17_gpio */
698  #define PB17_GPIO \
699  	SAM_PINMUX(b, 17, gpio, gpio)
700  
701  /* pb17a_ssc_rf */
702  #define PB17A_SSC_RF \
703  	SAM_PINMUX(b, 17, a, periph)
704  
705  /* pb17b_pwm_pwml1 */
706  #define PB17B_PWM_PWML1 \
707  	SAM_PINMUX(b, 17, b, periph)
708  
709  /* pb17x_adc_ad10 */
710  #define PB17X_ADC_AD10 \
711  	SAM_PINMUX(b, 17, x, extra)
712  
713  /* pb18_gpio */
714  #define PB18_GPIO \
715  	SAM_PINMUX(b, 18, gpio, gpio)
716  
717  /* pb18a_ssc_rd */
718  #define PB18A_SSC_RD \
719  	SAM_PINMUX(b, 18, a, periph)
720  
721  /* pb18b_pwm_pwml2 */
722  #define PB18B_PWM_PWML2 \
723  	SAM_PINMUX(b, 18, b, periph)
724  
725  /* pb18x_adc_ad11 */
726  #define PB18X_ADC_AD11 \
727  	SAM_PINMUX(b, 18, x, extra)
728  
729  /* pb19_gpio */
730  #define PB19_GPIO \
731  	SAM_PINMUX(b, 19, gpio, gpio)
732  
733  /* pb19a_ssc_rk */
734  #define PB19A_SSC_RK \
735  	SAM_PINMUX(b, 19, a, periph)
736  
737  /* pb19b_pwm_pwml3 */
738  #define PB19B_PWM_PWML3 \
739  	SAM_PINMUX(b, 19, b, periph)
740  
741  /* pb19x_adc_ad12 */
742  #define PB19X_ADC_AD12 \
743  	SAM_PINMUX(b, 19, x, extra)
744  
745  /* pb20_gpio */
746  #define PB20_GPIO \
747  	SAM_PINMUX(b, 20, gpio, gpio)
748  
749  /* pb20a_usart2_txd */
750  #define PB20A_USART2_TXD \
751  	SAM_PINMUX(b, 20, a, periph)
752  
753  /* pb20b_spi0_npcs1 */
754  #define PB20B_SPI0_NPCS1 \
755  	SAM_PINMUX(b, 20, b, periph)
756  
757  /* pb20x_adc_ad13 */
758  #define PB20X_ADC_AD13 \
759  	SAM_PINMUX(b, 20, x, extra)
760  
761  /* pb21_gpio */
762  #define PB21_GPIO \
763  	SAM_PINMUX(b, 21, gpio, gpio)
764  
765  /* pb21a_usart2_rxd */
766  #define PB21A_USART2_RXD \
767  	SAM_PINMUX(b, 21, a, periph)
768  
769  /* pb21b_spi0_npcs2 */
770  #define PB21B_SPI0_NPCS2 \
771  	SAM_PINMUX(b, 21, b, periph)
772  
773  /* pb21x_adc_ad14 */
774  #define PB21X_ADC_AD14 \
775  	SAM_PINMUX(b, 21, x, extra)
776  
777  /* pb21x_supc_wkup13 */
778  #define PB21X_SUPC_WKUP13 \
779  	SAM_PINMUX(b, 21, wkup13, wakeup)
780  
781  /* pb22_gpio */
782  #define PB22_GPIO \
783  	SAM_PINMUX(b, 22, gpio, gpio)
784  
785  /* pb22a_usart2_rts */
786  #define PB22A_USART2_RTS \
787  	SAM_PINMUX(b, 22, a, periph)
788  
789  /* pb22b_pmc_pck0 */
790  #define PB22B_PMC_PCK0 \
791  	SAM_PINMUX(b, 22, b, periph)
792  
793  /* pb23_gpio */
794  #define PB23_GPIO \
795  	SAM_PINMUX(b, 23, gpio, gpio)
796  
797  /* pb23a_usart2_cts */
798  #define PB23A_USART2_CTS \
799  	SAM_PINMUX(b, 23, a, periph)
800  
801  /* pb23b_spi0_npcs3 */
802  #define PB23B_SPI0_NPCS3 \
803  	SAM_PINMUX(b, 23, b, periph)
804  
805  /* pb23x_supc_wkup14 */
806  #define PB23X_SUPC_WKUP14 \
807  	SAM_PINMUX(b, 23, wkup14, wakeup)
808  
809  /* pb24_gpio */
810  #define PB24_GPIO \
811  	SAM_PINMUX(b, 24, gpio, gpio)
812  
813  /* pb24a_usart2_sck */
814  #define PB24A_USART2_SCK \
815  	SAM_PINMUX(b, 24, a, periph)
816  
817  /* pb24b_ebi_ncs2 */
818  #define PB24B_EBI_NCS2 \
819  	SAM_PINMUX(b, 24, b, periph)
820  
821  /* pb25_gpio */
822  #define PB25_GPIO \
823  	SAM_PINMUX(b, 25, gpio, gpio)
824  
825  /* pb25a_usart0_rts */
826  #define PB25A_USART0_RTS \
827  	SAM_PINMUX(b, 25, a, periph)
828  
829  /* pb25b_tc0_tioa0 */
830  #define PB25B_TC0_TIOA0 \
831  	SAM_PINMUX(b, 25, b, periph)
832  
833  /* pb26_gpio */
834  #define PB26_GPIO \
835  	SAM_PINMUX(b, 26, gpio, gpio)
836  
837  /* pb26a_usart0_cts */
838  #define PB26A_USART0_CTS \
839  	SAM_PINMUX(b, 26, a, periph)
840  
841  /* pb26b_tc0_tclk0 */
842  #define PB26B_TC0_TCLK0 \
843  	SAM_PINMUX(b, 26, b, periph)
844  
845  /* pb26x_supc_wkup15 */
846  #define PB26X_SUPC_WKUP15 \
847  	SAM_PINMUX(b, 26, wkup15, wakeup)
848  
849  /* pb27_gpio */
850  #define PB27_GPIO \
851  	SAM_PINMUX(b, 27, gpio, gpio)
852  
853  /* pb27a_ebi_ncs3 */
854  #define PB27A_EBI_NCS3 \
855  	SAM_PINMUX(b, 27, a, periph)
856  
857  /* pb27b_tc0_tiob0 */
858  #define PB27B_TC0_TIOB0 \
859  	SAM_PINMUX(b, 27, b, periph)
860  
861  /* pb28_gpio */
862  #define PB28_GPIO \
863  	SAM_PINMUX(b, 28, gpio, gpio)
864  
865  /* pb29_gpio */
866  #define PB29_GPIO \
867  	SAM_PINMUX(b, 29, gpio, gpio)
868  
869  /* pb30_gpio */
870  #define PB30_GPIO \
871  	SAM_PINMUX(b, 30, gpio, gpio)
872  
873  /* pb31_gpio */
874  #define PB31_GPIO \
875  	SAM_PINMUX(b, 31, gpio, gpio)
876  
877  /* pc0_gpio */
878  #define PC0_GPIO \
879  	SAM_PINMUX(c, 0, gpio, gpio)
880  
881  /* pc0x_flash_erase */
882  #define PC0X_FLASH_ERASE \
883  	SAM_PINMUX(c, 0, x, extra)
884  
885  /* pc1_gpio */
886  #define PC1_GPIO \
887  	SAM_PINMUX(c, 1, gpio, gpio)
888  
889  /* pc2_gpio */
890  #define PC2_GPIO \
891  	SAM_PINMUX(c, 2, gpio, gpio)
892  
893  /* pc2a_ebi_d0 */
894  #define PC2A_EBI_D0 \
895  	SAM_PINMUX(c, 2, a, periph)
896  
897  /* pc2b_pwm_pwml0 */
898  #define PC2B_PWM_PWML0 \
899  	SAM_PINMUX(c, 2, b, periph)
900  
901  /* pc3_gpio */
902  #define PC3_GPIO \
903  	SAM_PINMUX(c, 3, gpio, gpio)
904  
905  /* pc3a_ebi_d1 */
906  #define PC3A_EBI_D1 \
907  	SAM_PINMUX(c, 3, a, periph)
908  
909  /* pc3b_pwm_pwmh0 */
910  #define PC3B_PWM_PWMH0 \
911  	SAM_PINMUX(c, 3, b, periph)
912  
913  /* pc4_gpio */
914  #define PC4_GPIO \
915  	SAM_PINMUX(c, 4, gpio, gpio)
916  
917  /* pc4a_ebi_d2 */
918  #define PC4A_EBI_D2 \
919  	SAM_PINMUX(c, 4, a, periph)
920  
921  /* pc4b_pwm_pwml1 */
922  #define PC4B_PWM_PWML1 \
923  	SAM_PINMUX(c, 4, b, periph)
924  
925  /* pc5_gpio */
926  #define PC5_GPIO \
927  	SAM_PINMUX(c, 5, gpio, gpio)
928  
929  /* pc5a_ebi_d3 */
930  #define PC5A_EBI_D3 \
931  	SAM_PINMUX(c, 5, a, periph)
932  
933  /* pc5b_pwm_pwmh1 */
934  #define PC5B_PWM_PWMH1 \
935  	SAM_PINMUX(c, 5, b, periph)
936  
937  /* pc6_gpio */
938  #define PC6_GPIO \
939  	SAM_PINMUX(c, 6, gpio, gpio)
940  
941  /* pc6a_ebi_d4 */
942  #define PC6A_EBI_D4 \
943  	SAM_PINMUX(c, 6, a, periph)
944  
945  /* pc6b_pwm_pwml2 */
946  #define PC6B_PWM_PWML2 \
947  	SAM_PINMUX(c, 6, b, periph)
948  
949  /* pc7_gpio */
950  #define PC7_GPIO \
951  	SAM_PINMUX(c, 7, gpio, gpio)
952  
953  /* pc7a_ebi_d5 */
954  #define PC7A_EBI_D5 \
955  	SAM_PINMUX(c, 7, a, periph)
956  
957  /* pc7b_pwm_pwmh2 */
958  #define PC7B_PWM_PWMH2 \
959  	SAM_PINMUX(c, 7, b, periph)
960  
961  /* pc8_gpio */
962  #define PC8_GPIO \
963  	SAM_PINMUX(c, 8, gpio, gpio)
964  
965  /* pc8a_ebi_d6 */
966  #define PC8A_EBI_D6 \
967  	SAM_PINMUX(c, 8, a, periph)
968  
969  /* pc8b_pwm_pwml3 */
970  #define PC8B_PWM_PWML3 \
971  	SAM_PINMUX(c, 8, b, periph)
972  
973  /* pc9_gpio */
974  #define PC9_GPIO \
975  	SAM_PINMUX(c, 9, gpio, gpio)
976  
977  /* pc9a_ebi_d7 */
978  #define PC9A_EBI_D7 \
979  	SAM_PINMUX(c, 9, a, periph)
980  
981  /* pc9b_pwm_pwmh3 */
982  #define PC9B_PWM_PWMH3 \
983  	SAM_PINMUX(c, 9, b, periph)
984  
985  /* pc10_gpio */
986  #define PC10_GPIO \
987  	SAM_PINMUX(c, 10, gpio, gpio)
988  
989  /* pc10a_ebi_d8 */
990  #define PC10A_EBI_D8 \
991  	SAM_PINMUX(c, 10, a, periph)
992  
993  /* pc10b_emac_ecrs */
994  #define PC10B_EMAC_ECRS \
995  	SAM_PINMUX(c, 10, b, periph)
996  
997  /* pc11_gpio */
998  #define PC11_GPIO \
999  	SAM_PINMUX(c, 11, gpio, gpio)
1000  
1001  /* pc11a_ebi_d9 */
1002  #define PC11A_EBI_D9 \
1003  	SAM_PINMUX(c, 11, a, periph)
1004  
1005  /* pc11b_emac_erx2 */
1006  #define PC11B_EMAC_ERX2 \
1007  	SAM_PINMUX(c, 11, b, periph)
1008  
1009  /* pc12_gpio */
1010  #define PC12_GPIO \
1011  	SAM_PINMUX(c, 12, gpio, gpio)
1012  
1013  /* pc12a_ebi_d10 */
1014  #define PC12A_EBI_D10 \
1015  	SAM_PINMUX(c, 12, a, periph)
1016  
1017  /* pc12b_emac_erx3 */
1018  #define PC12B_EMAC_ERX3 \
1019  	SAM_PINMUX(c, 12, b, periph)
1020  
1021  /* pc13_gpio */
1022  #define PC13_GPIO \
1023  	SAM_PINMUX(c, 13, gpio, gpio)
1024  
1025  /* pc13a_ebi_d11 */
1026  #define PC13A_EBI_D11 \
1027  	SAM_PINMUX(c, 13, a, periph)
1028  
1029  /* pc13b_emac_ecol */
1030  #define PC13B_EMAC_ECOL \
1031  	SAM_PINMUX(c, 13, b, periph)
1032  
1033  /* pc14_gpio */
1034  #define PC14_GPIO \
1035  	SAM_PINMUX(c, 14, gpio, gpio)
1036  
1037  /* pc14a_ebi_d12 */
1038  #define PC14A_EBI_D12 \
1039  	SAM_PINMUX(c, 14, a, periph)
1040  
1041  /* pc14b_emac_erxck */
1042  #define PC14B_EMAC_ERXCK \
1043  	SAM_PINMUX(c, 14, b, periph)
1044  
1045  /* pc15_gpio */
1046  #define PC15_GPIO \
1047  	SAM_PINMUX(c, 15, gpio, gpio)
1048  
1049  /* pc15a_ebi_d13 */
1050  #define PC15A_EBI_D13 \
1051  	SAM_PINMUX(c, 15, a, periph)
1052  
1053  /* pc15b_emac_etx2 */
1054  #define PC15B_EMAC_ETX2 \
1055  	SAM_PINMUX(c, 15, b, periph)
1056  
1057  /* pc16_gpio */
1058  #define PC16_GPIO \
1059  	SAM_PINMUX(c, 16, gpio, gpio)
1060  
1061  /* pc16a_ebi_d14 */
1062  #define PC16A_EBI_D14 \
1063  	SAM_PINMUX(c, 16, a, periph)
1064  
1065  /* pc16b_emac_etx3 */
1066  #define PC16B_EMAC_ETX3 \
1067  	SAM_PINMUX(c, 16, b, periph)
1068  
1069  /* pc17_gpio */
1070  #define PC17_GPIO \
1071  	SAM_PINMUX(c, 17, gpio, gpio)
1072  
1073  /* pc17a_ebi_d15 */
1074  #define PC17A_EBI_D15 \
1075  	SAM_PINMUX(c, 17, a, periph)
1076  
1077  /* pc17b_emac_etxer */
1078  #define PC17B_EMAC_ETXER \
1079  	SAM_PINMUX(c, 17, b, periph)
1080  
1081  /* pc18_gpio */
1082  #define PC18_GPIO \
1083  	SAM_PINMUX(c, 18, gpio, gpio)
1084  
1085  /* pc18a_ebi_nwr0_nwe */
1086  #define PC18A_EBI_NWR0_NWE \
1087  	SAM_PINMUX(c, 18, a, periph)
1088  
1089  /* pc18b_pwm_pwmh6 */
1090  #define PC18B_PWM_PWMH6 \
1091  	SAM_PINMUX(c, 18, b, periph)
1092  
1093  /* pc19_gpio */
1094  #define PC19_GPIO \
1095  	SAM_PINMUX(c, 19, gpio, gpio)
1096  
1097  /* pc19a_ebi_nandoe */
1098  #define PC19A_EBI_NANDOE \
1099  	SAM_PINMUX(c, 19, a, periph)
1100  
1101  /* pc19b_pwm_pwmh5 */
1102  #define PC19B_PWM_PWMH5 \
1103  	SAM_PINMUX(c, 19, b, periph)
1104  
1105  /* pc20_gpio */
1106  #define PC20_GPIO \
1107  	SAM_PINMUX(c, 20, gpio, gpio)
1108  
1109  /* pc20a_ebi_nandwe */
1110  #define PC20A_EBI_NANDWE \
1111  	SAM_PINMUX(c, 20, a, periph)
1112  
1113  /* pc20b_pwm_pwmh4 */
1114  #define PC20B_PWM_PWMH4 \
1115  	SAM_PINMUX(c, 20, b, periph)
1116  
1117  /* pc21_gpio */
1118  #define PC21_GPIO \
1119  	SAM_PINMUX(c, 21, gpio, gpio)
1120  
1121  /* pc21a_ebi_a0_nbs0 */
1122  #define PC21A_EBI_A0_NBS0 \
1123  	SAM_PINMUX(c, 21, a, periph)
1124  
1125  /* pc21b_pwm_pwml4 */
1126  #define PC21B_PWM_PWML4 \
1127  	SAM_PINMUX(c, 21, b, periph)
1128  
1129  /* pc22_gpio */
1130  #define PC22_GPIO \
1131  	SAM_PINMUX(c, 22, gpio, gpio)
1132  
1133  /* pc22a_ebi_a1 */
1134  #define PC22A_EBI_A1 \
1135  	SAM_PINMUX(c, 22, a, periph)
1136  
1137  /* pc22b_pwm_pwml5 */
1138  #define PC22B_PWM_PWML5 \
1139  	SAM_PINMUX(c, 22, b, periph)
1140  
1141  /* pc23_gpio */
1142  #define PC23_GPIO \
1143  	SAM_PINMUX(c, 23, gpio, gpio)
1144  
1145  /* pc23a_ebi_a2 */
1146  #define PC23A_EBI_A2 \
1147  	SAM_PINMUX(c, 23, a, periph)
1148  
1149  /* pc23b_pwm_pwml6 */
1150  #define PC23B_PWM_PWML6 \
1151  	SAM_PINMUX(c, 23, b, periph)
1152  
1153  /* pc24_gpio */
1154  #define PC24_GPIO \
1155  	SAM_PINMUX(c, 24, gpio, gpio)
1156  
1157  /* pc24a_ebi_a3 */
1158  #define PC24A_EBI_A3 \
1159  	SAM_PINMUX(c, 24, a, periph)
1160  
1161  /* pc24b_pwm_pwml7 */
1162  #define PC24B_PWM_PWML7 \
1163  	SAM_PINMUX(c, 24, b, periph)
1164  
1165  /* pc25_gpio */
1166  #define PC25_GPIO \
1167  	SAM_PINMUX(c, 25, gpio, gpio)
1168  
1169  /* pc25a_ebi_a4 */
1170  #define PC25A_EBI_A4 \
1171  	SAM_PINMUX(c, 25, a, periph)
1172  
1173  /* pc25b_tc2_tioa6 */
1174  #define PC25B_TC2_TIOA6 \
1175  	SAM_PINMUX(c, 25, b, periph)
1176  
1177  /* pc26_gpio */
1178  #define PC26_GPIO \
1179  	SAM_PINMUX(c, 26, gpio, gpio)
1180  
1181  /* pc26a_ebi_a5 */
1182  #define PC26A_EBI_A5 \
1183  	SAM_PINMUX(c, 26, a, periph)
1184  
1185  /* pc26b_tc2_tiob6 */
1186  #define PC26B_TC2_TIOB6 \
1187  	SAM_PINMUX(c, 26, b, periph)
1188  
1189  /* pc27_gpio */
1190  #define PC27_GPIO \
1191  	SAM_PINMUX(c, 27, gpio, gpio)
1192  
1193  /* pc27a_ebi_a6 */
1194  #define PC27A_EBI_A6 \
1195  	SAM_PINMUX(c, 27, a, periph)
1196  
1197  /* pc27b_tc2_tclk6 */
1198  #define PC27B_TC2_TCLK6 \
1199  	SAM_PINMUX(c, 27, b, periph)
1200  
1201  /* pc28_gpio */
1202  #define PC28_GPIO \
1203  	SAM_PINMUX(c, 28, gpio, gpio)
1204  
1205  /* pc28a_ebi_a7 */
1206  #define PC28A_EBI_A7 \
1207  	SAM_PINMUX(c, 28, a, periph)
1208  
1209  /* pc28b_tc2_tioa7 */
1210  #define PC28B_TC2_TIOA7 \
1211  	SAM_PINMUX(c, 28, b, periph)
1212  
1213  /* pc29_gpio */
1214  #define PC29_GPIO \
1215  	SAM_PINMUX(c, 29, gpio, gpio)
1216  
1217  /* pc29a_ebi_a8 */
1218  #define PC29A_EBI_A8 \
1219  	SAM_PINMUX(c, 29, a, periph)
1220  
1221  /* pc29b_tc2_tiob7 */
1222  #define PC29B_TC2_TIOB7 \
1223  	SAM_PINMUX(c, 29, b, periph)
1224  
1225  /* pc30_gpio */
1226  #define PC30_GPIO \
1227  	SAM_PINMUX(c, 30, gpio, gpio)
1228  
1229  /* pc30a_ebi_a9 */
1230  #define PC30A_EBI_A9 \
1231  	SAM_PINMUX(c, 30, a, periph)
1232  
1233  /* pc30b_tc2_tclk7 */
1234  #define PC30B_TC2_TCLK7 \
1235  	SAM_PINMUX(c, 30, b, periph)
1236  
1237  /* pd0_gpio */
1238  #define PD0_GPIO \
1239  	SAM_PINMUX(d, 0, gpio, gpio)
1240  
1241  /* pd0a_ebi_a10 */
1242  #define PD0A_EBI_A10 \
1243  	SAM_PINMUX(d, 0, a, periph)
1244  
1245  /* pd0b_hsmci_mcda4 */
1246  #define PD0B_HSMCI_MCDA4 \
1247  	SAM_PINMUX(d, 0, b, periph)
1248  
1249  /* pd1_gpio */
1250  #define PD1_GPIO \
1251  	SAM_PINMUX(d, 1, gpio, gpio)
1252  
1253  /* pd1a_ebi_a11 */
1254  #define PD1A_EBI_A11 \
1255  	SAM_PINMUX(d, 1, a, periph)
1256  
1257  /* pd1b_hsmci_mcda5 */
1258  #define PD1B_HSMCI_MCDA5 \
1259  	SAM_PINMUX(d, 1, b, periph)
1260  
1261  /* pd2_gpio */
1262  #define PD2_GPIO \
1263  	SAM_PINMUX(d, 2, gpio, gpio)
1264  
1265  /* pd2a_ebi_a12 */
1266  #define PD2A_EBI_A12 \
1267  	SAM_PINMUX(d, 2, a, periph)
1268  
1269  /* pd2b_hsmci_mcda6 */
1270  #define PD2B_HSMCI_MCDA6 \
1271  	SAM_PINMUX(d, 2, b, periph)
1272  
1273  /* pd3_gpio */
1274  #define PD3_GPIO \
1275  	SAM_PINMUX(d, 3, gpio, gpio)
1276  
1277  /* pd3a_ebi_a13 */
1278  #define PD3A_EBI_A13 \
1279  	SAM_PINMUX(d, 3, a, periph)
1280  
1281  /* pd3b_hsmci_mcda7 */
1282  #define PD3B_HSMCI_MCDA7 \
1283  	SAM_PINMUX(d, 3, b, periph)
1284  
1285  /* pd4_gpio */
1286  #define PD4_GPIO \
1287  	SAM_PINMUX(d, 4, gpio, gpio)
1288  
1289  /* pd4a_ebi_a14 */
1290  #define PD4A_EBI_A14 \
1291  	SAM_PINMUX(d, 4, a, periph)
1292  
1293  /* pd4b_usart3_txd */
1294  #define PD4B_USART3_TXD \
1295  	SAM_PINMUX(d, 4, b, periph)
1296  
1297  /* pd5_gpio */
1298  #define PD5_GPIO \
1299  	SAM_PINMUX(d, 5, gpio, gpio)
1300  
1301  /* pd5a_ebi_a15 */
1302  #define PD5A_EBI_A15 \
1303  	SAM_PINMUX(d, 5, a, periph)
1304  
1305  /* pd5b_usart3_rxd */
1306  #define PD5B_USART3_RXD \
1307  	SAM_PINMUX(d, 5, b, periph)
1308  
1309  /* pd6_gpio */
1310  #define PD6_GPIO \
1311  	SAM_PINMUX(d, 6, gpio, gpio)
1312  
1313  /* pd6a_ebi_a16_ba0 */
1314  #define PD6A_EBI_A16_BA0 \
1315  	SAM_PINMUX(d, 6, a, periph)
1316  
1317  /* pd6b_pwm_pwmfi2 */
1318  #define PD6B_PWM_PWMFI2 \
1319  	SAM_PINMUX(d, 6, b, periph)
1320  
1321  /* pd7_gpio */
1322  #define PD7_GPIO \
1323  	SAM_PINMUX(d, 7, gpio, gpio)
1324  
1325  /* pd7a_ebi_a17_ba1 */
1326  #define PD7A_EBI_A17_BA1 \
1327  	SAM_PINMUX(d, 7, a, periph)
1328  
1329  /* pd7b_tc2_tioa8 */
1330  #define PD7B_TC2_TIOA8 \
1331  	SAM_PINMUX(d, 7, b, periph)
1332  
1333  /* pd8_gpio */
1334  #define PD8_GPIO \
1335  	SAM_PINMUX(d, 8, gpio, gpio)
1336  
1337  /* pd8a_ebi_a21_nandale */
1338  #define PD8A_EBI_A21_NANDALE \
1339  	SAM_PINMUX(d, 8, a, periph)
1340  
1341  /* pd8b_tc2_tiob8 */
1342  #define PD8B_TC2_TIOB8 \
1343  	SAM_PINMUX(d, 8, b, periph)
1344  
1345  /* pd9_gpio */
1346  #define PD9_GPIO \
1347  	SAM_PINMUX(d, 9, gpio, gpio)
1348  
1349  /* pd9a_ebi_a22_nandcle */
1350  #define PD9A_EBI_A22_NANDCLE \
1351  	SAM_PINMUX(d, 9, a, periph)
1352  
1353  /* pd9b_tc2_tclk9 */
1354  #define PD9B_TC2_TCLK9 \
1355  	SAM_PINMUX(d, 9, b, periph)
1356  
1357  /* pd10_gpio */
1358  #define PD10_GPIO \
1359  	SAM_PINMUX(d, 10, gpio, gpio)
1360  
1361  /* pd10a_ebi_nwr1_nbs1 */
1362  #define PD10A_EBI_NWR1_NBS1 \
1363  	SAM_PINMUX(d, 10, a, periph)
1364  
1365  /* pd11_gpio */
1366  #define PD11_GPIO \
1367  	SAM_PINMUX(d, 11, gpio, gpio)
1368  
1369  /* pd11a_ebi_sda10 */
1370  #define PD11A_EBI_SDA10 \
1371  	SAM_PINMUX(d, 11, a, periph)
1372  
1373  /* pd12_gpio */
1374  #define PD12_GPIO \
1375  	SAM_PINMUX(d, 12, gpio, gpio)
1376  
1377  /* pd12a_ebi_sdcs */
1378  #define PD12A_EBI_SDCS \
1379  	SAM_PINMUX(d, 12, a, periph)
1380  
1381  /* pd13_gpio */
1382  #define PD13_GPIO \
1383  	SAM_PINMUX(d, 13, gpio, gpio)
1384  
1385  /* pd13a_ebi_sdcke */
1386  #define PD13A_EBI_SDCKE \
1387  	SAM_PINMUX(d, 13, a, periph)
1388  
1389  /* pd14_gpio */
1390  #define PD14_GPIO \
1391  	SAM_PINMUX(d, 14, gpio, gpio)
1392  
1393  /* pd14a_ebi_sdwe */
1394  #define PD14A_EBI_SDWE \
1395  	SAM_PINMUX(d, 14, a, periph)
1396  
1397  /* pd15_gpio */
1398  #define PD15_GPIO \
1399  	SAM_PINMUX(d, 15, gpio, gpio)
1400  
1401  /* pd15a_ebi_ras */
1402  #define PD15A_EBI_RAS \
1403  	SAM_PINMUX(d, 15, a, periph)
1404  
1405  /* pd16_gpio */
1406  #define PD16_GPIO \
1407  	SAM_PINMUX(d, 16, gpio, gpio)
1408  
1409  /* pd16a_ebi_cas */
1410  #define PD16A_EBI_CAS \
1411  	SAM_PINMUX(d, 16, a, periph)
1412  
1413  /* pd17_gpio */
1414  #define PD17_GPIO \
1415  	SAM_PINMUX(d, 17, gpio, gpio)
1416  
1417  /* pd17a_ebi_a5 */
1418  #define PD17A_EBI_A5 \
1419  	SAM_PINMUX(d, 17, a, periph)
1420  
1421  /* pd18_gpio */
1422  #define PD18_GPIO \
1423  	SAM_PINMUX(d, 18, gpio, gpio)
1424  
1425  /* pd18a_ebi_a6 */
1426  #define PD18A_EBI_A6 \
1427  	SAM_PINMUX(d, 18, a, periph)
1428  
1429  /* pd19_gpio */
1430  #define PD19_GPIO \
1431  	SAM_PINMUX(d, 19, gpio, gpio)
1432  
1433  /* pd19a_ebi_a7 */
1434  #define PD19A_EBI_A7 \
1435  	SAM_PINMUX(d, 19, a, periph)
1436  
1437  /* pd20_gpio */
1438  #define PD20_GPIO \
1439  	SAM_PINMUX(d, 20, gpio, gpio)
1440  
1441  /* pd20a_ebi_a8 */
1442  #define PD20A_EBI_A8 \
1443  	SAM_PINMUX(d, 20, a, periph)
1444  
1445  /* pd21_gpio */
1446  #define PD21_GPIO \
1447  	SAM_PINMUX(d, 21, gpio, gpio)
1448  
1449  /* pd21a_ebi_a9 */
1450  #define PD21A_EBI_A9 \
1451  	SAM_PINMUX(d, 21, a, periph)
1452  
1453  /* pd22_gpio */
1454  #define PD22_GPIO \
1455  	SAM_PINMUX(d, 22, gpio, gpio)
1456  
1457  /* pd22a_ebi_a10 */
1458  #define PD22A_EBI_A10 \
1459  	SAM_PINMUX(d, 22, a, periph)
1460  
1461  /* pd23_gpio */
1462  #define PD23_GPIO \
1463  	SAM_PINMUX(d, 23, gpio, gpio)
1464  
1465  /* pd23a_ebi_a11 */
1466  #define PD23A_EBI_A11 \
1467  	SAM_PINMUX(d, 23, a, periph)
1468  
1469  /* pd24_gpio */
1470  #define PD24_GPIO \
1471  	SAM_PINMUX(d, 24, gpio, gpio)
1472  
1473  /* pd24a_ebi_a12 */
1474  #define PD24A_EBI_A12 \
1475  	SAM_PINMUX(d, 24, a, periph)
1476  
1477  /* pd25_gpio */
1478  #define PD25_GPIO \
1479  	SAM_PINMUX(d, 25, gpio, gpio)
1480  
1481  /* pd25a_ebi_a13 */
1482  #define PD25A_EBI_A13 \
1483  	SAM_PINMUX(d, 25, a, periph)
1484  
1485  /* pd26_gpio */
1486  #define PD26_GPIO \
1487  	SAM_PINMUX(d, 26, gpio, gpio)
1488  
1489  /* pd26a_ebi_a14 */
1490  #define PD26A_EBI_A14 \
1491  	SAM_PINMUX(d, 26, a, periph)
1492  
1493  /* pd27_gpio */
1494  #define PD27_GPIO \
1495  	SAM_PINMUX(d, 27, gpio, gpio)
1496  
1497  /* pd27a_ebi_a15 */
1498  #define PD27A_EBI_A15 \
1499  	SAM_PINMUX(d, 27, a, periph)
1500  
1501  /* pd28_gpio */
1502  #define PD28_GPIO \
1503  	SAM_PINMUX(d, 28, gpio, gpio)
1504  
1505  /* pd28a_ebi_a16_ba0 */
1506  #define PD28A_EBI_A16_BA0 \
1507  	SAM_PINMUX(d, 28, a, periph)
1508  
1509  /* pd29_gpio */
1510  #define PD29_GPIO \
1511  	SAM_PINMUX(d, 29, gpio, gpio)
1512  
1513  /* pd29a_ebi_a17_ba1 */
1514  #define PD29A_EBI_A17_BA1 \
1515  	SAM_PINMUX(d, 29, a, periph)
1516  
1517  /* pd30_gpio */
1518  #define PD30_GPIO \
1519  	SAM_PINMUX(d, 30, gpio, gpio)
1520  
1521  /* pd30a_ebi_a18 */
1522  #define PD30A_EBI_A18 \
1523  	SAM_PINMUX(d, 30, a, periph)
1524  
1525  /* pe0_gpio */
1526  #define PE0_GPIO \
1527  	SAM_PINMUX(e, 0, gpio, gpio)
1528  
1529  /* pe0a_ebi_a19 */
1530  #define PE0A_EBI_A19 \
1531  	SAM_PINMUX(e, 0, a, periph)
1532  
1533  /* pe1_gpio */
1534  #define PE1_GPIO \
1535  	SAM_PINMUX(e, 1, gpio, gpio)
1536  
1537  /* pe1a_ebi_a20 */
1538  #define PE1A_EBI_A20 \
1539  	SAM_PINMUX(e, 1, a, periph)
1540  
1541  /* pe2_gpio */
1542  #define PE2_GPIO \
1543  	SAM_PINMUX(e, 2, gpio, gpio)
1544  
1545  /* pe2a_ebi_a21_nandale */
1546  #define PE2A_EBI_A21_NANDALE \
1547  	SAM_PINMUX(e, 2, a, periph)
1548  
1549  /* pe3_gpio */
1550  #define PE3_GPIO \
1551  	SAM_PINMUX(e, 3, gpio, gpio)
1552  
1553  /* pe3a_ebi_a22_nandcle */
1554  #define PE3A_EBI_A22_NANDCLE \
1555  	SAM_PINMUX(e, 3, a, periph)
1556  
1557  /* pe4_gpio */
1558  #define PE4_GPIO \
1559  	SAM_PINMUX(e, 4, gpio, gpio)
1560  
1561  /* pe4a_ebi_a23 */
1562  #define PE4A_EBI_A23 \
1563  	SAM_PINMUX(e, 4, a, periph)
1564  
1565  /* pe5_gpio */
1566  #define PE5_GPIO \
1567  	SAM_PINMUX(e, 5, gpio, gpio)
1568  
1569  /* pe5a_ebi_ncs4 */
1570  #define PE5A_EBI_NCS4 \
1571  	SAM_PINMUX(e, 5, a, periph)
1572  
1573  /* pe6_gpio */
1574  #define PE6_GPIO \
1575  	SAM_PINMUX(e, 6, gpio, gpio)
1576  
1577  /* pe6a_ebi_ncs5 */
1578  #define PE6A_EBI_NCS5 \
1579  	SAM_PINMUX(e, 6, a, periph)
1580  
1581  /* pe7_gpio */
1582  #define PE7_GPIO \
1583  	SAM_PINMUX(e, 7, gpio, gpio)
1584  
1585  /* pe8_gpio */
1586  #define PE8_GPIO \
1587  	SAM_PINMUX(e, 8, gpio, gpio)
1588  
1589  /* pe9_gpio */
1590  #define PE9_GPIO \
1591  	SAM_PINMUX(e, 9, gpio, gpio)
1592  
1593  /* pe9a_tc1_tioa3 */
1594  #define PE9A_TC1_TIOA3 \
1595  	SAM_PINMUX(e, 9, a, periph)
1596  
1597  /* pe10_gpio */
1598  #define PE10_GPIO \
1599  	SAM_PINMUX(e, 10, gpio, gpio)
1600  
1601  /* pe10a_tc1_tiob3 */
1602  #define PE10A_TC1_TIOB3 \
1603  	SAM_PINMUX(e, 10, a, periph)
1604  
1605  /* pe11_gpio */
1606  #define PE11_GPIO \
1607  	SAM_PINMUX(e, 11, gpio, gpio)
1608  
1609  /* pe11a_tc1_tioa4 */
1610  #define PE11A_TC1_TIOA4 \
1611  	SAM_PINMUX(e, 11, a, periph)
1612  
1613  /* pe12_gpio */
1614  #define PE12_GPIO \
1615  	SAM_PINMUX(e, 12, gpio, gpio)
1616  
1617  /* pe12a_tc1_tiob4 */
1618  #define PE12A_TC1_TIOB4 \
1619  	SAM_PINMUX(e, 12, a, periph)
1620  
1621  /* pe13_gpio */
1622  #define PE13_GPIO \
1623  	SAM_PINMUX(e, 13, gpio, gpio)
1624  
1625  /* pe13a_tc1_tioa5 */
1626  #define PE13A_TC1_TIOA5 \
1627  	SAM_PINMUX(e, 13, a, periph)
1628  
1629  /* pe14_gpio */
1630  #define PE14_GPIO \
1631  	SAM_PINMUX(e, 14, gpio, gpio)
1632  
1633  /* pe14a_tc1_tiob5 */
1634  #define PE14A_TC1_TIOB5 \
1635  	SAM_PINMUX(e, 14, a, periph)
1636  
1637  /* pe15_gpio */
1638  #define PE15_GPIO \
1639  	SAM_PINMUX(e, 15, gpio, gpio)
1640  
1641  /* pe15a_pwm_pwmh0 */
1642  #define PE15A_PWM_PWMH0 \
1643  	SAM_PINMUX(e, 15, a, periph)
1644  
1645  /* pe16_gpio */
1646  #define PE16_GPIO \
1647  	SAM_PINMUX(e, 16, gpio, gpio)
1648  
1649  /* pe16a_pwm_pwmh1 */
1650  #define PE16A_PWM_PWMH1 \
1651  	SAM_PINMUX(e, 16, a, periph)
1652  
1653  /* pe16b_usart3_sck */
1654  #define PE16B_USART3_SCK \
1655  	SAM_PINMUX(e, 16, b, periph)
1656  
1657  /* pe17_gpio */
1658  #define PE17_GPIO \
1659  	SAM_PINMUX(e, 17, gpio, gpio)
1660  
1661  /* pe17a_pwm_pwml2 */
1662  #define PE17A_PWM_PWML2 \
1663  	SAM_PINMUX(e, 17, a, periph)
1664  
1665  /* pe18_gpio */
1666  #define PE18_GPIO \
1667  	SAM_PINMUX(e, 18, gpio, gpio)
1668  
1669  /* pe18a_pwm_pwml0 */
1670  #define PE18A_PWM_PWML0 \
1671  	SAM_PINMUX(e, 18, a, periph)
1672  
1673  /* pe18b_ebi_ncs6 */
1674  #define PE18B_EBI_NCS6 \
1675  	SAM_PINMUX(e, 18, b, periph)
1676  
1677  /* pe19_gpio */
1678  #define PE19_GPIO \
1679  	SAM_PINMUX(e, 19, gpio, gpio)
1680  
1681  /* pe19a_pwm_pwml4 */
1682  #define PE19A_PWM_PWML4 \
1683  	SAM_PINMUX(e, 19, a, periph)
1684  
1685  /* pe20_gpio */
1686  #define PE20_GPIO \
1687  	SAM_PINMUX(e, 20, gpio, gpio)
1688  
1689  /* pe20a_pwm_pwmh4 */
1690  #define PE20A_PWM_PWMH4 \
1691  	SAM_PINMUX(e, 20, a, periph)
1692  
1693  /* pe20b_hsmci_mccdb */
1694  #define PE20B_HSMCI_MCCDB \
1695  	SAM_PINMUX(e, 20, b, periph)
1696  
1697  /* pe21_gpio */
1698  #define PE21_GPIO \
1699  	SAM_PINMUX(e, 21, gpio, gpio)
1700  
1701  /* pe21a_pwm_pwml5 */
1702  #define PE21A_PWM_PWML5 \
1703  	SAM_PINMUX(e, 21, a, periph)
1704  
1705  /* pe22_gpio */
1706  #define PE22_GPIO \
1707  	SAM_PINMUX(e, 22, gpio, gpio)
1708  
1709  /* pe22a_pwm_pwmh5 */
1710  #define PE22A_PWM_PWMH5 \
1711  	SAM_PINMUX(e, 22, a, periph)
1712  
1713  /* pe22b_hsmci_mcdb0 */
1714  #define PE22B_HSMCI_MCDB0 \
1715  	SAM_PINMUX(e, 22, b, periph)
1716  
1717  /* pe23_gpio */
1718  #define PE23_GPIO \
1719  	SAM_PINMUX(e, 23, gpio, gpio)
1720  
1721  /* pe23a_pwm_pwml6 */
1722  #define PE23A_PWM_PWML6 \
1723  	SAM_PINMUX(e, 23, a, periph)
1724  
1725  /* pe24_gpio */
1726  #define PE24_GPIO \
1727  	SAM_PINMUX(e, 24, gpio, gpio)
1728  
1729  /* pe24a_pwm_pwmh6 */
1730  #define PE24A_PWM_PWMH6 \
1731  	SAM_PINMUX(e, 24, a, periph)
1732  
1733  /* pe24b_hsmci_mcdb1 */
1734  #define PE24B_HSMCI_MCDB1 \
1735  	SAM_PINMUX(e, 24, b, periph)
1736  
1737  /* pe25_gpio */
1738  #define PE25_GPIO \
1739  	SAM_PINMUX(e, 25, gpio, gpio)
1740  
1741  /* pe25a_pwm_pwml7 */
1742  #define PE25A_PWM_PWML7 \
1743  	SAM_PINMUX(e, 25, a, periph)
1744  
1745  /* pe26_gpio */
1746  #define PE26_GPIO \
1747  	SAM_PINMUX(e, 26, gpio, gpio)
1748  
1749  /* pe26a_pwm_pwmh7 */
1750  #define PE26A_PWM_PWMH7 \
1751  	SAM_PINMUX(e, 26, a, periph)
1752  
1753  /* pe26b_hsmci_mcdb2 */
1754  #define PE26B_HSMCI_MCDB2 \
1755  	SAM_PINMUX(e, 26, b, periph)
1756  
1757  /* pe27_gpio */
1758  #define PE27_GPIO \
1759  	SAM_PINMUX(e, 27, gpio, gpio)
1760  
1761  /* pe27a_ebi_ncs7 */
1762  #define PE27A_EBI_NCS7 \
1763  	SAM_PINMUX(e, 27, a, periph)
1764  
1765  /* pe27b_hsmci_mcdb3 */
1766  #define PE27B_HSMCI_MCDB3 \
1767  	SAM_PINMUX(e, 27, b, periph)
1768  
1769  /* pe28_gpio */
1770  #define PE28_GPIO \
1771  	SAM_PINMUX(e, 28, gpio, gpio)
1772  
1773  /* pe28a_spi1_miso */
1774  #define PE28A_SPI1_MISO \
1775  	SAM_PINMUX(e, 28, a, periph)
1776  
1777  /* pe29_gpio */
1778  #define PE29_GPIO \
1779  	SAM_PINMUX(e, 29, gpio, gpio)
1780  
1781  /* pe29a_spi1_mosi */
1782  #define PE29A_SPI1_MOSI \
1783  	SAM_PINMUX(e, 29, a, periph)
1784  
1785  /* pe30_gpio */
1786  #define PE30_GPIO \
1787  	SAM_PINMUX(e, 30, gpio, gpio)
1788  
1789  /* pe30a_spi1_spck */
1790  #define PE30A_SPI1_SPCK \
1791  	SAM_PINMUX(e, 30, a, periph)
1792  
1793  /* pe31_gpio */
1794  #define PE31_GPIO \
1795  	SAM_PINMUX(e, 31, gpio, gpio)
1796  
1797  /* pe31a_spi1_npcs0 */
1798  #define PE31A_SPI1_NPCS0 \
1799  	SAM_PINMUX(e, 31, a, periph)
1800  
1801  /* pf0_gpio */
1802  #define PF0_GPIO \
1803  	SAM_PINMUX(f, 0, gpio, gpio)
1804  
1805  /* pf0a_spi1_npcs1 */
1806  #define PF0A_SPI1_NPCS1 \
1807  	SAM_PINMUX(f, 0, a, periph)
1808  
1809  /* pf1_gpio */
1810  #define PF1_GPIO \
1811  	SAM_PINMUX(f, 1, gpio, gpio)
1812  
1813  /* pf1a_spi1_npcs2 */
1814  #define PF1A_SPI1_NPCS2 \
1815  	SAM_PINMUX(f, 1, a, periph)
1816  
1817  /* pf2_gpio */
1818  #define PF2_GPIO \
1819  	SAM_PINMUX(f, 2, gpio, gpio)
1820  
1821  /* pf2a_spi1_npcs3 */
1822  #define PF2A_SPI1_NPCS3 \
1823  	SAM_PINMUX(f, 2, a, periph)
1824  
1825  /* pf3_gpio */
1826  #define PF3_GPIO \
1827  	SAM_PINMUX(f, 3, gpio, gpio)
1828  
1829  /* pf3a_pwm_pwmh3 */
1830  #define PF3A_PWM_PWMH3 \
1831  	SAM_PINMUX(f, 3, a, periph)
1832  
1833  /* pf4_gpio */
1834  #define PF4_GPIO \
1835  	SAM_PINMUX(f, 4, gpio, gpio)
1836  
1837  /* pf4a_usart3_cts */
1838  #define PF4A_USART3_CTS \
1839  	SAM_PINMUX(f, 4, a, periph)
1840  
1841  /* pf5_gpio */
1842  #define PF5_GPIO \
1843  	SAM_PINMUX(f, 5, gpio, gpio)
1844  
1845  /* pf5a_usart3_rts */
1846  #define PF5A_USART3_RTS \
1847  	SAM_PINMUX(f, 5, a, periph)
1848