1 //***************************************************************************** 2 // 3 //! @file am_hal_audadc.h 4 //! 5 //! @brief Functions for interfacing with the Audio Analog to Digital Converter 6 //! 7 //! @addtogroup audadc4_4p AUDADC - Audio Analog-to-Digital Converter 8 //! @ingroup apollo4p_hal 9 //! @{ 10 // 11 //***************************************************************************** 12 13 //***************************************************************************** 14 // 15 // Copyright (c) 2023, Ambiq Micro, Inc. 16 // All rights reserved. 17 // 18 // Redistribution and use in source and binary forms, with or without 19 // modification, are permitted provided that the following conditions are met: 20 // 21 // 1. Redistributions of source code must retain the above copyright notice, 22 // this list of conditions and the following disclaimer. 23 // 24 // 2. Redistributions in binary form must reproduce the above copyright 25 // notice, this list of conditions and the following disclaimer in the 26 // documentation and/or other materials provided with the distribution. 27 // 28 // 3. Neither the name of the copyright holder nor the names of its 29 // contributors may be used to endorse or promote products derived from this 30 // software without specific prior written permission. 31 // 32 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 33 // AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 34 // IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 35 // ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 36 // LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 37 // CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 38 // SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 39 // INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 40 // CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 41 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 42 // POSSIBILITY OF SUCH DAMAGE. 43 // 44 // This is part of revision release_sdk_4_4_0-3c5977e664 of the AmbiqSuite Development Package. 45 // 46 //***************************************************************************** 47 #ifndef AM_HAL_AUDADC_H 48 #define AM_HAL_AUDADC_H 49 50 //***************************************************************************** 51 // 52 //! CMSIS-style macro for handling a variable IOM module number. 53 // 54 //***************************************************************************** 55 #define AUDADCn(n) ((AUDADC_Type*)(AUDADC_BASE + (n * (AUDADC_BASE - AUDADC_BASE)))) 56 57 //***************************************************************************** 58 // 59 //! Maximum number of slots. 60 // 61 //***************************************************************************** 62 #define AM_HAL_AUDADC_MAX_SLOTS 4 63 64 //***************************************************************************** 65 // 66 //! Minimum value for TRKCYC for the Audio ADC. 67 // 68 //***************************************************************************** 69 #define AM_HAL_AUDADC_MIN_TRKCYC 30 70 71 //***************************************************************************** 72 // 73 //! Fullsacle amplitude. 74 // 75 //***************************************************************************** 76 #define FULLSCALE_AMPLITUDE (0.7833333333f) 77 78 //***************************************************************************** 79 // 80 //! AUDADC clock selection. 81 // 82 //***************************************************************************** 83 typedef enum 84 { 85 AM_HAL_AUDADC_CLKSEL_OFF, 86 AM_HAL_AUDADC_CLKSEL_HFRC_48MHz, 87 AM_HAL_AUDADC_CLKSEL_XTHS_24MHz, 88 AM_HAL_AUDADC_CLKSEL_HFRC2_48MHz 89 } am_hal_audadc_clksel_e; 90 91 //***************************************************************************** 92 // 93 //! AUDADC periodic trigger source selection 94 // 95 //***************************************************************************** 96 typedef enum 97 { 98 AM_HAL_AUDADC_RPTTRIGSEL_TMR, 99 AM_HAL_AUDADC_RPTTRIGSEL_INT 100 } am_hal_audadc_rpttrigsel_e; 101 102 //***************************************************************************** 103 // 104 //! AUDADC trigger polarity 105 // 106 //***************************************************************************** 107 typedef enum 108 { 109 AM_HAL_AUDADC_TRIGPOL_RISING, 110 AM_HAL_AUDADC_TRIGPOL_FALLING 111 } am_hal_audadc_trigpol_e; 112 113 //***************************************************************************** 114 // 115 //! AUDADC trigger selection 116 // 117 //***************************************************************************** 118 typedef enum 119 { 120 AM_HAL_AUDADC_TRIGSEL_EXT0, 121 AM_HAL_AUDADC_TRIGSEL_EXT1, 122 AM_HAL_AUDADC_TRIGSEL_EXT2, 123 AM_HAL_AUDADC_TRIGSEL_EXT3, 124 AM_HAL_AUDADC_TRIGSEL_VCOMP, 125 AM_HAL_AUDADC_TRIGSEL_SOFTWARE = 7 126 } am_hal_audadc_trigsel_e; 127 128 // 129 // AUDADC reference selection. 130 // 131 //typedef enum 132 //{ 133 // AM_HAL_AUDADC_REFSEL_INT_2P0, 134 // AM_HAL_AUDADC_REFSEL_INT_1P5, 135 // AM_HAL_AUDADC_REFSEL_EXT_2P0, 136 // AM_HAL_AUDADC_REFSEL_EXT_1P5 137 //} am_hal_audadc_refsel_e; 138 139 //***************************************************************************** 140 // 141 //! AUDADC sample mode selection. 142 // 143 //***************************************************************************** 144 typedef enum 145 { 146 AM_HAL_AUDADC_SAMPMODE_LP = AUDADC_CFG_SAMPMODE_LP, // LP : Max of 2 low-gain PGA channels configured on slots 0 and 2. 147 // In this mode, slots 1 and 3, if enabled, will still 148 // consume time but not perform conversions. 149 AM_HAL_AUDADC_SAMPMODE_MED = AUDADC_CFG_SAMPMODE_MED, // MED : Max of 2 low-gain and 2 high-gain PGA channels. 150 // In this mode, conversions will be performed on all enabled slots 0 through 3. 151 } am_hal_audadc_sampmode_e; 152 153 //***************************************************************************** 154 // 155 //! AUDADC clock mode selection. 156 // 157 //***************************************************************************** 158 typedef enum 159 { 160 AM_HAL_AUDADC_CLKMODE_LOW_POWER, // Disable the clock between scans for LPMODE0. 161 // Set LPCKMODE to 0x1 while configuring the AUDADC. 162 AM_HAL_AUDADC_CLKMODE_LOW_LATENCY // Low Latency Clock Mode. When set, HFRC and the 163 // audadc_clk will remain on while in functioning in LPMODE0. 164 } am_hal_audadc_clkmode_e; 165 166 //***************************************************************************** 167 // 168 //! AUDADC low-power mode selection. 169 // 170 //***************************************************************************** 171 typedef enum 172 { 173 AM_HAL_AUDADC_LPMODE0, // Low Latency Clock Mode. When set, HFRC and the audadc_clk 174 // will remain on while in functioning in LPMODE0. 175 AM_HAL_AUDADC_LPMODE1 // Powers down all circuity and clocks associated with the 176 // AUDADC until the next trigger event. Between scans, the reference 177 // buffer requires up to 50us of delay from a scan trigger event 178 // before the conversion will commence while operating in this mode. 179 } am_hal_audadc_lpmode_e; 180 181 //***************************************************************************** 182 // 183 //! AUDADC repetition selection. 184 // 185 //***************************************************************************** 186 typedef enum 187 { 188 AM_HAL_AUDADC_SINGLE_SCAN, 189 AM_HAL_AUDADC_REPEATING_SCAN 190 } am_hal_audadc_repeat_e; 191 192 //***************************************************************************** 193 // 194 //! AUDADC measurement averaging configuration. 195 // 196 //***************************************************************************** 197 typedef enum 198 { 199 AM_HAL_AUDADC_SLOT_AVG_1, 200 AM_HAL_AUDADC_SLOT_AVG_2, 201 AM_HAL_AUDADC_SLOT_AVG_4, 202 AM_HAL_AUDADC_SLOT_AVG_8, 203 AM_HAL_AUDADC_SLOT_AVG_16, 204 AM_HAL_AUDADC_SLOT_AVG_32, 205 AM_HAL_AUDADC_SLOT_AVG_64, 206 AM_HAL_AUDADC_SLOT_AVG_128 207 } am_hal_audadc_meas_avg_e; 208 209 //***************************************************************************** 210 // 211 //! AUDADC slot precision mode. 212 // 213 //***************************************************************************** 214 typedef enum 215 { 216 AM_HAL_AUDADC_SLOT_12BIT, 217 AM_HAL_AUDADC_SLOT_12BIT_1, 218 AM_HAL_AUDADC_SLOT_10BIT, 219 AM_HAL_AUDADC_SLOT_8BIT 220 } am_hal_audadc_slot_prec_e; 221 222 //***************************************************************************** 223 // 224 //! AUDADC slot channel selection. 225 // 226 //***************************************************************************** 227 typedef enum 228 { 229 // Single-ended channels 230 AM_HAL_AUDADC_SLOT_CHSEL_SE0, 231 AM_HAL_AUDADC_SLOT_CHSEL_SE1, 232 AM_HAL_AUDADC_SLOT_CHSEL_SE2, 233 AM_HAL_AUDADC_SLOT_CHSEL_SE3, 234 AM_HAL_AUDADC_SLOT_CHSEL_SE4, 235 AM_HAL_AUDADC_SLOT_CHSEL_SE5, 236 AM_HAL_AUDADC_SLOT_CHSEL_SE6, 237 AM_HAL_AUDADC_SLOT_CHSEL_SE7, 238 // Miscellaneous other signals. 239 AM_HAL_AUDADC_SLOT_CHSEL_TEMP, 240 AM_HAL_AUDADC_SLOT_CHSEL_BATT, 241 AM_HAL_AUDADC_SLOT_TEST_MUX, 242 AM_HAL_AUDADC_SLOT_CHSEL_VSS 243 } am_hal_audadc_slot_chan_e; 244 245 //***************************************************************************** 246 // 247 //! Scale window comparator limits 248 // 249 //***************************************************************************** 250 typedef enum 251 { 252 AM_HAL_AUDADC_SCALE_WINCOMP_DIS, 253 AM_HAL_AUDADC_SCALE_WINCOMP_EN 254 } am_hal_audadc_scale_wincomp_e; 255 256 //***************************************************************************** 257 // 258 //! Internal repeating trigger (irtt) timer clock division 259 // 260 //***************************************************************************** 261 typedef enum 262 { 263 AM_HAL_AUDADC_RPTT_CLK_DIV1, 264 AM_HAL_AUDADC_RPTT_CLK_DIV2, 265 AM_HAL_AUDADC_RPTT_CLK_DIV4, 266 AM_HAL_AUDADC_RPTT_CLK_DIV8, 267 AM_HAL_AUDADC_RPTT_CLK_DIV16, 268 AM_HAL_AUDADC_RPTT_CLK_DIV32, 269 } am_hal_audadc_irtt_clkdiv_e; 270 271 //***************************************************************************** 272 // 273 //! DMA priority. 274 // 275 //***************************************************************************** 276 typedef enum 277 { 278 AM_HAL_AUDADC_PRIOR_BEST_EFFORT, 279 AM_HAL_AUDADC_PRIOR_SERVICE_IMMED 280 } am_hal_audadc_dma_prior_e; 281 282 //***************************************************************************** 283 //! 284 //! AUDADC control function request types for am_hal_audadc_control(). 285 //! 286 //! AM_HAL_AUDADC_REQ_TEMP_CELSIUS_GET: 287 //! pArgs must point to an array of 3 floats. To assure that the 288 //! array is valid, upon calling the 3rd float (pArgs[2]) must be 289 //! set to the value -123.456F. 290 //! AM_HAL_AUDADC_REQ_TEMP_TRIMS_GET: 291 //! pArgs must point to an array of 4 floats. To assure that the 292 //! array is valid, upon calling the 4th float (pArgs[3]) must be 293 //! set to the to the value -123.456F. 294 //! On return, pArgs[3] is set to 1 if the returned values are 295 //! calibrated, or 0 if default calibration values. 296 //! 297 //***************************************************************************** 298 typedef enum 299 { 300 AM_HAL_AUDADC_REQ_WINDOW_CONFIG, 301 AM_HAL_AUDADC_REQ_TEMP_CELSIUS_GET, 302 AM_HAL_AUDADC_REQ_TEMP_TRIMS_GET, 303 AM_HAL_AUDADC_REQ_DMA_DISABLE, 304 } am_hal_audadc_request_e; 305 306 //***************************************************************************** 307 // 308 //! PGA update mode 309 // 310 //***************************************************************************** 311 typedef enum 312 { 313 AM_HAL_AUDADC_GAIN_UPDATE_IMME, //Immediate update mode. Once gain is written, 314 // it is immediately encoded and provided to the PGA 315 AM_HAL_AUDADC_GAIN_UPDATE_ZX, //Update gain only at detected zero crossing as configured by ZX registers 316 }am_hal_audadc_gain_update_e; 317 318 //***************************************************************************** 319 // 320 //! AUDADC Sample structure. 321 // 322 //***************************************************************************** 323 typedef struct 324 { 325 int16_t int16Sample; 326 327 //! Which audio channel this data is from encoded as int(slot number/2). 328 //! In other words, this is 1 if data is from slots 2 or 3, or 0 if from slots 0 or 1. 329 uint16_t ui16AudChannel; 330 } am_hal_audadc_sample_t; 331 332 //***************************************************************************** 333 // 334 //! @brief Configuration structure for the AUDADC. 335 // 336 //***************************************************************************** 337 typedef struct 338 { 339 //! Select the AUDADC clock source. 340 am_hal_audadc_clksel_e eClock; 341 342 //! select the periodic trigger source 343 am_hal_audadc_rpttrigsel_e eRepeatTrigger; 344 345 //! Select the AUDADC trigger polarity. 346 am_hal_audadc_trigpol_e ePolarity; 347 348 //! Select the AUDADC trigger source. 349 am_hal_audadc_trigsel_e eTrigger; 350 351 // Select the AUDADC reference voltage. 352 // am_hal_audadc_refsel_e eReference; 353 354 //! sample mode selection 355 am_hal_audadc_sampmode_e eSampMode; 356 //! Whether to disable clocks between samples. 357 am_hal_audadc_clkmode_e eClockMode; 358 359 //! Select the AUDADC power mode. 360 am_hal_audadc_lpmode_e ePowerMode; 361 362 //! Select whether the AUDADC will re-trigger based on a signal from timer. 363 am_hal_audadc_repeat_e eRepeat; 364 365 } am_hal_audadc_config_t; 366 367 //***************************************************************************** 368 // 369 //! @brief Configuration structure for slot DC offset calibration coefficients. 370 // 371 //***************************************************************************** 372 typedef struct 373 { 374 //! Calibration coefficients valid flag 375 bool bValid; 376 377 //! Calibration coefficient (offset) in low gain configuration 378 float fLGOffset; 379 380 //! Calibration coefficient (slope) in high gain configuration 381 float fHGSlope; 382 383 //! Calibration coefficient (intercept) in high gain configuration 384 float fHGIntercept; 385 386 //! DC offset 387 int32_t i32DCOffsetAdj; 388 389 } am_hal_offset_cal_coeffs_t; 390 391 //***************************************************************************** 392 // 393 //! @brief Calibration Coefficients structure 394 // 395 //***************************************************************************** 396 typedef struct 397 { 398 //! Calibration coefficients for each slot 399 am_hal_offset_cal_coeffs_t sCalibCoeff[AM_HAL_AUDADC_MAX_SLOTS]; 400 401 } am_hal_offset_cal_coeffs_array_t; 402 403 //***************************************************************************** 404 // 405 //! @brief Configuration structure for the AUDADC slot. 406 // 407 //***************************************************************************** 408 typedef struct 409 { 410 //! Select the number of measurements to average 411 am_hal_audadc_meas_avg_e eMeasToAvg; 412 413 //! Set additional input sampling AUDADC clcok cycles 414 uint32_t ui32TrkCyc; 415 416 //! Select the precision mode 417 am_hal_audadc_slot_prec_e ePrecisionMode; 418 419 //! Select the channel 420 am_hal_audadc_slot_chan_e eChannel; 421 422 //! Select window comparison mode 423 bool bWindowCompare; 424 425 //! Enable the slot 426 bool bEnabled; 427 428 } am_hal_audadc_slot_config_t; 429 430 //***************************************************************************** 431 // 432 //! @brief Configuration structure for the AUDADC GAIN CODES. 433 // 434 //***************************************************************************** 435 typedef struct 436 { 437 //! Specifies the low gain code 438 //! (0 to 102 decimal specifies -6.0 dB to 45.0 dB in half-dB increments) for channel A (slot 0). 439 uint32_t ui32LGA; 440 441 //! Specifies the high gain code as an delta from the LGA field for channel A (slot 1). 442 uint32_t ui32HGADELTA; 443 444 //! Specifies the low gain code 445 //! (0 to 102 decimal specifies -6.0 dB to 45.0 dB in half-dB increments) for channel B (slot 2). 446 uint32_t ui32LGB; 447 448 //! Specifies the high gain code as an delta from the LGB field for channel B (slot 3). 449 uint32_t ui32HGBDELTA; 450 451 //! PGA update mode 452 am_hal_audadc_gain_update_e eUpdateMode; 453 454 //! 455 } am_hal_audadc_gain_config_t; 456 457 //***************************************************************************** 458 // 459 //! @brief Configuration structure for the AUDADC Saturation Comparator. 460 // 461 //***************************************************************************** 462 typedef struct 463 { 464 //! Select which slots to use for saturation measurement. 465 uint32_t ui32ChanSel; 466 467 /*! Sets the lower integer sample limit for the saturation 468 comparator. Note that these values are raw ADC values whose 469 bounds are specified by PRMODE but not manipulated by accumulate/divide 470 logic. Therefore, there is no oversampling and no binary 471 point in this value. */ 472 473 uint32_t ui32LowerSATCLimt; 474 //! Sets the upper integer sample limit for the saturation 475 uint32_t ui32UpperSATCLimt; 476 477 /*!< Sets the number of saturation events that may occur 478 before a SATCA interrupt occurs. Once this interrupt occurs, 479 the saturation event counter must be cleared by writing 480 the SATCLR register. A value of 0 is invalid and will cause 481 the saturation interrupt to assert immediately. */ 482 uint32_t ui32SATCAMax; 483 //! Sets the number of saturation events that may occur before a SATCB interrupt occurs. 484 uint32_t ui32SATCBMax; 485 486 } am_hal_audadc_sat_config_t; 487 488 //***************************************************************************** 489 // 490 //! @brief Configuration structure for the AUDADC internal repeat trigger timer. 491 // 492 //***************************************************************************** 493 typedef struct 494 { 495 //! AUDADC-internal repeat trigger timer enable 496 bool bIrttEnable; 497 am_hal_audadc_irtt_clkdiv_e eClkDiv; 498 uint32_t ui32IrttCountMax; 499 } am_hal_audadc_irtt_config_t; 500 501 //***************************************************************************** 502 // 503 //! @brief Configuration structure for the AUDADC DMA 504 // 505 //***************************************************************************** 506 typedef struct 507 { 508 //! AUDADC DMA dynamic priority enabled. 509 bool bDynamicPriority; 510 511 //! AUDADC DMA static priority. 512 am_hal_audadc_dma_prior_e ePriority; 513 514 //! Enable DMA for AUDADC 515 bool bDMAEnable; 516 517 //! Transfer count in samples 518 uint32_t ui32SampleCount; 519 520 //! Target address 521 uint32_t ui32TargetAddress; 522 523 //! Pingpong buffer 524 uint32_t ui32TargetAddressReverse; 525 526 } am_hal_audadc_dma_config_t; 527 528 //***************************************************************************** 529 // 530 //! @brief Window configuration structure for the AUDADC. 531 // 532 //***************************************************************************** 533 typedef struct 534 { 535 //! Scale window comparison 536 bool bScaleLimits; 537 538 //! Window limits 539 uint32_t ui32Upper; 540 uint32_t ui32Lower; 541 542 } am_hal_audadc_window_config_t; 543 544 //***************************************************************************** 545 // 546 //! @brief Capabilities structure for the AUDADC. 547 // 548 //***************************************************************************** 549 typedef struct 550 { 551 uint32_t dummy; 552 553 } am_hal_audadc_capabilities_t; 554 555 //***************************************************************************** 556 // 557 //! @brief Status structure for the AUDADC. 558 // 559 //***************************************************************************** 560 typedef struct 561 { 562 // 563 // AUDADC power status. 564 // 565 bool bPoweredOn; 566 bool bLPMode1; 567 568 // 569 // DMA status. 570 // 571 bool bErr; 572 bool bCmp; 573 bool bTIP; 574 575 } am_hal_audadc_status_t; 576 577 //***************************************************************************** 578 // 579 //! Transfer callback function prototype 580 // 581 //***************************************************************************** 582 typedef void (*am_hal_audadc_callback_t)(void *pCallbackCtxt, uint32_t status); 583 584 //***************************************************************************** 585 // 586 //! @name AUDADC Interrupts 587 //! @{ 588 //! Interrupt Status Bits for enable/disble use 589 //! 590 //! These macros may be used to enable an individual AUDADC interrupt cause. 591 // 592 //***************************************************************************** 593 #define AM_HAL_AUDADC_INT_DERR (_VAL2FLD(AUDADC_INTEN_DERR, 1)) 594 #define AM_HAL_AUDADC_INT_DCMP (_VAL2FLD(AUDADC_INTEN_DCMP, 1)) 595 #define AM_HAL_AUDADC_INT_WCINC (_VAL2FLD(AUDADC_INTEN_WCINC, 1)) 596 #define AM_HAL_AUDADC_INT_WCEXC (_VAL2FLD(AUDADC_INTEN_WCEXC, 1)) 597 #define AM_HAL_AUDADC_INT_FIFOOVR2 (_VAL2FLD(AUDADC_INTEN_FIFOOVR2, 1)) 598 #define AM_HAL_AUDADC_INT_FIFOOVR1 (_VAL2FLD(AUDADC_INTEN_FIFOOVR1, 1)) 599 #define AM_HAL_AUDADC_INT_SCNCMP (_VAL2FLD(AUDADC_INTEN_SCNCMP, 1)) 600 #define AM_HAL_AUDADC_INT_CNVCMP (_VAL2FLD(AUDADC_INTEN_CNVCMP, 1)) 601 #define AM_HAL_AUDADC_INT_ZXCA (_VAL2FLD(AUDADC_INTEN_ZXCA, 1)) 602 #define AM_HAL_AUDADC_INT_ZXCB (_VAL2FLD(AUDADC_INTEN_ZXCB, 1)) 603 #define AM_HAL_AUDADC_INT_SATCA (_VAL2FLD(AUDADC_INTEN_SATCA, 1)) 604 #define AM_HAL_AUDADC_INT_SATCB (_VAL2FLD(AUDADC_INTEN_SATCB, 1)) 605 //! @} 606 607 //***************************************************************************** 608 // 609 //! @name AUDADC Fifo Read macros 610 //! @{ 611 //! These are helper macros for interpreting FIFO data. Each AUDADC FIFO entry 612 //! contains information about the slot number and the FIFO depth alongside the 613 //! current sample. These macros perform the correct masking and shifting to 614 //! read those values. 615 //! 616 //! The SAMPLE and FULL_SAMPLE options refer to the fractional part of averaged 617 //! samples. If you are not using hardware averaging or don't need the 618 //! fractional part of the AUDADC sample, you should just use 619 //! AM_HAL_AUDADC_FIFO_SAMPLE. 620 //! 621 //! If you do need the fractional part, use AM_HAL_AUDADC_FIFO_FULL_SAMPLE. This 622 //! macro will keep six bits of precision past the decimal point. Depending on 623 //! the number of averaged samples, anywhere between 1 and 6 of these bits will 624 //! be valid. Please consult the datasheet to find out how many bits of data 625 //! are valid for your chosen averaging settings. 626 //! 627 // 628 //***************************************************************************** 629 //#define AM_HAL_AUDADC_FIFO_SAMPLE(value) (_FLD2VAL(AUDADC_FIFOPR_LGDATAPR, value) >> 6) 630 #define AM_HAL_AUDADC_FIFO_LGDATA(value) (_FLD2VAL(AUDADC_FIFOPR_LGDATAPR, value)) 631 #define AM_HAL_AUDADC_FIFO_HGDATA(value) (_FLD2VAL(AUDADC_FIFOPR_HGDATAPR, value)) 632 //#define AM_HAL_AUDADC_FIFO_FULL_SAMPLE(value) (_FLD2VAL(AUDADC_FIFOPR_METALOPR, value)) 633 #define AM_HAL_AUDADC_FIFO_SLOT(value) (_FLD2VAL(AUDADC_FIFO_MIC, value)) 634 #define AM_HAL_AUDADC_FIFO_COUNT(value) (_FLD2VAL(AUDADC_FIFO_COUNT, value)) 635 #define AM_HAL_AUDADC_FIFO_EMPTY(h) (((AUDADC_Type*)h)->FIFO == 0xFFFFFFFF)? 1:0 636 //! @} 637 638 #ifdef __cplusplus 639 extern "C" 640 { 641 #endif 642 643 //***************************************************************************** 644 // 645 //! @brief AUDADC initialization function 646 //! 647 //! @param ui32Module - module instance. 648 //! @param ppHandle - returns the handle for the module instance. 649 //! 650 //! This function accepts a module instance, allocates the interface and then 651 //! returns a handle to be used by the remaining interface functions. 652 //! 653 //! @return status - generic or interface specific status. 654 //! 655 //! @note A return of AM_HAL_STATUS_SUCCESS does not infer that the 656 //! temperature calibrations are valid. The caller must check the bMeasured 657 //! structure element in order to determine that. 658 // 659 //***************************************************************************** 660 extern uint32_t am_hal_audadc_initialize(uint32_t ui32Module, void **ppHandle); 661 662 //***************************************************************************** 663 // 664 //! @brief AUDADC deinitialization function 665 //! 666 //! @param pHandle - returns the handle for the module instance. 667 //! 668 //! This function accepts a handle to an instance and de-initializes the 669 //! interface. 670 //! 671 //! @return status - generic or interface specific status. 672 // 673 //***************************************************************************** 674 extern uint32_t am_hal_audadc_deinitialize(void *pHandle); 675 676 //***************************************************************************** 677 // 678 //! @brief AUDADC configuration function 679 //! 680 //! @param pHandle - handle for the module instance. 681 //! @param psConfig - pointer to the configuration structure. 682 //! 683 //! This function configures the AUDADC for operation. 684 //! 685 //! @return status - generic or interface specific status. 686 // 687 //***************************************************************************** 688 extern uint32_t am_hal_audadc_configure(void *pHandle, 689 am_hal_audadc_config_t *psConfig); 690 691 //***************************************************************************** 692 // 693 //! @brief AUDADC slot configuration function 694 //! 695 //! @param pHandle - handle for the module instance. 696 //! @param ui32SlotNumber - AUDADC Slot Number 697 //! @param pSlotConfig - pointer to the configuration structure. 698 //! 699 //! This function configures the AUDADC slot for operation. 700 //! 701 //! @return status - generic or interface specific status. 702 // 703 //***************************************************************************** 704 extern uint32_t am_hal_audadc_configure_slot(void *pHandle, 705 uint32_t ui32SlotNumber, 706 am_hal_audadc_slot_config_t *pSlotConfig); 707 708 //***************************************************************************** 709 // 710 //! @brief Calculate AUDADC slot DC offset 711 //! 712 //! @param pHandle - handle for the module instance. 713 //! @param ui32SlotTotalNumber - Slot total number. 714 //! @param pSlotCalib - pointer to the calibration structure. 715 //! 716 //! This function calculates the AUDADC slot DC offset for calibration, must 717 //! be called after calling am_hal_audadc_internal_pga_config() and 718 //! am_hal_audadc_configure_slot(). 719 //! 720 //! @return status - generic or interface specific status. 721 // 722 //***************************************************************************** 723 uint32_t 724 am_hal_audadc_slot_dc_offset_calculate(void *pHandle, 725 uint32_t ui32SlotTotalNumber, 726 am_hal_offset_cal_coeffs_array_t *pSlotCalib); 727 728 //***************************************************************************** 729 // 730 //! @brief AUDADC internal repeating trigger timer configuration function 731 //! 732 //! @param pHandle - handle for the module instance. 733 //! @param pConfig - pointer to the configuration structure. 734 //! 735 //! This function configures the AUDADC internal trigger timer for operation. 736 //! 737 //! @return status - generic or interface specific status. 738 // 739 //***************************************************************************** 740 extern uint32_t am_hal_audadc_configure_irtt(void *pHandle, 741 am_hal_audadc_irtt_config_t *pConfig); 742 743 //***************************************************************************** 744 // 745 //! @brief AUDADC internal repeating trigger timer enable function 746 //! 747 //! @param pHandle - handle for the module instance. 748 //! 749 //! This function enables internal repeating trigger timer. 750 //! 751 //! @return status - generic or interface specific status. 752 // 753 //***************************************************************************** 754 uint32_t 755 am_hal_audadc_irtt_enable(void *pHandle); 756 757 //***************************************************************************** 758 // 759 //! @brief AUDADC internal repeating trigger timer disable function 760 //! 761 //! @param pHandle - handle for the module instance. 762 //! 763 //! This function disables internal repeating trigger timer. 764 //! 765 //! @return status - generic or interface specific status. 766 // 767 //***************************************************************************** 768 uint32_t 769 am_hal_audadc_irtt_disable(void *pHandle); 770 771 //***************************************************************************** 772 // 773 //! @brief AUDADC DMA configuration function 774 //! 775 //! @param pHandle - handle for the module instance. 776 //! @param pDMAConfig - pointer to the configuration structure. 777 //! 778 //! This function configures the AUDADC DMA for operation. 779 //! 780 //! @return status - generic or interface specific status. 781 // 782 //***************************************************************************** 783 extern uint32_t am_hal_audadc_configure_dma(void *pHandle, 784 am_hal_audadc_dma_config_t *pDMAConfig); 785 786 //***************************************************************************** 787 // 788 //! @brief AUDADC DMA Buffer function 789 //! 790 //! @param pHandle - handle for the module instance. 791 //! 792 //! This function to get DMA Buffer. 793 //! 794 //! @return status - generic or interface specific status. 795 // 796 //***************************************************************************** 797 extern uint32_t am_hal_audadc_dma_get_buffer(void *pHandle); 798 799 //***************************************************************************** 800 // 801 //! @brief AUDADC device specific control function. 802 //! 803 //! @param pHandle - handle for the module instance. 804 //! @param eRequest - One of: 805 //! AM_HAL_AUDADC_REQ_WINDOW_CONFIG 806 //! AM_HAL_AUDADC_REQ_TEMP_CELSIUS_GET (pArgs is required, see enums). 807 //! AM_HAL_AUDADC_REQ_TEMP_TRIMS_GET (pArgs is required, see enums). 808 //! AM_HAL_AUDADC_REQ_DMA_DISABLE (pArgs is not required). 809 //! @param pArgs - Pointer to arguments for Control Switch Case 810 //! 811 //! This function provides for special control functions for the AUDADC operation. 812 //! 813 //! @return status - generic or interface specific status. 814 // 815 //***************************************************************************** 816 extern uint32_t am_hal_audadc_control(void *pHandle, 817 am_hal_audadc_request_e eRequest, 818 void *pArgs); 819 820 //***************************************************************************** 821 // 822 //! @brief AUDADC enable function 823 //! 824 //! @param pHandle - handle for the module instance. 825 //! 826 //! This function enables the AUDADC operation. 827 //! 828 //! @return status - generic or interface specific status. 829 // 830 //***************************************************************************** 831 extern uint32_t am_hal_audadc_enable(void *pHandle); 832 833 //***************************************************************************** 834 // 835 //! @brief AUDADC disable function 836 //! 837 //! @param pHandle - handle for the module instance. 838 //! 839 //! This function disables the AUDADC operation. 840 //! 841 //! @return status - generic or interface specific status. 842 // 843 //***************************************************************************** 844 extern uint32_t am_hal_audadc_disable(void *pHandle); 845 846 //***************************************************************************** 847 // 848 //! @brief AUDADC status function 849 //! 850 //! @param pHandle - handle for the interface. 851 //! @param pStatus - pointer to status 852 //! 853 //! This function returns the current status of the DMA operation. 854 //! 855 //! @return status - DMA status flags. 856 // 857 //***************************************************************************** 858 extern uint32_t am_hal_audadc_status_get(void *pHandle, 859 am_hal_audadc_status_t *pStatus ); 860 861 //***************************************************************************** 862 // 863 //! @brief AUDADC enable interrupts function 864 //! 865 //! @param pHandle - handle for the interface. 866 //! @param ui32IntMask - AUDADC interrupt mask. 867 //! 868 //! This function enables the specific indicated interrupts. 869 //! 870 //! @return status - generic or interface specific status. 871 // 872 //***************************************************************************** 873 extern uint32_t am_hal_audadc_interrupt_enable(void *pHandle, uint32_t ui32IntMask); 874 875 //***************************************************************************** 876 // 877 //! @brief AUDADC disable interrupts function 878 //! 879 //! @param pHandle - handle for the interface. 880 //! @param ui32IntMask - AUDADC interrupt mask. 881 //! 882 //! This function disable the specific indicated interrupts. 883 //! 884 //! @return status - generic or interface specific status. 885 // 886 //***************************************************************************** 887 extern uint32_t am_hal_audadc_interrupt_disable(void *pHandle, uint32_t ui32IntMask); 888 889 //***************************************************************************** 890 // 891 //! @brief AUDADC interrupt status function 892 //! 893 //! @param pHandle - handle for the interface. 894 //! @param pui32Status - pointer to status 895 //! @param bEnabledOnly - if AUDADC enabled 896 //! 897 //! This function returns the specific indicated interrupt status. 898 //! 899 //! @return status - generic or interface specific status. 900 // 901 //***************************************************************************** 902 extern uint32_t am_hal_audadc_interrupt_status(void *pHandle, 903 uint32_t *pui32Status, 904 bool bEnabledOnly); 905 906 //***************************************************************************** 907 // 908 //! @brief AUDADC interrupt clear 909 //! 910 //! @param pHandle - handle for the interface. 911 //! @param ui32IntMask - uint32_t for interrupts to clear 912 //! 913 //! This function clears the interrupts for the given peripheral. 914 //! 915 //! @return status - generic or interface specific status. 916 // 917 //***************************************************************************** 918 extern uint32_t am_hal_audadc_interrupt_clear(void *pHandle, uint32_t ui32IntMask); 919 920 //***************************************************************************** 921 // 922 //! @brief AUDADC interrupt service 923 //! 924 //! @param pHandle - handle for the interface. 925 //! @param pDMAConfig - pointer to DMA configuration 926 //! 927 //! Interrupt service routine. 928 //! 929 //! @return status - generic or interface specific status. 930 // 931 //***************************************************************************** 932 extern uint32_t am_hal_audadc_interrupt_service(void *pHandle, 933 am_hal_audadc_dma_config_t *pDMAConfig); 934 935 //***************************************************************************** 936 // 937 //! @brief AUDADC sample read function 938 //! 939 //! @param pHandle - handle for the module instance. 940 //! @param pui32InSampleBuffer - Ptr to the input sample buffer. 941 //! If NULL then samples will be read directly 942 //! from the FIFO. 943 //! @param pui32InOutNumberSamples - Ptr to variable containing the number of 944 //! samples. 945 //! @param bLowSample - Boolean for Low Sample 946 //! @param pui32LGOutBuffer - Ptr to the required output Low-gain PGA sample buffer. 947 //! @param bHighSample - Boolean for High Sample 948 //! @param pui32HGOutBuffer - Ptr to the required output High-gain PGA sample buffer. 949 //! 950 //! @param pSlotCalib - Ptr to the DC offset for calibration. 951 //! 952 //! This function reads samples from the AUDADC FIFO or an SRAM sample buffer 953 //! returned by a DMA operation, and calibrates the samples. 954 //! 955 //! @return status - generic or interface specific status. 956 // 957 //***************************************************************************** 958 extern uint32_t am_hal_audadc_samples_read(void *pHandle, 959 uint32_t *pui32InSampleBuffer, 960 uint32_t *pui32InOutNumberSamples, 961 bool bLowSample, am_hal_audadc_sample_t *pui32LGOutBuffer, 962 bool bHighSample, am_hal_audadc_sample_t *pui32HGOutBuffer, 963 am_hal_offset_cal_coeffs_array_t *pSlotCalib); 964 965 //***************************************************************************** 966 // 967 //! @brief AUDADC software trigger function 968 //! 969 //! @param pHandle - handle for the module instance. 970 //! 971 //! This function triggers the AUDADC operation. 972 //! 973 //! @return status - generic or interface specific status. 974 // 975 //***************************************************************************** 976 extern uint32_t am_hal_audadc_sw_trigger(void *pHandle); 977 978 979 //***************************************************************************** 980 // 981 //! @brief AUDADC power control function 982 //! 983 //! @param pHandle - handle for the interface. 984 //! @param ePowerState - the desired power state to move the peripheral to. 985 //! @param bRetainState - flag (if true) to save/restore peripheral state upon 986 //! power state ui32ChanNumge. 987 //! 988 //! This function updates the peripheral to a given power state. 989 //! 990 //! @return status - generic or interface specific status. 991 // 992 //***************************************************************************** 993 extern uint32_t am_hal_audadc_power_control(void *pHandle, 994 am_hal_sysctrl_power_state_e ePowerState, 995 bool bRetainState); 996 997 //***************************************************************************** 998 // 999 //! @brief Set PGA gain 1000 //! 1001 //! @param ui32ChanNum - PGA ui32ChanNumnel number: 0:A0, 1:A1, 2:B0, 3:B1, 1002 //! @param in32GaindBx2 - gain in dB. in32GaindBx2 = 2 * gain (dB) 1003 //! 1004 //! This function sets the gain of PGA. 1005 //! 1006 //! @return status - generic or interface specific status. 1007 // 1008 //***************************************************************************** 1009 extern uint32_t am_hal_audadc_gain_set(uint32_t ui32ChanNum, int32_t in32GaindBx2); 1010 1011 //***************************************************************************** 1012 // 1013 //! @brief Turn on PGA 1014 //! 1015 //! @param ui32ChanNum - PGA ui32ChanNumnel number: 0:A0, 1:A1, 2:B0, 3:B1, 1016 //! 1017 //! This function turn on PGA. 1018 //! 1019 //! @return status - generic or interface specific status. 1020 // 1021 //***************************************************************************** 1022 extern uint32_t am_hal_audadc_pga_powerup(uint32_t ui32ChanNum); 1023 1024 //***************************************************************************** 1025 // 1026 //! @brief Turn off PGA 1027 //! 1028 //! @param ui32ChanNum - PGA ui32ChanNumnel number: 0:A0, 1:A1, 2:B0, 3:B1, 1029 //! 1030 //! This function is to turn off PGA. 1031 //! 1032 //! @return status - generic or interface specific status. 1033 // 1034 //***************************************************************************** 1035 extern uint32_t am_hal_audadc_pga_powerdown(uint32_t ui32ChanNum); 1036 1037 //***************************************************************************** 1038 // 1039 //! @brief Turn on reference 1040 //! 1041 //! This function turn on the reference voltage and current. 1042 //! 1043 //! @return status - generic or interface specific status. 1044 // 1045 //***************************************************************************** 1046 extern uint32_t am_hal_audadc_refgen_powerup(void); 1047 1048 //***************************************************************************** 1049 // 1050 //! @brief Turn off reference 1051 //! 1052 //! This function turn off the reference voltage and current. 1053 //! 1054 //! @return status - generic or interface specific status. 1055 // 1056 //***************************************************************************** 1057 extern uint32_t am_hal_audadc_refgen_powerdown(void); 1058 1059 //***************************************************************************** 1060 // 1061 //! @brief Turn on mic bias voltage to power up the mic 1062 //! 1063 //! @param ui32VolTrim - The value to set the output voltage 1064 //! 1065 //! This function sets output of the mic bias voltage. 1066 //! 1067 //***************************************************************************** 1068 extern void am_hal_audadc_micbias_powerup(uint32_t ui32VolTrim); 1069 1070 //***************************************************************************** 1071 // 1072 //! @brief Turn off mic bias voltage to power off the mic 1073 //! 1074 //! This function turns off the mic bias voltage. 1075 //! 1076 //***************************************************************************** 1077 extern void am_hal_audadc_micbias_powerdown(void); 1078 1079 //***************************************************************************** 1080 // 1081 //! @brief Config internal PGA. 1082 //! 1083 //! @param pHandle - handle for the interface. 1084 //! @param psGainConfig - pointer to the AUDADC Gain Config 1085 //! 1086 //! This function configures the AUADC Pre-Amplifier Gain. 1087 //! 1088 //! @return status - generic or interface specific status. 1089 // 1090 //***************************************************************************** 1091 extern uint32_t am_hal_audadc_internal_pga_config(void *pHandle, am_hal_audadc_gain_config_t* psGainConfig); 1092 1093 //***************************************************************************** 1094 // 1095 //! @brief Config Saturation Comparator. 1096 //! 1097 //! @param pHandle - handle for the interface. 1098 //! @param psSATConfig - pointer to the AUDADC Saturation Config 1099 //! 1100 //! This function configures the Saturation Comparator. 1101 //! 1102 //! @return status - generic or interface specific status. 1103 //! 1104 //***************************************************************************** 1105 extern uint32_t am_hal_audadc_saturation_config(void *pHandle, am_hal_audadc_sat_config_t* psSATConfig); 1106 1107 #ifdef __cplusplus 1108 } 1109 #endif 1110 1111 #endif // AM_HAL_AUDADC_H 1112 1113 //***************************************************************************** 1114 // 1115 // End Doxygen group. 1116 //! @} 1117 // 1118 //***************************************************************************** 1119 1120
