1<?xml version="1.0" encoding="utf-8" standalone="no"?>
2<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="svd_schema.xsd">
3 <peripheral>
4  <name>TRIMSIR</name>
5  <description>Trim System Initilazation Registers</description>
6  <baseAddress>0x40005400</baseAddress>
7  <addressBlock>
8   <offset>0x00</offset>
9   <size>0x400</size>
10   <usage>registers</usage>
11  </addressBlock>
12  <registers>
13   <register>
14    <name>RTC</name>
15    <description>RTC Trim System Initialization Register.</description>
16    <addressOffset>0x08</addressOffset>
17    <fields>
18     <field>
19      <name>X1TRIM</name>
20      <description>RTC X1 Trim.</description>
21      <bitOffset>16</bitOffset>
22      <bitWidth>5</bitWidth>
23     </field>
24     <field>
25      <name>X2TRIM</name>
26      <description>RTC X2 Trim.</description>
27      <bitOffset>21</bitOffset>
28      <bitWidth>5</bitWidth>
29     </field>
30     <field>
31      <name>LOCK</name>
32      <description>Lock.</description>
33      <bitOffset>31</bitOffset>
34      <bitWidth>1</bitWidth>
35     </field>
36    </fields>
37   </register>
38   <register>
39    <name>SIMO</name>
40    <description>SIMO Trim System Initialization Register.</description>
41    <addressOffset>0x34</addressOffset>
42    <access>read-only</access>
43    <fields>
44     <field>
45      <name>CLKDIV</name>
46      <description>SIMO Clock Divide.</description>
47      <bitOffset>0</bitOffset>
48      <bitWidth>3</bitWidth>
49      <enumeratedValues>
50       <enumeratedValue>
51        <name>DIV1</name>
52        <value>0</value>
53       </enumeratedValue>
54       <enumeratedValue>
55        <name>DIV16</name>
56        <value>1</value>
57       </enumeratedValue>
58       <enumeratedValue>
59        <name>DIV32</name>
60        <value>3</value>
61       </enumeratedValue>
62       <enumeratedValue>
63        <name>DIV64</name>
64        <value>5</value>
65       </enumeratedValue>
66       <enumeratedValue>
67        <name>DIV128</name>
68        <value>7</value>
69       </enumeratedValue>
70      </enumeratedValues>
71     </field>
72    </fields>
73   </register>
74   <register>
75    <name>IPOLO</name>
76    <description>IPO Low Trim System Initialization Register.</description>
77    <addressOffset>0x3C</addressOffset>
78    <access>read-only</access>
79    <fields>
80     <field>
81      <name>IPO_LIMITLO</name>
82      <description>IPO Low Limit Trim.</description>
83      <bitOffset>0</bitOffset>
84      <bitWidth>8</bitWidth>
85     </field>
86    </fields>
87   </register>
88   <register>
89    <name>CTRL</name>
90    <description>Control Trim System Initialization Register.</description>
91    <addressOffset>0x40</addressOffset>
92    <fields>
93     <field>
94      <name>VDDA_LIMITLO</name>
95      <description>VDDA Low Trim Limit.</description>
96      <bitOffset>0</bitOffset>
97      <bitWidth>7</bitWidth>
98     </field>
99     <field>
100      <name>VDDA_LIMITHI</name>
101      <description>VDDA High Trim Limit.</description>
102      <bitOffset>8</bitOffset>
103      <bitWidth>7</bitWidth>
104     </field>
105     <field>
106      <name>IPO_LIMITHI</name>
107      <description>IPO High Trim Limit.</description>
108      <bitOffset>15</bitOffset>
109      <bitWidth>9</bitWidth>
110     </field>
111     <field>
112      <name>INRO_SEL</name>
113      <description>INRO Clock Select.</description>
114      <bitOffset>24</bitOffset>
115      <bitWidth>2</bitWidth>
116      <enumeratedValues>
117       <enumeratedValue>
118        <name>8KHZ</name>
119        <value>0</value>
120       </enumeratedValue>
121       <enumeratedValue>
122        <name>16KHZ</name>
123        <value>1</value>
124       </enumeratedValue>
125       <enumeratedValue>
126        <name>30KHZ</name>
127        <value>2</value>
128       </enumeratedValue>
129      </enumeratedValues>
130     </field>
131     <field>
132      <name>INRO_TRIM</name>
133      <description>INRO Clock Trim.</description>
134      <bitOffset>29</bitOffset>
135      <bitWidth>3</bitWidth>
136     </field>
137    </fields>
138   </register>
139   <register>
140    <name>INRO</name>
141    <description>RTC Trim System Initialization Register.</description>
142    <addressOffset>0x44</addressOffset>
143    <fields>
144     <field>
145      <name>TRIM16K</name>
146      <description>INRO 16KHz Trim.</description>
147      <bitOffset>0</bitOffset>
148      <bitWidth>3</bitWidth>
149     </field>
150     <field>
151      <name>TRIM30K</name>
152      <description>INRO 30KHz Trim.</description>
153      <bitOffset>3</bitOffset>
154      <bitWidth>3</bitWidth>
155     </field>
156     <field>
157      <name>LPCLKSEL</name>
158      <description>INRO Low Power Mode Clock Select.</description>
159      <bitOffset>6</bitOffset>
160      <bitWidth>2</bitWidth>
161      <enumeratedValues>
162       <enumeratedValue>
163        <name>8KHZ</name>
164        <value>0</value>
165       </enumeratedValue>
166       <enumeratedValue>
167        <name>16KHZ</name>
168        <value>1</value>
169       </enumeratedValue>
170       <enumeratedValue>
171        <name>30KHZ</name>
172        <value>2</value>
173       </enumeratedValue>
174      </enumeratedValues>
175     </field>
176    </fields>
177   </register>
178  </registers>
179 </peripheral>
180<!-- TRIMSIR:Trim System Initilazation Registers -->
181</device>
182