1<?xml version="1.0" encoding="utf-8" standalone="no"?> 2<device xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" schemaVersion="1.1" xs:noNamespaceSchemaLocation="svd_schema.xsd"> 3 <peripheral> 4 <name>FCR</name> 5 <description>Function Control Register.</description> 6 <baseAddress>0x40000800</baseAddress> 7 <addressBlock> 8 <offset>0x00</offset> 9 <size>0x400</size> 10 <usage>registers</usage> 11 </addressBlock> 12 <registers> 13 <register> 14 <name>FCTRL0</name> 15 <description>Function Control 0.</description> 16 <addressOffset>0x00</addressOffset> 17 <access>read-write</access> 18 <fields> 19 <field> 20 <name>RDSGCSEL</name> 21 <description>Hyperbys RDS Gray Code Select.</description> 22 <bitOffset>0</bitOffset> 23 <bitWidth>6</bitWidth> 24 </field> 25 <field> 26 <name>RDSGCSET</name> 27 <description>Hyperbus RDS Set.</description> 28 <bitOffset>6</bitOffset> 29 <bitWidth>1</bitWidth> 30 </field> 31 <field> 32 <name>HYPERCGDLY</name> 33 <description>Hyperbus Clock Generator Delay.</description> 34 <bitOffset>8</bitOffset> 35 <bitWidth>6</bitWidth> 36 </field> 37 <field> 38 <name>USBCLKSEL</name> 39 <description>USB Core Clock Select.</description> 40 <bitOffset>16</bitOffset> 41 <bitWidth>2</bitWidth> 42 </field> 43 <field> 44 <name>I2C0DGEN0</name> 45 <description>I2C0 SDA Pad Deglitcher enable.</description> 46 <bitOffset>20</bitOffset> 47 <bitWidth>1</bitWidth> 48 <enumeratedValues> 49 <enumeratedValue> 50 <name>dis</name> 51 <description>Deglitcher disabled.</description> 52 <value>0</value> 53 </enumeratedValue> 54 <enumeratedValue> 55 <name>en</name> 56 <description>Deglitcher enabled.</description> 57 <value>1</value> 58 </enumeratedValue> 59 </enumeratedValues> 60 </field> 61 <field> 62 <name>I2C0DGEN1</name> 63 <description>I2C0 SCL Pad Deglitcher enable.</description> 64 <bitOffset>21</bitOffset> 65 <bitWidth>1</bitWidth> 66 <enumeratedValues> 67 <enumeratedValue> 68 <name>dis</name> 69 <description>Deglitcher disabled.</description> 70 <value>0</value> 71 </enumeratedValue> 72 <enumeratedValue> 73 <name>en</name> 74 <description>Deglitcher enabled.</description> 75 <value>1</value> 76 </enumeratedValue> 77 </enumeratedValues> 78 </field> 79 <field> 80 <name>I2C1DGEN0</name> 81 <description>I2C1 SDA Pad Deglitcher enable.</description> 82 <bitOffset>22</bitOffset> 83 <bitWidth>1</bitWidth> 84 <enumeratedValues> 85 <enumeratedValue> 86 <name>dis</name> 87 <description>Deglitcher disabled.</description> 88 <value>0</value> 89 </enumeratedValue> 90 <enumeratedValue> 91 <name>en</name> 92 <description>Deglitcher enabled.</description> 93 <value>1</value> 94 </enumeratedValue> 95 </enumeratedValues> 96 </field> 97 <field> 98 <name>I2C1DGEN1</name> 99 <description>I2C1 SCL Pad Deglitcher enable.</description> 100 <bitOffset>23</bitOffset> 101 <bitWidth>1</bitWidth> 102 <enumeratedValues> 103 <enumeratedValue> 104 <name>dis</name> 105 <description>Deglitcher disabled.</description> 106 <value>0</value> 107 </enumeratedValue> 108 <enumeratedValue> 109 <name>en</name> 110 <description>Deglitcher enabled.</description> 111 <value>1</value> 112 </enumeratedValue> 113 </enumeratedValues> 114 </field> 115 <field> 116 <name>I2C2DGEN0</name> 117 <description>I2C2 SDA Pad Deglitcher enable.</description> 118 <bitOffset>24</bitOffset> 119 <bitWidth>1</bitWidth> 120 <enumeratedValues> 121 <enumeratedValue> 122 <name>dis</name> 123 <description>Deglitcher disabled.</description> 124 <value>0</value> 125 </enumeratedValue> 126 <enumeratedValue> 127 <name>en</name> 128 <description>Deglitcher enabled.</description> 129 <value>1</value> 130 </enumeratedValue> 131 </enumeratedValues> 132 </field> 133 <field> 134 <name>I2C2DGEN1</name> 135 <description>I2C2 SCL Pad Deglitcher enable.</description> 136 <bitOffset>25</bitOffset> 137 <bitWidth>1</bitWidth> 138 <enumeratedValues> 139 <enumeratedValue> 140 <name>dis</name> 141 <description>Deglitcher disabled.</description> 142 <value>0</value> 143 </enumeratedValue> 144 <enumeratedValue> 145 <name>en</name> 146 <description>Deglitcher enabled.</description> 147 <value>1</value> 148 </enumeratedValue> 149 </enumeratedValues> 150 </field> 151 </fields> 152 </register> 153 <register> 154 <name>AUTOCAL0</name> 155 <description>Automatic Calibration 0.</description> 156 <addressOffset>0x04</addressOffset> 157 <access>read-write</access> 158 <fields> 159 <field> 160 <name>ACEN</name> 161 <description>Auto-calibration Enable.</description> 162 <bitOffset>0</bitOffset> 163 <bitWidth>1</bitWidth> 164 <enumeratedValues> 165 <enumeratedValue> 166 <name>dis</name> 167 <description>Disabled.</description> 168 <value>0</value> 169 </enumeratedValue> 170 <enumeratedValue> 171 <name>en</name> 172 <description>Enabled.</description> 173 <value>1</value> 174 </enumeratedValue> 175 </enumeratedValues> 176 </field> 177 <field> 178 <name>ACRUN</name> 179 <description>Autocalibration Run.</description> 180 <bitOffset>1</bitOffset> 181 <bitWidth>1</bitWidth> 182 <enumeratedValues> 183 <enumeratedValue> 184 <name>not</name> 185 <description>Not Running.</description> 186 <value>0</value> 187 </enumeratedValue> 188 <enumeratedValue> 189 <name>run</name> 190 <description>Running.</description> 191 <value>1</value> 192 </enumeratedValue> 193 </enumeratedValues> 194 </field> 195 <field> 196 <name>LDTRM</name> 197 <description>Load Trim.</description> 198 <bitOffset>2</bitOffset> 199 <bitWidth>1</bitWidth> 200 </field> 201 <field> 202 <name>GAININV</name> 203 <description>Invert Gain.</description> 204 <bitOffset>3</bitOffset> 205 <bitWidth>1</bitWidth> 206 <enumeratedValues> 207 <enumeratedValue> 208 <name>not</name> 209 <description>Not Running.</description> 210 <value>0</value> 211 </enumeratedValue> 212 <enumeratedValue> 213 <name>run</name> 214 <description>Running.</description> 215 <value>1</value> 216 </enumeratedValue> 217 </enumeratedValues> 218 </field> 219 <field> 220 <name>ATOMIC</name> 221 <description>Atomic mode.</description> 222 <bitOffset>4</bitOffset> 223 <bitWidth>1</bitWidth> 224 <enumeratedValues> 225 <enumeratedValue> 226 <name>not</name> 227 <description>Not Running.</description> 228 <value>0</value> 229 </enumeratedValue> 230 <enumeratedValue> 231 <name>run</name> 232 <description>Running.</description> 233 <value>1</value> 234 </enumeratedValue> 235 </enumeratedValues> 236 </field> 237 <field> 238 <name>MU</name> 239 <description>MU value.</description> 240 <bitOffset>8</bitOffset> 241 <bitWidth>12</bitWidth> 242 </field> 243 <field> 244 <name>HIRC96MACTMROUT</name> 245 <description>HIRC96M Trim Value.</description> 246 <bitOffset>23</bitOffset> 247 <bitWidth>9</bitWidth> 248 </field> 249 </fields> 250 </register> 251 <register> 252 <name>AUTOCAL1</name> 253 <description>Automatic Calibration 1.</description> 254 <addressOffset>0x08</addressOffset> 255 <access>read-write</access> 256 <fields> 257 <field> 258 <name>INITTRM</name> 259 <description>Initial Trim Setting.</description> 260 <bitOffset>0</bitOffset> 261 <bitWidth>9</bitWidth> 262 </field> 263 </fields> 264 </register> 265 <register> 266 <name>AUTOCAL2</name> 267 <description>Automatic Calibration 2</description> 268 <addressOffset>0x0C</addressOffset> 269 <access>read-write</access> 270 <fields> 271 <field> 272 <name>DONECNT</name> 273 <description>Auto-callibration Done Counter Setting.</description> 274 <bitOffset>0</bitOffset> 275 <bitWidth>8</bitWidth> 276 </field> 277 <field> 278 <name>ACDIV</name> 279 <description>Auto-callibration Div Setting.</description> 280 <bitOffset>8</bitOffset> 281 <bitWidth>13</bitWidth> 282 </field> 283 </fields> 284 </register> 285 <register> 286 <name>URVBOOTADDR</name> 287 <description>RISC-V Boot Address.</description> 288 <addressOffset>0x10</addressOffset> 289 <access>read-write</access> 290 </register> 291 <register> 292 <name>URVCTRL</name> 293 <description>RISC-V Control Register.</description> 294 <addressOffset>0x14</addressOffset> 295 <access>read-write</access> 296 <fields> 297 <field> 298 <name>MEMSEL</name> 299 <description>RAM2, RAM3 exclusive ownership.</description> 300 <bitOffset>0</bitOffset> 301 <bitWidth>1</bitWidth> 302 </field> 303 <field> 304 <name>IFLUSHEN</name> 305 <description>URV instruction flush enable.</description> 306 <bitOffset>1</bitOffset> 307 <bitWidth>1</bitWidth> 308 </field> 309 </fields> 310 </register> 311 <register> 312 <name>XO32MKS</name> 313 <description>RISC-V Control Register.</description> 314 <addressOffset>0x18</addressOffset> 315 <access>read-write</access> 316 <fields> 317 <field> 318 <name>CLK</name> 319 <description>Kick Start XO Counter Setting</description> 320 <bitOffset>0</bitOffset> 321 <bitWidth>7</bitWidth> 322 </field> 323 <field> 324 <name>EN</name> 325 <description>Kick Start XO Enable</description> 326 <bitOffset>7</bitOffset> 327 <bitWidth>1</bitWidth> 328 </field> 329 <field> 330 <name>DRIVER</name> 331 <description>Kick Start XO Driver</description> 332 <bitOffset>8</bitOffset> 333 <bitWidth>3</bitWidth> 334 </field> 335 <field> 336 <name>PULSE</name> 337 <description>Kick Start XO 2X Pulse</description> 338 <bitOffset>11</bitOffset> 339 <bitWidth>1</bitWidth> 340 </field> 341 <field> 342 <name>CLKSEL</name> 343 <description>Kick Start XO Clock Select</description> 344 <bitOffset>12</bitOffset> 345 <bitWidth>2</bitWidth> 346 <enumeratedValues> 347 <enumeratedValue> 348 <name>none</name> 349 <description>No kick start clock.</description> 350 <value>0</value> 351 </enumeratedValue> 352 <enumeratedValue> 353 <name>test</name> 354 <description>Test Clock in P1.2 (TMR3[22]=1).</description> 355 <value>1</value> 356 </enumeratedValue> 357 <enumeratedValue> 358 <name>ISO</name> 359 <description>Internal secondary oscilator</description> 360 <value>2</value> 361 </enumeratedValue> 362 <enumeratedValue> 363 <name>IPO</name> 364 <description>Internal Primary Oscilator</description> 365 <value>3</value> 366 </enumeratedValue> 367 </enumeratedValues> 368 </field> 369 </fields> 370 </register> 371 <register> 372 <name>SARBUFCN</name> 373 <description>TBD</description> 374 <addressOffset>0x1C</addressOffset> 375 <access>read-write</access> 376 <fields> 377 <field> 378 <name>THRU_PAD_SW_EN</name> 379 <description>TBD</description> 380 <bitOffset>0</bitOffset> 381 <bitWidth>8</bitWidth> 382 </field> 383 <field> 384 <name>THRU_EN</name> 385 <description>TBD</description> 386 <bitOffset>8</bitOffset> 387 <bitWidth>1</bitWidth> 388 </field> 389 <field> 390 <name>RAMP_EN</name> 391 <description>TBD</description> 392 <bitOffset>9</bitOffset> 393 <bitWidth>1</bitWidth> 394 </field> 395 <field> 396 <name>THRU_RRI_EN</name> 397 <description>TBD</description> 398 <bitOffset>10</bitOffset> 399 <bitWidth>1</bitWidth> 400 </field> 401 <field> 402 <name>DIVSEL</name> 403 <description>TBD</description> 404 <bitOffset>11</bitOffset> 405 <bitWidth>1</bitWidth> 406 </field> 407 </fields> 408 </register> 409 <register> 410 <name>TS0</name> 411 <description>Temp Sensor trim0</description> 412 <addressOffset>0x20</addressOffset> 413 <access>read-write</access> 414 <fields> 415 <field> 416 <name>GAIN</name> 417 <description>Unsigned gain for temp sensor normalization Temp degrees C = (ADC result * TS_GAIN) + TS_OFFSET.</description> 418 <bitOffset>0</bitOffset> 419 <bitWidth>12</bitWidth> 420 </field> 421 </fields> 422 </register> 423 <register> 424 <name>TS1</name> 425 <description>Temp Sensor trim1</description> 426 <addressOffset>0x24</addressOffset> 427 <access>read-write</access> 428 <fields> 429 <field> 430 <name>OFFSET</name> 431 <description>Signed gain for temp sensor normalization Temp degrees C = (ADC result * TS_GAIN) + TS_OFFSET.</description> 432 <bitOffset>0</bitOffset> 433 <bitWidth>14</bitWidth> 434 </field> 435 <field> 436 <name>TS_OFFSET_SIGN</name> 437 <description>Sign extension of TS_OFFSET[13:0]</description> 438 <bitOffset>14</bitOffset> 439 <bitWidth>18</bitWidth> 440 </field> 441 </fields> 442 </register> 443 <register> 444 <name>ADCREFTRIM0</name> 445 <description>Temp Sensor trim1</description> 446 <addressOffset>0x28</addressOffset> 447 <access>read-write</access> 448 <fields> 449 <field> 450 <name>VREFP</name> 451 <description>Trimming code for VREFP output of reference buffer</description> 452 <bitOffset>0</bitOffset> 453 <bitWidth>7</bitWidth> 454 </field> 455 <field> 456 <name>VREFM</name> 457 <description>Trimming code for VREFM output of reference buffer</description> 458 <bitOffset>8</bitOffset> 459 <bitWidth>7</bitWidth> 460 </field> 461 <field> 462 <name>VCM</name> 463 <description>Trimming code for VCM output of reference buffer</description> 464 <bitOffset>16</bitOffset> 465 <bitWidth>2</bitWidth> 466 </field> 467 <field> 468 <name>VX2_TUNE</name> 469 <description>Controls tuning capacitor in fine DAC (offset binary)</description> 470 <bitOffset>24</bitOffset> 471 <bitWidth>6</bitWidth> 472 </field> 473 </fields> 474 </register> 475 <register> 476 <name>ADCREFTRIM1</name> 477 <description>Temp Sensor trim1</description> 478 <addressOffset>0x2C</addressOffset> 479 <access>read-write</access> 480 <fields> 481 <field> 482 <name>VREFP</name> 483 <description>Trimming code for VREFP output of reference buffer</description> 484 <bitOffset>0</bitOffset> 485 <bitWidth>7</bitWidth> 486 </field> 487 <field> 488 <name>VREFM</name> 489 <description>Trimming code for VREFM output of reference buffer</description> 490 <bitOffset>8</bitOffset> 491 <bitWidth>7</bitWidth> 492 </field> 493 <field> 494 <name>VCM</name> 495 <description>Trimming code for VCM output of reference buffer</description> 496 <bitOffset>16</bitOffset> 497 <bitWidth>2</bitWidth> 498 </field> 499 <field> 500 <name>VX2_TUNE</name> 501 <description>Controls tuning capacitor in fine DAC (offset binary)</description> 502 <bitOffset>24</bitOffset> 503 <bitWidth>6</bitWidth> 504 </field> 505 </fields> 506 </register> 507 <register> 508 <name>ADCREFTRIM2</name> 509 <description>Temp Sensor trim1</description> 510 <addressOffset>0x30</addressOffset> 511 <access>read-write</access> 512 <fields> 513 <field> 514 <name>IDRV_1P25</name> 515 <description>Trimming code for reference buffer drive strength. 1.25V</description> 516 <bitOffset>0</bitOffset> 517 <bitWidth>4</bitWidth> 518 </field> 519 <field> 520 <name>IBOOST_1P25</name> 521 <description>Trimming value for extra drive current in reference buffer outputs. 2.048V</description> 522 <bitOffset>4</bitOffset> 523 <bitWidth>1</bitWidth> 524 </field> 525 <field> 526 <name>IDRV_2P048</name> 527 <description>Trimming code for reference buffer drive strength. 2.048V</description> 528 <bitOffset>8</bitOffset> 529 <bitWidth>4</bitWidth> 530 </field> 531 <field> 532 <name>IBOOST_2P048</name> 533 <description>Trimming value for extra drive current in reference buffer outputs. 2.048V</description> 534 <bitOffset>12</bitOffset> 535 <bitWidth>1</bitWidth> 536 </field> 537 <field> 538 <name>VCM</name> 539 <description>Trimming code for VCM output of reference buffer</description> 540 <bitOffset>16</bitOffset> 541 <bitWidth>2</bitWidth> 542 </field> 543 <field> 544 <name>VX2_TUNE</name> 545 <description>Controls tuning capacitor in fine DAC (offset binary)</description> 546 <bitOffset>24</bitOffset> 547 <bitWidth>6</bitWidth> 548 </field> 549 </fields> 550 </register> 551 </registers> 552 </peripheral> 553</device>
