1<?xml version="1.0" encoding="utf-8" standalone="no"?> 2<device xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" schemaVersion="1.1" xs:noNamespaceSchemaLocation="svd_schema.xsd"> 3 <peripheral> 4 <name>FCR</name> 5 <description>Function Control Register.</description> 6 <baseAddress>0x40000800</baseAddress> 7 <addressBlock> 8 <offset>0x00</offset> 9 <size>0x400</size> 10 <usage>registers</usage> 11 </addressBlock> 12 <registers> 13 <register> 14 <name>FCTRL0</name> 15 <description>Function Control 0.</description> 16 <addressOffset>0x00</addressOffset> 17 <access>read-write</access> 18 <fields> 19 <field> 20 <name>I2C0DGEN0</name> 21 <description>I2C0 SDA Pad Deglitcher enable.</description> 22 <bitOffset>20</bitOffset> 23 <bitWidth>1</bitWidth> 24 <enumeratedValues> 25 <enumeratedValue> 26 <name>dis</name> 27 <description>Deglitcher disabled.</description> 28 <value>0</value> 29 </enumeratedValue> 30 <enumeratedValue> 31 <name>en</name> 32 <description>Deglitcher enabled.</description> 33 <value>1</value> 34 </enumeratedValue> 35 </enumeratedValues> 36 </field> 37 <field> 38 <name>I2C0DGEN1</name> 39 <description>I2C0 SCL Pad Deglitcher enable.</description> 40 <bitOffset>21</bitOffset> 41 <bitWidth>1</bitWidth> 42 <enumeratedValues> 43 <enumeratedValue> 44 <name>dis</name> 45 <description>Deglitcher disabled.</description> 46 <value>0</value> 47 </enumeratedValue> 48 <enumeratedValue> 49 <name>en</name> 50 <description>Deglitcher enabled.</description> 51 <value>1</value> 52 </enumeratedValue> 53 </enumeratedValues> 54 </field> 55 <field> 56 <name>I2C1DGEN0</name> 57 <description>I2C1 SDA Pad Deglitcher enable.</description> 58 <bitOffset>22</bitOffset> 59 <bitWidth>1</bitWidth> 60 <enumeratedValues> 61 <enumeratedValue> 62 <name>dis</name> 63 <description>Deglitcher disabled.</description> 64 <value>0</value> 65 </enumeratedValue> 66 <enumeratedValue> 67 <name>en</name> 68 <description>Deglitcher enabled.</description> 69 <value>1</value> 70 </enumeratedValue> 71 </enumeratedValues> 72 </field> 73 <field> 74 <name>I2C1DGEN1</name> 75 <description>I2C1 SCL Pad Deglitcher enable.</description> 76 <bitOffset>23</bitOffset> 77 <bitWidth>1</bitWidth> 78 <enumeratedValues> 79 <enumeratedValue> 80 <name>dis</name> 81 <description>Deglitcher disabled.</description> 82 <value>0</value> 83 </enumeratedValue> 84 <enumeratedValue> 85 <name>en</name> 86 <description>Deglitcher enabled.</description> 87 <value>1</value> 88 </enumeratedValue> 89 </enumeratedValues> 90 </field> 91 <field> 92 <name>I2C2DGEN0</name> 93 <description>I2C2 SDA Pad Deglitcher enable.</description> 94 <bitOffset>24</bitOffset> 95 <bitWidth>1</bitWidth> 96 <enumeratedValues> 97 <enumeratedValue> 98 <name>dis</name> 99 <description>Deglitcher disabled.</description> 100 <value>0</value> 101 </enumeratedValue> 102 <enumeratedValue> 103 <name>en</name> 104 <description>Deglitcher enabled.</description> 105 <value>1</value> 106 </enumeratedValue> 107 </enumeratedValues> 108 </field> 109 <field> 110 <name>I2C2DGEN1</name> 111 <description>I2C2 SCL Pad Deglitcher enable.</description> 112 <bitOffset>25</bitOffset> 113 <bitWidth>1</bitWidth> 114 <enumeratedValues> 115 <enumeratedValue> 116 <name>dis</name> 117 <description>Deglitcher disabled.</description> 118 <value>0</value> 119 </enumeratedValue> 120 <enumeratedValue> 121 <name>en</name> 122 <description>Deglitcher enabled.</description> 123 <value>1</value> 124 </enumeratedValue> 125 </enumeratedValues> 126 </field> 127 </fields> 128 </register> 129 <register> 130 <name>AUTOCAL0</name> 131 <description>Automatic Calibration 0.</description> 132 <addressOffset>0x04</addressOffset> 133 <access>read-write</access> 134 <fields> 135 <field> 136 <name>ACEN</name> 137 <description>Auto-calibration Enable.</description> 138 <bitOffset>0</bitOffset> 139 <bitWidth>1</bitWidth> 140 <enumeratedValues> 141 <enumeratedValue> 142 <name>dis</name> 143 <description>Disabled.</description> 144 <value>0</value> 145 </enumeratedValue> 146 <enumeratedValue> 147 <name>en</name> 148 <description>Enabled.</description> 149 <value>1</value> 150 </enumeratedValue> 151 </enumeratedValues> 152 </field> 153 <field> 154 <name>ACRUN</name> 155 <description>Autocalibration Run.</description> 156 <bitOffset>1</bitOffset> 157 <bitWidth>1</bitWidth> 158 <enumeratedValues> 159 <enumeratedValue> 160 <name>not</name> 161 <description>Not Running.</description> 162 <value>0</value> 163 </enumeratedValue> 164 <enumeratedValue> 165 <name>run</name> 166 <description>Running.</description> 167 <value>1</value> 168 </enumeratedValue> 169 </enumeratedValues> 170 </field> 171 <field> 172 <name>LDTRM</name> 173 <description>Load Trim.</description> 174 <bitOffset>2</bitOffset> 175 <bitWidth>1</bitWidth> 176 </field> 177 <field> 178 <name>GAININV</name> 179 <description>Invert Gain.</description> 180 <bitOffset>3</bitOffset> 181 <bitWidth>1</bitWidth> 182 <enumeratedValues> 183 <enumeratedValue> 184 <name>not</name> 185 <description>Not Running.</description> 186 <value>0</value> 187 </enumeratedValue> 188 <enumeratedValue> 189 <name>run</name> 190 <description>Running.</description> 191 <value>1</value> 192 </enumeratedValue> 193 </enumeratedValues> 194 </field> 195 <field> 196 <name>ATOMIC</name> 197 <description>Atomic mode.</description> 198 <bitOffset>4</bitOffset> 199 <bitWidth>1</bitWidth> 200 <enumeratedValues> 201 <enumeratedValue> 202 <name>not</name> 203 <description>Not Running.</description> 204 <value>0</value> 205 </enumeratedValue> 206 <enumeratedValue> 207 <name>run</name> 208 <description>Running.</description> 209 <value>1</value> 210 </enumeratedValue> 211 </enumeratedValues> 212 </field> 213 <field> 214 <name>MU</name> 215 <description>MU value.</description> 216 <bitOffset>8</bitOffset> 217 <bitWidth>12</bitWidth> 218 </field> 219 <field> 220 <name>HIRC96MACTMROUT</name> 221 <description>HIRC96M Trim Value.</description> 222 <bitOffset>23</bitOffset> 223 <bitWidth>9</bitWidth> 224 </field> 225 </fields> 226 </register> 227 <register> 228 <name>AUTOCAL1</name> 229 <description>Automatic Calibration 1.</description> 230 <addressOffset>0x08</addressOffset> 231 <access>read-write</access> 232 <fields> 233 <field> 234 <name>INITTRM</name> 235 <description>Initial Trim Setting.</description> 236 <bitOffset>0</bitOffset> 237 <bitWidth>9</bitWidth> 238 </field> 239 </fields> 240 </register> 241 <register> 242 <name>AUTOCAL2</name> 243 <description>Automatic Calibration 2</description> 244 <addressOffset>0x0C</addressOffset> 245 <access>read-write</access> 246 <fields> 247 <field> 248 <name>DONECNT</name> 249 <description>Auto-callibration Done Counter Setting.</description> 250 <bitOffset>0</bitOffset> 251 <bitWidth>8</bitWidth> 252 </field> 253 <field> 254 <name>ACDIV</name> 255 <description>Auto-callibration Div Setting.</description> 256 <bitOffset>8</bitOffset> 257 <bitWidth>13</bitWidth> 258 </field> 259 </fields> 260 </register> 261 <register> 262 <name>URVBOOTADDR</name> 263 <description>RISC-V Boot Address.</description> 264 <addressOffset>0x10</addressOffset> 265 <access>read-write</access> 266 </register> 267 <register> 268 <name>URVCTRL</name> 269 <description>RISC-V Control Register.</description> 270 <addressOffset>0x14</addressOffset> 271 <access>read-write</access> 272 <fields> 273 <field> 274 <name>MEMSEL</name> 275 <description>RAM2, RAM3 exclusive ownership.</description> 276 <bitOffset>0</bitOffset> 277 <bitWidth>1</bitWidth> 278 </field> 279 <field> 280 <name>IFLUSHEN</name> 281 <description>URV instruction flush enable.</description> 282 <bitOffset>1</bitOffset> 283 <bitWidth>1</bitWidth> 284 </field> 285 </fields> 286 </register> 287 <register> 288 <name>ERFOKS</name> 289 <description>ERFO Kick Start Register.</description> 290 <addressOffset>0x18</addressOffset> 291 <access>read-write</access> 292 <fields> 293 <field> 294 <name>KSERFO_CNT</name> 295 <description>Kick Start ERFO Counter.</description> 296 <bitOffset>0</bitOffset> 297 <bitWidth>7</bitWidth> 298 </field> 299 <field> 300 <name>KSERFO_EN</name> 301 <description>Kick Start ERFO Enable.</description> 302 <bitOffset>7</bitOffset> 303 <bitWidth>1</bitWidth> 304 </field> 305 <field> 306 <name>KSERFODRIVER</name> 307 <description>Kick Start ERFO Driver.</description> 308 <bitOffset>8</bitOffset> 309 <bitWidth>3</bitWidth> 310 </field> 311 <field> 312 <name>KSERFO2X</name> 313 <description>Kick Start ERFO 2X Pulse.</description> 314 <bitOffset>11</bitOffset> 315 <bitWidth>1</bitWidth> 316 </field> 317 <field> 318 <name>KSCLKSEL</name> 319 <description>Kick Start Clock Select for ERFO.</description> 320 <bitOffset>12</bitOffset> 321 <bitWidth>2</bitWidth> 322 <enumeratedValues> 323 <enumeratedValue> 324 <name>ISO</name> 325 <description>ISO.</description> 326 <value>2</value> 327 </enumeratedValue> 328 <enumeratedValue> 329 <name>IPO</name> 330 <description>IPO.</description> 331 <value>3</value> 332 </enumeratedValue> 333 </enumeratedValues> 334 </field> 335 </fields> 336 </register> 337 <register> 338 <name>ERFO_INTFL</name> 339 <description>ERFO Ready Interrupt Flag register.</description> 340 <addressOffset>0x1C</addressOffset> 341 <access>read-write</access> 342 <fields> 343 <field> 344 <name>rdy</name> 345 <description>Ready interrupt flag.</description> 346 <bitOffset>0</bitOffset> 347 <bitWidth>1</bitWidth> 348 </field> 349 </fields> 350 </register> 351 <register> 352 <name>ERFO_INTEN</name> 353 <description>ERFO Ready Interrupt Enable register.</description> 354 <addressOffset>0x20</addressOffset> 355 <access>read-write</access> 356 <fields> 357 <field> 358 <name>rdy</name> 359 <description>Ready interrupt enable.</description> 360 <bitOffset>0</bitOffset> 361 <bitWidth>1</bitWidth> 362 </field> 363 </fields> 364 </register> 365 </registers> 366 </peripheral> 367</device> 368
