1<?xml version="1.0" encoding="utf-8" standalone="no"?> 2<device xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" schemaVersion="1.1" xs:noNamespaceSchemaLocation="svd_schema.xsd"> 3 <peripheral> 4 <name>FCR</name> 5 <description>Function Control Register.</description> 6 <baseAddress>0x40000800</baseAddress> 7 <addressBlock> 8 <offset>0x00</offset> 9 <size>0x400</size> 10 <usage>registers</usage> 11 </addressBlock> 12 <registers> 13 <register> 14 <name>FCTRL0</name> 15 <description>Function Control 0.</description> 16 <addressOffset>0x00</addressOffset> 17 <access>read-write</access> 18 <fields> 19 <field> 20 <name>USBCLKSEL</name> 21 <description>USB Core Clock Select.</description> 22 <bitOffset>16</bitOffset> 23 <bitWidth>2</bitWidth> 24 </field> 25 <field> 26 <name>I2C0DGEN0</name> 27 <description>I2C0 SDA Pad Deglitcher enable.</description> 28 <bitOffset>20</bitOffset> 29 <bitWidth>1</bitWidth> 30 <enumeratedValues> 31 <enumeratedValue> 32 <name>dis</name> 33 <description>Deglitcher disabled.</description> 34 <value>0</value> 35 </enumeratedValue> 36 <enumeratedValue> 37 <name>en</name> 38 <description>Deglitcher enabled.</description> 39 <value>1</value> 40 </enumeratedValue> 41 </enumeratedValues> 42 </field> 43 <field> 44 <name>I2C0DGEN1</name> 45 <description>I2C0 SCL Pad Deglitcher enable.</description> 46 <bitOffset>21</bitOffset> 47 <bitWidth>1</bitWidth> 48 <enumeratedValues> 49 <enumeratedValue> 50 <name>dis</name> 51 <description>Deglitcher disabled.</description> 52 <value>0</value> 53 </enumeratedValue> 54 <enumeratedValue> 55 <name>en</name> 56 <description>Deglitcher enabled.</description> 57 <value>1</value> 58 </enumeratedValue> 59 </enumeratedValues> 60 </field> 61 <field> 62 <name>I2C1DGEN0</name> 63 <description>I2C1 SDA Pad Deglitcher enable.</description> 64 <bitOffset>22</bitOffset> 65 <bitWidth>1</bitWidth> 66 <enumeratedValues> 67 <enumeratedValue> 68 <name>dis</name> 69 <description>Deglitcher disabled.</description> 70 <value>0</value> 71 </enumeratedValue> 72 <enumeratedValue> 73 <name>en</name> 74 <description>Deglitcher enabled.</description> 75 <value>1</value> 76 </enumeratedValue> 77 </enumeratedValues> 78 </field> 79 <field> 80 <name>I2C1DGEN1</name> 81 <description>I2C1 SCL Pad Deglitcher enable.</description> 82 <bitOffset>23</bitOffset> 83 <bitWidth>1</bitWidth> 84 <enumeratedValues> 85 <enumeratedValue> 86 <name>dis</name> 87 <description>Deglitcher disabled.</description> 88 <value>0</value> 89 </enumeratedValue> 90 <enumeratedValue> 91 <name>en</name> 92 <description>Deglitcher enabled.</description> 93 <value>1</value> 94 </enumeratedValue> 95 </enumeratedValues> 96 </field> 97 <field> 98 <name>I2C2DGEN0</name> 99 <description>I2C2 SDA Pad Deglitcher enable.</description> 100 <bitOffset>24</bitOffset> 101 <bitWidth>1</bitWidth> 102 <enumeratedValues> 103 <enumeratedValue> 104 <name>dis</name> 105 <description>Deglitcher disabled.</description> 106 <value>0</value> 107 </enumeratedValue> 108 <enumeratedValue> 109 <name>en</name> 110 <description>Deglitcher enabled.</description> 111 <value>1</value> 112 </enumeratedValue> 113 </enumeratedValues> 114 </field> 115 <field> 116 <name>I2C2DGEN1</name> 117 <description>I2C2 SCL Pad Deglitcher enable.</description> 118 <bitOffset>25</bitOffset> 119 <bitWidth>1</bitWidth> 120 <enumeratedValues> 121 <enumeratedValue> 122 <name>dis</name> 123 <description>Deglitcher disabled.</description> 124 <value>0</value> 125 </enumeratedValue> 126 <enumeratedValue> 127 <name>en</name> 128 <description>Deglitcher enabled.</description> 129 <value>1</value> 130 </enumeratedValue> 131 </enumeratedValues> 132 </field> 133 </fields> 134 </register> 135 <register> 136 <name>AUTOCAL0</name> 137 <description>Automatic Calibration 0.</description> 138 <addressOffset>0x04</addressOffset> 139 <access>read-write</access> 140 <fields> 141 <field> 142 <name>ACEN</name> 143 <description>Auto-calibration Enable.</description> 144 <bitOffset>0</bitOffset> 145 <bitWidth>1</bitWidth> 146 <enumeratedValues> 147 <enumeratedValue> 148 <name>dis</name> 149 <description>Disabled.</description> 150 <value>0</value> 151 </enumeratedValue> 152 <enumeratedValue> 153 <name>en</name> 154 <description>Enabled.</description> 155 <value>1</value> 156 </enumeratedValue> 157 </enumeratedValues> 158 </field> 159 <field> 160 <name>ACRUN</name> 161 <description>Autocalibration Run.</description> 162 <bitOffset>1</bitOffset> 163 <bitWidth>1</bitWidth> 164 <enumeratedValues> 165 <enumeratedValue> 166 <name>not</name> 167 <description>Not Running.</description> 168 <value>0</value> 169 </enumeratedValue> 170 <enumeratedValue> 171 <name>run</name> 172 <description>Running.</description> 173 <value>1</value> 174 </enumeratedValue> 175 </enumeratedValues> 176 </field> 177 <field> 178 <name>LDTRM</name> 179 <description>Load Trim.</description> 180 <bitOffset>2</bitOffset> 181 <bitWidth>1</bitWidth> 182 </field> 183 <field> 184 <name>GAININV</name> 185 <description>Invert Gain.</description> 186 <bitOffset>3</bitOffset> 187 <bitWidth>1</bitWidth> 188 <enumeratedValues> 189 <enumeratedValue> 190 <name>not</name> 191 <description>Not Running.</description> 192 <value>0</value> 193 </enumeratedValue> 194 <enumeratedValue> 195 <name>run</name> 196 <description>Running.</description> 197 <value>1</value> 198 </enumeratedValue> 199 </enumeratedValues> 200 </field> 201 <field> 202 <name>ATOMIC</name> 203 <description>Atomic mode.</description> 204 <bitOffset>4</bitOffset> 205 <bitWidth>1</bitWidth> 206 <enumeratedValues> 207 <enumeratedValue> 208 <name>not</name> 209 <description>Not Running.</description> 210 <value>0</value> 211 </enumeratedValue> 212 <enumeratedValue> 213 <name>run</name> 214 <description>Running.</description> 215 <value>1</value> 216 </enumeratedValue> 217 </enumeratedValues> 218 </field> 219 <field> 220 <name>MU</name> 221 <description>MU value.</description> 222 <bitOffset>8</bitOffset> 223 <bitWidth>12</bitWidth> 224 </field> 225 <field> 226 <name>HIRC96MACTMROUT</name> 227 <description>HIRC96M Trim Value.</description> 228 <bitOffset>23</bitOffset> 229 <bitWidth>9</bitWidth> 230 </field> 231 </fields> 232 </register> 233 <register> 234 <name>AUTOCAL1</name> 235 <description>Automatic Calibration 1.</description> 236 <addressOffset>0x08</addressOffset> 237 <access>read-write</access> 238 <fields> 239 <field> 240 <name>INITTRM</name> 241 <description>Initial Trim Setting.</description> 242 <bitOffset>0</bitOffset> 243 <bitWidth>9</bitWidth> 244 </field> 245 </fields> 246 </register> 247 <register> 248 <name>AUTOCAL2</name> 249 <description>Automatic Calibration 2</description> 250 <addressOffset>0x0C</addressOffset> 251 <access>read-write</access> 252 <fields> 253 <field> 254 <name>DONECNT</name> 255 <description>Auto-callibration Done Counter Setting.</description> 256 <bitOffset>0</bitOffset> 257 <bitWidth>8</bitWidth> 258 </field> 259 <field> 260 <name>ACDIV</name> 261 <description>Auto-callibration Div Setting.</description> 262 <bitOffset>8</bitOffset> 263 <bitWidth>13</bitWidth> 264 </field> 265 </fields> 266 </register> 267 <register> 268 <name>URVBOOTADDR</name> 269 <description>RISC-V Boot Address.</description> 270 <addressOffset>0x10</addressOffset> 271 <access>read-write</access> 272 </register> 273 <register> 274 <name>URVCTRL</name> 275 <description>RISC-V Control Register.</description> 276 <addressOffset>0x14</addressOffset> 277 <access>read-write</access> 278 <fields> 279 <field> 280 <name>MEMSEL</name> 281 <description>RAM2, RAM3 exclusive ownership.</description> 282 <bitOffset>0</bitOffset> 283 <bitWidth>1</bitWidth> 284 </field> 285 <field> 286 <name>IFLUSHEN</name> 287 <description>URV instruction flush enable.</description> 288 <bitOffset>1</bitOffset> 289 <bitWidth>1</bitWidth> 290 </field> 291 </fields> 292 </register> 293 <register> 294 <name>XO32MKS</name> 295 <description>RISC-V Control Register.</description> 296 <addressOffset>0x18</addressOffset> 297 <access>read-write</access> 298 <fields> 299 <field> 300 <name>CLK</name> 301 <description>Kick Start XO Counter Setting</description> 302 <bitOffset>0</bitOffset> 303 <bitWidth>7</bitWidth> 304 </field> 305 <field> 306 <name>EN</name> 307 <description>Kick Start XO Enable</description> 308 <bitOffset>7</bitOffset> 309 <bitWidth>1</bitWidth> 310 </field> 311 <field> 312 <name>DRIVER</name> 313 <description>Kick Start XO Driver</description> 314 <bitOffset>8</bitOffset> 315 <bitWidth>3</bitWidth> 316 </field> 317 <field> 318 <name>PULSE</name> 319 <description>Kick Start XO 2X Pulse</description> 320 <bitOffset>11</bitOffset> 321 <bitWidth>1</bitWidth> 322 </field> 323 <field> 324 <name>CLKSEL</name> 325 <description>Kick Start XO Clock Select</description> 326 <bitOffset>12</bitOffset> 327 <bitWidth>2</bitWidth> 328 <enumeratedValues> 329 <enumeratedValue> 330 <name>none</name> 331 <description>No kick start clock.</description> 332 <value>0</value> 333 </enumeratedValue> 334 <enumeratedValue> 335 <name>test</name> 336 <description>Test Clock in P1.2 (TMR3[22]=1).</description> 337 <value>1</value> 338 </enumeratedValue> 339 <enumeratedValue> 340 <name>ISO</name> 341 <description>Internal secondary oscilator</description> 342 <value>2</value> 343 </enumeratedValue> 344 <enumeratedValue> 345 <name>IPO</name> 346 <description>Internal Primary Oscilator</description> 347 <value>3</value> 348 </enumeratedValue> 349 </enumeratedValues> 350 </field> 351 </fields> 352 </register> 353 <register> 354 <name>TS0</name> 355 <description>Temp Sensor trim0</description> 356 <addressOffset>0x20</addressOffset> 357 <access>read-write</access> 358 <fields> 359 <field> 360 <name>GAIN</name> 361 <description>Unsigned gain for temp sensor normalization Temp degrees C = (ADC result * TS_GAIN) + TS_OFFSET.</description> 362 <bitOffset>0</bitOffset> 363 <bitWidth>12</bitWidth> 364 </field> 365 </fields> 366 </register> 367 <register> 368 <name>TS1</name> 369 <description>Temp Sensor trim1</description> 370 <addressOffset>0x24</addressOffset> 371 <access>read-write</access> 372 <fields> 373 <field> 374 <name>OFFSET</name> 375 <description>Signed gain for temp sensor normalization Temp degrees C = (ADC result * TS_GAIN) + TS_OFFSET.</description> 376 <bitOffset>0</bitOffset> 377 <bitWidth>14</bitWidth> 378 </field> 379 <field> 380 <name>TS_OFFSET_SIGN</name> 381 <description>Sign extension of TS_OFFSET[13:0]</description> 382 <bitOffset>14</bitOffset> 383 <bitWidth>18</bitWidth> 384 </field> 385 </fields> 386 </register> 387 <register> 388 <name>ADCREFTRIM0</name> 389 <description>Temp Sensor trim1</description> 390 <addressOffset>0x28</addressOffset> 391 <access>read-write</access> 392 <fields> 393 <field> 394 <name>VREFP</name> 395 <description>Trimming code for VREFP output of reference buffer</description> 396 <bitOffset>0</bitOffset> 397 <bitWidth>7</bitWidth> 398 </field> 399 <field> 400 <name>VREFM</name> 401 <description>Trimming code for VREFM output of reference buffer</description> 402 <bitOffset>8</bitOffset> 403 <bitWidth>7</bitWidth> 404 </field> 405 <field> 406 <name>VCM</name> 407 <description>Trimming code for VCM output of reference buffer</description> 408 <bitOffset>16</bitOffset> 409 <bitWidth>2</bitWidth> 410 </field> 411 <field> 412 <name>VX2_TUNE</name> 413 <description>Controls tuning capacitor in fine DAC (offset binary)</description> 414 <bitOffset>24</bitOffset> 415 <bitWidth>6</bitWidth> 416 </field> 417 </fields> 418 </register> 419 <register> 420 <name>ADCREFTRIM1</name> 421 <description>Temp Sensor trim1</description> 422 <addressOffset>0x2C</addressOffset> 423 <access>read-write</access> 424 <fields> 425 <field> 426 <name>VREFP</name> 427 <description>Trimming code for VREFP output of reference buffer</description> 428 <bitOffset>0</bitOffset> 429 <bitWidth>7</bitWidth> 430 </field> 431 <field> 432 <name>VREFM</name> 433 <description>Trimming code for VREFM output of reference buffer</description> 434 <bitOffset>8</bitOffset> 435 <bitWidth>7</bitWidth> 436 </field> 437 <field> 438 <name>VCM</name> 439 <description>Trimming code for VCM output of reference buffer</description> 440 <bitOffset>16</bitOffset> 441 <bitWidth>2</bitWidth> 442 </field> 443 <field> 444 <name>VX2_TUNE</name> 445 <description>Controls tuning capacitor in fine DAC (offset binary)</description> 446 <bitOffset>24</bitOffset> 447 <bitWidth>6</bitWidth> 448 </field> 449 </fields> 450 </register> 451 <register> 452 <name>ADCREFTRIM2</name> 453 <description>Temp Sensor trim1</description> 454 <addressOffset>0x30</addressOffset> 455 <access>read-write</access> 456 <fields> 457 <field> 458 <name>VREFP</name> 459 <description>Trimming code for VREFP output of reference buffer</description> 460 <bitOffset>0</bitOffset> 461 <bitWidth>7</bitWidth> 462 </field> 463 <field> 464 <name>VREFM</name> 465 <description>Trimming code for VREFM output of reference buffer</description> 466 <bitOffset>8</bitOffset> 467 <bitWidth>7</bitWidth> 468 </field> 469 <field> 470 <name>VCM</name> 471 <description>Trimming code for VCM output of reference buffer</description> 472 <bitOffset>16</bitOffset> 473 <bitWidth>2</bitWidth> 474 </field> 475 <field> 476 <name>VX2_TUNE</name> 477 <description>Controls tuning capacitor in fine DAC (offset binary)</description> 478 <bitOffset>24</bitOffset> 479 <bitWidth>6</bitWidth> 480 </field> 481 </fields> 482 </register> 483 </registers> 484 </peripheral> 485</device>
