1        /*
2         * Some or all of this work - Copyright (c) 2006 - 2021, Intel Corp.
3         * All rights reserved.
4         *
5         * Redistribution and use in source and binary forms, with or without modification,
6         * are permitted provided that the following conditions are met:
7         *
8         * Redistributions of source code must retain the above copyright notice,
9         * this list of conditions and the following disclaimer.
10         * Redistributions in binary form must reproduce the above copyright notice,
11         * this list of conditions and the following disclaimer in the documentation
12         * and/or other materials provided with the distribution.
13         * Neither the name of Intel Corporation nor the names of its contributors
14         * may be used to endorse or promote products derived from this software
15         * without specific prior written permission.
16         *
17         * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18         * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19         * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20         * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
21         * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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26         * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27         */
28        If (STTT ("Demo of bug 118", TCLD, 0x76, W017))
29        {
30            /* ????????????????????????????? */
31            /* 1. set y118 to 1 */
32            /* 2. see the test: decl.asl */
33            /* ?????????????????????????????? */
34            /* ???? */
35            SRMT ("md7c")
36            If (Y118)
37            {
38                MD7C ()
39            }
40            Else
41            {
42                BLCK ()
43            }
44        }
45
46        FTTT ()
47