1/*
2 * Copyright (c) 2023-2024 Analog Devices, Inc.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8
9#include <adi/max32/max32690.dtsi>
10#include <adi/max32/max32690-pinctrl.dtsi>
11#include <zephyr/dt-bindings/gpio/adi-max32-gpio.h>
12#include <zephyr/dt-bindings/input/input-event-codes.h>
13#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>
14
15/ {
16	model = "Analog Devices MAX32690EVKIT";
17	compatible = "adi,max32690evkit";
18
19	chosen {
20		zephyr,console = &uart2;
21		zephyr,shell-uart = &uart2;
22		zephyr,sram = &sram0;
23		zephyr,flash = &flash0;
24		zephyr,display = &st7735;
25	};
26
27	leds {
28		compatible = "gpio-leds";
29		red_led: led_0 {
30			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
31			label = "LED0";
32		};
33		green_led: led_1 {
34			gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
35			label = "LED1";
36		};
37	};
38
39	buttons {
40		compatible = "gpio-keys";
41		pb0: pb0 {
42			gpios = <&gpio4 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
43			label = "SW2";
44			zephyr,code = <INPUT_KEY_0>;
45		};
46	};
47
48	aliases {
49		led0 = &red_led;
50		led1 = &green_led;
51		sw0 = &pb0;
52		watchdog0 = &wdt0;
53	 };
54
55	mipi_dbi {
56		compatible = "zephyr,mipi-dbi-spi";
57		spi-dev = <&spibb0>;
58		#address-cells = <1>;
59		#size-cells = <0>;
60
61		status = "okay";
62
63		st7735: st7735@0 {
64			compatible = "sitronix,st7735r";
65			mipi-max-frequency = <DT_FREQ_M(6)>;
66			mipi-mode = "MIPI_DBI_MODE_SPI_3WIRE";
67
68			reg = <0>;
69			width = <130>;
70			height = <132>;
71			x-offset = <0>;
72			y-offset = <0>;
73			madctl = <0xc0>;
74			colmod = <0x05>;
75			vmctr1 = <0x51>;
76			pwctr1 = [02 02];
77			pwctr2 = [c5];
78			pwctr3 = [0d 00];
79			pwctr4 = [8d 1a];
80			pwctr5 = [8d ee];
81			frmctr1 = [02 35 36];
82			frmctr2 = [02 35 36];
83			frmctr3 = [02 35 36 02 35 36];
84			gamctrp1 = [0a 1c 0c 14 33 2b 24 28 27 25 2c 39 00 05 03 0d];
85			gamctrn1 = [0a 1c 0c 14 33 2b 24 28 27 25 2d 3a 00 05 03 0d];
86		};
87	};
88
89	spibb0: spibb0 {
90		compatible = "zephyr,spi-bitbang";
91		status="okay";
92		#address-cells = <1>;
93		#size-cells = <0>;
94		clk-gpios = <&gpio2 25 (GPIO_ACTIVE_HIGH | MAX32_GPIO_VSEL_VDDIOH)>;
95		mosi-gpios = <&gpio2 24 (GPIO_ACTIVE_HIGH | MAX32_GPIO_VSEL_VDDIOH)>;
96		cs-gpios = <&gpio2 11 (GPIO_ACTIVE_LOW | MAX32_GPIO_VSEL_VDDIOH)>;
97	};
98};
99
100&clk_ipo {
101	status = "okay";
102};
103
104&clk_ibro {
105	status = "okay";
106};
107
108&gpio0 {
109	status = "okay";
110};
111
112&gpio1 {
113	status = "okay";
114};
115
116&gpio2 {
117	status = "okay";
118};
119
120&gpio3 {
121	status = "okay";
122};
123
124&gpio4 {
125	status = "okay";
126};
127
128&uart2 {
129	clock-source = <ADI_MAX32_PRPH_CLK_SRC_IBRO>;
130	pinctrl-0 = <&uart2a_tx_p1_10 &uart2a_rx_p1_9>;
131	pinctrl-names = "default";
132	current-speed = <115200>;
133	data-bits = <8>;
134	parity = "none";
135	status = "okay";
136};
137
138&trng {
139	status = "okay";
140};
141
142&i2c0 {
143	status = "okay";
144	pinctrl-0 = <&i2c0a_scl_p2_8 &i2c0a_sda_p2_7>;
145	pinctrl-names = "default";
146};
147
148&dma0 {
149	status = "okay";
150};
151
152&wdt0 {
153	status = "okay";
154};
155
156&spi0 {
157	status = "okay";
158	pinctrl-0 = <&spi0b_mosi_p2_28 &spi0b_miso_p2_27 &spi0b_sck_p2_29 &spi0b_ss1_p2_26>;
159	pinctrl-names = "default";
160};
161
162&w1 {
163	pinctrl-0 = <&owm_io_p0_8 &owm_pe_p0_7>;
164	pinctrl-names = "default";
165};
166
167&rtc_counter {
168	status = "okay";
169};
170