README.rst
1.. _cache_coex_test:
2
3Espressif ESP32 PSRAM/SPI Flash co-existence test
4#################################################
5
6Overview
7********
8
9This code tests SPI Flash and PSRAM content integrity after multithreaded and concurrent accesses to
10a common cache. It does so by allocating a big PSRAM memory chunk and repeatedly filling that region
11with a random generated pattern. At the same time, a whole SPI Flash page is updated with another pattern
12value. By the end of the thread iterations, both PSRAM and SPI Flash have its contents compared against
13expected values to check for integrity.
14
15Supported Boards
16****************
17- esp32_devkitc_wrover
18- esp32s2_saola
19- esp32s3_devkitm
20
21Building and Running
22********************
23
24Make sure you have the target connected over USB port.
25
26.. code-block:: console
27
28 west build -b <board> tests/boards/espressif_esp32/cache_coex
29 west flash && west espressif monitor
30
31Sample Output
32=============
33
34.. code-block:: console
35
36 Running TESTSUITE cache_coex
37 ===================================================================
38 START - test_flash_integrity
39 PASS - test_flash_integrity in 0.001 seconds
40 ===================================================================
41 START - test_ram_integrity
42 PASS - test_ram_integrity in 0.001 seconds
43 ===================================================================
44 START - test_using_spiram
45 PASS - test_using_spiram in 0.001 seconds
46 ===================================================================
47 TESTSUITE cache_coex succeeded
48 ------ TESTSUITE SUMMARY START ------
49 SUITE PASS - 100.00% [cache_coex]: pass = 3, fail = 0, skip = 0, total = 3 duration = 0.003 seconds
50 - PASS - [cache_coex.test_flash_integrity] duration = 0.001 seconds
51 - PASS - [cache_coex.test_ram_integrity] duration = 0.001 seconds
52 - PASS - [cache_coex.test_using_spiram] duration = 0.001 seconds
53 ------ TESTSUITE SUMMARY END ------
54 ===================================================================
55 PROJECT EXECUTION SUCCESSFUL
56
