1/*
2 * Copyright (c) 2018 Linaro Limited
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <mem.h>
8#include <st/f1/stm32f1.dtsi>
9
10/ {
11	sram0: memory@20000000 {
12		reg = <0x20000000 DT_SIZE_K(20)>;
13	};
14
15	soc {
16		compatible = "st,stm32f103", "st,stm32f1", "simple-bus";
17
18		flash-controller@40022000 {
19			flash0: flash@8000000 {
20				reg = <0x08000000 DT_SIZE_K(64)>;
21				erase-block-size = <DT_SIZE_K(1)>;
22			};
23		};
24
25		/* spi2 is present on all STM32F103x8 SoCs except
26		 * STM32F103T8. Delete node in stm32f103t8.dtsi.
27		 */
28		spi2: spi@40003800 {
29			compatible = "st,stm32-spi";
30			#address-cells = <1>;
31			#size-cells = <0>;
32			reg = <0x40003800 0x400>;
33			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
34			interrupts = <36 5>;
35			status = "disabled";
36		};
37
38		usb: usb@40005c00 {
39			compatible = "st,stm32-usb";
40			reg = <0x40005c00 0x400>;
41			interrupts = <20 0>;
42			interrupt-names = "usb";
43			num-bidir-endpoints = <8>;
44			ram-size = <512>;
45			status = "disabled";
46			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>;
47			phys = <&usb_fs_phy>;
48		};
49
50		can1: can@40006400 {
51			compatible = "st,stm32-bxcan";
52			reg = <0x40006400 0x400>;
53			interrupts = <19 0>, <20 0>, <21 0>, <22 0>;
54			interrupt-names = "TX", "RX0", "RX1", "SCE";
55			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x02000000>;
56			status = "disabled";
57		};
58	};
59
60	usb_fs_phy: usbphy {
61		compatible = "usb-nop-xceiv";
62		#phy-cells = <0>;
63	};
64};
65