1.. _mimxrt595_evk:
2
3NXP MIMXRT595-EVK
4##################
5
6Overview
7********
8
9i.MX RT500 crossover MCUs are part of the edge computing family and are optimized
10for low-power HMI applications by combining a graphics engine and a streamlined
11Cadence Tensilica Fusion F1 DSP core with a next-generation Arm Cortex-M33
12core. These devices are designed to unlock the potential of display-based applications
13with a secure, power-optimized embedded processor.
14
15i.MX RT500 MCUs provides up to 5MB of on-chip SRAM and several high-bandwidth interfaces
16to access off-chip flash, including an Octal/Quad SPI interface with an on-the-fly
17decryption engine.
18
19.. image:: mimxrt595_evk.jpg
20   :align: center
21   :alt: MIMXRT595-EVK
22
23Hardware
24********
25
26- MIMXRT595SFFOC Cortex-M33 (275 MHz) core processor with Cadence Tensilica Fusion F1 DSP
27- Onboard, high-speed USB, Link2 debug probe with CMSIS-DAP protocol (supporting Cortex M33 debug only)
28- USB2.0 high-speed host and device with micro USB connector and external crystal
29- Octal/Quad/pSRAM external memories via FlexSPI
30- 5 MB system SRAM
31- Full size SD card slot (SDIO)
32- On-board eMMC chip
33- On-board 5 V inputs NXP PCA9420UK PMIC providing 1.2 V, 1.8 V, 3.3 V
34- User LEDs
35- Reset and User buttons
36- MIPI-DSI connector
37- Single row headers for ARDUINO signals and MikroBus connector
38- FlexIO connector for MikroElektronica TFT Proto 5 inch capacitive touch display
39- One motion sensor combo accelero-/magneto-meter NXP FXOS8700CQ
40- Stereo audio codec with line-In/ line-Out/ and Microphone
41- Pmod/host expansion connector
42- NXP TFA9896 audio digital amplifier
43- Support for up to eight off-board digital microphones via 12-pin header
44- Two on-board digital microphones
45
46For more information about the MIMXRT595 SoC and MIMXRT595-EVK board, see
47these references:
48
49- `i.MX RT595 Website`_
50- `i.MX RT595 Datasheet`_
51- `i.MX RT595 Reference Manual`_
52- `MIMXRT595-EVK Website`_
53- `MIMXRT595-EVK User Guide`_
54- `MIMXRT595-EVK Schematics`_
55- `MIMXRT595-EVK Debug Firmware`_
56
57Supported Features
58==================
59
60NXP considers the MIMXRT595-EVK as a superset board for the i.MX RT5xx
61family of MCUs.  This board is a focus for NXP's Full Platform Support for
62Zephyr, to better enable the entire RT5xx family.  NXP prioritizes enabling
63this board with new support for Zephyr features.  The mimxrt595_evk board
64configuration supports the hardware features below.  Another very similar
65board is the :ref:`mimxrt685_evk`, and that board may have additional features
66already supported, which can also be re-used on this mimxrt595_evk board:
67
68+-----------+------------+-------------------------------------+
69| Interface | Controller | Driver/Component                    |
70+===========+============+=====================================+
71| NVIC      | on-chip    | nested vector interrupt controller  |
72+-----------+------------+-------------------------------------+
73| SYSTICK   | on-chip    | systick                             |
74+-----------+------------+-------------------------------------+
75| OS_TIMER  | on-chip    | os timer                            |
76+-----------+------------+-------------------------------------+
77| IOCON     | on-chip    | pinmux                              |
78+-----------+------------+-------------------------------------+
79| GPIO      | on-chip    | gpio                                |
80+-----------+------------+-------------------------------------+
81| USART     | on-chip    | serial port-polling;                |
82|           |            | serial port-interrupt               |
83+-----------+------------+-------------------------------------+
84| CLOCK     | on-chip    | clock_control                       |
85+-----------+------------+-------------------------------------+
86| I2C       | on-chip    | i2c                                 |
87+-----------+------------+-------------------------------------+
88| SPI       | on-chip    | spi                                 |
89+-----------+------------+-------------------------------------+
90| CTIMER    | on-chip    | counter                             |
91+-----------+------------+-------------------------------------+
92| WDT       | on-chip    | watchdog                            |
93+-----------+------------+-------------------------------------+
94| FLASH     | on-chip    | OctalSPI Flash                      |
95+-----------+------------+-------------------------------------+
96| TRNG      | on-chip    | entropy                             |
97+-----------+------------+-------------------------------------+
98| USB       | on-chip    | USB device                          |
99+-----------+------------+-------------------------------------+
100| FLEXSPI   | on-chip    | flash programming                   |
101+-----------+------------+-------------------------------------+
102| RTC       | on-chip    | counter                             |
103+-----------+------------+-------------------------------------+
104| PM        | on-chip    | power management; uses SoC sleep,   |
105|           |            | deep sleep and deep-powerdown modes |
106+-----------+------------+-------------------------------------+
107| SDHC      | on-chip    | disk access (works with eMMC & SD)  |
108+-----------+------------+-------------------------------------+
109| I2S       | on-chip    | i2s                                 |
110+-----------+------------+-------------------------------------+
111| DISPLAY   | on-chip    | LCDIF; MIPI-DSI. Tested with        |
112|           |            | :ref:`rk055hdmipi4m`,               |
113|           |            | :ref:`rk055hdmipi4ma0`, and         |
114|           |            | :ref:`g1120b0mipi` display shields  |
115+-----------+------------+-------------------------------------+
116| DMIC      | on-chip    | dmic                                |
117+-----------+------------+-------------------------------------+
118
119The default configuration can be found in the defconfig file:
120
121   :zephyr_file:`boards/nxp/mimxrt595_evk/mimxrt595_evk_mimxrt595s_cm33_defconfig`
122
123Other hardware features are not currently supported by the port.
124
125Connections and IOs
126===================
127
128The MIMXRT595 SoC has IOCON registers, which can be used to configure the
129functionality of a pin.
130
131+---------+-----------------+----------------------------+
132| Name    | Function        | Usage                      |
133+=========+=================+============================+
134| PIO0_2  | USART0          | USART RX                   |
135+---------+-----------------+----------------------------+
136| PIO0_1  | USART0          | USART TX                   |
137+---------+-----------------+----------------------------+
138| PIO0_14 | GPIO            | GREEN LED                  |
139+---------+-----------------+----------------------------+
140| PIO0_25 | GPIO            | SW0                        |
141+---------+-----------------+----------------------------+
142| PIO0_10 | GPIO            | SW1                        |
143+---------+-----------------+----------------------------+
144| PIO4_30 | USART12         | USART TX                   |
145+---------+-----------------+----------------------------+
146| PIO4_31 | USART12         | USART RX                   |
147+---------+-----------------+----------------------------+
148| PIO0_29 | I2C             | I2C SCL                    |
149+---------+-----------------+----------------------------+
150| PIO0_30 | I2C             | I2C SDA                    |
151+---------+-----------------+----------------------------+
152| PIO0_22 | GPIO            | FXOS8700 TRIGGER           |
153+---------+-----------------+----------------------------+
154| PIO1_5  | SPI             | SPI MOSI                   |
155+---------+-----------------+----------------------------+
156| PIO1_4  | SPI             | SPI MISO                   |
157+---------+-----------------+----------------------------+
158| PIO1_3  | SPI             | SPI SCK                    |
159+---------+-----------------+----------------------------+
160| PIO1_6  | SPI             | SPI SSEL                   |
161+---------+-----------------+----------------------------+
162| PIO0_5  | SCT0            | SCT0 GPI0                  |
163+---------+-----------------+----------------------------+
164| PIO0_6  | SCT0            | SCT0 GPI1                  |
165+---------+-----------------+----------------------------+
166
167System Clock
168============
169
170The MIMXRT595 EVK is configured to use the OS Event timer
171as a source for the system clock.
172
173Serial Port
174===========
175
176The MIMXRT595 SoC has 13 FLEXCOMM interfaces for serial communication. One is
177configured as USART for the console and the remaining are not used.
178
179Fusion F1 DSP Core
180==================
181
182You can build a Zephyr application for the RT500 DSP core by targeting the F1
183SOC. Xtensa toolchain supporting RT500 DSP core is included in Zephyr SDK.
184To build the hello_world sample for the RT500 DSP core:
185
186.. code-block:: shell
187
188   $ west build -b mimxrt595_evk/mimxrt595s/f1 samples/hello_world
189
190For detailed instructions on how to debug DSP firmware, please refer to
191this document: `Getting Started with Xplorer for EVK-MIMXRT595`_
192
193Programming and Debugging
194*************************
195
196Build and flash applications as usual (see :ref:`build_an_application` and
197:ref:`application_run` for more details).
198
199Configuring a Debug Probe
200=========================
201
202A debug probe is used for both flashing and debugging the board. This board is
203configured by default to use the LPC-Link2.
204
205.. tabs::
206
207    .. group-tab:: LPCLink2 JLink Onboard
208
209
210        1. Install the :ref:`jlink-debug-host-tools` and make sure they are in your search path.
211        2. To connect the SWD signals to onboard debug circuit, install jumpers JP17, JP18 and JP19,
212           if not already done (these jumpers are installed by default).
213        3. Follow the instructions in :ref:`lpclink2-jlink-onboard-debug-probe` to program the
214           J-Link firmware. Please make sure you have the latest firmware for this board.
215
216    .. group-tab:: JLink External
217
218
219        1. Install the :ref:`jlink-debug-host-tools` and make sure they are in your search path.
220
221        2. To disconnect the SWD signals from onboard debug circuit, **remove** jumpers J17, J18,
222           and J19 (these are installed by default).
223
224        3. Connect the J-Link probe to J2 10-pin header.
225
226        See :ref:`jlink-external-debug-probe` for more information.
227
228    .. group-tab:: Linkserver
229
230        1. Install the :ref:`linkserver-debug-host-tools` and make sure they are in your search path.
231        2. To update the debug firmware, please follow the instructions on `MIMXRT595-EVK Debug Firmware`
232
233Configuring a Console
234=====================
235
236Connect a USB cable from your PC to J40, and use the serial terminal of your choice
237(minicom, putty, etc.) with the following settings:
238
239- Speed: 115200
240- Data: 8 bits
241- Parity: None
242- Stop bits: 1
243
244Flashing
245========
246
247Here is an example for the :ref:`hello_world` application. This example uses the
248:ref:`jlink-debug-host-tools` as default.
249
250.. zephyr-app-commands::
251   :zephyr-app: samples/hello_world
252   :board: mimxrt595_evk/mimxrt595s/cm33
253   :goals: flash
254
255Open a serial terminal, reset the board (press the RESET button), and you should
256see the following message in the terminal:
257
258.. code-block:: console
259
260   *** Booting Zephyr OS v2.7 ***
261   Hello World! mimxrt595_evk
262
263Debugging
264=========
265
266Here is an example for the :ref:`hello_world` application. This example uses the
267:ref:`jlink-debug-host-tools` as default.
268
269.. zephyr-app-commands::
270   :zephyr-app: samples/hello_world
271   :board: mimxrt595_evk/mimxrt595s/cm33
272   :goals: debug
273
274Open a serial terminal, step through the application in your debugger, and you
275should see the following message in the terminal:
276
277.. code-block:: console
278
279   *** Booting Zephyr OS v2.7 ***
280   Hello World! mimxrt595_evk
281
282Troubleshooting
283===============
284
285If the debug probe fails to connect with the following error, it's possible
286that the image in flash is interfering and causing this issue.
287
288.. code-block:: console
289
290   Remote debugging using :2331
291   Remote communication error.  Target disconnected.: Connection reset by peer.
292   "monitor" command not supported by this target.
293   "monitor" command not supported by this target.
294   You can't do that when your target is `exec'
295   (gdb) Could not connect to target.
296   Please check power, connection and settings.
297
298You can fix it by erasing and reprogramming the flash with the following
299steps:
300
301#. Set the SW7 DIP switches to ON-ON-ON to prevent booting from flash.
302
303#. Reset by pressing SW3
304
305#. Run ``west debug`` or ``west flash`` again with a known working Zephyr
306   application (example "Hello World").
307
308#. Set the SW5 DIP switches to OFF-OFF-ON to boot from flash.
309
310#. Reset by pressing SW3
311
312.. _MIMXRT595-EVK Website:
313   https://www.nxp.com/design/development-boards/i-mx-evaluation-and-development-boards/i-mx-rt595-evaluation-kit:MIMXRT595-EVK
314
315.. _MIMXRT595-EVK User Guide:
316   https://www.nxp.com/webapp/Download?colCode=MIMXRT595EVKHUG
317
318.. _MIMXRT595-EVK Debug Firmware:
319   https://www.nxp.com/docs/en/application-note/AN13206.pdf
320
321.. _MIMXRT595-EVK Schematics:
322   https://www.nxp.com/downloads/en/schematics/MIMXRT595-EVK-DESIGN-FILES.zip
323
324.. _i.MX RT595 Website:
325   https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/i-mx-rt-crossover-mcus/i-mx-rt500-crossover-mcu-with-arm-cortex-m33-dsp-and-gpu-cores:i.MX-RT500
326
327.. _i.MX RT595 Datasheet:
328   https://www.nxp.com/docs/en/data-sheet/IMXRT500EC.pdf
329
330.. _i.MX RT595 Reference Manual:
331   https://www.nxp.com/webapp/Download?colCode=IMXRT500RM
332
333.. _Getting Started with Xplorer for EVK-MIMXRT595:
334   https://www.nxp.com/docs/en/supporting-information/GSXEVKMIMXRT595.pdf
335